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authorPeter Zijlstra <peterz@infradead.org>2018-09-04 11:04:07 -0400
committerIngo Molnar <mingo@kernel.org>2019-04-03 04:32:54 -0400
commit6137fed0823247e32306bde2b48cac627c24f894 (patch)
tree73fe1d4bac3022a68e12f0798b1f21d9b4af6d5f /arch
parent7bb8709d6ad3ceeb5010a98b0d7eb11db8836da1 (diff)
arch/tlb: Clean up simple architectures
For the architectures that do not implement their own tlb_flush() but do already use the generic mmu_gather, there are two options: 1) the platform has an efficient flush_tlb_range() and asm-generic/tlb.h doesn't need any overrides at all. 2) the platform lacks an efficient flush_tlb_range() and we select MMU_GATHER_NO_RANGE to minimize full invalidates. Convert all 'simple' architectures to one of these two forms. alpha: has no range invalidate -> 2 arc: already used flush_tlb_range() -> 1 c6x: has no range invalidate -> 2 hexagon: has an efficient flush_tlb_range() -> 1 (flush_tlb_mm() is in fact a full range invalidate, so no need to shoot down everything) m68k: has inefficient flush_tlb_range() -> 2 microblaze: has no flush_tlb_range() -> 2 mips: has efficient flush_tlb_range() -> 1 (even though it currently seems to use flush_tlb_mm()) nds32: already uses flush_tlb_range() -> 1 nios2: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) openrisc: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) parisc: already uses flush_tlb_range() -> 1 sparc32: already uses flush_tlb_range() -> 1 unicore32: has inefficient flush_tlb_range() -> 2 (no limit on range iteration) xtensa: has efficient flush_tlb_range() -> 1 Note this also fixes a bug in the existing code for a number platforms. Those platforms that did: tlb_end_vma() -> if (!full_mm) flush_tlb_*() tlb_flush -> if (full_mm) flush_tlb_mm() missed the case of shift_arg_pages(), which doesn't have @fullmm set, nor calls into tlb_*vma(), but still frees page-tables and thus needs an invalidate. The new code handles this by detecting a non-empty range, and either issuing the matching range invalidate or a full invalidate, depending on the capabilities. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David S. Miller <davem@davemloft.net> Cc: Greentime Hu <green.hu@gmail.com> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Helge Deller <deller@gmx.de> Cc: Jonas Bonn <jonas@southpole.se> Cc: Ley Foon Tan <lftan@altera.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Salter <msalter@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Nick Piggin <npiggin@gmail.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Richard Kuo <rkuo@codeaurora.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/Kconfig1
-rw-r--r--arch/alpha/include/asm/tlb.h6
-rw-r--r--arch/arc/include/asm/tlb.h23
-rw-r--r--arch/c6x/Kconfig1
-rw-r--r--arch/c6x/include/asm/tlb.h2
-rw-r--r--arch/h8300/include/asm/tlb.h2
-rw-r--r--arch/hexagon/include/asm/tlb.h12
-rw-r--r--arch/m68k/Kconfig1
-rw-r--r--arch/m68k/include/asm/tlb.h14
-rw-r--r--arch/microblaze/Kconfig1
-rw-r--r--arch/microblaze/include/asm/tlb.h9
-rw-r--r--arch/mips/include/asm/tlb.h8
-rw-r--r--arch/nds32/include/asm/tlb.h10
-rw-r--r--arch/nios2/Kconfig1
-rw-r--r--arch/nios2/include/asm/tlb.h8
-rw-r--r--arch/openrisc/Kconfig1
-rw-r--r--arch/openrisc/include/asm/tlb.h8
-rw-r--r--arch/parisc/include/asm/tlb.h13
-rw-r--r--arch/sparc/include/asm/tlb_32.h13
-rw-r--r--arch/unicore32/Kconfig1
-rw-r--r--arch/unicore32/include/asm/tlb.h7
-rw-r--r--arch/xtensa/include/asm/tlb.h17
22 files changed, 16 insertions, 143 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 584a6e114853..c7c976eb6407 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -36,6 +36,7 @@ config ALPHA
36 select ODD_RT_SIGACTION 36 select ODD_RT_SIGACTION
37 select OLD_SIGSUSPEND 37 select OLD_SIGSUSPEND
38 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67 38 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
39 select MMU_GATHER_NO_RANGE
39 help 40 help
40 The Alpha is a 64-bit general-purpose processor designed and 41 The Alpha is a 64-bit general-purpose processor designed and
41 marketed by the Digital Equipment Corporation of blessed memory, 42 marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/include/asm/tlb.h b/arch/alpha/include/asm/tlb.h
index 8f5042b61875..4f79e331af5e 100644
--- a/arch/alpha/include/asm/tlb.h
+++ b/arch/alpha/include/asm/tlb.h
@@ -2,12 +2,6 @@
2#ifndef _ALPHA_TLB_H 2#ifndef _ALPHA_TLB_H
3#define _ALPHA_TLB_H 3#define _ALPHA_TLB_H
4 4
5#define tlb_start_vma(tlb, vma) do { } while (0)
6#define tlb_end_vma(tlb, vma) do { } while (0)
7#define __tlb_remove_tlb_entry(tlb, pte, addr) do { } while (0)
8
9#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
10
11#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
12 6
13#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte) 7#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)
diff --git a/arch/arc/include/asm/tlb.h b/arch/arc/include/asm/tlb.h
index 7af2b373ebe7..90cac97643a4 100644
--- a/arch/arc/include/asm/tlb.h
+++ b/arch/arc/include/asm/tlb.h
@@ -9,29 +9,6 @@
9#ifndef _ASM_ARC_TLB_H 9#ifndef _ASM_ARC_TLB_H
10#define _ASM_ARC_TLB_H 10#define _ASM_ARC_TLB_H
11 11
12#define tlb_flush(tlb) \
13do { \
14 if (tlb->fullmm) \
15 flush_tlb_mm((tlb)->mm); \
16} while (0)
17
18/*
19 * This pair is called at time of munmap/exit to flush cache and TLB entries
20 * for mappings being torn down.
21 * 1) cache-flush part -implemented via tlb_start_vma( ) for VIPT aliasing D$
22 * 2) tlb-flush part - implemted via tlb_end_vma( ) flushes the TLB range
23 *
24 * Note, read http://lkml.org/lkml/2004/1/15/6
25 */
26
27#define tlb_end_vma(tlb, vma) \
28do { \
29 if (!tlb->fullmm) \
30 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
31} while (0)
32
33#define __tlb_remove_tlb_entry(tlb, ptep, address)
34
35#include <linux/pagemap.h> 12#include <linux/pagemap.h>
36#include <asm-generic/tlb.h> 13#include <asm-generic/tlb.h>
37 14
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index e5cd3c5f8399..3bb75e674161 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -20,6 +20,7 @@ config C6X
20 select GENERIC_CLOCKEVENTS 20 select GENERIC_CLOCKEVENTS
21 select MODULES_USE_ELF_RELA 21 select MODULES_USE_ELF_RELA
22 select ARCH_NO_COHERENT_DMA_MMAP 22 select ARCH_NO_COHERENT_DMA_MMAP
23 select MMU_GATHER_NO_RANGE if MMU
23 24
24config MMU 25config MMU
25 def_bool n 26 def_bool n
diff --git a/arch/c6x/include/asm/tlb.h b/arch/c6x/include/asm/tlb.h
index 34525dea1356..240ba0febb57 100644
--- a/arch/c6x/include/asm/tlb.h
+++ b/arch/c6x/include/asm/tlb.h
@@ -2,8 +2,6 @@
2#ifndef _ASM_C6X_TLB_H 2#ifndef _ASM_C6X_TLB_H
3#define _ASM_C6X_TLB_H 3#define _ASM_C6X_TLB_H
4 4
5#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
6
7#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
8 6
9#endif /* _ASM_C6X_TLB_H */ 7#endif /* _ASM_C6X_TLB_H */
diff --git a/arch/h8300/include/asm/tlb.h b/arch/h8300/include/asm/tlb.h
index 98f344279904..d8201ca31206 100644
--- a/arch/h8300/include/asm/tlb.h
+++ b/arch/h8300/include/asm/tlb.h
@@ -2,8 +2,6 @@
2#ifndef __H8300_TLB_H__ 2#ifndef __H8300_TLB_H__
3#define __H8300_TLB_H__ 3#define __H8300_TLB_H__
4 4
5#define tlb_flush(tlb) do { } while (0)
6
7#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
8 6
9#endif 7#endif
diff --git a/arch/hexagon/include/asm/tlb.h b/arch/hexagon/include/asm/tlb.h
index 2f00772cc08a..f71c4ba83614 100644
--- a/arch/hexagon/include/asm/tlb.h
+++ b/arch/hexagon/include/asm/tlb.h
@@ -22,18 +22,6 @@
22#include <linux/pagemap.h> 22#include <linux/pagemap.h>
23#include <asm/tlbflush.h> 23#include <asm/tlbflush.h>
24 24
25/*
26 * We don't need any special per-pte or per-vma handling...
27 */
28#define tlb_start_vma(tlb, vma) do { } while (0)
29#define tlb_end_vma(tlb, vma) do { } while (0)
30#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
31
32/*
33 * .. because we flush the whole mm when it fills up
34 */
35#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
36
37#include <asm-generic/tlb.h> 25#include <asm-generic/tlb.h>
38 26
39#endif 27#endif
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index b54206408f91..4e37efbc9296 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -28,6 +28,7 @@ config M68K
28 select OLD_SIGSUSPEND3 28 select OLD_SIGSUSPEND3
29 select OLD_SIGACTION 29 select OLD_SIGACTION
30 select ARCH_DISCARD_MEMBLOCK 30 select ARCH_DISCARD_MEMBLOCK
31 select MMU_GATHER_NO_RANGE if MMU
31 32
32config CPU_BIG_ENDIAN 33config CPU_BIG_ENDIAN
33 def_bool y 34 def_bool y
diff --git a/arch/m68k/include/asm/tlb.h b/arch/m68k/include/asm/tlb.h
index b4b9efb6f963..3c81f6adfc8b 100644
--- a/arch/m68k/include/asm/tlb.h
+++ b/arch/m68k/include/asm/tlb.h
@@ -2,20 +2,6 @@
2#ifndef _M68K_TLB_H 2#ifndef _M68K_TLB_H
3#define _M68K_TLB_H 3#define _M68K_TLB_H
4 4
5/*
6 * m68k doesn't need any special per-pte or
7 * per-vma handling..
8 */
9#define tlb_start_vma(tlb, vma) do { } while (0)
10#define tlb_end_vma(tlb, vma) do { } while (0)
11#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
12
13/*
14 * .. because we flush the whole mm when it
15 * fills up.
16 */
17#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
18
19#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
20 6
21#endif /* _M68K_TLB_H */ 7#endif /* _M68K_TLB_H */
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index a51b965b3b82..321e398ab6b5 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -41,6 +41,7 @@ config MICROBLAZE
41 select TRACING_SUPPORT 41 select TRACING_SUPPORT
42 select VIRT_TO_BUS 42 select VIRT_TO_BUS
43 select CPU_NO_EFFICIENT_FFS 43 select CPU_NO_EFFICIENT_FFS
44 select MMU_GATHER_NO_RANGE if MMU
44 45
45# Endianness selection 46# Endianness selection
46choice 47choice
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
index 99b6ded54849..628a78ee0a72 100644
--- a/arch/microblaze/include/asm/tlb.h
+++ b/arch/microblaze/include/asm/tlb.h
@@ -11,16 +11,7 @@
11#ifndef _ASM_MICROBLAZE_TLB_H 11#ifndef _ASM_MICROBLAZE_TLB_H
12#define _ASM_MICROBLAZE_TLB_H 12#define _ASM_MICROBLAZE_TLB_H
13 13
14#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
15
16#include <linux/pagemap.h> 14#include <linux/pagemap.h>
17
18#ifdef CONFIG_MMU
19#define tlb_start_vma(tlb, vma) do { } while (0)
20#define tlb_end_vma(tlb, vma) do { } while (0)
21#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
22#endif
23
24#include <asm-generic/tlb.h> 15#include <asm-generic/tlb.h>
25 16
26#endif /* _ASM_MICROBLAZE_TLB_H */ 17#endif /* _ASM_MICROBLAZE_TLB_H */
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h
index 32b8a8187733..90f3ad76d9e0 100644
--- a/arch/mips/include/asm/tlb.h
+++ b/arch/mips/include/asm/tlb.h
@@ -5,14 +5,6 @@
5#include <asm/cpu-features.h> 5#include <asm/cpu-features.h>
6#include <asm/mipsregs.h> 6#include <asm/mipsregs.h>
7 7
8#define tlb_end_vma(tlb, vma) do { } while (0)
9#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
10
11/*
12 * .. because we flush the whole mm when it fills up.
13 */
14#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
15
16#define _UNIQUE_ENTRYHI(base, idx) \ 8#define _UNIQUE_ENTRYHI(base, idx) \
17 (((base) + ((idx) << (PAGE_SHIFT + 1))) | \ 9 (((base) + ((idx) << (PAGE_SHIFT + 1))) | \
18 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0)) 10 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0))
diff --git a/arch/nds32/include/asm/tlb.h b/arch/nds32/include/asm/tlb.h
index 0bf7c9482381..d5ae571c8d30 100644
--- a/arch/nds32/include/asm/tlb.h
+++ b/arch/nds32/include/asm/tlb.h
@@ -4,16 +4,6 @@
4#ifndef __ASMNDS32_TLB_H 4#ifndef __ASMNDS32_TLB_H
5#define __ASMNDS32_TLB_H 5#define __ASMNDS32_TLB_H
6 6
7#define tlb_end_vma(tlb,vma) \
8 do { \
9 if(!tlb->fullmm) \
10 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
11 } while (0)
12
13#define __tlb_remove_tlb_entry(tlb, pte, addr) do { } while (0)
14
15#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
16
17#include <asm-generic/tlb.h> 7#include <asm-generic/tlb.h>
18 8
19#define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, pte) 9#define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, pte)
diff --git a/arch/nios2/Kconfig b/arch/nios2/Kconfig
index 4ef15a61b7bc..3633f8144367 100644
--- a/arch/nios2/Kconfig
+++ b/arch/nios2/Kconfig
@@ -24,6 +24,7 @@ config NIOS2
24 select USB_ARCH_HAS_HCD if USB_SUPPORT 24 select USB_ARCH_HAS_HCD if USB_SUPPORT
25 select CPU_NO_EFFICIENT_FFS 25 select CPU_NO_EFFICIENT_FFS
26 select ARCH_DISCARD_MEMBLOCK 26 select ARCH_DISCARD_MEMBLOCK
27 select MMU_GATHER_NO_RANGE if MMU
27 28
28config GENERIC_CSUM 29config GENERIC_CSUM
29 def_bool y 30 def_bool y
diff --git a/arch/nios2/include/asm/tlb.h b/arch/nios2/include/asm/tlb.h
index 9b518c6d0f62..f9f2e27e32dd 100644
--- a/arch/nios2/include/asm/tlb.h
+++ b/arch/nios2/include/asm/tlb.h
@@ -11,12 +11,12 @@
11#ifndef _ASM_NIOS2_TLB_H 11#ifndef _ASM_NIOS2_TLB_H
12#define _ASM_NIOS2_TLB_H 12#define _ASM_NIOS2_TLB_H
13 13
14#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
15
16extern void set_mmu_pid(unsigned long pid); 14extern void set_mmu_pid(unsigned long pid);
17 15
18#define tlb_end_vma(tlb, vma) do { } while (0) 16/*
19#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) 17 * NIOS32 does have flush_tlb_range(), but it lacks a limit and fallback to
18 * full mm invalidation. So use flush_tlb_mm() for everything.
19 */
20 20
21#include <linux/pagemap.h> 21#include <linux/pagemap.h>
22#include <asm-generic/tlb.h> 22#include <asm-generic/tlb.h>
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index a5e361fbb75a..c6cf8a49a0ab 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -36,6 +36,7 @@ config OPENRISC
36 select OMPIC if SMP 36 select OMPIC if SMP
37 select ARCH_WANT_FRAME_POINTERS 37 select ARCH_WANT_FRAME_POINTERS
38 select GENERIC_IRQ_MULTI_HANDLER 38 select GENERIC_IRQ_MULTI_HANDLER
39 select MMU_GATHER_NO_RANGE if MMU
39 40
40config CPU_BIG_ENDIAN 41config CPU_BIG_ENDIAN
41 def_bool y 42 def_bool y
diff --git a/arch/openrisc/include/asm/tlb.h b/arch/openrisc/include/asm/tlb.h
index fa4376a4515d..92d8a4209884 100644
--- a/arch/openrisc/include/asm/tlb.h
+++ b/arch/openrisc/include/asm/tlb.h
@@ -20,14 +20,10 @@
20#define __ASM_OPENRISC_TLB_H__ 20#define __ASM_OPENRISC_TLB_H__
21 21
22/* 22/*
23 * or32 doesn't need any special per-pte or 23 * OpenRISC doesn't have an efficient flush_tlb_range() so use flush_tlb_mm()
24 * per-vma handling.. 24 * for everything.
25 */ 25 */
26#define tlb_start_vma(tlb, vma) do { } while (0)
27#define tlb_end_vma(tlb, vma) do { } while (0)
28#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
29 26
30#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
31#include <linux/pagemap.h> 27#include <linux/pagemap.h>
32#include <asm-generic/tlb.h> 28#include <asm-generic/tlb.h>
33 29
diff --git a/arch/parisc/include/asm/tlb.h b/arch/parisc/include/asm/tlb.h
index b1984f9cd3af..8c0446b04c9e 100644
--- a/arch/parisc/include/asm/tlb.h
+++ b/arch/parisc/include/asm/tlb.h
@@ -2,19 +2,6 @@
2#ifndef _PARISC_TLB_H 2#ifndef _PARISC_TLB_H
3#define _PARISC_TLB_H 3#define _PARISC_TLB_H
4 4
5#define tlb_flush(tlb) \
6do { if ((tlb)->fullmm) \
7 flush_tlb_mm((tlb)->mm);\
8} while (0)
9
10#define tlb_end_vma(tlb, vma) \
11do { if (!(tlb)->fullmm) \
12 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
13} while (0)
14
15#define __tlb_remove_tlb_entry(tlb, pte, address) \
16 do { } while (0)
17
18#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
19 6
20#define __pmd_free_tlb(tlb, pmd, addr) pmd_free((tlb)->mm, pmd) 7#define __pmd_free_tlb(tlb, pmd, addr) pmd_free((tlb)->mm, pmd)
diff --git a/arch/sparc/include/asm/tlb_32.h b/arch/sparc/include/asm/tlb_32.h
index 68d817273de8..5cd28a8793e3 100644
--- a/arch/sparc/include/asm/tlb_32.h
+++ b/arch/sparc/include/asm/tlb_32.h
@@ -2,19 +2,6 @@
2#ifndef _SPARC_TLB_H 2#ifndef _SPARC_TLB_H
3#define _SPARC_TLB_H 3#define _SPARC_TLB_H
4 4
5#define tlb_end_vma(tlb, vma) \
6do { \
7 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
8} while (0)
9
10#define __tlb_remove_tlb_entry(tlb, pte, address) \
11 do { } while (0)
12
13#define tlb_flush(tlb) \
14do { \
15 flush_tlb_mm((tlb)->mm); \
16} while (0)
17
18#include <asm-generic/tlb.h> 5#include <asm-generic/tlb.h>
19 6
20#endif /* _SPARC_TLB_H */ 7#endif /* _SPARC_TLB_H */
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index 817d82608712..d83c8f70900d 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -20,6 +20,7 @@ config UNICORE32
20 select GENERIC_IOMAP 20 select GENERIC_IOMAP
21 select MODULES_USE_ELF_REL 21 select MODULES_USE_ELF_REL
22 select NEED_DMA_MAP_STATE 22 select NEED_DMA_MAP_STATE
23 select MMU_GATHER_NO_RANGE if MMU
23 help 24 help
24 UniCore-32 is 32-bit Instruction Set Architecture, 25 UniCore-32 is 32-bit Instruction Set Architecture,
25 including a series of low-power-consumption RISC chip 26 including a series of low-power-consumption RISC chip
diff --git a/arch/unicore32/include/asm/tlb.h b/arch/unicore32/include/asm/tlb.h
index 9cca15cdae94..00a8477333f6 100644
--- a/arch/unicore32/include/asm/tlb.h
+++ b/arch/unicore32/include/asm/tlb.h
@@ -12,10 +12,9 @@
12#ifndef __UNICORE_TLB_H__ 12#ifndef __UNICORE_TLB_H__
13#define __UNICORE_TLB_H__ 13#define __UNICORE_TLB_H__
14 14
15#define tlb_start_vma(tlb, vma) do { } while (0) 15/*
16#define tlb_end_vma(tlb, vma) do { } while (0) 16 * unicore32 lacks an efficient flush_tlb_range(), use flush_tlb_mm().
17#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) 17 */
18#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
19 18
20#define __pte_free_tlb(tlb, pte, addr) \ 19#define __pte_free_tlb(tlb, pte, addr) \
21 do { \ 20 do { \
diff --git a/arch/xtensa/include/asm/tlb.h b/arch/xtensa/include/asm/tlb.h
index 1a93e350382e..50889935138a 100644
--- a/arch/xtensa/include/asm/tlb.h
+++ b/arch/xtensa/include/asm/tlb.h
@@ -14,23 +14,6 @@
14#include <asm/cache.h> 14#include <asm/cache.h>
15#include <asm/page.h> 15#include <asm/page.h>
16 16
17#if (DCACHE_WAY_SIZE <= PAGE_SIZE)
18
19# define tlb_end_vma(tlb,vma) do { } while (0)
20
21#else
22
23# define tlb_end_vma(tlb, vma) \
24 do { \
25 if (!tlb->fullmm) \
26 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
27 } while(0)
28
29#endif
30
31#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
32#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
33
34#include <asm-generic/tlb.h> 17#include <asm-generic/tlb.h>
35 18
36#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte) 19#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 04:56:36 -0500