diff options
author | Dan Williams <dan.j.williams@intel.com> | 2018-01-29 20:02:33 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2018-01-30 15:54:29 -0500 |
commit | b3d7ad85b80bbc404635dca80f5b129f6242bc7a (patch) | |
tree | f3d1c6f5676006e25bcd8cf420bd3198657149ee /arch/x86 | |
parent | babdde2698d482b6c0de1eab4f697cf5856c5859 (diff) |
x86: Introduce barrier_nospec
Rename the open coded form of this instruction sequence from
rdtsc_ordered() into a generic barrier primitive, barrier_nospec().
One of the mitigations for Spectre variant1 vulnerabilities is to fence
speculative execution after successfully validating a bounds check. I.e.
force the result of a bounds check to resolve in the instruction pipeline
to ensure speculative execution honors that result before potentially
operating on out-of-bounds data.
No functional changes.
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Suggested-by: Andi Kleen <ak@linux.intel.com>
Suggested-by: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: kernel-hardening@lists.openwall.com
Cc: gregkh@linuxfoundation.org
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: alan@linux.intel.com
Link: https://lkml.kernel.org/r/151727415361.33451.9049453007262764675.stgit@dwillia2-desk3.amr.corp.intel.com
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/barrier.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/msr.h | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index 173b38f5fe88..30d406146016 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h | |||
@@ -48,6 +48,10 @@ static inline unsigned long array_index_mask_nospec(unsigned long index, | |||
48 | /* Override the default implementation from linux/nospec.h. */ | 48 | /* Override the default implementation from linux/nospec.h. */ |
49 | #define array_index_mask_nospec array_index_mask_nospec | 49 | #define array_index_mask_nospec array_index_mask_nospec |
50 | 50 | ||
51 | /* Prevent speculative execution past this barrier. */ | ||
52 | #define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \ | ||
53 | "lfence", X86_FEATURE_LFENCE_RDTSC) | ||
54 | |||
51 | #ifdef CONFIG_X86_PPRO_FENCE | 55 | #ifdef CONFIG_X86_PPRO_FENCE |
52 | #define dma_rmb() rmb() | 56 | #define dma_rmb() rmb() |
53 | #else | 57 | #else |
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 07962f5f6fba..30df295f6d94 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h | |||
@@ -214,8 +214,7 @@ static __always_inline unsigned long long rdtsc_ordered(void) | |||
214 | * that some other imaginary CPU is updating continuously with a | 214 | * that some other imaginary CPU is updating continuously with a |
215 | * time stamp. | 215 | * time stamp. |
216 | */ | 216 | */ |
217 | alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, | 217 | barrier_nospec(); |
218 | "lfence", X86_FEATURE_LFENCE_RDTSC); | ||
219 | return rdtsc(); | 218 | return rdtsc(); |
220 | } | 219 | } |
221 | 220 | ||