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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-08 14:54:43 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-08 14:54:43 -0500 |
commit | c1ff84317f1e7ec57a54c0bff48d21a78d7096c1 (patch) | |
tree | b68e4b7d87bbdaa225618d6e4f8beef5dc8aa244 /arch/x86/include | |
parent | ec2e6cb24a92a4a1d43119db3e5bf0b4401d9170 (diff) | |
parent | a3b072cd180c12e8fe0ece9487b9065808327640 (diff) |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Peter Anvin:
"Quite a varied little collection of fixes. Most of them are
relatively small or isolated; the biggest one is Mel Gorman's fixes
for TLB range flushing.
A couple of AMD-related fixes (including not crashing when given an
invalid microcode image) and fix a crash when compiled with gcov"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, microcode, AMD: Unify valid container checks
x86, hweight: Fix BUG when booting with CONFIG_GCOV_PROFILE_ALL=y
x86/efi: Allow mapping BGRT on x86-32
x86: Fix the initialization of physnode_map
x86, cpu hotplug: Fix stack frame warning in check_irq_vectors_for_cpu_disable()
x86/intel/mid: Fix X86_INTEL_MID dependencies
arch/x86/mm/srat: Skip NUMA_NO_NODE while parsing SLIT
mm, x86: Revisit tlb_flushall_shift tuning for page flushes except on IvyBridge
x86: mm: change tlb_flushall_shift for IvyBridge
x86/mm: Eliminate redundant page table walk during TLB range flushing
x86/mm: Clean up inconsistencies when flushing TLB ranges
mm, x86: Account for TLB flushes only when debugging
x86/AMD/NB: Fix amd_set_subcaches() parameter type
x86/quirks: Add workaround for AMD F16h Erratum792
x86, doc, kconfig: Fix dud URL for Microcode data
Diffstat (limited to 'arch/x86/include')
-rw-r--r-- | arch/x86/include/asm/amd_nb.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/tlbflush.h | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h index a54ee1d054d9..aaac3b2fb746 100644 --- a/arch/x86/include/asm/amd_nb.h +++ b/arch/x86/include/asm/amd_nb.h | |||
@@ -19,7 +19,7 @@ extern int amd_cache_northbridges(void); | |||
19 | extern void amd_flush_garts(void); | 19 | extern void amd_flush_garts(void); |
20 | extern int amd_numa_init(void); | 20 | extern int amd_numa_init(void); |
21 | extern int amd_get_subcaches(int); | 21 | extern int amd_get_subcaches(int); |
22 | extern int amd_set_subcaches(int, int); | 22 | extern int amd_set_subcaches(int, unsigned long); |
23 | 23 | ||
24 | struct amd_l3_cache { | 24 | struct amd_l3_cache { |
25 | unsigned indices; | 25 | unsigned indices; |
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index e6d90babc245..04905bfc508b 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h | |||
@@ -62,7 +62,7 @@ static inline void __flush_tlb_all(void) | |||
62 | 62 | ||
63 | static inline void __flush_tlb_one(unsigned long addr) | 63 | static inline void __flush_tlb_one(unsigned long addr) |
64 | { | 64 | { |
65 | count_vm_event(NR_TLB_LOCAL_FLUSH_ONE); | 65 | count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE); |
66 | __flush_tlb_single(addr); | 66 | __flush_tlb_single(addr); |
67 | } | 67 | } |
68 | 68 | ||
@@ -93,13 +93,13 @@ static inline void __flush_tlb_one(unsigned long addr) | |||
93 | */ | 93 | */ |
94 | static inline void __flush_tlb_up(void) | 94 | static inline void __flush_tlb_up(void) |
95 | { | 95 | { |
96 | count_vm_event(NR_TLB_LOCAL_FLUSH_ALL); | 96 | count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); |
97 | __flush_tlb(); | 97 | __flush_tlb(); |
98 | } | 98 | } |
99 | 99 | ||
100 | static inline void flush_tlb_all(void) | 100 | static inline void flush_tlb_all(void) |
101 | { | 101 | { |
102 | count_vm_event(NR_TLB_LOCAL_FLUSH_ALL); | 102 | count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); |
103 | __flush_tlb_all(); | 103 | __flush_tlb_all(); |
104 | } | 104 | } |
105 | 105 | ||