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authorJuergen Gross <jgross@suse.com>2015-07-17 00:51:22 -0400
committerDavid Vrabel <david.vrabel@citrix.com>2015-08-20 07:24:16 -0400
commit17fb46b1190b677a37cdd636e2aa30052109f51b (patch)
tree47461119ff01c254b7cd39a3cc5ab0cfab60f49b /arch/x86/include
parent7ed208ef4ef9dbd03cda8a5b5a85cc78f79ef213 (diff)
xen: sync with xen headers
Use the newest headers from the xen tree to get some new structure layouts. Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: David Vrabel <david.vrabel@citrix.com> Acked-by: Konrad Rzeszutek Wilk <Konrad.wilk@oracle.com> Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/xen/interface.h96
1 files changed, 87 insertions, 9 deletions
diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h
index 3400dbaec3c3..3b88eeacdbda 100644
--- a/arch/x86/include/asm/xen/interface.h
+++ b/arch/x86/include/asm/xen/interface.h
@@ -3,12 +3,38 @@
3 * 3 *
4 * Guest OS interface to x86 Xen. 4 * Guest OS interface to x86 Xen.
5 * 5 *
6 * Copyright (c) 2004, K A Fraser 6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Copyright (c) 2004-2006, K A Fraser
7 */ 25 */
8 26
9#ifndef _ASM_X86_XEN_INTERFACE_H 27#ifndef _ASM_X86_XEN_INTERFACE_H
10#define _ASM_X86_XEN_INTERFACE_H 28#define _ASM_X86_XEN_INTERFACE_H
11 29
30/*
31 * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
32 * in a struct in memory.
33 * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an
34 * hypercall argument.
35 * XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but
36 * they might not be on other architectures.
37 */
12#ifdef __XEN__ 38#ifdef __XEN__
13#define __DEFINE_GUEST_HANDLE(name, type) \ 39#define __DEFINE_GUEST_HANDLE(name, type) \
14 typedef struct { type *p; } __guest_handle_ ## name 40 typedef struct { type *p; } __guest_handle_ ## name
@@ -88,13 +114,16 @@ DEFINE_GUEST_HANDLE(xen_ulong_t);
88 * start of the GDT because some stupid OSes export hard-coded selector values 114 * start of the GDT because some stupid OSes export hard-coded selector values
89 * in their ABI. These hard-coded values are always near the start of the GDT, 115 * in their ABI. These hard-coded values are always near the start of the GDT,
90 * so Xen places itself out of the way, at the far end of the GDT. 116 * so Xen places itself out of the way, at the far end of the GDT.
117 *
118 * NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op
91 */ 119 */
92#define FIRST_RESERVED_GDT_PAGE 14 120#define FIRST_RESERVED_GDT_PAGE 14
93#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096) 121#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
94#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) 122#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
95 123
96/* 124/*
97 * Send an array of these to HYPERVISOR_set_trap_table() 125 * Send an array of these to HYPERVISOR_set_trap_table().
126 * Terminate the array with a sentinel entry, with traps[].address==0.
98 * The privilege level specifies which modes may enter a trap via a software 127 * The privilege level specifies which modes may enter a trap via a software
99 * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate 128 * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
100 * privilege levels as follows: 129 * privilege levels as follows:
@@ -118,10 +147,41 @@ struct trap_info {
118DEFINE_GUEST_HANDLE_STRUCT(trap_info); 147DEFINE_GUEST_HANDLE_STRUCT(trap_info);
119 148
120struct arch_shared_info { 149struct arch_shared_info {
121 unsigned long max_pfn; /* max pfn that appears in table */ 150 /*
122 /* Frame containing list of mfns containing list of mfns containing p2m. */ 151 * Number of valid entries in the p2m table(s) anchored at
123 unsigned long pfn_to_mfn_frame_list_list; 152 * pfn_to_mfn_frame_list_list and/or p2m_vaddr.
124 unsigned long nmi_reason; 153 */
154 unsigned long max_pfn;
155 /*
156 * Frame containing list of mfns containing list of mfns containing p2m.
157 * A value of 0 indicates it has not yet been set up, ~0 indicates it
158 * has been set to invalid e.g. due to the p2m being too large for the
159 * 3-level p2m tree. In this case the linear mapper p2m list anchored
160 * at p2m_vaddr is to be used.
161 */
162 xen_pfn_t pfn_to_mfn_frame_list_list;
163 unsigned long nmi_reason;
164 /*
165 * Following three fields are valid if p2m_cr3 contains a value
166 * different from 0.
167 * p2m_cr3 is the root of the address space where p2m_vaddr is valid.
168 * p2m_cr3 is in the same format as a cr3 value in the vcpu register
169 * state and holds the folded machine frame number (via xen_pfn_to_cr3)
170 * of a L3 or L4 page table.
171 * p2m_vaddr holds the virtual address of the linear p2m list. All
172 * entries in the range [0...max_pfn[ are accessible via this pointer.
173 * p2m_generation will be incremented by the guest before and after each
174 * change of the mappings of the p2m list. p2m_generation starts at 0
175 * and a value with the least significant bit set indicates that a
176 * mapping update is in progress. This allows guest external software
177 * (e.g. in Dom0) to verify that read mappings are consistent and
178 * whether they have changed since the last check.
179 * Modifying a p2m element in the linear p2m list is allowed via an
180 * atomic write only.
181 */
182 unsigned long p2m_cr3; /* cr3 value of the p2m address space */
183 unsigned long p2m_vaddr; /* virtual address of the p2m list */
184 unsigned long p2m_generation; /* generation count of p2m mapping */
125}; 185};
126#endif /* !__ASSEMBLY__ */ 186#endif /* !__ASSEMBLY__ */
127 187
@@ -137,13 +197,31 @@ struct arch_shared_info {
137/* 197/*
138 * The following is all CPU context. Note that the fpu_ctxt block is filled 198 * The following is all CPU context. Note that the fpu_ctxt block is filled
139 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. 199 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
200 *
201 * Also note that when calling DOMCTL_setvcpucontext and VCPU_initialise
202 * for HVM and PVH guests, not all information in this structure is updated:
203 *
204 * - For HVM guests, the structures read include: fpu_ctxt (if
205 * VGCT_I387_VALID is set), flags, user_regs, debugreg[*]
206 *
207 * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to
208 * set cr3. All other fields not used should be set to 0.
140 */ 209 */
141struct vcpu_guest_context { 210struct vcpu_guest_context {
142 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ 211 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
143 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ 212 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
144#define VGCF_I387_VALID (1<<0) 213#define VGCF_I387_VALID (1<<0)
145#define VGCF_HVM_GUEST (1<<1) 214#define VGCF_IN_KERNEL (1<<2)
146#define VGCF_IN_KERNEL (1<<2) 215#define _VGCF_i387_valid 0
216#define VGCF_i387_valid (1<<_VGCF_i387_valid)
217#define _VGCF_in_kernel 2
218#define VGCF_in_kernel (1<<_VGCF_in_kernel)
219#define _VGCF_failsafe_disables_events 3
220#define VGCF_failsafe_disables_events (1<<_VGCF_failsafe_disables_events)
221#define _VGCF_syscall_disables_events 4
222#define VGCF_syscall_disables_events (1<<_VGCF_syscall_disables_events)
223#define _VGCF_online 5
224#define VGCF_online (1<<_VGCF_online)
147 unsigned long flags; /* VGCF_* flags */ 225 unsigned long flags; /* VGCF_* flags */
148 struct cpu_user_regs user_regs; /* User-level CPU registers */ 226 struct cpu_user_regs user_regs; /* User-level CPU registers */
149 struct trap_info trap_ctxt[256]; /* Virtual IDT */ 227 struct trap_info trap_ctxt[256]; /* Virtual IDT */