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authorNylon Chen <nylon7@andestech.com>2018-11-08 06:28:15 -0500
committerGreentime Hu <greentime@andestech.com>2018-11-22 05:13:51 -0500
commite2f3f8b4a497d26bdcd55a53246ec2e613ae0fd4 (patch)
treec6cbc184ba802977d2f2bfa44e238e697b4455ac /arch/nds32/include
parenta5234068e6dc18ae5300d678fbf3e129d9b93f78 (diff)
nds32: support hardware prefetcher
We add a config for user to enable or disable this feature. It can be used to control the hardware prefetch function. Signed-off-by: Nylon Chen <nylon7@andestech.com> Acked-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
Diffstat (limited to 'arch/nds32/include')
-rw-r--r--arch/nds32/include/asm/bitfield.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/nds32/include/asm/bitfield.h b/arch/nds32/include/asm/bitfield.h
index c1619730192a..7414fcbbab4e 100644
--- a/arch/nds32/include/asm/bitfield.h
+++ b/arch/nds32/include/asm/bitfield.h
@@ -740,14 +740,20 @@
740#define N13MISC_CTL_offRTP 1 /* Disable Return Target Predictor */ 740#define N13MISC_CTL_offRTP 1 /* Disable Return Target Predictor */
741#define N13MISC_CTL_offPTEPF 2 /* Disable HPTWK L2 PTE pefetch */ 741#define N13MISC_CTL_offPTEPF 2 /* Disable HPTWK L2 PTE pefetch */
742#define N13MISC_CTL_offSP_SHADOW_EN 4 /* Enable shadow stack pointers */ 742#define N13MISC_CTL_offSP_SHADOW_EN 4 /* Enable shadow stack pointers */
743#define MISC_CTL_offHWPRE 11 /* Enable HardWare PREFETCH */
743/* bit 6, 9:31 reserved */ 744/* bit 6, 9:31 reserved */
744 745
745#define N13MISC_CTL_makBTB ( 0x1 << N13MISC_CTL_offBTB ) 746#define N13MISC_CTL_makBTB ( 0x1 << N13MISC_CTL_offBTB )
746#define N13MISC_CTL_makRTP ( 0x1 << N13MISC_CTL_offRTP ) 747#define N13MISC_CTL_makRTP ( 0x1 << N13MISC_CTL_offRTP )
747#define N13MISC_CTL_makPTEPF ( 0x1 << N13MISC_CTL_offPTEPF ) 748#define N13MISC_CTL_makPTEPF ( 0x1 << N13MISC_CTL_offPTEPF )
748#define N13MISC_CTL_makSP_SHADOW_EN ( 0x1 << N13MISC_CTL_offSP_SHADOW_EN ) 749#define N13MISC_CTL_makSP_SHADOW_EN ( 0x1 << N13MISC_CTL_offSP_SHADOW_EN )
750#define MISC_CTL_makHWPRE_EN ( 0x1 << MISC_CTL_offHWPRE )
749 751
752#ifdef CONFIG_HW_PRE
753#define MISC_init (N13MISC_CTL_makBTB|N13MISC_CTL_makRTP|N13MISC_CTL_makSP_SHADOW_EN|MISC_CTL_makHWPRE_EN)
754#else
750#define MISC_init (N13MISC_CTL_makBTB|N13MISC_CTL_makRTP|N13MISC_CTL_makSP_SHADOW_EN) 755#define MISC_init (N13MISC_CTL_makBTB|N13MISC_CTL_makRTP|N13MISC_CTL_makSP_SHADOW_EN)
756#endif
751 757
752/****************************************************************************** 758/******************************************************************************
753 * PRUSR_ACC_CTL (Privileged Resource User Access Control Registers) 759 * PRUSR_ACC_CTL (Privileged Resource User Access Control Registers)