diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2015-07-14 15:41:12 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-07-14 15:47:34 -0400 |
commit | dd0bc75ee3ec4ef694c2d0483b6ffeed17141435 (patch) | |
tree | 81bcaccf8c3a6c197707101f3da9d85fa8077431 /arch/mips | |
parent | 4e9d324d4288b082497c30bc55b8ad13acc7cf01 (diff) |
MIPS: SB1: Remove support for Pass 1 parts.
Pass 1 parts had a number of significant erratas and were only available
in small numbers and under NDA. Full support also required the use of a
special toolchain that kept branches properly aligned. These workarounds
were never upstreamed and the only toolchain known to have them is
Montavista's GCC 3.0-based toolchain which completly obsoleted if not
useless these days.
So now that automated testing has tripped over the user of the
-msb1-pass1-workarounds option, rather than fixing it remove support for
pass 1 parts.
Probably nobody will notice. I seem to own the last know pass 1 board
and I haven't noticed another one in the wild in the past decade, at
least.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 5 | ||||
-rw-r--r-- | arch/mips/Makefile | 7 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-sibyte/war.h | 3 | ||||
-rw-r--r-- | arch/mips/sibyte/Kconfig | 5 | ||||
-rw-r--r-- | arch/mips/sibyte/common/bus_watcher.c | 5 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/setup.c | 2 |
6 files changed, 2 insertions, 25 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 66dc359277e3..cee5f93e5712 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -2263,11 +2263,6 @@ config MIPS_CM | |||
2263 | config MIPS_CPC | 2263 | config MIPS_CPC |
2264 | bool | 2264 | bool |
2265 | 2265 | ||
2266 | config SB1_PASS_1_WORKAROUNDS | ||
2267 | bool | ||
2268 | depends on CPU_SB1_PASS_1 | ||
2269 | default y | ||
2270 | |||
2271 | config SB1_PASS_2_WORKAROUNDS | 2266 | config SB1_PASS_2_WORKAROUNDS |
2272 | bool | 2267 | bool |
2273 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | 2268 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index ae2dd59050f7..252e347958f3 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -181,13 +181,6 @@ cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,) | |||
181 | cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,) | 181 | cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,) |
182 | cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,) | 182 | cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,) |
183 | 183 | ||
184 | ifdef CONFIG_CPU_SB1 | ||
185 | ifdef CONFIG_SB1_PASS_1_WORKAROUNDS | ||
186 | KBUILD_AFLAGS_MODULE += -msb1-pass1-workarounds | ||
187 | KBUILD_CFLAGS_MODULE += -msb1-pass1-workarounds | ||
188 | endif | ||
189 | endif | ||
190 | |||
191 | # For smartmips configurations, there are hundreds of warnings due to ISA overrides | 184 | # For smartmips configurations, there are hundreds of warnings due to ISA overrides |
192 | # in assembly and header files. smartmips is only supported for MIPS32r1 onwards | 185 | # in assembly and header files. smartmips is only supported for MIPS32r1 onwards |
193 | # and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or | 186 | # and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or |
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h index 0a227d426b9c..520f8fc2c806 100644 --- a/arch/mips/include/asm/mach-sibyte/war.h +++ b/arch/mips/include/asm/mach-sibyte/war.h | |||
@@ -13,8 +13,7 @@ | |||
13 | #define R4600_V2_HIT_CACHEOP_WAR 0 | 13 | #define R4600_V2_HIT_CACHEOP_WAR 0 |
14 | #define R5432_CP0_INTERRUPT_WAR 0 | 14 | #define R5432_CP0_INTERRUPT_WAR 0 |
15 | 15 | ||
16 | #if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \ | 16 | #if defined(CONFIG_SB1_PASS_2_WORKAROUNDS) |
17 | defined(CONFIG_SB1_PASS_2_WORKAROUNDS) | ||
18 | 17 | ||
19 | #ifndef __ASSEMBLY__ | 18 | #ifndef __ASSEMBLY__ |
20 | extern int sb1250_m3_workaround_needed(void); | 19 | extern int sb1250_m3_workaround_needed(void); |
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index a8bb972fd9fd..cb9a095f5c5e 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig | |||
@@ -81,11 +81,6 @@ choice | |||
81 | prompt "SiByte SOC Stepping" | 81 | prompt "SiByte SOC Stepping" |
82 | depends on SIBYTE_SB1xxx_SOC | 82 | depends on SIBYTE_SB1xxx_SOC |
83 | 83 | ||
84 | config CPU_SB1_PASS_1 | ||
85 | bool "1250 Pass1" | ||
86 | depends on SIBYTE_SB1250 | ||
87 | select CPU_HAS_PREFETCH | ||
88 | |||
89 | config CPU_SB1_PASS_2_1250 | 84 | config CPU_SB1_PASS_2_1250 |
90 | bool "1250 An" | 85 | bool "1250 An" |
91 | depends on SIBYTE_SB1250 | 86 | depends on SIBYTE_SB1250 |
diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c index 5581844c9194..41a1d2242211 100644 --- a/arch/mips/sibyte/common/bus_watcher.c +++ b/arch/mips/sibyte/common/bus_watcher.c | |||
@@ -81,10 +81,7 @@ void check_bus_watcher(void) | |||
81 | { | 81 | { |
82 | u32 status, l2_err, memio_err; | 82 | u32 status, l2_err, memio_err; |
83 | 83 | ||
84 | #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS | 84 | #if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) |
85 | /* Destructive read, clears register and interrupt */ | ||
86 | status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); | ||
87 | #elif defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) | ||
88 | /* Use non-destructive register */ | 85 | /* Use non-destructive register */ |
89 | status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); | 86 | status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); |
90 | #elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) | 87 | #elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) |
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c index 3c02b2a77ae9..9d3c24efdf4a 100644 --- a/arch/mips/sibyte/sb1250/setup.c +++ b/arch/mips/sibyte/sb1250/setup.c | |||
@@ -202,12 +202,10 @@ void __init sb1250_setup(void) | |||
202 | 202 | ||
203 | switch (war_pass) { | 203 | switch (war_pass) { |
204 | case K_SYS_REVISION_BCM1250_PASS1: | 204 | case K_SYS_REVISION_BCM1250_PASS1: |
205 | #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS | ||
206 | printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " | 205 | printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " |
207 | "and the kernel doesn't have the proper " | 206 | "and the kernel doesn't have the proper " |
208 | "workarounds compiled in. @@@@\n"); | 207 | "workarounds compiled in. @@@@\n"); |
209 | bad_config = 1; | 208 | bad_config = 1; |
210 | #endif | ||
211 | break; | 209 | break; |
212 | case K_SYS_REVISION_BCM1250_PASS2: | 210 | case K_SYS_REVISION_BCM1250_PASS2: |
213 | /* Pass 2 - easiest as default for now - so many numbers */ | 211 | /* Pass 2 - easiest as default for now - so many numbers */ |