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authorHauke Mehrtens <hauke.mehrtens@lantiq.com>2015-10-28 18:37:39 -0400
committerRalf Baechle <ralf@linux-mips.org>2015-11-11 02:37:21 -0500
commita5c1aad853a499f2b9f3a74e0d019b2ea8ad5825 (patch)
treee20536c65f9d3850e0c06464f44ac18a4261178f /arch/mips/lantiq
parenteefee024b012df827fd0aebffcd05665d8511a8a (diff)
MIPS: Lantiq: Add SoC detection for ar10 and grx390
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11390/ Patchwork: https://patchwork.linux-mips.org/patch/11399/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lantiq')
-rw-r--r--arch/mips/lantiq/xway/prom.c28
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/mips/lantiq/xway/prom.c b/arch/mips/lantiq/xway/prom.c
index 248429ab2622..2b0386188010 100644
--- a/arch/mips/lantiq/xway/prom.c
+++ b/arch/mips/lantiq/xway/prom.c
@@ -4,6 +4,7 @@
4 * by the Free Software Foundation. 4 * by the Free Software Foundation.
5 * 5 *
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
7 */ 8 */
8 9
9#include <linux/export.h> 10#include <linux/export.h>
@@ -19,8 +20,10 @@
19#define SOC_TWINPASS "Twinpass" 20#define SOC_TWINPASS "Twinpass"
20#define SOC_AMAZON_SE "Amazon_SE" 21#define SOC_AMAZON_SE "Amazon_SE"
21#define SOC_AR9 "AR9" 22#define SOC_AR9 "AR9"
22#define SOC_GR9 "GR9" 23#define SOC_GR9 "GRX200"
23#define SOC_VR9 "VR9" 24#define SOC_VR9 "xRX200"
25#define SOC_AR10 "xRX300"
26#define SOC_GRX390 "xRX330"
24 27
25#define COMP_DANUBE "lantiq,danube" 28#define COMP_DANUBE "lantiq,danube"
26#define COMP_TWINPASS "lantiq,twinpass" 29#define COMP_TWINPASS "lantiq,twinpass"
@@ -28,6 +31,8 @@
28#define COMP_AR9 "lantiq,ar9" 31#define COMP_AR9 "lantiq,ar9"
29#define COMP_GR9 "lantiq,gr9" 32#define COMP_GR9 "lantiq,gr9"
30#define COMP_VR9 "lantiq,vr9" 33#define COMP_VR9 "lantiq,vr9"
34#define COMP_AR10 "lantiq,ar10"
35#define COMP_GRX390 "lantiq,grx390"
31 36
32#define PART_SHIFT 12 37#define PART_SHIFT 12
33#define PART_MASK 0x0FFFFFFF 38#define PART_MASK 0x0FFFFFFF
@@ -108,6 +113,25 @@ void __init ltq_soc_detect(struct ltq_soc_info *i)
108 i->compatible = COMP_GR9; 113 i->compatible = COMP_GR9;
109 break; 114 break;
110 115
116 case SOC_ID_ARX362:
117 case SOC_ID_ARX368:
118 case SOC_ID_ARX382:
119 case SOC_ID_ARX388:
120 case SOC_ID_URX388:
121 i->name = SOC_AR10;
122 i->type = SOC_TYPE_AR10;
123 i->compatible = COMP_AR10;
124 break;
125
126 case SOC_ID_GRX383:
127 case SOC_ID_GRX369:
128 case SOC_ID_GRX387:
129 case SOC_ID_GRX389:
130 i->name = SOC_GRX390;
131 i->type = SOC_TYPE_GRX390;
132 i->compatible = COMP_GRX390;
133 break;
134
111 default: 135 default:
112 unreachable(); 136 unreachable();
113 break; 137 break;