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authorJaedon Shin <jaedon.shin@gmail.com>2017-01-09 21:00:31 -0500
committerRalf Baechle <ralf@linux-mips.org>2017-01-24 12:30:34 -0500
commitd783738c0014fe6d7af6288a468272683f32941f (patch)
tree76b465194d80ec8abd82249e745d72d1686f367a /arch/mips/boot
parent35e7f7885e1b1b272a73c0de3227fc9a3e95a7e3 (diff)
MIPS: BMIPS: Add support SPI device nodes
Adds SPI device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14990/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi49
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi49
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi43
-rw-r--r--arch/mips/boot/dts/brcm/bcm97125cbmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97346dbsmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97358svmb.dts36
-rw-r--r--arch/mips/boot/dts/brcm/bcm97360svmb.dts36
-rw-r--r--arch/mips/boot/dts/brcm/bcm97362svmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97420c.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97425svmb.dts36
-rw-r--r--arch/mips/boot/dts/brcm/bcm97435svmb.dts4
16 files changed, 478 insertions, 6 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index bbd00f65ce39..79f838ed96c5 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -91,15 +91,15 @@
91 compatible = "brcm,bcm7120-l2-intc"; 91 compatible = "brcm,bcm7120-l2-intc";
92 reg = <0x406780 0x8>; 92 reg = <0x406780 0x8>;
93 93
94 brcm,int-map-mask = <0x44>, <0xf000000>; 94 brcm,int-map-mask = <0x44>, <0xf000000>, <0x100000>;
95 brcm,int-fwd-mask = <0x70000>; 95 brcm,int-fwd-mask = <0x70000>;
96 96
97 interrupt-controller; 97 interrupt-controller;
98 #interrupt-cells = <1>; 98 #interrupt-cells = <1>;
99 99
100 interrupt-parent = <&periph_intc>; 100 interrupt-parent = <&periph_intc>;
101 interrupts = <18>, <19>; 101 interrupts = <18>, <19>, <20>;
102 interrupt-names = "upg_main", "upg_bsc"; 102 interrupt-names = "upg_main", "upg_bsc", "upg_spi";
103 }; 103 };
104 104
105 sun_top_ctrl: syscon@404000 { 105 sun_top_ctrl: syscon@404000 {
@@ -226,5 +226,48 @@
226 interrupts = <61>; 226 interrupts = <61>;
227 status = "disabled"; 227 status = "disabled";
228 }; 228 };
229
230 spi_l2_intc: interrupt-controller@411d00 {
231 compatible = "brcm,l2-intc";
232 reg = <0x411d00 0x30>;
233 interrupt-controller;
234 #interrupt-cells = <1>;
235 interrupt-parent = <&periph_intc>;
236 interrupts = <79>;
237 };
238
239 qspi: spi@443000 {
240 #address-cells = <0x1>;
241 #size-cells = <0x0>;
242 compatible = "brcm,spi-bcm-qspi",
243 "brcm,spi-brcmstb-qspi";
244 clocks = <&upg_clk>;
245 reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
246 reg-names = "cs_reg", "hif_mspi", "bspi";
247 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
248 interrupt-parent = <&spi_l2_intc>;
249 interrupt-names = "spi_lr_fullness_reached",
250 "spi_lr_session_aborted",
251 "spi_lr_impatient",
252 "spi_lr_session_done",
253 "spi_lr_overread",
254 "mspi_done",
255 "mspi_halted";
256 status = "disabled";
257 };
258
259 mspi: spi@406400 {
260 #address-cells = <1>;
261 #size-cells = <0>;
262 compatible = "brcm,spi-bcm-qspi",
263 "brcm,spi-brcmstb-mspi";
264 clocks = <&upg_clk>;
265 reg = <0x406400 0x180>;
266 reg-names = "mspi";
267 interrupts = <0x14>;
268 interrupt-parent = <&upg_irq0_intc>;
269 interrupt-names = "mspi_done";
270 status = "disabled";
271 };
229 }; 272 };
230}; 273};
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 4bbcc95f1c15..da7bfa45a57d 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -439,5 +439,48 @@
439 interrupts = <85>; 439 interrupts = <85>;
440 status = "disabled"; 440 status = "disabled";
441 }; 441 };
442
443 spi_l2_intc: interrupt-controller@411d00 {
444 compatible = "brcm,l2-intc";
445 reg = <0x411d00 0x30>;
446 interrupt-controller;
447 #interrupt-cells = <1>;
448 interrupt-parent = <&periph_intc>;
449 interrupts = <31>;
450 };
451
452 qspi: spi@413000 {
453 #address-cells = <0x1>;
454 #size-cells = <0x0>;
455 compatible = "brcm,spi-bcm-qspi",
456 "brcm,spi-brcmstb-qspi";
457 clocks = <&upg_clk>;
458 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
459 reg-names = "cs_reg", "hif_mspi", "bspi";
460 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
461 interrupt-parent = <&spi_l2_intc>;
462 interrupt-names = "spi_lr_fullness_reached",
463 "spi_lr_session_aborted",
464 "spi_lr_impatient",
465 "spi_lr_session_done",
466 "spi_lr_overread",
467 "mspi_done",
468 "mspi_halted";
469 status = "disabled";
470 };
471
472 mspi: spi@408a00 {
473 #address-cells = <1>;
474 #size-cells = <0>;
475 compatible = "brcm,spi-bcm-qspi",
476 "brcm,spi-brcmstb-mspi";
477 clocks = <&upg_clk>;
478 reg = <0x408a00 0x180>;
479 reg-names = "mspi";
480 interrupts = <0x14>;
481 interrupt-parent = <&upg_aon_irq0_intc>;
482 interrupt-names = "mspi_done";
483 status = "disabled";
484 };
442 }; 485 };
443}; 486};
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 3e42535c8d29..9b05760453f0 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -318,5 +318,48 @@
318 interrupts = <24>; 318 interrupts = <24>;
319 status = "disabled"; 319 status = "disabled";
320 }; 320 };
321
322 spi_l2_intc: interrupt-controller@411d00 {
323 compatible = "brcm,l2-intc";
324 reg = <0x411d00 0x30>;
325 interrupt-controller;
326 #interrupt-cells = <1>;
327 interrupt-parent = <&periph_intc>;
328 interrupts = <31>;
329 };
330
331 qspi: spi@413000 {
332 #address-cells = <0x1>;
333 #size-cells = <0x0>;
334 compatible = "brcm,spi-bcm-qspi",
335 "brcm,spi-brcmstb-qspi";
336 clocks = <&upg_clk>;
337 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
338 reg-names = "cs_reg", "hif_mspi", "bspi";
339 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
340 interrupt-parent = <&spi_l2_intc>;
341 interrupt-names = "spi_lr_fullness_reached",
342 "spi_lr_session_aborted",
343 "spi_lr_impatient",
344 "spi_lr_session_done",
345 "spi_lr_overread",
346 "mspi_done",
347 "mspi_halted";
348 status = "disabled";
349 };
350
351 mspi: spi@408a00 {
352 #address-cells = <1>;
353 #size-cells = <0>;
354 compatible = "brcm,spi-bcm-qspi",
355 "brcm,spi-brcmstb-mspi";
356 clocks = <&upg_clk>;
357 reg = <0x408a00 0x180>;
358 reg-names = "mspi";
359 interrupts = <0x14>;
360 interrupt-parent = <&upg_aon_irq0_intc>;
361 interrupt-names = "mspi_done";
362 status = "disabled";
363 };
321 }; 364 };
322}; 365};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 112a5571c596..57b613c6acf2 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -358,5 +358,48 @@
358 interrupts = <82>; 358 interrupts = <82>;
359 status = "disabled"; 359 status = "disabled";
360 }; 360 };
361
362 spi_l2_intc: interrupt-controller@411d00 {
363 compatible = "brcm,l2-intc";
364 reg = <0x411d00 0x30>;
365 interrupt-controller;
366 #interrupt-cells = <1>;
367 interrupt-parent = <&periph_intc>;
368 interrupts = <31>;
369 };
370
371 qspi: spi@413000 {
372 #address-cells = <0x1>;
373 #size-cells = <0x0>;
374 compatible = "brcm,spi-bcm-qspi",
375 "brcm,spi-brcmstb-qspi";
376 clocks = <&upg_clk>;
377 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
378 reg-names = "cs_reg", "hif_mspi", "bspi";
379 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
380 interrupt-parent = <&spi_l2_intc>;
381 interrupt-names = "spi_lr_fullness_reached",
382 "spi_lr_session_aborted",
383 "spi_lr_impatient",
384 "spi_lr_session_done",
385 "spi_lr_overread",
386 "mspi_done",
387 "mspi_halted";
388 status = "disabled";
389 };
390
391 mspi: spi@408a00 {
392 #address-cells = <1>;
393 #size-cells = <0>;
394 compatible = "brcm,spi-bcm-qspi",
395 "brcm,spi-brcmstb-mspi";
396 clocks = <&upg_clk>;
397 reg = <0x408a00 0x180>;
398 reg-names = "mspi";
399 interrupts = <0x14>;
400 interrupt-parent = <&upg_aon_irq0_intc>;
401 interrupt-names = "mspi_done";
402 status = "disabled";
403 };
361 }; 404 };
362}; 405};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 34abfb0b07e7..c2a2843aaa9a 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -354,5 +354,48 @@
354 interrupts = <82>; 354 interrupts = <82>;
355 status = "disabled"; 355 status = "disabled";
356 }; 356 };
357
358 spi_l2_intc: interrupt-controller@411d00 {
359 compatible = "brcm,l2-intc";
360 reg = <0x411d00 0x30>;
361 interrupt-controller;
362 #interrupt-cells = <1>;
363 interrupt-parent = <&periph_intc>;
364 interrupts = <31>;
365 };
366
367 qspi: spi@413000 {
368 #address-cells = <0x1>;
369 #size-cells = <0x0>;
370 compatible = "brcm,spi-bcm-qspi",
371 "brcm,spi-brcmstb-qspi";
372 clocks = <&upg_clk>;
373 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
374 reg-names = "cs_reg", "hif_mspi", "bspi";
375 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
376 interrupt-parent = <&spi_l2_intc>;
377 interrupt-names = "spi_lr_fullness_reached",
378 "spi_lr_session_aborted",
379 "spi_lr_impatient",
380 "spi_lr_session_done",
381 "spi_lr_overread",
382 "mspi_done",
383 "mspi_halted";
384 status = "disabled";
385 };
386
387 mspi: spi@408a00 {
388 #address-cells = <1>;
389 #size-cells = <0>;
390 compatible = "brcm,spi-bcm-qspi",
391 "brcm,spi-brcmstb-mspi";
392 clocks = <&upg_clk>;
393 reg = <0x408a00 0x180>;
394 reg-names = "mspi";
395 interrupts = <0x14>;
396 interrupt-parent = <&upg_aon_irq0_intc>;
397 interrupt-names = "mspi_done";
398 status = "disabled";
399 };
357 }; 400 };
358}; 401};
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index b143723c674e..532fc8a15796 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -92,15 +92,15 @@
92 compatible = "brcm,bcm7120-l2-intc"; 92 compatible = "brcm,bcm7120-l2-intc";
93 reg = <0x406780 0x8>; 93 reg = <0x406780 0x8>;
94 94
95 brcm,int-map-mask = <0x44>, <0x1f000000>; 95 brcm,int-map-mask = <0x44>, <0x1f000000>, <0x100000>;
96 brcm,int-fwd-mask = <0x70000>; 96 brcm,int-fwd-mask = <0x70000>;
97 97
98 interrupt-controller; 98 interrupt-controller;
99 #interrupt-cells = <1>; 99 #interrupt-cells = <1>;
100 100
101 interrupt-parent = <&periph_intc>; 101 interrupt-parent = <&periph_intc>;
102 interrupts = <18>, <19>; 102 interrupts = <18>, <19>, <20>;
103 interrupt-names = "upg_main", "upg_bsc"; 103 interrupt-names = "upg_main", "upg_bsc", "upg_spi";
104 }; 104 };
105 105
106 sun_top_ctrl: syscon@404000 { 106 sun_top_ctrl: syscon@404000 {
@@ -287,5 +287,48 @@
287 interrupts = <62>; 287 interrupts = <62>;
288 status = "disabled"; 288 status = "disabled";
289 }; 289 };
290
291 spi_l2_intc: interrupt-controller@411d00 {
292 compatible = "brcm,l2-intc";
293 reg = <0x411d00 0x30>;
294 interrupt-controller;
295 #interrupt-cells = <1>;
296 interrupt-parent = <&periph_intc>;
297 interrupts = <78>;
298 };
299
300 qspi: spi@443000 {
301 #address-cells = <0x1>;
302 #size-cells = <0x0>;
303 compatible = "brcm,spi-bcm-qspi",
304 "brcm,spi-brcmstb-qspi";
305 clocks = <&upg_clk>;
306 reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
307 reg-names = "cs_reg", "hif_mspi", "bspi";
308 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
309 interrupt-parent = <&spi_l2_intc>;
310 interrupt-names = "spi_lr_fullness_reached",
311 "spi_lr_session_aborted",
312 "spi_lr_impatient",
313 "spi_lr_session_done",
314 "spi_lr_overread",
315 "mspi_done",
316 "mspi_halted";
317 status = "disabled";
318 };
319
320 mspi: spi@406400 {
321 #address-cells = <1>;
322 #size-cells = <0>;
323 compatible = "brcm,spi-bcm-qspi",
324 "brcm,spi-brcmstb-mspi";
325 clocks = <&upg_clk>;
326 reg = <0x406400 0x180>;
327 reg-names = "mspi";
328 interrupts = <0x14>;
329 interrupt-parent = <&upg_irq0_intc>;
330 interrupt-names = "mspi_done";
331 status = "disabled";
332 };
290 }; 333 };
291}; 334};
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 2488d2f61f60..f56fb25f2e6b 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -450,5 +450,48 @@
450 mmc-hs200-1_8v; 450 mmc-hs200-1_8v;
451 status = "disabled"; 451 status = "disabled";
452 }; 452 };
453
454 spi_l2_intc: interrupt-controller@41ad00 {
455 compatible = "brcm,l2-intc";
456 reg = <0x41ad00 0x30>;
457 interrupt-controller;
458 #interrupt-cells = <1>;
459 interrupt-parent = <&periph_intc>;
460 interrupts = <25>;
461 };
462
463 qspi: spi@41c000 {
464 #address-cells = <0x1>;
465 #size-cells = <0x0>;
466 compatible = "brcm,spi-bcm-qspi",
467 "brcm,spi-brcmstb-qspi";
468 clocks = <&upg_clk>;
469 reg = <0x419920 0x4 0x41c200 0x188 0x41c000 0x50>;
470 reg-names = "cs_reg", "hif_mspi", "bspi";
471 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
472 interrupt-parent = <&spi_l2_intc>;
473 interrupt-names = "spi_lr_fullness_reached",
474 "spi_lr_session_aborted",
475 "spi_lr_impatient",
476 "spi_lr_session_done",
477 "spi_lr_overread",
478 "mspi_done",
479 "mspi_halted";
480 status = "disabled";
481 };
482
483 mspi: spi@409200 {
484 #address-cells = <1>;
485 #size-cells = <0>;
486 compatible = "brcm,spi-bcm-qspi",
487 "brcm,spi-brcmstb-mspi";
488 clocks = <&upg_clk>;
489 reg = <0x409200 0x180>;
490 reg-names = "mspi";
491 interrupts = <0x14>;
492 interrupt-parent = <&upg_aon_irq0_intc>;
493 interrupt-names = "mspi_done";
494 status = "disabled";
495 };
453 }; 496 };
454}; 497};
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 19fa259b968b..f2cead2eae5c 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -465,5 +465,48 @@
465 mmc-hs200-1_8v; 465 mmc-hs200-1_8v;
466 status = "disabled"; 466 status = "disabled";
467 }; 467 };
468
469 spi_l2_intc: interrupt-controller@41bd00 {
470 compatible = "brcm,l2-intc";
471 reg = <0x41bd00 0x30>;
472 interrupt-controller;
473 #interrupt-cells = <1>;
474 interrupt-parent = <&periph_intc>;
475 interrupts = <25>;
476 };
477
478 qspi: spi@41d200 {
479 #address-cells = <0x1>;
480 #size-cells = <0x0>;
481 compatible = "brcm,spi-bcm-qspi",
482 "brcm,spi-brcmstb-qspi";
483 clocks = <&upg_clk>;
484 reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
485 reg-names = "cs_reg", "hif_mspi", "bspi";
486 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
487 interrupt-parent = <&spi_l2_intc>;
488 interrupt-names = "spi_lr_fullness_reached",
489 "spi_lr_session_aborted",
490 "spi_lr_impatient",
491 "spi_lr_session_done",
492 "spi_lr_overread",
493 "mspi_done",
494 "mspi_halted";
495 status = "disabled";
496 };
497
498 mspi: spi@409200 {
499 #address-cells = <1>;
500 #size-cells = <0>;
501 compatible = "brcm,spi-bcm-qspi",
502 "brcm,spi-brcmstb-mspi";
503 clocks = <&upg_clk>;
504 reg = <0x409200 0x180>;
505 reg-names = "mspi";
506 interrupts = <0x14>;
507 interrupt-parent = <&upg_aon_irq0_intc>;
508 interrupt-names = "mspi_done";
509 status = "disabled";
510 };
468 }; 511 };
469}; 512};
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index 5c24eacd72dd..d72bc423ceaa 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -57,3 +57,7 @@
57&ohci0 { 57&ohci0 {
58 status = "disabled"; 58 status = "disabled";
59}; 59};
60
61&mspi {
62 status = "okay";
63};
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index e67eaf30de3d..ea52d7b5772f 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -109,3 +109,7 @@
109&sdhci0 { 109&sdhci0 {
110 status = "okay"; 110 status = "okay";
111}; 111};
112
113&mspi {
114 status = "okay";
115};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index ee4607fae47a..71357fdc19af 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -69,3 +69,39 @@
69&nand { 69&nand {
70 status = "okay"; 70 status = "okay";
71}; 71};
72
73&qspi {
74 status = "okay";
75
76 m25p80@0 {
77 compatible = "m25p80";
78 reg = <0>;
79 spi-max-frequency = <40000000>;
80 spi-cpol;
81 spi-cpha;
82 use-bspi;
83 m25p,fast-read;
84
85 partitions {
86 compatible = "fixed-partitions";
87 #address-cells = <1>;
88 #size-cells = <1>;
89
90 flash0.cfe@0 {
91 reg = <0x0 0x200000>;
92 };
93
94 flash0.mac@200000 {
95 reg = <0x200000 0x40000>;
96 };
97
98 flash0.nvram@240000 {
99 reg = <0x240000 0x10000>;
100 };
101 };
102 };
103};
104
105&mspi {
106 status = "okay";
107};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index bed821b03013..e2fed406c6ee 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -72,3 +72,39 @@
72&sdhci0 { 72&sdhci0 {
73 status = "okay"; 73 status = "okay";
74}; 74};
75
76&qspi {
77 status = "okay";
78
79 m25p80@0 {
80 compatible = "m25p80";
81 reg = <0>;
82 spi-max-frequency = <40000000>;
83 spi-cpol;
84 spi-cpha;
85 use-bspi;
86 m25p,fast-read;
87
88 partitions {
89 compatible = "fixed-partitions";
90 #address-cells = <1>;
91 #size-cells = <1>;
92
93 flash0.cfe@0 {
94 reg = <0x0 0x200000>;
95 };
96
97 flash0.mac@200000 {
98 reg = <0x200000 0x40000>;
99 };
100
101 flash0.nvram@240000 {
102 reg = <0x240000 0x10000>;
103 };
104 };
105 };
106};
107
108&mspi {
109 status = "okay";
110};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 68fd823868e0..78bffdf11872 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -73,3 +73,7 @@
73&sdhci0 { 73&sdhci0 {
74 status = "okay"; 74 status = "okay";
75}; 75};
76
77&mspi {
78 status = "okay";
79};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index e66271af055e..d62b448a152d 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -79,3 +79,7 @@
79&ohci1 { 79&ohci1 {
80 status = "okay"; 80 status = "okay";
81}; 81};
82
83&mspi {
84 status = "okay";
85};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index f95ba1bf3e58..73aa006bd9ce 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -107,3 +107,39 @@
107&sdhci1 { 107&sdhci1 {
108 status = "okay"; 108 status = "okay";
109}; 109};
110
111&qspi {
112 status = "okay";
113
114 m25p80@0 {
115 compatible = "m25p80";
116 reg = <0>;
117 spi-max-frequency = <40000000>;
118 spi-cpol;
119 spi-cpha;
120 use-bspi;
121 m25p,fast-read;
122
123 partitions {
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 flash0.cfe@0 {
129 reg = <0x0 0x200000>;
130 };
131
132 flash0.mac@200000 {
133 reg = <0x200000 0x40000>;
134 };
135
136 flash0.nvram@240000 {
137 reg = <0x240000 0x10000>;
138 };
139 };
140 };
141};
142
143&mspi {
144 status = "okay";
145};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index fb37b7111bf4..0a915f3feab6 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -115,3 +115,7 @@
115&sdhci1 { 115&sdhci1 {
116 status = "okay"; 116 status = "okay";
117}; 117};
118
119&mspi {
120 status = "okay";
121};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 19:05:40 -0500