Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "The irq department provides:

   - a major update to the auto affinity management code, which is used
     by multi-queue devices

   - move of the microblaze irq chip driver into the common driver code
     so it can be shared between microblaze, powerpc and MIPS

   - a series of updates to the ARM GICV3 interrupt controller

   - the usual pile of fixes and small improvements all over the place"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
  powerpc/virtex: Use generic xilinx irqchip driver
  irqchip/xilinx: Try to fall back if xlnx,kind-of-intr not provided
  irqchip/xilinx: Add support for parent intc
  irqchip/xilinx: Rename get_irq to xintc_get_irq
  irqchip/xilinx: Restructure and use jump label api
  irqchip/xilinx: Clean up print messages
  microblaze/irqchip: Move intc driver to irqchip
  ARM: virt: Select ARM_GIC_V3_ITS
  ARM: gic-v3-its: Add 32bit support to GICv3 ITS
  irqchip/gic-v3-its: Specialise readq and writeq accesses
  irqchip/gic-v3-its: Specialise flush_dcache operation
  irqchip/gic-v3-its: Narrow down Entry Size when used as a divider
  irqchip/gic-v3-its: Change unsigned types for AArch32 compatibility
  irqchip/gic-v3: Use nops macro for Cavium ThunderX erratum 23154
  irqchip/gic-v3: Convert arm64 GIC accessors to {read,write}_sysreg_s
  genirq/msi: Drop artificial PCI dependency
  irqchip/bcm7038-l1: Implement irq_cpu_offline() callback
  genirq/affinity: Use default affinity mask for reserved vectors
  genirq/affinity: Take reserved vectors into account when spreading irqs
  PCI: Remove the irq_affinity mask from struct pci_dev
  ...

5 files changed, 5 insertions, 200 deletions

diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 86f65721e629..85885a501dce 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -27,6 +27,7 @@ config MICROBLAZE
         select HAVE_MEMBLOCK_NODE_MAP
         select HAVE_OPROFILE
         select IRQ_DOMAIN
+        select XILINX_INTC
         select MODULES_USE_ELF_RELA
         select OF
         select OF_EARLY_FLATTREE
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index bab3b1393ad4..d785defeeed5 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -16,6 +16,6 @@ struct pt_regs;
 extern void do_IRQ(struct pt_regs *regs);
 
 /* should be defined in each interrupt controller driver */
-extern unsigned int get_irq(void);
+extern unsigned int xintc_get_irq(void);
 
 #endif /* _ASM_MICROBLAZE_IRQ_H */
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index f08bacaf8a95..e098381af928 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -15,7 +15,7 @@ endif
 extra-y := head.o vmlinux.lds
 
 obj-y += dma.o exceptions.o \
-        hw_exception_handler.o intc.o irq.o \
+        hw_exception_handler.o irq.o \
         platform.o process.o prom.o ptrace.o \
         reset.o setup.o signal.o sys_microblaze.o timer.o traps.o unwind.o
 
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
deleted file mode 100644
index 90bec7d71f85..000000000000
--- a/arch/microblaze/kernel/intc.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2012-2013 Xilinx, Inc.
- * Copyright (C) 2007-2009 PetaLogix
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/irqdomain.h>
-#include <linux/irq.h>
-#include <linux/irqchip.h>
-#include <linux/of_address.h>
-#include <linux/io.h>
-#include <linux/bug.h>
-
-static void __iomem *intc_baseaddr;
-
-/* No one else should require these constants, so define them locally here. */
-#define ISR 0x00                        /* Interrupt Status Register */
-#define IPR 0x04                        /* Interrupt Pending Register */
-#define IER 0x08                        /* Interrupt Enable Register */
-#define IAR 0x0c                        /* Interrupt Acknowledge Register */
-#define SIE 0x10                        /* Set Interrupt Enable bits */
-#define CIE 0x14                        /* Clear Interrupt Enable bits */
-#define IVR 0x18                        /* Interrupt Vector Register */
-#define MER 0x1c                        /* Master Enable Register */
-
-#define MER_ME (1<<0)
-#define MER_HIE (1<<1)
-
-static unsigned int (*read_fn)(void __iomem *);
-static void (*write_fn)(u32, void __iomem *);
-
-static void intc_write32(u32 val, void __iomem *addr)
-{
-        iowrite32(val, addr);
-}
-
-static unsigned int intc_read32(void __iomem *addr)
-{
-        return ioread32(addr);
-}
-
-static void intc_write32_be(u32 val, void __iomem *addr)
-{
-        iowrite32be(val, addr);
-}
-
-static unsigned int intc_read32_be(void __iomem *addr)
-{
-        return ioread32be(addr);
-}
-
-static void intc_enable_or_unmask(struct irq_data *d)
-{
-        unsigned long mask = 1 << d->hwirq;
-
-        pr_debug("enable_or_unmask: %ld\n", d->hwirq);
-
-        /* ack level irqs because they can't be acked during
-         * ack function since the handle_level_irq function
-         * acks the irq before calling the interrupt handler
-         */
-        if (irqd_is_level_type(d))
-                write_fn(mask, intc_baseaddr + IAR);
-
-        write_fn(mask, intc_baseaddr + SIE);
-}
-
-static void intc_disable_or_mask(struct irq_data *d)
-{
-        pr_debug("disable: %ld\n", d->hwirq);
-        write_fn(1 << d->hwirq, intc_baseaddr + CIE);
-}
-
-static void intc_ack(struct irq_data *d)
-{
-        pr_debug("ack: %ld\n", d->hwirq);
-        write_fn(1 << d->hwirq, intc_baseaddr + IAR);
-}
-
-static void intc_mask_ack(struct irq_data *d)
-{
-        unsigned long mask = 1 << d->hwirq;
-
-        pr_debug("disable_and_ack: %ld\n", d->hwirq);
-        write_fn(mask, intc_baseaddr + CIE);
-        write_fn(mask, intc_baseaddr + IAR);
-}
-
-static struct irq_chip intc_dev = {
-        .name = "Xilinx INTC",
-        .irq_unmask = intc_enable_or_unmask,
-        .irq_mask = intc_disable_or_mask,
-        .irq_ack = intc_ack,
-        .irq_mask_ack = intc_mask_ack,
-};
-
-static struct irq_domain *root_domain;
-
-unsigned int get_irq(void)
-{
-        unsigned int hwirq, irq = -1;
-
-        hwirq = read_fn(intc_baseaddr + IVR);
-        if (hwirq != -1U)
-                irq = irq_find_mapping(root_domain, hwirq);
-
-        pr_debug("get_irq: hwirq=%d, irq=%d\n", hwirq, irq);
-
-        return irq;
-}
-
-static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
-{
-        u32 intr_mask = (u32)d->host_data;
-
-        if (intr_mask & (1 << hw)) {
-                irq_set_chip_and_handler_name(irq, &intc_dev,
-                                                handle_edge_irq, "edge");
-                irq_clear_status_flags(irq, IRQ_LEVEL);
-        } else {
-                irq_set_chip_and_handler_name(irq, &intc_dev,
-                                                handle_level_irq, "level");
-                irq_set_status_flags(irq, IRQ_LEVEL);
-        }
-        return 0;
-}
-
-static const struct irq_domain_ops xintc_irq_domain_ops = {
-        .xlate = irq_domain_xlate_onetwocell,
-        .map = xintc_map,
-};
-
-static int __init xilinx_intc_of_init(struct device_node *intc,
-                                             struct device_node *parent)
-{
-        u32 nr_irq, intr_mask;
-        int ret;
-
-        intc_baseaddr = of_iomap(intc, 0);
-        BUG_ON(!intc_baseaddr);
-
-        ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &nr_irq);
-        if (ret < 0) {
-                pr_err("%s: unable to read xlnx,num-intr-inputs\n", __func__);
-                return ret;
-        }
-
-        ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &intr_mask);
-        if (ret < 0) {
-                pr_err("%s: unable to read xlnx,kind-of-intr\n", __func__);
-                return ret;
-        }
-
-        if (intr_mask >> nr_irq)
-                pr_warn("%s: mismatch in kind-of-intr param\n", __func__);
-
-        pr_info("%s: num_irq=%d, edge=0x%x\n",
-                intc->full_name, nr_irq, intr_mask);
-
-        write_fn = intc_write32;
-        read_fn = intc_read32;
-
-        /*
-         * Disable all external interrupts until they are
-         * explicity requested.
-         */
-        write_fn(0, intc_baseaddr + IER);
-
-        /* Acknowledge any pending interrupts just in case. */
-        write_fn(0xffffffff, intc_baseaddr + IAR);
-
-        /* Turn on the Master Enable. */
-        write_fn(MER_HIE | MER_ME, intc_baseaddr + MER);
-        if (!(read_fn(intc_baseaddr + MER) & (MER_HIE | MER_ME))) {
-                write_fn = intc_write32_be;
-                read_fn = intc_read32_be;
-                write_fn(MER_HIE | MER_ME, intc_baseaddr + MER);
-        }
-
-        /* Yeah, okay, casting the intr_mask to a void* is butt-ugly, but I'm
-         * lazy and Michal can clean it up to something nicer when he tests
-         * and commits this patch.  ~~gcl */
-        root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops,
-                                                        (void *)intr_mask);
-
-        irq_set_default_host(root_domain);
-
-        return 0;
-}
-
-IRQCHIP_DECLARE(xilinx_intc, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init);
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index 11e24de91aa4..903dad822fad 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -29,12 +29,12 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
         trace_hardirqs_off();
 
         irq_enter();
-        irq = get_irq();
+        irq = xintc_get_irq();
 next_irq:
         BUG_ON(!irq);
         generic_handle_irq(irq);
 
-        irq = get_irq();
+        irq = xintc_get_irq();
         if (irq != -1U) {
                 pr_debug("next irq: %d\n", irq);
                 ++concurrent_irq;