diff options
author | Niklas Cassel <nks@flawful.org> | 2016-09-22 10:44:57 -0400 |
---|---|---|
committer | Jesper Nilsson <jespern@axis.com> | 2016-09-22 10:44:57 -0400 |
commit | 4c241d3c7bd628df7e84712046e9c130d48cae21 (patch) | |
tree | 43733d7fec326f8ec93fe07172f8ed7bc25c00ed /arch/cris/include | |
parent | 2765262f7b005a11d6c7abb3c06ea9fdd09712bd (diff) |
cris: use generic io.h
fixes the warning:
lib/iomap.c: In function ‘ioread8_rep’:
./arch/cris/include/asm/io.h:139:31: warning: statement with no effect [-Wunused-value]
#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
^
lib/iomap.c:56:3: note: in definition of macro ‘IO_COND’
is_pio; \
^
lib/iomap.c:197:16: note: in expansion of macro ‘insb’
IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
^
cris_iops was previously set to NULL (no matter if CONFIG_PCI was set or
not), but was removed in commit ab28e96fd1cf ("CRIS v32: remove old GPIO
and LEDs code"). Before commit ab28e96fd1cf ("CRIS v32: remove old GPIO
and LEDs code"), cris_iops could have been set from an external module,
since it was exported, but as commit c24bf9b4cc6a ("CRIS: fix I/O
macros") noted, the macros using cris_iops have been broken since first
included, so they could never have worked.
Because of this, instead of readding cris_iops, remove all special
handling of cris_iops. By doing so, we can rely on the default
implementation of almost all functions previously defined in our arch
specific io.h.
Signed-off-by: Niklas Cassel <nks@flawful.org>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Diffstat (limited to 'arch/cris/include')
-rw-r--r-- | arch/cris/include/asm/io.h | 171 |
1 files changed, 1 insertions, 170 deletions
diff --git a/arch/cris/include/asm/io.h b/arch/cris/include/asm/io.h index cce8664d5dd6..fe0b2a0ae03b 100644 --- a/arch/cris/include/asm/io.h +++ b/arch/cris/include/asm/io.h | |||
@@ -8,34 +8,6 @@ | |||
8 | #include <asm-generic/iomap.h> | 8 | #include <asm-generic/iomap.h> |
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | 10 | ||
11 | struct cris_io_operations | ||
12 | { | ||
13 | u32 (*read_mem)(void *addr, int size); | ||
14 | void (*write_mem)(u32 val, int size, void *addr); | ||
15 | u32 (*read_io)(u32 port, void *addr, int size, int count); | ||
16 | void (*write_io)(u32 port, void *addr, int size, int count); | ||
17 | }; | ||
18 | |||
19 | #ifdef CONFIG_PCI | ||
20 | extern struct cris_io_operations *cris_iops; | ||
21 | #else | ||
22 | #define cris_iops ((struct cris_io_operations*)NULL) | ||
23 | #endif | ||
24 | |||
25 | /* | ||
26 | * Change virtual addresses to physical addresses and vv. | ||
27 | */ | ||
28 | |||
29 | static inline unsigned long virt_to_phys(volatile void * address) | ||
30 | { | ||
31 | return __pa(address); | ||
32 | } | ||
33 | |||
34 | static inline void * phys_to_virt(unsigned long address) | ||
35 | { | ||
36 | return __va(address); | ||
37 | } | ||
38 | |||
39 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); | 11 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); |
40 | extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot); | 12 | extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot); |
41 | 13 | ||
@@ -48,147 +20,6 @@ extern void iounmap(volatile void * __iomem addr); | |||
48 | 20 | ||
49 | extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size); | 21 | extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size); |
50 | 22 | ||
51 | /* | 23 | #include <asm-generic/io.h> |
52 | * IO bus memory addresses are also 1:1 with the physical address | ||
53 | */ | ||
54 | #define virt_to_bus virt_to_phys | ||
55 | #define bus_to_virt phys_to_virt | ||
56 | |||
57 | /* | ||
58 | * readX/writeX() are used to access memory mapped devices. On some | ||
59 | * architectures the memory mapped IO stuff needs to be accessed | ||
60 | * differently. On the CRIS architecture, we just read/write the | ||
61 | * memory location directly. | ||
62 | */ | ||
63 | #ifdef CONFIG_PCI | ||
64 | #define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000) | ||
65 | #else | ||
66 | #define PCI_SPACE(x) 0 | ||
67 | #endif | ||
68 | static inline unsigned char readb(const volatile void __iomem *addr) | ||
69 | { | ||
70 | if (PCI_SPACE(addr) && cris_iops) | ||
71 | return cris_iops->read_mem((void*)addr, 1); | ||
72 | else | ||
73 | return *(volatile unsigned char __force *) addr; | ||
74 | } | ||
75 | static inline unsigned short readw(const volatile void __iomem *addr) | ||
76 | { | ||
77 | if (PCI_SPACE(addr) && cris_iops) | ||
78 | return cris_iops->read_mem((void*)addr, 2); | ||
79 | else | ||
80 | return *(volatile unsigned short __force *) addr; | ||
81 | } | ||
82 | static inline unsigned int readl(const volatile void __iomem *addr) | ||
83 | { | ||
84 | if (PCI_SPACE(addr) && cris_iops) | ||
85 | return cris_iops->read_mem((void*)addr, 4); | ||
86 | else | ||
87 | return *(volatile unsigned int __force *) addr; | ||
88 | } | ||
89 | #define readb_relaxed(addr) readb(addr) | ||
90 | #define readw_relaxed(addr) readw(addr) | ||
91 | #define readl_relaxed(addr) readl(addr) | ||
92 | #define __raw_readb readb | ||
93 | #define __raw_readw readw | ||
94 | #define __raw_readl readl | ||
95 | |||
96 | static inline void writeb(unsigned char b, volatile void __iomem *addr) | ||
97 | { | ||
98 | if (PCI_SPACE(addr) && cris_iops) | ||
99 | cris_iops->write_mem(b, 1, (void*)addr); | ||
100 | else | ||
101 | *(volatile unsigned char __force *) addr = b; | ||
102 | } | ||
103 | static inline void writew(unsigned short b, volatile void __iomem *addr) | ||
104 | { | ||
105 | if (PCI_SPACE(addr) && cris_iops) | ||
106 | cris_iops->write_mem(b, 2, (void*)addr); | ||
107 | else | ||
108 | *(volatile unsigned short __force *) addr = b; | ||
109 | } | ||
110 | static inline void writel(unsigned int b, volatile void __iomem *addr) | ||
111 | { | ||
112 | if (PCI_SPACE(addr) && cris_iops) | ||
113 | cris_iops->write_mem(b, 4, (void*)addr); | ||
114 | else | ||
115 | *(volatile unsigned int __force *) addr = b; | ||
116 | } | ||
117 | #define writeb_relaxed(b, addr) writeb(b, addr) | ||
118 | #define writew_relaxed(b, addr) writew(b, addr) | ||
119 | #define writel_relaxed(b, addr) writel(b, addr) | ||
120 | #define __raw_writeb writeb | ||
121 | #define __raw_writew writew | ||
122 | #define __raw_writel writel | ||
123 | |||
124 | #define mmiowb() | ||
125 | |||
126 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | ||
127 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | ||
128 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | ||
129 | |||
130 | |||
131 | /* I/O port access. Normally there is no I/O space on CRIS but when | ||
132 | * Cardbus/PCI is enabled the request is passed through the bridge. | ||
133 | */ | ||
134 | |||
135 | #define IO_SPACE_LIMIT 0xffff | ||
136 | #define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0) | ||
137 | #define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0) | ||
138 | #define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0) | ||
139 | #define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0) | ||
140 | #define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0) | ||
141 | #define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0) | ||
142 | static inline void outb(unsigned char data, unsigned int port) | ||
143 | { | ||
144 | if (cris_iops) | ||
145 | cris_iops->write_io(port, (void *) &data, 1, 1); | ||
146 | } | ||
147 | static inline void outw(unsigned short data, unsigned int port) | ||
148 | { | ||
149 | if (cris_iops) | ||
150 | cris_iops->write_io(port, (void *) &data, 2, 1); | ||
151 | } | ||
152 | static inline void outl(unsigned int data, unsigned int port) | ||
153 | { | ||
154 | if (cris_iops) | ||
155 | cris_iops->write_io(port, (void *) &data, 4, 1); | ||
156 | } | ||
157 | static inline void outsb(unsigned int port, const void *addr, | ||
158 | unsigned long count) | ||
159 | { | ||
160 | if (cris_iops) | ||
161 | cris_iops->write_io(port, (void *)addr, 1, count); | ||
162 | } | ||
163 | static inline void outsw(unsigned int port, const void *addr, | ||
164 | unsigned long count) | ||
165 | { | ||
166 | if (cris_iops) | ||
167 | cris_iops->write_io(port, (void *)addr, 2, count); | ||
168 | } | ||
169 | static inline void outsl(unsigned int port, const void *addr, | ||
170 | unsigned long count) | ||
171 | { | ||
172 | if (cris_iops) | ||
173 | cris_iops->write_io(port, (void *)addr, 4, count); | ||
174 | } | ||
175 | |||
176 | #define inb_p(port) inb(port) | ||
177 | #define inw_p(port) inw(port) | ||
178 | #define inl_p(port) inl(port) | ||
179 | #define outb_p(val, port) outb((val), (port)) | ||
180 | #define outw_p(val, port) outw((val), (port)) | ||
181 | #define outl_p(val, port) outl((val), (port)) | ||
182 | |||
183 | /* | ||
184 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
185 | * access | ||
186 | */ | ||
187 | #define xlate_dev_mem_ptr(p) __va(p) | ||
188 | |||
189 | /* | ||
190 | * Convert a virtual cached pointer to an uncached pointer | ||
191 | */ | ||
192 | #define xlate_dev_kmem_ptr(p) p | ||
193 | 24 | ||
194 | #endif | 25 | #endif |