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authorRob Herring <robh@kernel.org>2015-07-27 16:55:13 -0400
committerOlof Johansson <olof@lixom.net>2015-07-28 07:58:13 -0400
commite8d36d5dbb6a6ec4f5222f8775d664ec29d5527d (patch)
tree7f4676f53ddc3900e6a1587355d22a86040a3c55 /arch/arm
parent19c233b79d1af7b5af1ec68c1172848648184449 (diff)
ARM: kill off set_irq_flags usage
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Imre Kaloz <kaloz@openwrt.org> Acked-by: Krzysztof Halasa <khalasa@piap.pl> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Roland Stigge <stigge@antcom.de> Cc: Tony Lindgren <tony@atomide.com> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Simtec Linux Team <linux@simtec.co.uk> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/it8152.c2
-rw-r--r--arch/arm/common/locomo.c2
-rw-r--r--arch/arm/common/sa1111.c4
-rw-r--r--arch/arm/mach-davinci/cp_intc.c2
-rw-r--r--arch/arm/mach-dove/irq.c2
-rw-r--r--arch/arm/mach-ebsa110/core.c2
-rw-r--r--arch/arm/mach-footbridge/common.c2
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c8
-rw-r--r--arch/arm/mach-gemini/gpio.c2
-rw-r--r--arch/arm/mach-gemini/irq.c2
-rw-r--r--arch/arm/mach-imx/3ds_debugboard.c2
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c2
-rw-r--r--arch/arm/mach-iop13xx/irq.c2
-rw-r--r--arch/arm/mach-iop32x/irq.c2
-rw-r--r--arch/arm/mach-iop33x/irq.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ks8695/irq.c2
-rw-r--r--arch/arm/mach-lpc32xx/irq.c2
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-omap1/fpga.c2
-rw-r--r--arch/arm/mach-omap1/irq.c2
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/irq.c1
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/viper.c2
-rw-r--r--arch/arm/mach-pxa/zeus.c2
-rw-r--r--arch/arm/mach-rpc/ecard.c2
-rw-r--r--arch/arm/mach-rpc/irq.c16
-rw-r--r--arch/arm/mach-s3c24xx/bast-irq.c2
-rw-r--r--arch/arm/mach-s3c64xx/common.c2
-rw-r--r--arch/arm/mach-sa1100/neponset.c4
-rw-r--r--arch/arm/mach-w90x900/irq.c2
34 files changed, 45 insertions, 46 deletions
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 5114b68e99d5..96dabcb6c621 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -91,7 +91,7 @@ void it8152_init_irq(void)
91 for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { 91 for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
92 irq_set_chip_and_handler(irq, &it8152_irq_chip, 92 irq_set_chip_and_handler(irq, &it8152_irq_chip,
93 handle_level_irq); 93 handle_level_irq);
94 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 94 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
95 } 95 }
96} 96}
97 97
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index b55c3625d7ee..339fc414daad 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -205,7 +205,7 @@ static void locomo_setup_irq(struct locomo *lchip)
205 for ( ; irq <= lchip->irq_base + 3; irq++) { 205 for ( ; irq <= lchip->irq_base + 3; irq++) {
206 irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq); 206 irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq);
207 irq_set_chip_data(irq, lchip); 207 irq_set_chip_data(irq, lchip);
208 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 208 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
209 } 209 }
210} 210}
211 211
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 93ee70dbbdd3..680374de06a9 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -486,7 +486,7 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
486 irq_set_chip_and_handler(irq, &sa1111_low_chip, 486 irq_set_chip_and_handler(irq, &sa1111_low_chip,
487 handle_edge_irq); 487 handle_edge_irq);
488 irq_set_chip_data(irq, sachip); 488 irq_set_chip_data(irq, sachip);
489 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 489 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
490 } 490 }
491 491
492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) { 492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) {
@@ -494,7 +494,7 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
494 irq_set_chip_and_handler(irq, &sa1111_high_chip, 494 irq_set_chip_and_handler(irq, &sa1111_high_chip,
495 handle_edge_irq); 495 handle_edge_irq);
496 irq_set_chip_data(irq, sachip); 496 irq_set_chip_data(irq, sachip);
497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 497 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
498 } 498 }
499 499
500 /* 500 /*
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 006dae8dfe44..bf12ce64407a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -112,7 +112,7 @@ static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
112 pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw); 112 pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
113 113
114 irq_set_chip(virq, &cp_intc_irq_chip); 114 irq_set_chip(virq, &cp_intc_irq_chip);
115 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); 115 irq_set_probe(virq);
116 irq_set_handler(virq, handle_edge_irq); 116 irq_set_handler(virq, handle_edge_irq);
117 return 0; 117 return 0;
118} 118}
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index df0223f76fa9..ea7892e72242 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -172,7 +172,7 @@ void __init dove_init_irq(void)
172 for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { 172 for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
173 irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq); 173 irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq);
174 irq_set_status_flags(i, IRQ_LEVEL); 174 irq_set_status_flags(i, IRQ_LEVEL);
175 set_irq_flags(i, IRQF_VALID); 175 irq_clear_status_flags(i, IRQ_NOREQUEST);
176 } 176 }
177 irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); 177 irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
178} 178}
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 8254e716b095..688e5fed49a7 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -65,7 +65,7 @@ static void __init ebsa110_init_irq(void)
65 for (irq = 0; irq < NR_IRQS; irq++) { 65 for (irq = 0; irq < NR_IRQS; irq++) {
66 irq_set_chip_and_handler(irq, &ebsa110_irq_chip, 66 irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
67 handle_level_irq); 67 handle_level_irq);
68 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 68 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
69 } 69 }
70} 70}
71 71
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 9e8220e38398..0f0c9e040fcc 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -106,7 +106,7 @@ static void __init __fb_init_irq(void)
106 106
107 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { 107 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
108 irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq); 108 irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq);
109 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 109 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
110 } 110 }
111} 111}
112 112
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index c3a0abbc9049..fcd79bc3a3e1 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -153,13 +153,13 @@ void __init isa_init_irq(unsigned int host_irq)
153 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { 153 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
154 irq_set_chip_and_handler(irq, &isa_lo_chip, 154 irq_set_chip_and_handler(irq, &isa_lo_chip,
155 handle_level_irq); 155 handle_level_irq);
156 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 156 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
157 } 157 }
158 158
159 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { 159 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
160 irq_set_chip_and_handler(irq, &isa_hi_chip, 160 irq_set_chip_and_handler(irq, &isa_hi_chip,
161 handle_level_irq); 161 handle_level_irq);
162 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 162 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
163 } 163 }
164 164
165 request_resource(&ioport_resource, &pic1_resource); 165 request_resource(&ioport_resource, &pic1_resource);
@@ -175,8 +175,8 @@ void __init isa_init_irq(unsigned int host_irq)
175 * resistor on this line. 175 * resistor on this line.
176 */ 176 */
177 if (machine_is_netwinder()) 177 if (machine_is_netwinder())
178 set_irq_flags(_ISA_IRQ(11), IRQF_VALID | 178 irq_modify_status(_ISA_IRQ(11),
179 IRQF_PROBE | IRQF_NOAUTOEN); 179 IRQ_NOREQUEST | IRQ_NOPROBE, IRQ_NOAUTOEN);
180 } 180 }
181} 181}
182 182
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index 3292f2e6ed6f..220333ed741d 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -220,7 +220,7 @@ void __init gemini_gpio_init(void)
220 j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { 220 j < GPIO_IRQ_BASE + (i + 1) * 32; j++) {
221 irq_set_chip_and_handler(j, &gpio_irq_chip, 221 irq_set_chip_and_handler(j, &gpio_irq_chip,
222 handle_edge_irq); 222 handle_edge_irq);
223 set_irq_flags(j, IRQF_VALID); 223 irq_clear_status_flags(j, IRQ_NOREQUEST);
224 } 224 }
225 225
226 irq_set_chained_handler_and_data(IRQ_GPIO(i), gpio_irq_handler, 226 irq_set_chained_handler_and_data(IRQ_GPIO(i), gpio_irq_handler,
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 44f50dcb616d..d929b3ff18fd 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -92,7 +92,7 @@ void __init gemini_init_irq(void)
92 } else { 92 } else {
93 irq_set_handler(i, handle_level_irq); 93 irq_set_handler(i, handle_level_irq);
94 } 94 }
95 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 95 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
96 } 96 }
97 97
98 /* Disable all interrupts */ 98 /* Disable all interrupts */
diff --git a/arch/arm/mach-imx/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
index 134377352966..45903be6e7b3 100644
--- a/arch/arm/mach-imx/3ds_debugboard.c
+++ b/arch/arm/mach-imx/3ds_debugboard.c
@@ -195,7 +195,7 @@ int __init mxc_expio_init(u32 base, u32 intr_gpio)
195 195
196 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) { 196 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
197 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); 197 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
198 set_irq_flags(i, IRQF_VALID); 198 irq_clear_status_flags(i, IRQ_NOREQUEST);
199 } 199 }
200 irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW); 200 irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
201 irq_set_chained_handler(p_irq, mxc_expio_irq_handler); 201 irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index d08c37c696f6..2c0853560bd2 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -238,7 +238,7 @@ static void __init mx31ads_init_expio(void)
238 238
239 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) { 239 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
240 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); 240 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
241 set_irq_flags(i, IRQF_VALID); 241 irq_clear_status_flags(i, IRQ_NOREQUEST);
242 } 242 }
243 irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_4)); 243 irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_4));
244 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 244 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index bc739701c301..623d85a4af2d 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -233,7 +233,7 @@ void __init iop13xx_init_irq(void)
233 irq_set_chip(i, &iop13xx_irqchip4); 233 irq_set_chip(i, &iop13xx_irqchip4);
234 234
235 irq_set_handler(i, handle_level_irq); 235 irq_set_handler(i, handle_level_irq);
236 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 236 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
237 } 237 }
238 238
239 iop13xx_msi_init(); 239 iop13xx_msi_init();
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index d7ee2789d890..2d1f69a68cbc 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -69,6 +69,6 @@ void __init iop32x_init_irq(void)
69 69
70 for (i = 0; i < NR_IRQS; i++) { 70 for (i = 0; i < NR_IRQS; i++) {
71 irq_set_chip_and_handler(i, &ext_chip, handle_level_irq); 71 irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
72 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 72 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
73 } 73 }
74} 74}
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index f7f5d3e451c7..c99ec8d0d285 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -113,6 +113,6 @@ void __init iop33x_init_irq(void)
113 irq_set_chip_and_handler(i, 113 irq_set_chip_and_handler(i,
114 (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2, 114 (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2,
115 handle_level_irq); 115 handle_level_irq);
116 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 116 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
117 } 117 }
118} 118}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 70773b948e7e..1cb6f2f02880 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -296,7 +296,7 @@ void __init ixp4xx_init_irq(void)
296 for(i = 0; i < NR_IRQS; i++) { 296 for(i = 0; i < NR_IRQS; i++) {
297 irq_set_chip_and_handler(i, &ixp4xx_irq_chip, 297 irq_set_chip_and_handler(i, &ixp4xx_irq_chip,
298 handle_level_irq); 298 handle_level_irq);
299 set_irq_flags(i, IRQF_VALID); 299 irq_clear_status_flags(i, IRQ_NOREQUEST);
300 } 300 }
301} 301}
302 302
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index 76802aac0f45..31439f2ee21e 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -172,6 +172,6 @@ void __init ks8695_init_irq(void)
172 handle_edge_irq); 172 handle_edge_irq);
173 } 173 }
174 174
175 set_irq_flags(irq, IRQF_VALID); 175 irq_clear_status_flags(irq, IRQ_NOREQUEST);
176 } 176 }
177} 177}
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index d4f7dc87042b..4ffe333ad331 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -434,7 +434,7 @@ void __init lpc32xx_init_irq(void)
434 for (i = 0; i < NR_IRQS; i++) { 434 for (i = 0; i < NR_IRQS; i++) {
435 irq_set_chip_and_handler(i, &lpc32xx_irq_chip, 435 irq_set_chip_and_handler(i, &lpc32xx_irq_chip,
436 handle_level_irq); 436 handle_level_irq);
437 set_irq_flags(i, IRQF_VALID); 437 irq_clear_status_flags(i, IRQ_NOREQUEST);
438 } 438 }
439 439
440 /* Set default mappings */ 440 /* Set default mappings */
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index db25b0cef3a7..6373e2bff203 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -174,7 +174,7 @@ void __init netx_init_irq(void)
174 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 174 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
175 irq_set_chip_and_handler(irq, &netx_hif_chip, 175 irq_set_chip_and_handler(irq, &netx_hif_chip,
176 handle_level_irq); 176 handle_level_irq);
177 set_irq_flags(irq, IRQF_VALID); 177 irq_clear_status_flags(irq, IRQ_NOREQUEST);
178 } 178 }
179 179
180 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); 180 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 3c0e42219200..dfec671b1639 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -169,7 +169,7 @@ void omap1510_fpga_init_irq(void)
169 } 169 }
170 170
171 irq_set_handler(i, handle_edge_irq); 171 irq_set_handler(i, handle_edge_irq);
172 set_irq_flags(i, IRQF_VALID); 172 irq_clear_status_flags(i, IRQ_NOREQUEST);
173 } 173 }
174 174
175 /* 175 /*
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index f4d346fda9da..b11edc8a46f0 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -262,7 +262,7 @@ void __init omap1_init_irq(void)
262 262
263 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); 263 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j);
264 omap_irq_set_cfg(j, 0, 0, irq_trigger); 264 omap_irq_set_cfg(j, 0, 0, irq_trigger);
265 set_irq_flags(j, IRQF_VALID); 265 irq_clear_status_flags(j, IRQ_NOREQUEST);
266 } 266 }
267 omap_alloc_gc(irq_banks[i].va, irq_base + i * 32, 32); 267 omap_alloc_gc(irq_banks[i].va, irq_base + i * 32, 32);
268 } 268 }
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index d897292712eb..09b9a36049c7 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -528,7 +528,7 @@ static void __init balloon3_init_irq(void)
528 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { 528 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
529 irq_set_chip_and_handler(irq, &balloon3_irq_chip, 529 irq_set_chip_and_handler(irq, &balloon3_irq_chip,
530 handle_level_irq); 530 handle_level_irq);
531 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 531 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
532 } 532 }
533 533
534 irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); 534 irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 98608c5575cb..9c10248fadcc 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -133,7 +133,6 @@ static int pxa_irq_map(struct irq_domain *h, unsigned int virq,
133 irq_set_chip_and_handler(virq, &pxa_internal_irq_chip, 133 irq_set_chip_and_handler(virq, &pxa_internal_irq_chip,
134 handle_level_irq); 134 handle_level_irq);
135 irq_set_chip_data(virq, base); 135 irq_set_chip_data(virq, base);
136 set_irq_flags(virq, IRQF_VALID);
137 136
138 return 0; 137 return 0;
139} 138}
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index eaee2c20b189..2670fb0c6a21 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -151,7 +151,7 @@ static void __init lpd270_init_irq(void)
151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { 151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
152 irq_set_chip_and_handler(irq, &lpd270_irq_chip, 152 irq_set_chip_and_handler(irq, &lpd270_irq_chip,
153 handle_level_irq); 153 handle_level_irq);
154 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 154 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
155 } 155 }
156 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler); 156 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
157 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); 157 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 2897da2a5df6..86e01bfc65b5 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -311,7 +311,7 @@ static void __init pcm990_init_irq(void)
311 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { 311 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
312 irq_set_chip_and_handler(irq, &pcm990_irq_chip, 312 irq_set_chip_and_handler(irq, &pcm990_irq_chip,
313 handle_level_irq); 313 handle_level_irq);
314 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 314 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
315 } 315 }
316 316
317 /* disable all Interrupts */ 317 /* disable all Interrupts */
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index bd4cbef15ccf..e1362c0eeafc 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -325,7 +325,7 @@ static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
325 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { 325 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
326 irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip, 326 irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip,
327 handle_edge_irq); 327 handle_edge_irq);
328 set_irq_flags(irq, IRQF_VALID); 328 irq_clear_status_flags(irq, IRQ_NOREQUEST);
329 } 329 }
330 330
331 pxa_ext_wakeup_chip.irq_set_wake = fn; 331 pxa_ext_wakeup_chip.irq_set_wake = fn;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index de3b08073fe7..dae3de8ce58c 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -313,7 +313,7 @@ static void __init viper_init_irq(void)
313 isa_irq = viper_bit_to_irq(level); 313 isa_irq = viper_bit_to_irq(level);
314 irq_set_chip_and_handler(isa_irq, &viper_irq_chip, 314 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
315 handle_edge_irq); 315 handle_edge_irq);
316 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 316 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
317 } 317 }
318 318
319 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), 319 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index ac2ae5c71ab4..48dd5bd64d77 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -151,7 +151,7 @@ static void __init zeus_init_irq(void)
151 isa_irq = zeus_bit_to_irq(level); 151 isa_irq = zeus_bit_to_irq(level);
152 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip, 152 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
153 handle_edge_irq); 153 handle_edge_irq);
154 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 154 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
155 } 155 }
156 156
157 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); 157 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
diff --git a/arch/arm/mach-rpc/ecard.c b/arch/arm/mach-rpc/ecard.c
index fcb1d59f7aec..f726d4c4e6dd 100644
--- a/arch/arm/mach-rpc/ecard.c
+++ b/arch/arm/mach-rpc/ecard.c
@@ -946,7 +946,7 @@ static int __init ecard_probe(int slot, unsigned irq, card_type_t type)
946 irq_set_chip_and_handler(ec->irq, &ecard_chip, 946 irq_set_chip_and_handler(ec->irq, &ecard_chip,
947 handle_level_irq); 947 handle_level_irq);
948 irq_set_chip_data(ec->irq, ec); 948 irq_set_chip_data(ec->irq, ec);
949 set_irq_flags(ec->irq, IRQF_VALID); 949 irq_clear_status_flags(ec->irq, IRQ_NOREQUEST);
950 } 950 }
951 951
952#ifdef CONFIG_ARCH_RPC 952#ifdef CONFIG_ARCH_RPC
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index 3e4fa849c64d..66502e6207fe 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -117,7 +117,7 @@ extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end;
117 117
118void __init rpc_init_irq(void) 118void __init rpc_init_irq(void)
119{ 119{
120 unsigned int irq, flags; 120 unsigned int irq, clr, set = 0;
121 121
122 iomd_writeb(0, IOMD_IRQMASKA); 122 iomd_writeb(0, IOMD_IRQMASKA);
123 iomd_writeb(0, IOMD_IRQMASKB); 123 iomd_writeb(0, IOMD_IRQMASKB);
@@ -128,37 +128,37 @@ void __init rpc_init_irq(void)
128 &rpc_default_fiq_end - &rpc_default_fiq_start); 128 &rpc_default_fiq_end - &rpc_default_fiq_start);
129 129
130 for (irq = 0; irq < NR_IRQS; irq++) { 130 for (irq = 0; irq < NR_IRQS; irq++) {
131 flags = IRQF_VALID; 131 clr = IRQ_NOREQUEST;
132 132
133 if (irq <= 6 || (irq >= 9 && irq <= 15)) 133 if (irq <= 6 || (irq >= 9 && irq <= 15))
134 flags |= IRQF_PROBE; 134 clr |= IRQ_NOPROBE;
135 135
136 if (irq == 21 || (irq >= 16 && irq <= 19) || 136 if (irq == 21 || (irq >= 16 && irq <= 19) ||
137 irq == IRQ_KEYBOARDTX) 137 irq == IRQ_KEYBOARDTX)
138 flags |= IRQF_NOAUTOEN; 138 set |= IRQ_NOAUTOEN;
139 139
140 switch (irq) { 140 switch (irq) {
141 case 0 ... 7: 141 case 0 ... 7:
142 irq_set_chip_and_handler(irq, &iomd_a_chip, 142 irq_set_chip_and_handler(irq, &iomd_a_chip,
143 handle_level_irq); 143 handle_level_irq);
144 set_irq_flags(irq, flags); 144 irq_modify_status(irq, clr, set);
145 break; 145 break;
146 146
147 case 8 ... 15: 147 case 8 ... 15:
148 irq_set_chip_and_handler(irq, &iomd_b_chip, 148 irq_set_chip_and_handler(irq, &iomd_b_chip,
149 handle_level_irq); 149 handle_level_irq);
150 set_irq_flags(irq, flags); 150 irq_modify_status(irq, clr, set);
151 break; 151 break;
152 152
153 case 16 ... 21: 153 case 16 ... 21:
154 irq_set_chip_and_handler(irq, &iomd_dma_chip, 154 irq_set_chip_and_handler(irq, &iomd_dma_chip,
155 handle_level_irq); 155 handle_level_irq);
156 set_irq_flags(irq, flags); 156 irq_modify_status(irq, clr, set);
157 break; 157 break;
158 158
159 case 64 ... 71: 159 case 64 ... 71:
160 irq_set_chip(irq, &iomd_fiq_chip); 160 irq_set_chip(irq, &iomd_fiq_chip);
161 set_irq_flags(irq, IRQF_VALID); 161 irq_modify_status(irq, clr, set);
162 break; 162 break;
163 } 163 }
164 } 164 }
diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c
index cb1b791954de..ced1ab86ac83 100644
--- a/arch/arm/mach-s3c24xx/bast-irq.c
+++ b/arch/arm/mach-s3c24xx/bast-irq.c
@@ -147,7 +147,7 @@ static __init int bast_irq_init(void)
147 147
148 irq_set_chip_and_handler(irqno, &bast_pc104_chip, 148 irq_set_chip_and_handler(irqno, &bast_pc104_chip,
149 handle_level_irq); 149 handle_level_irq);
150 set_irq_flags(irqno, IRQF_VALID); 150 irq_clear_status_flags(irqno, IRQ_NOREQUEST);
151 } 151 }
152 } 152 }
153 153
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 16547f2641a3..06ba9438c262 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -420,7 +420,7 @@ static int __init s3c64xx_init_irq_eint(void)
420 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { 420 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
421 irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq); 421 irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
422 irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); 422 irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
423 set_irq_flags(irq, IRQF_VALID); 423 irq_clear_status_flags(irq, IRQ_NOREQUEST);
424 } 424 }
425 425
426 irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3); 426 irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 99d9a3b1bf34..6d237b4f7a8e 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -320,10 +320,10 @@ static int neponset_probe(struct platform_device *dev)
320 320
321 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, 321 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
322 handle_simple_irq); 322 handle_simple_irq);
323 set_irq_flags(d->irq_base + NEP_IRQ_SMC91X, IRQF_VALID | IRQF_PROBE); 323 irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
324 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, 324 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
325 handle_simple_irq); 325 handle_simple_irq);
326 set_irq_flags(d->irq_base + NEP_IRQ_USAR, IRQF_VALID | IRQF_PROBE); 326 irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
327 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); 327 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
328 328
329 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 329 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index d66d43ae8df5..491b317daffa 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -211,6 +211,6 @@ void __init nuc900_init_irq(void)
211 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) { 211 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
212 irq_set_chip_and_handler(irqno, &nuc900_irq_chip, 212 irq_set_chip_and_handler(irqno, &nuc900_irq_chip,
213 handle_level_irq); 213 handle_level_irq);
214 set_irq_flags(irqno, IRQF_VALID); 214 irq_clear_status_flags(irqno, IRQ_NOREQUEST);
215 } 215 }
216} 216}