diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2019-10-06 20:43:42 -0400 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2019-10-14 07:42:17 -0400 |
commit | 252b9e21bcf46b0d16f733f2e42b21fdc60addee (patch) | |
tree | d2748482c0ba8cc8f221c4c42352a8bb8d7bb190 /arch/arm | |
parent | 71936a6d18c33c63b4e9e0359fb987306cbe9fae (diff) |
ARM: dts: imx7s: Correct GPT's ipg clock source
i.MX7S/D's GPT ipg clock should be from GPT clock root and
controlled by CCM's GPT CCGR, using correct clock source for
GPT ipg clock instead of IMX7D_CLK_DUMMY.
Fixes: 3ef79ca6bd1d ("ARM: dts: imx7d: use imx7s.dtsi as base device tree")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx7s.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 710f850e785c..e2e604d6ba0b 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi | |||
@@ -448,7 +448,7 @@ | |||
448 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; | 448 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
449 | reg = <0x302d0000 0x10000>; | 449 | reg = <0x302d0000 0x10000>; |
450 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; | 450 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
451 | clocks = <&clks IMX7D_CLK_DUMMY>, | 451 | clocks = <&clks IMX7D_GPT1_ROOT_CLK>, |
452 | <&clks IMX7D_GPT1_ROOT_CLK>; | 452 | <&clks IMX7D_GPT1_ROOT_CLK>; |
453 | clock-names = "ipg", "per"; | 453 | clock-names = "ipg", "per"; |
454 | }; | 454 | }; |
@@ -457,7 +457,7 @@ | |||
457 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; | 457 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
458 | reg = <0x302e0000 0x10000>; | 458 | reg = <0x302e0000 0x10000>; |
459 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; | 459 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; |
460 | clocks = <&clks IMX7D_CLK_DUMMY>, | 460 | clocks = <&clks IMX7D_GPT2_ROOT_CLK>, |
461 | <&clks IMX7D_GPT2_ROOT_CLK>; | 461 | <&clks IMX7D_GPT2_ROOT_CLK>; |
462 | clock-names = "ipg", "per"; | 462 | clock-names = "ipg", "per"; |
463 | status = "disabled"; | 463 | status = "disabled"; |
@@ -467,7 +467,7 @@ | |||
467 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; | 467 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
468 | reg = <0x302f0000 0x10000>; | 468 | reg = <0x302f0000 0x10000>; |
469 | interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; | 469 | interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; |
470 | clocks = <&clks IMX7D_CLK_DUMMY>, | 470 | clocks = <&clks IMX7D_GPT3_ROOT_CLK>, |
471 | <&clks IMX7D_GPT3_ROOT_CLK>; | 471 | <&clks IMX7D_GPT3_ROOT_CLK>; |
472 | clock-names = "ipg", "per"; | 472 | clock-names = "ipg", "per"; |
473 | status = "disabled"; | 473 | status = "disabled"; |
@@ -477,7 +477,7 @@ | |||
477 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; | 477 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
478 | reg = <0x30300000 0x10000>; | 478 | reg = <0x30300000 0x10000>; |
479 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; | 479 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; |
480 | clocks = <&clks IMX7D_CLK_DUMMY>, | 480 | clocks = <&clks IMX7D_GPT4_ROOT_CLK>, |
481 | <&clks IMX7D_GPT4_ROOT_CLK>; | 481 | <&clks IMX7D_GPT4_ROOT_CLK>; |
482 | clock-names = "ipg", "per"; | 482 | clock-names = "ipg", "per"; |
483 | status = "disabled"; | 483 | status = "disabled"; |