diff options
author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2015-10-14 07:42:44 -0400 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2015-10-14 10:25:34 -0400 |
commit | d28c2b36d6027702585ca93773b3edd6e5f1a5bd (patch) | |
tree | 3045bb96f37dedba785958d4e6482d71ff323eea /arch/arm/common | |
parent | 696d8b70c09dd421c4d037fab04341e5b30585cf (diff) |
ARM: common: edma: Remove unused functions
We no longer have users for these functions so they can be removed.
Remove also unused enums from the header file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/edma.c | 376 |
1 files changed, 0 insertions, 376 deletions
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c index 56fc339571f9..e9c4cb16a47e 100644 --- a/arch/arm/common/edma.c +++ b/arch/arm/common/edma.c | |||
@@ -510,62 +510,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data) | |||
510 | return IRQ_HANDLED; | 510 | return IRQ_HANDLED; |
511 | } | 511 | } |
512 | 512 | ||
513 | static int reserve_contiguous_slots(int ctlr, unsigned int id, | ||
514 | unsigned int num_slots, | ||
515 | unsigned int start_slot) | ||
516 | { | ||
517 | int i, j; | ||
518 | unsigned int count = num_slots; | ||
519 | int stop_slot = start_slot; | ||
520 | DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY); | ||
521 | |||
522 | for (i = start_slot; i < edma_cc[ctlr]->num_slots; ++i) { | ||
523 | j = EDMA_CHAN_SLOT(i); | ||
524 | if (!test_and_set_bit(j, edma_cc[ctlr]->edma_inuse)) { | ||
525 | /* Record our current beginning slot */ | ||
526 | if (count == num_slots) | ||
527 | stop_slot = i; | ||
528 | |||
529 | count--; | ||
530 | set_bit(j, tmp_inuse); | ||
531 | |||
532 | if (count == 0) | ||
533 | break; | ||
534 | } else { | ||
535 | clear_bit(j, tmp_inuse); | ||
536 | |||
537 | if (id == EDMA_CONT_PARAMS_FIXED_EXACT) { | ||
538 | stop_slot = i; | ||
539 | break; | ||
540 | } else { | ||
541 | count = num_slots; | ||
542 | } | ||
543 | } | ||
544 | } | ||
545 | |||
546 | /* | ||
547 | * We have to clear any bits that we set | ||
548 | * if we run out parameter RAM slots, i.e we do find a set | ||
549 | * of contiguous parameter RAM slots but do not find the exact number | ||
550 | * requested as we may reach the total number of parameter RAM slots | ||
551 | */ | ||
552 | if (i == edma_cc[ctlr]->num_slots) | ||
553 | stop_slot = i; | ||
554 | |||
555 | j = start_slot; | ||
556 | for_each_set_bit_from(j, tmp_inuse, stop_slot) | ||
557 | clear_bit(j, edma_cc[ctlr]->edma_inuse); | ||
558 | |||
559 | if (count) | ||
560 | return -EBUSY; | ||
561 | |||
562 | for (j = i - num_slots + 1; j <= i; ++j) | ||
563 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j), | ||
564 | &dummy_paramset, PARM_SIZE); | ||
565 | |||
566 | return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1); | ||
567 | } | ||
568 | |||
569 | static int prepare_unused_channel_list(struct device *dev, void *data) | 513 | static int prepare_unused_channel_list(struct device *dev, void *data) |
570 | { | 514 | { |
571 | struct platform_device *pdev = to_platform_device(dev); | 515 | struct platform_device *pdev = to_platform_device(dev); |
@@ -818,186 +762,11 @@ void edma_free_slot(unsigned slot) | |||
818 | } | 762 | } |
819 | EXPORT_SYMBOL(edma_free_slot); | 763 | EXPORT_SYMBOL(edma_free_slot); |
820 | 764 | ||
821 | |||
822 | /** | ||
823 | * edma_alloc_cont_slots- alloc contiguous parameter RAM slots | ||
824 | * The API will return the starting point of a set of | ||
825 | * contiguous parameter RAM slots that have been requested | ||
826 | * | ||
827 | * @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT | ||
828 | * or EDMA_CONT_PARAMS_FIXED_NOT_EXACT | ||
829 | * @count: number of contiguous Paramter RAM slots | ||
830 | * @slot - the start value of Parameter RAM slot that should be passed if id | ||
831 | * is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT | ||
832 | * | ||
833 | * If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of | ||
834 | * contiguous Parameter RAM slots from parameter RAM 64 in the case of | ||
835 | * DaVinci SOCs and 32 in the case of DA8xx SOCs. | ||
836 | * | ||
837 | * If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a | ||
838 | * set of contiguous parameter RAM slots from the "slot" that is passed as an | ||
839 | * argument to the API. | ||
840 | * | ||
841 | * If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries | ||
842 | * starts looking for a set of contiguous parameter RAMs from the "slot" | ||
843 | * that is passed as an argument to the API. On failure the API will try to | ||
844 | * find a set of contiguous Parameter RAM slots from the remaining Parameter | ||
845 | * RAM slots | ||
846 | */ | ||
847 | int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count) | ||
848 | { | ||
849 | /* | ||
850 | * The start slot requested should be greater than | ||
851 | * the number of channels and lesser than the total number | ||
852 | * of slots | ||
853 | */ | ||
854 | if ((id != EDMA_CONT_PARAMS_ANY) && | ||
855 | (slot < edma_cc[ctlr]->num_channels || | ||
856 | slot >= edma_cc[ctlr]->num_slots)) | ||
857 | return -EINVAL; | ||
858 | |||
859 | /* | ||
860 | * The number of parameter RAM slots requested cannot be less than 1 | ||
861 | * and cannot be more than the number of slots minus the number of | ||
862 | * channels | ||
863 | */ | ||
864 | if (count < 1 || count > | ||
865 | (edma_cc[ctlr]->num_slots - edma_cc[ctlr]->num_channels)) | ||
866 | return -EINVAL; | ||
867 | |||
868 | switch (id) { | ||
869 | case EDMA_CONT_PARAMS_ANY: | ||
870 | return reserve_contiguous_slots(ctlr, id, count, | ||
871 | edma_cc[ctlr]->num_channels); | ||
872 | case EDMA_CONT_PARAMS_FIXED_EXACT: | ||
873 | case EDMA_CONT_PARAMS_FIXED_NOT_EXACT: | ||
874 | return reserve_contiguous_slots(ctlr, id, count, slot); | ||
875 | default: | ||
876 | return -EINVAL; | ||
877 | } | ||
878 | |||
879 | } | ||
880 | EXPORT_SYMBOL(edma_alloc_cont_slots); | ||
881 | |||
882 | /** | ||
883 | * edma_free_cont_slots - deallocate DMA parameter RAM slots | ||
884 | * @slot: first parameter RAM of a set of parameter RAM slots to be freed | ||
885 | * @count: the number of contiguous parameter RAM slots to be freed | ||
886 | * | ||
887 | * This deallocates the parameter RAM slots allocated by | ||
888 | * edma_alloc_cont_slots. | ||
889 | * Callers/applications need to keep track of sets of contiguous | ||
890 | * parameter RAM slots that have been allocated using the edma_alloc_cont_slots | ||
891 | * API. | ||
892 | * Callers are responsible for ensuring the slots are inactive, and will | ||
893 | * not be activated. | ||
894 | */ | ||
895 | int edma_free_cont_slots(unsigned slot, int count) | ||
896 | { | ||
897 | unsigned ctlr, slot_to_free; | ||
898 | int i; | ||
899 | |||
900 | ctlr = EDMA_CTLR(slot); | ||
901 | slot = EDMA_CHAN_SLOT(slot); | ||
902 | |||
903 | if (slot < edma_cc[ctlr]->num_channels || | ||
904 | slot >= edma_cc[ctlr]->num_slots || | ||
905 | count < 1) | ||
906 | return -EINVAL; | ||
907 | |||
908 | for (i = slot; i < slot + count; ++i) { | ||
909 | ctlr = EDMA_CTLR(i); | ||
910 | slot_to_free = EDMA_CHAN_SLOT(i); | ||
911 | |||
912 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free), | ||
913 | &dummy_paramset, PARM_SIZE); | ||
914 | clear_bit(slot_to_free, edma_cc[ctlr]->edma_inuse); | ||
915 | } | ||
916 | |||
917 | return 0; | ||
918 | } | ||
919 | EXPORT_SYMBOL(edma_free_cont_slots); | ||
920 | |||
921 | /*-----------------------------------------------------------------------*/ | 765 | /*-----------------------------------------------------------------------*/ |
922 | 766 | ||
923 | /* Parameter RAM operations (i) -- read/write partial slots */ | 767 | /* Parameter RAM operations (i) -- read/write partial slots */ |
924 | 768 | ||
925 | /** | 769 | /** |
926 | * edma_set_src - set initial DMA source address in parameter RAM slot | ||
927 | * @slot: parameter RAM slot being configured | ||
928 | * @src_port: physical address of source (memory, controller FIFO, etc) | ||
929 | * @addressMode: INCR, except in very rare cases | ||
930 | * @fifoWidth: ignored unless @addressMode is FIFO, else specifies the | ||
931 | * width to use when addressing the fifo (e.g. W8BIT, W32BIT) | ||
932 | * | ||
933 | * Note that the source address is modified during the DMA transfer | ||
934 | * according to edma_set_src_index(). | ||
935 | */ | ||
936 | void edma_set_src(unsigned slot, dma_addr_t src_port, | ||
937 | enum address_mode mode, enum fifo_width width) | ||
938 | { | ||
939 | unsigned ctlr; | ||
940 | |||
941 | ctlr = EDMA_CTLR(slot); | ||
942 | slot = EDMA_CHAN_SLOT(slot); | ||
943 | |||
944 | if (slot < edma_cc[ctlr]->num_slots) { | ||
945 | unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); | ||
946 | |||
947 | if (mode) { | ||
948 | /* set SAM and program FWID */ | ||
949 | i = (i & ~(EDMA_FWID)) | (SAM | ((width & 0x7) << 8)); | ||
950 | } else { | ||
951 | /* clear SAM */ | ||
952 | i &= ~SAM; | ||
953 | } | ||
954 | edma_parm_write(ctlr, PARM_OPT, slot, i); | ||
955 | |||
956 | /* set the source port address | ||
957 | in source register of param structure */ | ||
958 | edma_parm_write(ctlr, PARM_SRC, slot, src_port); | ||
959 | } | ||
960 | } | ||
961 | EXPORT_SYMBOL(edma_set_src); | ||
962 | |||
963 | /** | ||
964 | * edma_set_dest - set initial DMA destination address in parameter RAM slot | ||
965 | * @slot: parameter RAM slot being configured | ||
966 | * @dest_port: physical address of destination (memory, controller FIFO, etc) | ||
967 | * @addressMode: INCR, except in very rare cases | ||
968 | * @fifoWidth: ignored unless @addressMode is FIFO, else specifies the | ||
969 | * width to use when addressing the fifo (e.g. W8BIT, W32BIT) | ||
970 | * | ||
971 | * Note that the destination address is modified during the DMA transfer | ||
972 | * according to edma_set_dest_index(). | ||
973 | */ | ||
974 | void edma_set_dest(unsigned slot, dma_addr_t dest_port, | ||
975 | enum address_mode mode, enum fifo_width width) | ||
976 | { | ||
977 | unsigned ctlr; | ||
978 | |||
979 | ctlr = EDMA_CTLR(slot); | ||
980 | slot = EDMA_CHAN_SLOT(slot); | ||
981 | |||
982 | if (slot < edma_cc[ctlr]->num_slots) { | ||
983 | unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); | ||
984 | |||
985 | if (mode) { | ||
986 | /* set DAM and program FWID */ | ||
987 | i = (i & ~(EDMA_FWID)) | (DAM | ((width & 0x7) << 8)); | ||
988 | } else { | ||
989 | /* clear DAM */ | ||
990 | i &= ~DAM; | ||
991 | } | ||
992 | edma_parm_write(ctlr, PARM_OPT, slot, i); | ||
993 | /* set the destination port address | ||
994 | in dest register of param structure */ | ||
995 | edma_parm_write(ctlr, PARM_DST, slot, dest_port); | ||
996 | } | ||
997 | } | ||
998 | EXPORT_SYMBOL(edma_set_dest); | ||
999 | |||
1000 | /** | ||
1001 | * edma_get_position - returns the current transfer point | 770 | * edma_get_position - returns the current transfer point |
1002 | * @slot: parameter RAM slot being examined | 771 | * @slot: parameter RAM slot being examined |
1003 | * @dst: true selects the dest position, false the source | 772 | * @dst: true selects the dest position, false the source |
@@ -1017,110 +786,6 @@ dma_addr_t edma_get_position(unsigned slot, bool dst) | |||
1017 | } | 786 | } |
1018 | 787 | ||
1019 | /** | 788 | /** |
1020 | * edma_set_src_index - configure DMA source address indexing | ||
1021 | * @slot: parameter RAM slot being configured | ||
1022 | * @src_bidx: byte offset between source arrays in a frame | ||
1023 | * @src_cidx: byte offset between source frames in a block | ||
1024 | * | ||
1025 | * Offsets are specified to support either contiguous or discontiguous | ||
1026 | * memory transfers, or repeated access to a hardware register, as needed. | ||
1027 | * When accessing hardware registers, both offsets are normally zero. | ||
1028 | */ | ||
1029 | void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx) | ||
1030 | { | ||
1031 | unsigned ctlr; | ||
1032 | |||
1033 | ctlr = EDMA_CTLR(slot); | ||
1034 | slot = EDMA_CHAN_SLOT(slot); | ||
1035 | |||
1036 | if (slot < edma_cc[ctlr]->num_slots) { | ||
1037 | edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, | ||
1038 | 0xffff0000, src_bidx); | ||
1039 | edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, | ||
1040 | 0xffff0000, src_cidx); | ||
1041 | } | ||
1042 | } | ||
1043 | EXPORT_SYMBOL(edma_set_src_index); | ||
1044 | |||
1045 | /** | ||
1046 | * edma_set_dest_index - configure DMA destination address indexing | ||
1047 | * @slot: parameter RAM slot being configured | ||
1048 | * @dest_bidx: byte offset between destination arrays in a frame | ||
1049 | * @dest_cidx: byte offset between destination frames in a block | ||
1050 | * | ||
1051 | * Offsets are specified to support either contiguous or discontiguous | ||
1052 | * memory transfers, or repeated access to a hardware register, as needed. | ||
1053 | * When accessing hardware registers, both offsets are normally zero. | ||
1054 | */ | ||
1055 | void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx) | ||
1056 | { | ||
1057 | unsigned ctlr; | ||
1058 | |||
1059 | ctlr = EDMA_CTLR(slot); | ||
1060 | slot = EDMA_CHAN_SLOT(slot); | ||
1061 | |||
1062 | if (slot < edma_cc[ctlr]->num_slots) { | ||
1063 | edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, | ||
1064 | 0x0000ffff, dest_bidx << 16); | ||
1065 | edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, | ||
1066 | 0x0000ffff, dest_cidx << 16); | ||
1067 | } | ||
1068 | } | ||
1069 | EXPORT_SYMBOL(edma_set_dest_index); | ||
1070 | |||
1071 | /** | ||
1072 | * edma_set_transfer_params - configure DMA transfer parameters | ||
1073 | * @slot: parameter RAM slot being configured | ||
1074 | * @acnt: how many bytes per array (at least one) | ||
1075 | * @bcnt: how many arrays per frame (at least one) | ||
1076 | * @ccnt: how many frames per block (at least one) | ||
1077 | * @bcnt_rld: used only for A-Synchronized transfers; this specifies | ||
1078 | * the value to reload into bcnt when it decrements to zero | ||
1079 | * @sync_mode: ASYNC or ABSYNC | ||
1080 | * | ||
1081 | * See the EDMA3 documentation to understand how to configure and link | ||
1082 | * transfers using the fields in PaRAM slots. If you are not doing it | ||
1083 | * all at once with edma_write_slot(), you will use this routine | ||
1084 | * plus two calls each for source and destination, setting the initial | ||
1085 | * address and saying how to index that address. | ||
1086 | * | ||
1087 | * An example of an A-Synchronized transfer is a serial link using a | ||
1088 | * single word shift register. In that case, @acnt would be equal to | ||
1089 | * that word size; the serial controller issues a DMA synchronization | ||
1090 | * event to transfer each word, and memory access by the DMA transfer | ||
1091 | * controller will be word-at-a-time. | ||
1092 | * | ||
1093 | * An example of an AB-Synchronized transfer is a device using a FIFO. | ||
1094 | * In that case, @acnt equals the FIFO width and @bcnt equals its depth. | ||
1095 | * The controller with the FIFO issues DMA synchronization events when | ||
1096 | * the FIFO threshold is reached, and the DMA transfer controller will | ||
1097 | * transfer one frame to (or from) the FIFO. It will probably use | ||
1098 | * efficient burst modes to access memory. | ||
1099 | */ | ||
1100 | void edma_set_transfer_params(unsigned slot, | ||
1101 | u16 acnt, u16 bcnt, u16 ccnt, | ||
1102 | u16 bcnt_rld, enum sync_dimension sync_mode) | ||
1103 | { | ||
1104 | unsigned ctlr; | ||
1105 | |||
1106 | ctlr = EDMA_CTLR(slot); | ||
1107 | slot = EDMA_CHAN_SLOT(slot); | ||
1108 | |||
1109 | if (slot < edma_cc[ctlr]->num_slots) { | ||
1110 | edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot, | ||
1111 | 0x0000ffff, bcnt_rld << 16); | ||
1112 | if (sync_mode == ASYNC) | ||
1113 | edma_parm_and(ctlr, PARM_OPT, slot, ~SYNCDIM); | ||
1114 | else | ||
1115 | edma_parm_or(ctlr, PARM_OPT, slot, SYNCDIM); | ||
1116 | /* Set the acount, bcount, ccount registers */ | ||
1117 | edma_parm_write(ctlr, PARM_A_B_CNT, slot, (bcnt << 16) | acnt); | ||
1118 | edma_parm_write(ctlr, PARM_CCNT, slot, ccnt); | ||
1119 | } | ||
1120 | } | ||
1121 | EXPORT_SYMBOL(edma_set_transfer_params); | ||
1122 | |||
1123 | /** | ||
1124 | * edma_link - link one parameter RAM slot to another | 789 | * edma_link - link one parameter RAM slot to another |
1125 | * @from: parameter RAM slot originating the link | 790 | * @from: parameter RAM slot originating the link |
1126 | * @to: parameter RAM slot which is the link target | 791 | * @to: parameter RAM slot which is the link target |
@@ -1145,26 +810,6 @@ void edma_link(unsigned from, unsigned to) | |||
1145 | } | 810 | } |
1146 | EXPORT_SYMBOL(edma_link); | 811 | EXPORT_SYMBOL(edma_link); |
1147 | 812 | ||
1148 | /** | ||
1149 | * edma_unlink - cut link from one parameter RAM slot | ||
1150 | * @from: parameter RAM slot originating the link | ||
1151 | * | ||
1152 | * The originating slot should not be part of any active DMA transfer. | ||
1153 | * Its link is set to 0xffff. | ||
1154 | */ | ||
1155 | void edma_unlink(unsigned from) | ||
1156 | { | ||
1157 | unsigned ctlr; | ||
1158 | |||
1159 | ctlr = EDMA_CTLR(from); | ||
1160 | from = EDMA_CHAN_SLOT(from); | ||
1161 | |||
1162 | if (from >= edma_cc[ctlr]->num_slots) | ||
1163 | return; | ||
1164 | edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff); | ||
1165 | } | ||
1166 | EXPORT_SYMBOL(edma_unlink); | ||
1167 | |||
1168 | /*-----------------------------------------------------------------------*/ | 813 | /*-----------------------------------------------------------------------*/ |
1169 | 814 | ||
1170 | /* Parameter RAM operations (ii) -- read/write whole parameter sets */ | 815 | /* Parameter RAM operations (ii) -- read/write whole parameter sets */ |
@@ -1402,27 +1047,6 @@ void edma_clean_channel(unsigned channel) | |||
1402 | EXPORT_SYMBOL(edma_clean_channel); | 1047 | EXPORT_SYMBOL(edma_clean_channel); |
1403 | 1048 | ||
1404 | /* | 1049 | /* |
1405 | * edma_clear_event - clear an outstanding event on the DMA channel | ||
1406 | * Arguments: | ||
1407 | * channel - channel number | ||
1408 | */ | ||
1409 | void edma_clear_event(unsigned channel) | ||
1410 | { | ||
1411 | unsigned ctlr; | ||
1412 | |||
1413 | ctlr = EDMA_CTLR(channel); | ||
1414 | channel = EDMA_CHAN_SLOT(channel); | ||
1415 | |||
1416 | if (channel >= edma_cc[ctlr]->num_channels) | ||
1417 | return; | ||
1418 | if (channel < 32) | ||
1419 | edma_write(ctlr, EDMA_ECR, BIT(channel)); | ||
1420 | else | ||
1421 | edma_write(ctlr, EDMA_ECRH, BIT(channel - 32)); | ||
1422 | } | ||
1423 | EXPORT_SYMBOL(edma_clear_event); | ||
1424 | |||
1425 | /* | ||
1426 | * edma_assign_channel_eventq - move given channel to desired eventq | 1050 | * edma_assign_channel_eventq - move given channel to desired eventq |
1427 | * Arguments: | 1051 | * Arguments: |
1428 | * channel - channel number | 1052 | * channel - channel number |