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authorVineet Gupta <vgupta@synopsys.com>2016-10-31 14:09:34 -0400
committerVineet Gupta <vgupta@synopsys.com>2016-11-30 14:54:25 -0500
commitc33a605dd6f36618f9f658e71c09fcdcb44fc500 (patch)
treeac77c51dbe5bf8a8498600ca4da4cb4f46fc6656 /arch/arc
parent92b03314033c0d36ef3a5e68ccdc65ad2a4d17c5 (diff)
ARC: breakout aux handling into a separate header
ARC timers use aux registers for programming and this paves way for moving ARC timer drivers into drivers/clocksource Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/include/asm/arcregs.h85
-rw-r--r--arch/arc/include/asm/mcip.h2
2 files changed, 2 insertions, 85 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 1bd24ec3e350..7a2c36e83186 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -112,90 +112,7 @@
112 112
113#ifndef __ASSEMBLY__ 113#ifndef __ASSEMBLY__
114 114
115/* 115#include <soc/arc/aux.h>
116 ******************************************************************
117 * Inline ASM macros to read/write AUX Regs
118 * Essentially invocation of lr/sr insns from "C"
119 */
120
121#if 1
122
123#define read_aux_reg(reg) __builtin_arc_lr(reg)
124
125/* gcc builtin sr needs reg param to be long immediate */
126#define write_aux_reg(reg_immed, val) \
127 __builtin_arc_sr((unsigned int)(val), reg_immed)
128
129#else
130
131#define read_aux_reg(reg) \
132({ \
133 unsigned int __ret; \
134 __asm__ __volatile__( \
135 " lr %0, [%1]" \
136 : "=r"(__ret) \
137 : "i"(reg)); \
138 __ret; \
139})
140
141/*
142 * Aux Reg address is specified as long immediate by caller
143 * e.g.
144 * write_aux_reg(0x69, some_val);
145 * This generates tightest code.
146 */
147#define write_aux_reg(reg_imm, val) \
148({ \
149 __asm__ __volatile__( \
150 " sr %0, [%1] \n" \
151 : \
152 : "ir"(val), "i"(reg_imm)); \
153})
154
155/*
156 * Aux Reg address is specified in a variable
157 * * e.g.
158 * reg_num = 0x69
159 * write_aux_reg2(reg_num, some_val);
160 * This has to generate glue code to load the reg num from
161 * memory to a reg hence not recommended.
162 */
163#define write_aux_reg2(reg_in_var, val) \
164({ \
165 unsigned int tmp; \
166 \
167 __asm__ __volatile__( \
168 " ld %0, [%2] \n\t" \
169 " sr %1, [%0] \n\t" \
170 : "=&r"(tmp) \
171 : "r"(val), "memory"(&reg_in_var)); \
172})
173
174#endif
175
176#define READ_BCR(reg, into) \
177{ \
178 unsigned int tmp; \
179 tmp = read_aux_reg(reg); \
180 if (sizeof(tmp) == sizeof(into)) { \
181 into = *((typeof(into) *)&tmp); \
182 } else { \
183 extern void bogus_undefined(void); \
184 bogus_undefined(); \
185 } \
186}
187
188#define WRITE_AUX(reg, into) \
189{ \
190 unsigned int tmp; \
191 if (sizeof(tmp) == sizeof(into)) { \
192 tmp = (*(unsigned int *)&(into)); \
193 write_aux_reg(reg, tmp); \
194 } else { \
195 extern void bogus_undefined(void); \
196 bogus_undefined(); \
197 } \
198}
199 116
200/* Helpers */ 117/* Helpers */
201#define TO_KB(bytes) ((bytes) >> 10) 118#define TO_KB(bytes) ((bytes) >> 10)
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index c8fbe4114bad..fc28d0944801 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -13,7 +13,7 @@
13 13
14#ifdef CONFIG_ISA_ARCV2 14#ifdef CONFIG_ISA_ARCV2
15 15
16#include <asm/arcregs.h> 16#include <soc/arc/aux.h>
17 17
18#define ARC_REG_MCIP_BCR 0x0d0 18#define ARC_REG_MCIP_BCR 0x0d0
19#define ARC_REG_MCIP_CMD 0x600 19#define ARC_REG_MCIP_CMD 0x600