diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2015-05-20 12:55:47 -0400 |
|---|---|---|
| committer | Jon Mason <jdmason@kudzu.us> | 2015-07-04 14:09:25 -0400 |
| commit | 2f887b9a44015a8146d52e40bef9e2b7bc6cd275 (patch) | |
| tree | 07edc544a14022181aa7136671a0f7ce80283ca0 /Documentation | |
| parent | a41ef053f700618f5f55a1dd658908a71163400b (diff) | |
NTB: Rename Intel code names to platform names
Instead of using the platform code names, use the correct platform names
to identify the respective Intel NTB hardware.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/ntb.txt | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/Documentation/ntb.txt b/Documentation/ntb.txt index b48249a7b607..1d9bbabb6c79 100644 --- a/Documentation/ntb.txt +++ b/Documentation/ntb.txt | |||
| @@ -115,13 +115,13 @@ Module Parameters: | |||
| 115 | * b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if | 115 | * b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if |
| 116 | the memory window is large enough, still allow the client to use the | 116 | the memory window is large enough, still allow the client to use the |
| 117 | second half of the memory window for address translation to the peer. | 117 | second half of the memory window for address translation to the peer. |
| 118 | * snb\_b2b\_usd\_bar2\_addr64 - If using B2B topology on Xeon hardware, use this | 118 | * xeon\_b2b\_usd\_bar2\_addr64 - If using B2B topology on Xeon hardware, use |
| 119 | 64 bit address on the bus between the NTB devices for the window at | 119 | this 64 bit address on the bus between the NTB devices for the window |
| 120 | BAR2, on the upstream side of the link. | 120 | at BAR2, on the upstream side of the link. |
| 121 | * snb\_b2b\_usd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*. | 121 | * xeon\_b2b\_usd\_bar4\_addr64 - See *xeon\_b2b\_bar2\_addr64*. |
| 122 | * snb\_b2b\_usd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*. | 122 | * xeon\_b2b\_usd\_bar4\_addr32 - See *xeon\_b2b\_bar2\_addr64*. |
| 123 | * snb\_b2b\_usd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*. | 123 | * xeon\_b2b\_usd\_bar5\_addr32 - See *xeon\_b2b\_bar2\_addr64*. |
| 124 | * snb\_b2b\_dsd\_bar2\_addr64 - See *snb\_b2b\_bar2\_addr64*. | 124 | * xeon\_b2b\_dsd\_bar2\_addr64 - See *xeon\_b2b\_bar2\_addr64*. |
| 125 | * snb\_b2b\_dsd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*. | 125 | * xeon\_b2b\_dsd\_bar4\_addr64 - See *xeon\_b2b\_bar2\_addr64*. |
| 126 | * snb\_b2b\_dsd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*. | 126 | * xeon\_b2b\_dsd\_bar4\_addr32 - See *xeon\_b2b\_bar2\_addr64*. |
| 127 | * snb\_b2b\_dsd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*. | 127 | * xeon\_b2b\_dsd\_bar5\_addr32 - See *xeon\_b2b\_bar2\_addr64*. |