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authorVignesh R <vigneshr@ti.com>2017-10-03 01:19:20 -0400
committerCyrille Pitchen <cyrille.pitchen@wedev4u.fr>2017-10-17 14:37:20 -0400
commit18a3dde9db78076755275423b754846a2da000ad (patch)
treeb07263770a7dcec6ca68bd57fe07cbc08ebaf4b4 /Documentation
parent3163d125b7b1f9c6844fc3448f8080ad268a8f63 (diff)
mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible
Update binding documentation to add a new compatible for TI 66AK2G SoC, to handle TI SoC specific quirks in the driver. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mtd/cadence-quadspi.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
index f248056da24c..7dbe3bd9ac56 100644
--- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
+++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
@@ -1,7 +1,9 @@
1* Cadence Quad SPI controller 1* Cadence Quad SPI controller
2 2
3Required properties: 3Required properties:
4- compatible : Should be "cdns,qspi-nor". 4- compatible : should be one of the following:
5 Generic default - "cdns,qspi-nor".
6 For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
5- reg : Contains two entries, each of which is a tuple consisting of a 7- reg : Contains two entries, each of which is a tuple consisting of a
6 physical address and length. The first entry is the address and 8 physical address and length. The first entry is the address and
7 length of the controller register set. The second entry is the 9 length of the controller register set. The second entry is the