summaryrefslogtreecommitdiffstats
path: root/Documentation/spi
diff options
context:
space:
mode:
authorLubomir Rintel <lkundrak@v3.sk>2019-01-16 10:13:31 -0500
committerMark Brown <broonie@kernel.org>2019-01-23 05:59:56 -0500
commit51eea52d26d4939b788b7244c28cf47e902b4c4c (patch)
tree9eda241338419c926a471db7acbadf6913049896 /Documentation/spi
parentbfc7af6d6df8d75b9c693b8eb98c21aa75c1e377 (diff)
pxa2xx: replace spi_master with spi_controller
It's also a slave controller driver now, calling it "master" is slightly misleading. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/spi')
-rw-r--r--Documentation/spi/pxa2xx10
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx
index 13a0b7fb192f..551325b66b23 100644
--- a/Documentation/spi/pxa2xx
+++ b/Documentation/spi/pxa2xx
@@ -21,15 +21,15 @@ Typically a SPI master is defined in the arch/.../mach-*/board-*.c as a
21"platform device". The master configuration is passed to the driver via a table 21"platform device". The master configuration is passed to the driver via a table
22found in include/linux/spi/pxa2xx_spi.h: 22found in include/linux/spi/pxa2xx_spi.h:
23 23
24struct pxa2xx_spi_master { 24struct pxa2xx_spi_controller {
25 u16 num_chipselect; 25 u16 num_chipselect;
26 u8 enable_dma; 26 u8 enable_dma;
27}; 27};
28 28
29The "pxa2xx_spi_master.num_chipselect" field is used to determine the number of 29The "pxa2xx_spi_controller.num_chipselect" field is used to determine the number of
30slave device (chips) attached to this SPI master. 30slave device (chips) attached to this SPI master.
31 31
32The "pxa2xx_spi_master.enable_dma" field informs the driver that SSP DMA should 32The "pxa2xx_spi_controller.enable_dma" field informs the driver that SSP DMA should
33be used. This caused the driver to acquire two DMA channels: rx_channel and 33be used. This caused the driver to acquire two DMA channels: rx_channel and
34tx_channel. The rx_channel has a higher DMA service priority the tx_channel. 34tx_channel. The rx_channel has a higher DMA service priority the tx_channel.
35See the "PXA2xx Developer Manual" section "DMA Controller". 35See the "PXA2xx Developer Manual" section "DMA Controller".
@@ -51,7 +51,7 @@ static struct resource pxa_spi_nssp_resources[] = {
51 }, 51 },
52}; 52};
53 53
54static struct pxa2xx_spi_master pxa_nssp_master_info = { 54static struct pxa2xx_spi_controller pxa_nssp_master_info = {
55 .num_chipselect = 1, /* Matches the number of chips attached to NSSP */ 55 .num_chipselect = 1, /* Matches the number of chips attached to NSSP */
56 .enable_dma = 1, /* Enables NSSP DMA */ 56 .enable_dma = 1, /* Enables NSSP DMA */
57}; 57};
@@ -206,7 +206,7 @@ DMA and PIO I/O Support
206----------------------- 206-----------------------
207The pxa2xx_spi driver supports both DMA and interrupt driven PIO message 207The pxa2xx_spi driver supports both DMA and interrupt driven PIO message
208transfers. The driver defaults to PIO mode and DMA transfers must be enabled 208transfers. The driver defaults to PIO mode and DMA transfers must be enabled
209by setting the "enable_dma" flag in the "pxa2xx_spi_master" structure. The DMA 209by setting the "enable_dma" flag in the "pxa2xx_spi_controller" structure. The DMA
210mode supports both coherent and stream based DMA mappings. 210mode supports both coherent and stream based DMA mappings.
211 211
212The following logic is used to determine the type of I/O to be used on 212The following logic is used to determine the type of I/O to be used on