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authorMarc Zyngier <marc.zyngier@arm.com>2016-08-16 10:03:01 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2016-08-17 06:23:47 -0400
commit674e70127069f3fd3c58fb0f94c60eb0f6567d78 (patch)
treed36024aef039b0e277279f22747be0ae1283315c /Documentation/arm64/silicon-errata.txt
parent9ac715954682b23d293d910ad2697554171035e7 (diff)
arm64: Document workaround for Cortex-A72 erratum #853709
We already have a workaround for Cortex-A57 erratum #852523, but Cortex-A72 r0p0 to r0p2 do suffer from the same issue (known as erratum #853709). Let's document the fact that we already handle this. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'Documentation/arm64/silicon-errata.txt')
-rw-r--r--Documentation/arm64/silicon-errata.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt
index 4da60b463995..ccc60324e738 100644
--- a/Documentation/arm64/silicon-errata.txt
+++ b/Documentation/arm64/silicon-errata.txt
@@ -53,6 +53,7 @@ stable kernels.
53| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 | 53| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
54| ARM | Cortex-A57 | #852523 | N/A | 54| ARM | Cortex-A57 | #852523 | N/A |
55| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 | 55| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
56| ARM | Cortex-A72 | #853709 | N/A |
56| ARM | MMU-500 | #841119,#826419 | N/A | 57| ARM | MMU-500 | #841119,#826419 | N/A |
57| | | | | 58| | | | |
58| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 | 59| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |