diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2019-06-22 09:15:22 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-07-02 06:24:42 -0400 |
commit | fc557537f2ad546e5c6f217143d8a95382f2e1b5 (patch) | |
tree | 6b41d6b34db262a91986d3b768dc5b40a6b7f222 | |
parent | 47169fba3af465c995a936e6b9c67e0746f4c583 (diff) |
powerpc/64s/exception: unwind exception-64s.h macros
Many of these macros just specify 1-4 lines which are only called a
few times each at most, and often just once. Remove this indirection.
No generated code change.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r-- | arch/powerpc/include/asm/exception-64s.h | 101 | ||||
-rw-r--r-- | arch/powerpc/include/asm/head-64.h | 76 | ||||
-rw-r--r-- | arch/powerpc/kernel/exceptions-64s.S | 44 |
3 files changed, 82 insertions, 139 deletions
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index 127ebd8d7746..6efd182da254 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h | |||
@@ -230,17 +230,6 @@ | |||
230 | #endif | 230 | #endif |
231 | .endm | 231 | .endm |
232 | 232 | ||
233 | /* | ||
234 | * As EXCEPTION_PROLOG(), except we've already got relocation on so no need to | ||
235 | * rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case | ||
236 | * EXCEPTION_PROLOG_2_VIRT will be using CTR. | ||
237 | */ | ||
238 | #define EXCEPTION_RELON_PROLOG(area, label, hsrr, kvm, vec) \ | ||
239 | SET_SCRATCH0(r13); /* save r13 */ \ | ||
240 | EXCEPTION_PROLOG_0 area ; \ | ||
241 | EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \ | ||
242 | EXCEPTION_PROLOG_2_VIRT label, hsrr | ||
243 | |||
244 | /* Exception register prefixes */ | 233 | /* Exception register prefixes */ |
245 | #define EXC_HV 1 | 234 | #define EXC_HV 1 |
246 | #define EXC_STD 0 | 235 | #define EXC_STD 0 |
@@ -351,12 +340,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) | |||
351 | std r10,\area\()+EX_R13(r13) | 340 | std r10,\area\()+EX_R13(r13) |
352 | .endm | 341 | .endm |
353 | 342 | ||
354 | #define EXCEPTION_PROLOG(area, label, hsrr, kvm, vec) \ | ||
355 | SET_SCRATCH0(r13); /* save r13 */ \ | ||
356 | EXCEPTION_PROLOG_0 area ; \ | ||
357 | EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \ | ||
358 | EXCEPTION_PROLOG_2_REAL label, hsrr, 1 | ||
359 | |||
360 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | 343 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
361 | /* | 344 | /* |
362 | * If hv is possible, interrupts come into to the hv version | 345 | * If hv is possible, interrupts come into to the hv version |
@@ -420,12 +403,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) | |||
420 | 403 | ||
421 | #endif | 404 | #endif |
422 | 405 | ||
423 | /* Do not enable RI */ | ||
424 | #define EXCEPTION_PROLOG_NORI(area, label, hsrr, kvm, vec) \ | ||
425 | EXCEPTION_PROLOG_0 area ; \ | ||
426 | EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \ | ||
427 | EXCEPTION_PROLOG_2_REAL label, hsrr, 0 | ||
428 | |||
429 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 406 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
430 | .macro KVMTEST hsrr, n | 407 | .macro KVMTEST hsrr, n |
431 | lbz r10,HSTATE_IN_GUEST(r13) | 408 | lbz r10,HSTATE_IN_GUEST(r13) |
@@ -562,84 +539,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) | |||
562 | std r10,RESULT(r1); /* clear regs->result */ \ | 539 | std r10,RESULT(r1); /* clear regs->result */ \ |
563 | std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ | 540 | std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ |
564 | 541 | ||
565 | /* | ||
566 | * Exception vectors. | ||
567 | */ | ||
568 | #define STD_EXCEPTION(vec, label) \ | ||
569 | EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, 1, vec); | ||
570 | |||
571 | /* Version of above for when we have to branch out-of-line */ | ||
572 | #define __OOL_EXCEPTION(vec, label, hdlr) \ | ||
573 | SET_SCRATCH0(r13); \ | ||
574 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
575 | b hdlr | ||
576 | |||
577 | #define STD_EXCEPTION_OOL(vec, label) \ | ||
578 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, 0 ; \ | ||
579 | EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1 | ||
580 | |||
581 | #define STD_EXCEPTION_HV(loc, vec, label) \ | ||
582 | EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec) | ||
583 | |||
584 | #define STD_EXCEPTION_HV_OOL(vec, label) \ | ||
585 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \ | ||
586 | EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1 | ||
587 | |||
588 | #define STD_RELON_EXCEPTION(loc, vec, label) \ | ||
589 | /* No guest interrupts come through here */ \ | ||
590 | EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, 0, vec) | ||
591 | |||
592 | #define STD_RELON_EXCEPTION_OOL(vec, label) \ | ||
593 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, 0 ; \ | ||
594 | EXCEPTION_PROLOG_2_VIRT label, EXC_STD | ||
595 | |||
596 | #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ | ||
597 | EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec) | ||
598 | |||
599 | #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ | ||
600 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \ | ||
601 | EXCEPTION_PROLOG_2_VIRT label, EXC_HV | ||
602 | |||
603 | #define __MASKABLE_EXCEPTION(vec, label, hsrr, kvm, bitmask) \ | ||
604 | SET_SCRATCH0(r13); /* save r13 */ \ | ||
605 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
606 | EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \ | ||
607 | EXCEPTION_PROLOG_2_REAL label, hsrr, 1 | ||
608 | |||
609 | #define MASKABLE_EXCEPTION(vec, label, bitmask) \ | ||
610 | __MASKABLE_EXCEPTION(vec, label, EXC_STD, 1, bitmask) | ||
611 | |||
612 | #define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \ | ||
613 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, bitmask ; \ | ||
614 | EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1 | ||
615 | |||
616 | #define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \ | ||
617 | __MASKABLE_EXCEPTION(vec, label, EXC_HV, 1, bitmask) | ||
618 | |||
619 | #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \ | ||
620 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \ | ||
621 | EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1 | ||
622 | |||
623 | #define __MASKABLE_RELON_EXCEPTION(vec, label, hsrr, kvm, bitmask) \ | ||
624 | SET_SCRATCH0(r13); /* save r13 */ \ | ||
625 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
626 | EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \ | ||
627 | EXCEPTION_PROLOG_2_VIRT label, hsrr | ||
628 | |||
629 | #define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \ | ||
630 | __MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, 0, bitmask) | ||
631 | |||
632 | #define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \ | ||
633 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, bitmask ; \ | ||
634 | EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1 | ||
635 | |||
636 | #define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \ | ||
637 | __MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, 1, bitmask) | ||
638 | |||
639 | #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \ | ||
640 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \ | ||
641 | EXCEPTION_PROLOG_2_VIRT label, EXC_HV | ||
642 | |||
643 | #define RUNLATCH_ON \ | 542 | #define RUNLATCH_ON \ |
644 | BEGIN_FTR_SECTION \ | 543 | BEGIN_FTR_SECTION \ |
645 | ld r3, PACA_THREAD_INFO(r13); \ | 544 | ld r3, PACA_THREAD_INFO(r13); \ |
diff --git a/arch/powerpc/include/asm/head-64.h b/arch/powerpc/include/asm/head-64.h index acd94fcf9f40..54db05afb80f 100644 --- a/arch/powerpc/include/asm/head-64.h +++ b/arch/powerpc/include/asm/head-64.h | |||
@@ -258,44 +258,71 @@ name: | |||
258 | FIXED_SECTION_ENTRY_END_LOCATION(virt_vectors, exc_virt_##start##_##unused, start, size) | 258 | FIXED_SECTION_ENTRY_END_LOCATION(virt_vectors, exc_virt_##start##_##unused, start, size) |
259 | 259 | ||
260 | 260 | ||
261 | #define EXC_REAL(name, start, size) \ | 261 | #define __EXC_REAL(name, start, size, area) \ |
262 | EXC_REAL_BEGIN(name, start, size); \ | 262 | EXC_REAL_BEGIN(name, start, size); \ |
263 | STD_EXCEPTION(start, name##_common); \ | 263 | SET_SCRATCH0(r13); /* save r13 */ \ |
264 | EXCEPTION_PROLOG_0 area ; \ | ||
265 | EXCEPTION_PROLOG_1 EXC_STD, area, 1, start, 0 ; \ | ||
266 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \ | ||
264 | EXC_REAL_END(name, start, size) | 267 | EXC_REAL_END(name, start, size) |
265 | 268 | ||
266 | #define EXC_VIRT(name, start, size, realvec) \ | 269 | #define EXC_REAL(name, start, size) \ |
270 | __EXC_REAL(name, start, size, PACA_EXGEN) | ||
271 | |||
272 | #define __EXC_VIRT(name, start, size, realvec, area) \ | ||
267 | EXC_VIRT_BEGIN(name, start, size); \ | 273 | EXC_VIRT_BEGIN(name, start, size); \ |
268 | STD_RELON_EXCEPTION(start, realvec, name##_common); \ | 274 | SET_SCRATCH0(r13); /* save r13 */ \ |
275 | EXCEPTION_PROLOG_0 area ; \ | ||
276 | EXCEPTION_PROLOG_1 EXC_STD, area, 0, realvec, 0; \ | ||
277 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \ | ||
269 | EXC_VIRT_END(name, start, size) | 278 | EXC_VIRT_END(name, start, size) |
270 | 279 | ||
280 | #define EXC_VIRT(name, start, size, realvec) \ | ||
281 | __EXC_VIRT(name, start, size, realvec, PACA_EXGEN) | ||
282 | |||
271 | #define EXC_REAL_MASKABLE(name, start, size, bitmask) \ | 283 | #define EXC_REAL_MASKABLE(name, start, size, bitmask) \ |
272 | EXC_REAL_BEGIN(name, start, size); \ | 284 | EXC_REAL_BEGIN(name, start, size); \ |
273 | MASKABLE_EXCEPTION(start, name##_common, bitmask); \ | 285 | SET_SCRATCH0(r13); /* save r13 */ \ |
286 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
287 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, start, bitmask ; \ | ||
288 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \ | ||
274 | EXC_REAL_END(name, start, size) | 289 | EXC_REAL_END(name, start, size) |
275 | 290 | ||
276 | #define EXC_VIRT_MASKABLE(name, start, size, realvec, bitmask) \ | 291 | #define EXC_VIRT_MASKABLE(name, start, size, realvec, bitmask) \ |
277 | EXC_VIRT_BEGIN(name, start, size); \ | 292 | EXC_VIRT_BEGIN(name, start, size); \ |
278 | MASKABLE_RELON_EXCEPTION(realvec, name##_common, bitmask); \ | 293 | SET_SCRATCH0(r13); /* save r13 */ \ |
294 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
295 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, realvec, bitmask ; \ | ||
296 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \ | ||
279 | EXC_VIRT_END(name, start, size) | 297 | EXC_VIRT_END(name, start, size) |
280 | 298 | ||
281 | #define EXC_REAL_HV(name, start, size) \ | 299 | #define EXC_REAL_HV(name, start, size) \ |
282 | EXC_REAL_BEGIN(name, start, size); \ | 300 | EXC_REAL_BEGIN(name, start, size); \ |
283 | STD_EXCEPTION_HV(start, start, name##_common); \ | 301 | SET_SCRATCH0(r13); /* save r13 */ \ |
302 | EXCEPTION_PROLOG_0 PACA_EXGEN; \ | ||
303 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, start, 0 ; \ | ||
304 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1 ; \ | ||
284 | EXC_REAL_END(name, start, size) | 305 | EXC_REAL_END(name, start, size) |
285 | 306 | ||
286 | #define EXC_VIRT_HV(name, start, size, realvec) \ | 307 | #define EXC_VIRT_HV(name, start, size, realvec) \ |
287 | EXC_VIRT_BEGIN(name, start, size); \ | 308 | EXC_VIRT_BEGIN(name, start, size); \ |
288 | STD_RELON_EXCEPTION_HV(start, realvec, name##_common); \ | 309 | SET_SCRATCH0(r13); /* save r13 */ \ |
310 | EXCEPTION_PROLOG_0 PACA_EXGEN; \ | ||
311 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, 0 ; \ | ||
312 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV ; \ | ||
289 | EXC_VIRT_END(name, start, size) | 313 | EXC_VIRT_END(name, start, size) |
290 | 314 | ||
291 | #define __EXC_REAL_OOL(name, start, size) \ | 315 | #define __EXC_REAL_OOL(name, start, size) \ |
292 | EXC_REAL_BEGIN(name, start, size); \ | 316 | EXC_REAL_BEGIN(name, start, size); \ |
293 | __OOL_EXCEPTION(start, label, tramp_real_##name); \ | 317 | SET_SCRATCH0(r13); \ |
318 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
319 | b tramp_real_##name ; \ | ||
294 | EXC_REAL_END(name, start, size) | 320 | EXC_REAL_END(name, start, size) |
295 | 321 | ||
296 | #define __TRAMP_REAL_OOL(name, vec) \ | 322 | #define __TRAMP_REAL_OOL(name, vec) \ |
297 | TRAMP_REAL_BEGIN(tramp_real_##name); \ | 323 | TRAMP_REAL_BEGIN(tramp_real_##name); \ |
298 | STD_EXCEPTION_OOL(vec, name##_common) | 324 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, 0 ; \ |
325 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 | ||
299 | 326 | ||
300 | #define EXC_REAL_OOL(name, start, size) \ | 327 | #define EXC_REAL_OOL(name, start, size) \ |
301 | __EXC_REAL_OOL(name, start, size); \ | 328 | __EXC_REAL_OOL(name, start, size); \ |
@@ -306,7 +333,8 @@ name: | |||
306 | 333 | ||
307 | #define __TRAMP_REAL_OOL_MASKABLE(name, vec, bitmask) \ | 334 | #define __TRAMP_REAL_OOL_MASKABLE(name, vec, bitmask) \ |
308 | TRAMP_REAL_BEGIN(tramp_real_##name); \ | 335 | TRAMP_REAL_BEGIN(tramp_real_##name); \ |
309 | MASKABLE_EXCEPTION_OOL(vec, name##_common, bitmask) | 336 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, bitmask ; \ |
337 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 | ||
310 | 338 | ||
311 | #define EXC_REAL_OOL_MASKABLE(name, start, size, bitmask) \ | 339 | #define EXC_REAL_OOL_MASKABLE(name, start, size, bitmask) \ |
312 | __EXC_REAL_OOL_MASKABLE(name, start, size); \ | 340 | __EXC_REAL_OOL_MASKABLE(name, start, size); \ |
@@ -314,7 +342,9 @@ name: | |||
314 | 342 | ||
315 | #define __EXC_REAL_OOL_HV_DIRECT(name, start, size, handler) \ | 343 | #define __EXC_REAL_OOL_HV_DIRECT(name, start, size, handler) \ |
316 | EXC_REAL_BEGIN(name, start, size); \ | 344 | EXC_REAL_BEGIN(name, start, size); \ |
317 | __OOL_EXCEPTION(start, label, handler); \ | 345 | SET_SCRATCH0(r13); \ |
346 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
347 | b handler; \ | ||
318 | EXC_REAL_END(name, start, size) | 348 | EXC_REAL_END(name, start, size) |
319 | 349 | ||
320 | #define __EXC_REAL_OOL_HV(name, start, size) \ | 350 | #define __EXC_REAL_OOL_HV(name, start, size) \ |
@@ -322,7 +352,8 @@ name: | |||
322 | 352 | ||
323 | #define __TRAMP_REAL_OOL_HV(name, vec) \ | 353 | #define __TRAMP_REAL_OOL_HV(name, vec) \ |
324 | TRAMP_REAL_BEGIN(tramp_real_##name); \ | 354 | TRAMP_REAL_BEGIN(tramp_real_##name); \ |
325 | STD_EXCEPTION_HV_OOL(vec, name##_common) | 355 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \ |
356 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1 | ||
326 | 357 | ||
327 | #define EXC_REAL_OOL_HV(name, start, size) \ | 358 | #define EXC_REAL_OOL_HV(name, start, size) \ |
328 | __EXC_REAL_OOL_HV(name, start, size); \ | 359 | __EXC_REAL_OOL_HV(name, start, size); \ |
@@ -333,7 +364,8 @@ name: | |||
333 | 364 | ||
334 | #define __TRAMP_REAL_OOL_MASKABLE_HV(name, vec, bitmask) \ | 365 | #define __TRAMP_REAL_OOL_MASKABLE_HV(name, vec, bitmask) \ |
335 | TRAMP_REAL_BEGIN(tramp_real_##name); \ | 366 | TRAMP_REAL_BEGIN(tramp_real_##name); \ |
336 | MASKABLE_EXCEPTION_HV_OOL(vec, name##_common, bitmask) | 367 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \ |
368 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1 | ||
337 | 369 | ||
338 | #define EXC_REAL_OOL_MASKABLE_HV(name, start, size, bitmask) \ | 370 | #define EXC_REAL_OOL_MASKABLE_HV(name, start, size, bitmask) \ |
339 | __EXC_REAL_OOL_MASKABLE_HV(name, start, size); \ | 371 | __EXC_REAL_OOL_MASKABLE_HV(name, start, size); \ |
@@ -341,12 +373,15 @@ name: | |||
341 | 373 | ||
342 | #define __EXC_VIRT_OOL(name, start, size) \ | 374 | #define __EXC_VIRT_OOL(name, start, size) \ |
343 | EXC_VIRT_BEGIN(name, start, size); \ | 375 | EXC_VIRT_BEGIN(name, start, size); \ |
344 | __OOL_EXCEPTION(start, label, tramp_virt_##name); \ | 376 | SET_SCRATCH0(r13); \ |
377 | EXCEPTION_PROLOG_0 PACA_EXGEN ; \ | ||
378 | b tramp_virt_##name; \ | ||
345 | EXC_VIRT_END(name, start, size) | 379 | EXC_VIRT_END(name, start, size) |
346 | 380 | ||
347 | #define __TRAMP_VIRT_OOL(name, realvec) \ | 381 | #define __TRAMP_VIRT_OOL(name, realvec) \ |
348 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ | 382 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ |
349 | STD_RELON_EXCEPTION_OOL(realvec, name##_common) | 383 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, 0 ; \ |
384 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD | ||
350 | 385 | ||
351 | #define EXC_VIRT_OOL(name, start, size, realvec) \ | 386 | #define EXC_VIRT_OOL(name, start, size, realvec) \ |
352 | __EXC_VIRT_OOL(name, start, size); \ | 387 | __EXC_VIRT_OOL(name, start, size); \ |
@@ -357,7 +392,8 @@ name: | |||
357 | 392 | ||
358 | #define __TRAMP_VIRT_OOL_MASKABLE(name, realvec, bitmask) \ | 393 | #define __TRAMP_VIRT_OOL_MASKABLE(name, realvec, bitmask) \ |
359 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ | 394 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ |
360 | MASKABLE_RELON_EXCEPTION_OOL(realvec, name##_common, bitmask) | 395 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, realvec, bitmask ; \ |
396 | EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 | ||
361 | 397 | ||
362 | #define EXC_VIRT_OOL_MASKABLE(name, start, size, realvec, bitmask) \ | 398 | #define EXC_VIRT_OOL_MASKABLE(name, start, size, realvec, bitmask) \ |
363 | __EXC_VIRT_OOL_MASKABLE(name, start, size); \ | 399 | __EXC_VIRT_OOL_MASKABLE(name, start, size); \ |
@@ -368,7 +404,8 @@ name: | |||
368 | 404 | ||
369 | #define __TRAMP_VIRT_OOL_HV(name, realvec) \ | 405 | #define __TRAMP_VIRT_OOL_HV(name, realvec) \ |
370 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ | 406 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ |
371 | STD_RELON_EXCEPTION_HV_OOL(realvec, name##_common) | 407 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, 0 ; \ |
408 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV | ||
372 | 409 | ||
373 | #define EXC_VIRT_OOL_HV(name, start, size, realvec) \ | 410 | #define EXC_VIRT_OOL_HV(name, start, size, realvec) \ |
374 | __EXC_VIRT_OOL_HV(name, start, size); \ | 411 | __EXC_VIRT_OOL_HV(name, start, size); \ |
@@ -379,7 +416,8 @@ name: | |||
379 | 416 | ||
380 | #define __TRAMP_VIRT_OOL_MASKABLE_HV(name, realvec, bitmask) \ | 417 | #define __TRAMP_VIRT_OOL_MASKABLE_HV(name, realvec, bitmask) \ |
381 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ | 418 | TRAMP_VIRT_BEGIN(tramp_virt_##name); \ |
382 | MASKABLE_RELON_EXCEPTION_HV_OOL(realvec, name##_common, bitmask) | 419 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, bitmask ; \ |
420 | EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV | ||
383 | 421 | ||
384 | #define EXC_VIRT_OOL_MASKABLE_HV(name, start, size, realvec, bitmask) \ | 422 | #define EXC_VIRT_OOL_MASKABLE_HV(name, start, size, realvec, bitmask) \ |
385 | __EXC_VIRT_OOL_MASKABLE_HV(name, start, size); \ | 423 | __EXC_VIRT_OOL_MASKABLE_HV(name, start, size); \ |
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 2685c81e28f2..2774046e6cf4 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
@@ -254,9 +254,11 @@ EXC_COMMON_BEGIN(system_reset_common) | |||
254 | */ | 254 | */ |
255 | TRAMP_REAL_BEGIN(system_reset_fwnmi) | 255 | TRAMP_REAL_BEGIN(system_reset_fwnmi) |
256 | SET_SCRATCH0(r13) /* save r13 */ | 256 | SET_SCRATCH0(r13) /* save r13 */ |
257 | /* See comment at system_reset exception */ | 257 | /* See comment at system_reset exception, don't turn on RI */ |
258 | EXCEPTION_PROLOG_NORI(PACA_EXNMI, system_reset_common, EXC_STD, | 258 | EXCEPTION_PROLOG_0 PACA_EXNMI |
259 | 0, 0x100) | 259 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXNMI, 0, 0x100, 0 |
260 | EXCEPTION_PROLOG_2_REAL system_reset_common, EXC_STD, 0 | ||
261 | |||
260 | #endif /* CONFIG_PPC_PSERIES */ | 262 | #endif /* CONFIG_PPC_PSERIES */ |
261 | 263 | ||
262 | 264 | ||
@@ -714,14 +716,8 @@ MMU_FTR_SECTION_ELSE | |||
714 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) | 716 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) |
715 | 717 | ||
716 | 718 | ||
717 | EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x80) | 719 | __EXC_REAL(instruction_access_slb, 0x480, 0x80, PACA_EXSLB) |
718 | EXCEPTION_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 1, 0x480); | 720 | __EXC_VIRT(instruction_access_slb, 0x4480, 0x80, 0x480, PACA_EXSLB) |
719 | EXC_REAL_END(instruction_access_slb, 0x480, 0x80) | ||
720 | |||
721 | EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80) | ||
722 | EXCEPTION_RELON_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 0, 0x480); | ||
723 | EXC_VIRT_END(instruction_access_slb, 0x4480, 0x80) | ||
724 | |||
725 | TRAMP_KVM(PACA_EXSLB, 0x480) | 721 | TRAMP_KVM(PACA_EXSLB, 0x480) |
726 | 722 | ||
727 | EXC_COMMON_BEGIN(instruction_access_slb_common) | 723 | EXC_COMMON_BEGIN(instruction_access_slb_common) |
@@ -750,24 +746,34 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) | |||
750 | 746 | ||
751 | 747 | ||
752 | EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x100) | 748 | EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x100) |
753 | .globl hardware_interrupt_hv; | 749 | .globl hardware_interrupt_hv |
754 | hardware_interrupt_hv: | 750 | hardware_interrupt_hv: |
755 | BEGIN_FTR_SECTION | 751 | BEGIN_FTR_SECTION |
756 | MASKABLE_EXCEPTION_HV(0x500, hardware_interrupt_common, IRQS_DISABLED) | 752 | SET_SCRATCH0(r13) /* save r13 */ |
753 | EXCEPTION_PROLOG_0 PACA_EXGEN | ||
754 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED | ||
755 | EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_HV, 1 | ||
757 | FTR_SECTION_ELSE | 756 | FTR_SECTION_ELSE |
758 | MASKABLE_EXCEPTION(0x500, hardware_interrupt_common, IRQS_DISABLED) | 757 | SET_SCRATCH0(r13) /* save r13 */ |
758 | EXCEPTION_PROLOG_0 PACA_EXGEN | ||
759 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED | ||
760 | EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_STD, 1 | ||
759 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) | 761 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
760 | EXC_REAL_END(hardware_interrupt, 0x500, 0x100) | 762 | EXC_REAL_END(hardware_interrupt, 0x500, 0x100) |
761 | 763 | ||
762 | EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x100) | 764 | EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x100) |
763 | .globl hardware_interrupt_relon_hv; | 765 | .globl hardware_interrupt_relon_hv |
764 | hardware_interrupt_relon_hv: | 766 | hardware_interrupt_relon_hv: |
765 | BEGIN_FTR_SECTION | 767 | BEGIN_FTR_SECTION |
766 | MASKABLE_RELON_EXCEPTION_HV(0x500, hardware_interrupt_common, | 768 | SET_SCRATCH0(r13) /* save r13 */ |
767 | IRQS_DISABLED) | 769 | EXCEPTION_PROLOG_0 PACA_EXGEN |
770 | EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED | ||
771 | EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_HV | ||
768 | FTR_SECTION_ELSE | 772 | FTR_SECTION_ELSE |
769 | __MASKABLE_RELON_EXCEPTION(0x500, hardware_interrupt_common, | 773 | SET_SCRATCH0(r13) /* save r13 */ |
770 | EXC_STD, 1, IRQS_DISABLED) | 774 | EXCEPTION_PROLOG_0 PACA_EXGEN |
775 | EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED | ||
776 | EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_STD | ||
771 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) | 777 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
772 | EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100) | 778 | EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100) |
773 | 779 | ||