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authorTomas Winkler <tomas.winkler@intel.com>2017-06-14 03:03:15 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-07-17 09:07:39 -0400
commitf5ac3c49ff0b36d9b6a804b4b86efcaf27ba044b (patch)
tree3cf91296eb1cb4e0deda12f75eea6b60894e1e51
parent67de6bf1e4f869a490656448f471fdc4a0a405ad (diff)
mei: me: use an index instead of a pointer for private data
Device 'new_id' interface is useful for testing of not yet published hardware on older kernels and for internally used device ids on simulation platforms. However currently with the device configuration held in device_id driver data as a pointer to mei_cfg structure it is hard, as one need to locate the address of the correct structure. A recommended way of doing that is to use and index instead of a pointer. This patch adds a new list of configuration mei_cfg_list[] indexed via enum mei_cfg_idx. In addition it cleanups ich platform naming, renames legacy generation to ich and what was ich to ich10. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/misc/mei/hw-me.c45
-rw-r--r--drivers/misc/mei/hw-me.h39
-rw-r--r--drivers/misc/mei/pci-me.c108
3 files changed, 121 insertions, 71 deletions
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 71216affcab1..10dcf4ff99a5 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -1354,10 +1354,10 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev)
1354 .quirk_probe = mei_me_fw_type_sps 1354 .quirk_probe = mei_me_fw_type_sps
1355 1355
1356 1356
1357#define MEI_CFG_LEGACY_HFS \ 1357#define MEI_CFG_ICH_HFS \
1358 .fw_status.count = 0 1358 .fw_status.count = 0
1359 1359
1360#define MEI_CFG_ICH_HFS \ 1360#define MEI_CFG_ICH10_HFS \
1361 .fw_status.count = 1, \ 1361 .fw_status.count = 1, \
1362 .fw_status.status[0] = PCI_CFG_HFS_1 1362 .fw_status.status[0] = PCI_CFG_HFS_1
1363 1363
@@ -1376,38 +1376,61 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev)
1376 .fw_status.status[5] = PCI_CFG_HFS_6 1376 .fw_status.status[5] = PCI_CFG_HFS_6
1377 1377
1378/* ICH Legacy devices */ 1378/* ICH Legacy devices */
1379const struct mei_cfg mei_me_legacy_cfg = { 1379static const struct mei_cfg mei_me_ich_cfg = {
1380 MEI_CFG_LEGACY_HFS, 1380 MEI_CFG_ICH_HFS,
1381}; 1381};
1382 1382
1383/* ICH devices */ 1383/* ICH devices */
1384const struct mei_cfg mei_me_ich_cfg = { 1384static const struct mei_cfg mei_me_ich10_cfg = {
1385 MEI_CFG_ICH_HFS, 1385 MEI_CFG_ICH10_HFS,
1386}; 1386};
1387 1387
1388/* PCH devices */ 1388/* PCH devices */
1389const struct mei_cfg mei_me_pch_cfg = { 1389static const struct mei_cfg mei_me_pch_cfg = {
1390 MEI_CFG_PCH_HFS, 1390 MEI_CFG_PCH_HFS,
1391}; 1391};
1392 1392
1393
1394/* PCH Cougar Point and Patsburg with quirk for Node Manager exclusion */ 1393/* PCH Cougar Point and Patsburg with quirk for Node Manager exclusion */
1395const struct mei_cfg mei_me_pch_cpt_pbg_cfg = { 1394static const struct mei_cfg mei_me_pch_cpt_pbg_cfg = {
1396 MEI_CFG_PCH_HFS, 1395 MEI_CFG_PCH_HFS,
1397 MEI_CFG_FW_NM, 1396 MEI_CFG_FW_NM,
1398}; 1397};
1399 1398
1400/* PCH8 Lynx Point and newer devices */ 1399/* PCH8 Lynx Point and newer devices */
1401const struct mei_cfg mei_me_pch8_cfg = { 1400static const struct mei_cfg mei_me_pch8_cfg = {
1402 MEI_CFG_PCH8_HFS, 1401 MEI_CFG_PCH8_HFS,
1403}; 1402};
1404 1403
1405/* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ 1404/* PCH8 Lynx Point with quirk for SPS Firmware exclusion */
1406const struct mei_cfg mei_me_pch8_sps_cfg = { 1405static const struct mei_cfg mei_me_pch8_sps_cfg = {
1407 MEI_CFG_PCH8_HFS, 1406 MEI_CFG_PCH8_HFS,
1408 MEI_CFG_FW_SPS, 1407 MEI_CFG_FW_SPS,
1409}; 1408};
1410 1409
1410/*
1411 * mei_cfg_list - A list of platform platform specific configurations.
1412 * Note: has to be synchronized with enum mei_cfg_idx.
1413 */
1414static const struct mei_cfg *const mei_cfg_list[] = {
1415 [MEI_ME_UNDEF_CFG] = NULL,
1416 [MEI_ME_ICH_CFG] = &mei_me_ich_cfg,
1417 [MEI_ME_ICH10_CFG] = &mei_me_ich10_cfg,
1418 [MEI_ME_PCH_CFG] = &mei_me_pch_cfg,
1419 [MEI_ME_PCH_CPT_PBG_CFG] = &mei_me_pch_cpt_pbg_cfg,
1420 [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg,
1421 [MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg,
1422};
1423
1424const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx)
1425{
1426 BUILD_BUG_ON(ARRAY_SIZE(mei_cfg_list) != MEI_ME_NUM_CFG);
1427
1428 if (idx >= MEI_ME_NUM_CFG)
1429 return NULL;
1430
1431 return mei_cfg_list[idx];
1432};
1433
1411/** 1434/**
1412 * mei_me_dev_init - allocates and initializes the mei device structure 1435 * mei_me_dev_init - allocates and initializes the mei device structure
1413 * 1436 *
diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h
index cf64847a35b9..67892533576e 100644
--- a/drivers/misc/mei/hw-me.h
+++ b/drivers/misc/mei/hw-me.h
@@ -41,8 +41,7 @@ struct mei_cfg {
41#define MEI_PCI_DEVICE(dev, cfg) \ 41#define MEI_PCI_DEVICE(dev, cfg) \
42 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \ 42 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
43 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 43 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
44 .driver_data = (kernel_ulong_t)&(cfg) 44 .driver_data = (kernel_ulong_t)(cfg),
45
46 45
47#define MEI_ME_RPM_TIMEOUT 500 /* ms */ 46#define MEI_ME_RPM_TIMEOUT 500 /* ms */
48 47
@@ -63,12 +62,36 @@ struct mei_me_hw {
63 62
64#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw) 63#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw)
65 64
66extern const struct mei_cfg mei_me_legacy_cfg; 65/**
67extern const struct mei_cfg mei_me_ich_cfg; 66 * enum mei_cfg_idx - indices to platform specific configurations.
68extern const struct mei_cfg mei_me_pch_cfg; 67 *
69extern const struct mei_cfg mei_me_pch_cpt_pbg_cfg; 68 * Note: has to be synchronized with mei_cfg_list[]
70extern const struct mei_cfg mei_me_pch8_cfg; 69 *
71extern const struct mei_cfg mei_me_pch8_sps_cfg; 70 * @MEI_ME_UNDEF_CFG: Lower sentinel.
71 * @MEI_ME_ICH_CFG: I/O Controller Hub legacy devices.
72 * @MEI_ME_ICH10_CFG: I/O Controller Hub platforms Gen10
73 * @MEI_ME_PCH_CFG: Platform Controller Hub platforms (Up to Gen8).
74 * @MEI_ME_PCH_CPT_PBG_CFG:Platform Controller Hub workstations
75 * with quirk for Node Manager exclusion.
76 * @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer
77 * client platforms.
78 * @MEI_ME_PCH8_SPS_CFG: Platform Controller Hub Gen8 and newer
79 * servers platforms with quirk for
80 * SPS firmware exclusion.
81 * @MEI_ME_NUM_CFG: Upper Sentinel.
82 */
83enum mei_cfg_idx {
84 MEI_ME_UNDEF_CFG,
85 MEI_ME_ICH_CFG,
86 MEI_ME_ICH10_CFG,
87 MEI_ME_PCH_CFG,
88 MEI_ME_PCH_CPT_PBG_CFG,
89 MEI_ME_PCH8_CFG,
90 MEI_ME_PCH8_SPS_CFG,
91 MEI_ME_NUM_CFG,
92};
93
94const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx);
72 95
73struct mei_device *mei_me_dev_init(struct pci_dev *pdev, 96struct mei_device *mei_me_dev_init(struct pci_dev *pdev,
74 const struct mei_cfg *cfg); 97 const struct mei_cfg *cfg);
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index 8bf9a3d9792d..3f4e36b8892f 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -43,57 +43,58 @@
43 43
44/* mei_pci_tbl - PCI Device ID Table */ 44/* mei_pci_tbl - PCI Device ID Table */
45static const struct pci_device_id mei_me_pci_tbl[] = { 45static const struct pci_device_id mei_me_pci_tbl[] = {
46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)}, 46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)},
47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)}, 47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)},
48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)}, 48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)},
49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)}, 49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)},
50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)}, 50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)},
51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)}, 51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)},
52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)}, 52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)},
53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)}, 53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)},
54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)}, 54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)},
55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)}, 55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)},
56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)}, 56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)},
57 57
58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)}, 58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)},
59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)}, 59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)},
60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)}, 60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)},
61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)}, 61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)},
62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)}, 62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)},
63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)}, 63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)},
64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)}, 64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)},
65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)}, 65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)},
66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)}, 66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)},
67 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)}, 67
68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)}, 68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)},
69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)}, 69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)},
70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)}, 70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)},
71 71 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)},
72 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)}, 72
73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)}, 73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH_CFG)},
74 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)}, 74 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH_CFG)},
75 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)}, 75 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)},
76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)}, 76 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)},
77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)}, 77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH_CFG)},
78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)}, 78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH_CFG)},
79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)}, 79 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH_CFG)},
80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)}, 80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)},
81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)}, 81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)},
82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)}, 82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)},
83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)}, 83 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_CFG)},
84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)}, 84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)},
85 85 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)},
86 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)}, 86
87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)}, 87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)},
88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)}, 88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)},
89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)}, 89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)},
90 {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)}, 90 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)},
91 91 {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH8_CFG)},
92 {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)}, 92
93 {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)}, 93 {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)},
94 94 {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)},
95 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)}, 95
96 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)}, 96 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)},
97 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)},
97 98
98 /* required last entry */ 99 /* required last entry */
99 {0, } 100 {0, }
@@ -138,12 +139,15 @@ static bool mei_me_quirk_probe(struct pci_dev *pdev,
138 */ 139 */
139static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 140static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
140{ 141{
141 const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data); 142 const struct mei_cfg *cfg;
142 struct mei_device *dev; 143 struct mei_device *dev;
143 struct mei_me_hw *hw; 144 struct mei_me_hw *hw;
144 unsigned int irqflags; 145 unsigned int irqflags;
145 int err; 146 int err;
146 147
148 cfg = mei_me_get_cfg(ent->driver_data);
149 if (!cfg)
150 return -ENODEV;
147 151
148 if (!mei_me_quirk_probe(pdev, cfg)) 152 if (!mei_me_quirk_probe(pdev, cfg))
149 return -ENODEV; 153 return -ENODEV;