Merge branch 'pci/host-hisi' into next

* pci/host-hisi:
  PCI: generic: Call pci_fixup_irqs() only on ARM
  PCI: Disable MSI for HiSilicon Hip06/Hip07 Root Ports
  PCI: hisi: Rename config space accessors to remove "acpi"
  PCI: hisi: Add DT almost-ECAM support for Hip06/Hip07 host controllers
  PCI: hisi: Use of_device_get_match_data() to simplify probe

Conflicts:
	drivers/pci/dwc/pcie-hisi.c

5 files changed, 112 insertions, 12 deletions

diff --git a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
index 59c2f47aa303..b7fa3b97986d 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
@@ -42,3 +42,40 @@ Hip05 Example (note that Hip06 is the same except compatible):
                                  0x0 0 0 4 &mbigen_pcie 4 13>;
                 status = "ok";
         };
+
+HiSilicon Hip06/Hip07 PCIe host bridge DT (almost-ECAM) description.
+The properties and their meanings are identical to those described in
+host-generic-pci.txt except as listed below.
+
+Properties of the host controller node that differ from
+host-generic-pci.txt:
+
+- compatible     : Must be "hisilicon,pcie-almost-ecam"
+
+- reg            : Two entries: First the ECAM configuration space for any
+                   other bus underneath the root bus. Second, the base
+                   and size of the HiSilicon host bridge registers include
+                   the RC's own config space.
+
+Example:
+        pcie0: pcie@a0090000 {
+                compatible = "hisilicon,pcie-almost-ecam";
+                reg = <0 0xb0000000 0 0x2000000>,  /*  ECAM configuration space */
+                      <0 0xa0090000 0 0x10000>; /* host bridge registers */
+                bus-range = <0  31>;
+                msi-map = <0x0000 &its_dsa 0x0000 0x2000>;
+                msi-map-mask = <0xffff>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+                device_type = "pci";
+                dma-coherent;
+                ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0 0x5ff0000
+                          0x01000000 0 0 0 0xb7ff0000 0 0x10000>;
+                #interrupt-cells = <1>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
+                                 0x0 0 0 2 &mbigen_pcie0 650 4
+                                 0x0 0 0 3 &mbigen_pcie0 650 4
+                                 0x0 0 0 4 &mbigen_pcie0 650 4>;
+                status = "ok";
+        };
diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c
index 386467a4f00f..e3e4fedd9f68 100644
--- a/drivers/pci/dwc/pcie-hisi.c
+++ b/drivers/pci/dwc/pcie-hisi.c
@@ -24,10 +24,10 @@
 #include <linux/regmap.h>
 #include "../pci.h"
 
-#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
+#if defined(CONFIG_PCI_HISI) || (defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS))
 
-static int hisi_pcie_acpi_rd_conf(struct pci_bus *bus, u32 devfn, int where,
-                                  int size, u32 *val)
+static int hisi_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
+                             int size, u32 *val)
 {
         struct pci_config_window *cfg = bus->sysdata;
         int dev = PCI_SLOT(devfn);
@@ -44,8 +44,8 @@ static int hisi_pcie_acpi_rd_conf(struct pci_bus *bus, u32 devfn, int where,
         return pci_generic_config_read(bus, devfn, where, size, val);
 }
 
-static int hisi_pcie_acpi_wr_conf(struct pci_bus *bus, u32 devfn,
-                                  int where, int size, u32 val)
+static int hisi_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
+                             int where, int size, u32 val)
 {
         struct pci_config_window *cfg = bus->sysdata;
         int dev = PCI_SLOT(devfn);
@@ -74,6 +74,8 @@ static void __iomem *hisi_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
                 return pci_ecam_map_bus(bus, devfn, where);
 }
 
+#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
+
 static int hisi_pcie_init(struct pci_config_window *cfg)
 {
         struct device *dev = cfg->parent;
@@ -110,8 +112,8 @@ struct pci_ecam_ops hisi_pcie_ops = {
         .init         =  hisi_pcie_init,
         .pci_ops      = {
                 .map_bus    = hisi_pcie_map_bus,
-                .read       = hisi_pcie_acpi_rd_conf,
-                .write      = hisi_pcie_acpi_wr_conf,
+                .read       = hisi_pcie_rd_conf,
+                .write      = hisi_pcie_wr_conf,
         }
 };
 
@@ -139,7 +141,7 @@ struct hisi_pcie {
         struct dw_pcie *pci;
         struct regmap *subctrl;
         u32 port_id;
-        struct pcie_soc_ops *soc_ops;
+        const struct pcie_soc_ops *soc_ops;
 };
 
 /* HipXX PCIe host only supports 32-bit config access */
@@ -265,7 +267,6 @@ static int hisi_pcie_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         struct dw_pcie *pci;
         struct hisi_pcie *hisi_pcie;
-        const struct of_device_id *match;
         struct resource *reg;
         struct device_driver *driver;
         int ret;
@@ -283,11 +284,10 @@ static int hisi_pcie_probe(struct platform_device *pdev)
 
         driver = dev->driver;
 
-        match = of_match_device(driver->of_match_table, dev);
-        hisi_pcie->soc_ops = (struct pcie_soc_ops *) match->data;
+        hisi_pcie->soc_ops = of_device_get_match_data(dev);
 
         hisi_pcie->subctrl =
-        syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
+            syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
         if (IS_ERR(hisi_pcie->subctrl)) {
                 dev_err(dev, "cannot get subctrl base\n");
                 return PTR_ERR(hisi_pcie->subctrl);
@@ -336,4 +336,62 @@ static struct platform_driver hisi_pcie_driver = {
 };
 builtin_platform_driver(hisi_pcie_driver);
 
+static int hisi_pcie_almost_ecam_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct pci_ecam_ops *ops;
+
+        ops = (struct pci_ecam_ops *)of_device_get_match_data(dev);
+        return pci_host_common_probe(pdev, ops);
+}
+
+static int hisi_pcie_platform_init(struct pci_config_window *cfg)
+{
+        struct device *dev = cfg->parent;
+        struct platform_device *pdev = to_platform_device(dev);
+        struct resource *res;
+        void __iomem *reg_base;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (!res) {
+                dev_err(dev, "missing \"reg[1]\"property\n");
+                return -EINVAL;
+        }
+
+        reg_base = devm_ioremap(dev, res->start, resource_size(res));
+        if (!reg_base)
+                return -ENOMEM;
+
+        cfg->priv = reg_base;
+        return 0;
+}
+
+struct pci_ecam_ops hisi_pcie_platform_ops = {
+        .bus_shift    = 20,
+        .init         =  hisi_pcie_platform_init,
+        .pci_ops      = {
+                .map_bus    = hisi_pcie_map_bus,
+                .read       = hisi_pcie_rd_conf,
+                .write      = hisi_pcie_wr_conf,
+        }
+};
+
+static const struct of_device_id hisi_pcie_almost_ecam_of_match[] = {
+        {
+                .compatible = "hisilicon,pcie-almost-ecam",
+                .data       = (void *) &hisi_pcie_platform_ops,
+        },
+        {},
+};
+
+static struct platform_driver hisi_pcie_almost_ecam_driver = {
+        .probe  = hisi_pcie_almost_ecam_probe,
+        .driver = {
+                   .name = "hisi-pcie-almost-ecam",
+                   .of_match_table = hisi_pcie_almost_ecam_of_match,
+        },
+};
+builtin_platform_driver(hisi_pcie_almost_ecam_driver);
+
+#endif
 #endif
diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c
index e3c48b5deb93..e9a53bae1c25 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -145,7 +145,9 @@ int pci_host_common_probe(struct platform_device *pdev,
                 return -ENODEV;
         }
 
+#ifdef CONFIG_ARM
         pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
+#endif
 
         /*
          * We insert PCI resources into the iomem_resource and
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index a0b3cd5726dc..3deff4a98932 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1634,6 +1634,7 @@ static void quirk_pcie_mch(struct pci_dev *pdev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7520_MCH,  quirk_pcie_mch);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7320_MCH,  quirk_pcie_mch);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7525_MCH,  quirk_pcie_mch);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI,   0x1610, quirk_pcie_mch);
 
 
 /*
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 73dda0edcb97..a4f77feecbb0 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2516,6 +2516,8 @@
 #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700
 #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
 
+#define PCI_VENDOR_ID_HUAWEI            0x19e5
+
 #define PCI_VENDOR_ID_NETRONOME         0x19ee
 #define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
 #define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240