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authorPaul Burton <paul.burton@mips.com>2019-09-18 18:03:27 -0400
committerPaul Burton <paul.burton@mips.com>2019-09-20 17:55:07 -0400
commitd1af2ab36d80fcdc15dcaaead68f15352778aec7 (patch)
treef5666df782f272e045396afdd5eb9718d6275483
parentc4d48cf5e2f08476c2c59cc68133177c191cf4d5 (diff)
MIPS: Disable pte_special() for MIPS32 with RiXi
Commit 61cbfff4b1a7 ("MIPS: pte_special()/pte_mkspecial() support") added a _PAGE_SPECIAL bit to the pgprot bits of our PTEs. Unfortunately for MIPS32 configurations with RiXi support this pushed the number of pgprot bits to 13. Since the PFN field in EntryLo begins at bit 12 this results in us shifting the most significant bit of the physical address beyond the end of the PTE, leading any mapped access to a physical address above 2GB to incorrectly access an address 2GB lower than intended. For now, disable the pte_special() support for MIPS32 configurations that support RiXi. Fixes: 61cbfff4b1a7 ("MIPS: pte_special()/pte_mkspecial() support") Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Dmitry Korotin <dkorotin@wavecomp.com> Cc: linux-mips@vger.kernel.org
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/include/asm/pgtable-bits.h14
2 files changed, 14 insertions, 2 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3f18aa018a0c..2f7c050e8cde 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -84,7 +84,7 @@ config MIPS
84 select RTC_LIB 84 select RTC_LIB
85 select SYSCTL_EXCEPTION_TRACE 85 select SYSCTL_EXCEPTION_TRACE
86 select VIRT_TO_BUS 86 select VIRT_TO_BUS
87 select ARCH_HAS_PTE_SPECIAL 87 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
88 88
89menu "Machine selection" 89menu "Machine selection"
90 90
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 409ae01ed7be..4da79b85c179 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -52,7 +52,9 @@ enum pgtable_bits {
52 _PAGE_WRITE_SHIFT, 52 _PAGE_WRITE_SHIFT,
53 _PAGE_ACCESSED_SHIFT, 53 _PAGE_ACCESSED_SHIFT,
54 _PAGE_MODIFIED_SHIFT, 54 _PAGE_MODIFIED_SHIFT,
55#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
55 _PAGE_SPECIAL_SHIFT, 56 _PAGE_SPECIAL_SHIFT,
57#endif
56}; 58};
57 59
58/* 60/*
@@ -79,7 +81,9 @@ enum pgtable_bits {
79 _PAGE_WRITE_SHIFT, 81 _PAGE_WRITE_SHIFT,
80 _PAGE_ACCESSED_SHIFT, 82 _PAGE_ACCESSED_SHIFT,
81 _PAGE_MODIFIED_SHIFT, 83 _PAGE_MODIFIED_SHIFT,
84#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
82 _PAGE_SPECIAL_SHIFT, 85 _PAGE_SPECIAL_SHIFT,
86#endif
83}; 87};
84 88
85#elif defined(CONFIG_CPU_R3K_TLB) 89#elif defined(CONFIG_CPU_R3K_TLB)
@@ -92,7 +96,9 @@ enum pgtable_bits {
92 _PAGE_WRITE_SHIFT, 96 _PAGE_WRITE_SHIFT,
93 _PAGE_ACCESSED_SHIFT, 97 _PAGE_ACCESSED_SHIFT,
94 _PAGE_MODIFIED_SHIFT, 98 _PAGE_MODIFIED_SHIFT,
99#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
95 _PAGE_SPECIAL_SHIFT, 100 _PAGE_SPECIAL_SHIFT,
101#endif
96 102
97 /* Used by TLB hardware (placed in EntryLo) */ 103 /* Used by TLB hardware (placed in EntryLo) */
98 _PAGE_GLOBAL_SHIFT = 8, 104 _PAGE_GLOBAL_SHIFT = 8,
@@ -116,7 +122,9 @@ enum pgtable_bits {
116#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) 122#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
117 _PAGE_HUGE_SHIFT, 123 _PAGE_HUGE_SHIFT,
118#endif 124#endif
125#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
119 _PAGE_SPECIAL_SHIFT, 126 _PAGE_SPECIAL_SHIFT,
127#endif
120 128
121 /* Used by TLB hardware (placed in EntryLo*) */ 129 /* Used by TLB hardware (placed in EntryLo*) */
122#if defined(CONFIG_CPU_HAS_RIXI) 130#if defined(CONFIG_CPU_HAS_RIXI)
@@ -139,7 +147,11 @@ enum pgtable_bits {
139#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) 147#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
140# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) 148# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
141#endif 149#endif
142#define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT) 150#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
151# define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT)
152#else
153# define _PAGE_SPECIAL 0
154#endif
143 155
144/* Used by TLB hardware (placed in EntryLo*) */ 156/* Used by TLB hardware (placed in EntryLo*) */
145#if defined(CONFIG_XPA) 157#if defined(CONFIG_XPA)