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authorLinus Torvalds <torvalds@linux-foundation.org>2019-07-18 12:32:28 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2019-07-18 12:32:28 -0400
commitd0411ec8ca6b98061023873e334323ef102100cc (patch)
treeef7aa05ba464fc5d59c8753e5fb8599bf628937b
parent4b09ddbcd107e280077bd3e918c8089dfa426980 (diff)
parent918e162e6a71e924a343b41f71789ad14e1e3229 (diff)
Merge tag 'pm-5.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management updates from Rafael Wysocki: "These modify the Intel RAPL driver to allow it to use an MMIO interface to the hardware, make the int340X thermal driver provide such an interface for it, add Intel Ice Lake CPU IDs to the RAPL driver (these changes depend on the previously merged x86 arch changes), update cpufreq to use the PM QoS framework for managing the min and max frequency limits, and add update the imx-cpufreq-dt cpufreq driver to support i.MX8MN. Specifics: - Add MMIO interface support to the Intel RAPL power capping driver and update the int340X thermal driver to provide a RAPL MMIO interface (Zhang Rui, Stephen Rothwell). - Add Intel Ice Lake CPU IDs to the RAPL driver (Zhang Rui, Rajneesh Bhardwaj). - Make cpufreq use the PM QoS framework (instead of notifiers) for managing the min and max frequency constraints (Viresh Kumar). - Add i.MX8MN support to the imx-cpufreq-dt cpufreq driver (Anson Huang)" * tag 'pm-5.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (27 commits) cpufreq: Make cpufreq_generic_init() return void intel_rapl: need linux/cpuhotplug.h for enum cpuhp_state powercap/rapl: Add Ice Lake NNPI support to RAPL driver powercap/intel_rapl: add support for ICX-D powercap/intel_rapl: add support for ICX powercap/intel_rapl: add support for IceLake desktop intel_rapl: Fix module autoloading issue int340X/processor_thermal_device: add support for MMIO RAPL intel_rapl: support two power limits for every RAPL domain intel_rapl: support 64 bit register intel_rapl: abstract RAPL common code intel_rapl: cleanup hardcoded MSR access intel_rapl: cleanup some functions intel_rapl: abstract register access operations intel_rapl: abstract register address intel_rapl: introduce struct rapl_if_private intel_rapl: introduce intel_rapl.h intel_rapl: remove hardcoded register index intel_rapl: use reg instead of msr cpufreq: imx-cpufreq-dt: Add i.MX8MN support ...
-rw-r--r--Documentation/power/pm_qos_interface.rst12
-rw-r--r--MAINTAINERS1
-rw-r--r--drivers/base/power/domain.c8
-rw-r--r--drivers/base/power/domain_governor.c4
-rw-r--r--drivers/base/power/qos.c135
-rw-r--r--drivers/base/power/runtime.c2
-rw-r--r--drivers/cpufreq/bmips-cpufreq.c17
-rw-r--r--drivers/cpufreq/cpufreq.c216
-rw-r--r--drivers/cpufreq/davinci-cpufreq.c3
-rw-r--r--drivers/cpufreq/imx-cpufreq-dt.c3
-rw-r--r--drivers/cpufreq/imx6q-cpufreq.c6
-rw-r--r--drivers/cpufreq/intel_pstate.c7
-rw-r--r--drivers/cpufreq/kirkwood-cpufreq.c3
-rw-r--r--drivers/cpufreq/loongson1-cpufreq.c8
-rw-r--r--drivers/cpufreq/loongson2_cpufreq.c3
-rw-r--r--drivers/cpufreq/maple-cpufreq.c3
-rw-r--r--drivers/cpufreq/omap-cpufreq.c15
-rw-r--r--drivers/cpufreq/pasemi-cpufreq.c3
-rw-r--r--drivers/cpufreq/pmac32-cpufreq.c3
-rw-r--r--drivers/cpufreq/pmac64-cpufreq.c3
-rw-r--r--drivers/cpufreq/s3c2416-cpufreq.c9
-rw-r--r--drivers/cpufreq/s3c64xx-cpufreq.c15
-rw-r--r--drivers/cpufreq/s5pv210-cpufreq.c3
-rw-r--r--drivers/cpufreq/sa1100-cpufreq.c3
-rw-r--r--drivers/cpufreq/sa1110-cpufreq.c3
-rw-r--r--drivers/cpufreq/spear-cpufreq.c3
-rw-r--r--drivers/cpufreq/tegra20-cpufreq.c8
-rw-r--r--drivers/cpuidle/governor.c2
-rw-r--r--drivers/powercap/Kconfig11
-rw-r--r--drivers/powercap/Makefile3
-rw-r--r--drivers/powercap/intel_rapl_common.c (renamed from drivers/powercap/intel_rapl.c)801
-rw-r--r--drivers/powercap/intel_rapl_msr.c183
-rw-r--r--drivers/thermal/intel/int340x_thermal/Kconfig6
-rw-r--r--drivers/thermal/intel/int340x_thermal/processor_thermal_device.c173
-rw-r--r--include/linux/cpufreq.h14
-rw-r--r--include/linux/intel_rapl.h155
-rw-r--r--include/linux/pm_qos.h48
37 files changed, 1196 insertions, 699 deletions
diff --git a/Documentation/power/pm_qos_interface.rst b/Documentation/power/pm_qos_interface.rst
index 945fc6d760c9..69921f072ce1 100644
--- a/Documentation/power/pm_qos_interface.rst
+++ b/Documentation/power/pm_qos_interface.rst
@@ -129,7 +129,7 @@ int dev_pm_qos_remove_request(handle):
129 and call the notification trees if the target was changed as a result of 129 and call the notification trees if the target was changed as a result of
130 removing the request. 130 removing the request.
131 131
132s32 dev_pm_qos_read_value(device): 132s32 dev_pm_qos_read_value(device, type):
133 Returns the aggregated value for a given device's constraints list. 133 Returns the aggregated value for a given device's constraints list.
134 134
135enum pm_qos_flags_status dev_pm_qos_flags(device, mask) 135enum pm_qos_flags_status dev_pm_qos_flags(device, mask)
@@ -176,12 +176,14 @@ Notification mechanisms:
176 176
177The per-device PM QoS framework has a per-device notification tree. 177The per-device PM QoS framework has a per-device notification tree.
178 178
179int dev_pm_qos_add_notifier(device, notifier): 179int dev_pm_qos_add_notifier(device, notifier, type):
180 Adds a notification callback function for the device. 180 Adds a notification callback function for the device for a particular request
181 type.
182
181 The callback is called when the aggregated value of the device constraints list 183 The callback is called when the aggregated value of the device constraints list
182 is changed (for resume latency device PM QoS only). 184 is changed.
183 185
184int dev_pm_qos_remove_notifier(device, notifier): 186int dev_pm_qos_remove_notifier(device, notifier, type):
185 Removes the notification callback function for the device. 187 Removes the notification callback function for the device.
186 188
187 189
diff --git a/MAINTAINERS b/MAINTAINERS
index 0d0d5c03f770..d51808468713 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12840,6 +12840,7 @@ F: drivers/base/power/
12840F: include/linux/pm.h 12840F: include/linux/pm.h
12841F: include/linux/pm_* 12841F: include/linux/pm_*
12842F: include/linux/powercap.h 12842F: include/linux/powercap.h
12843F: include/linux/intel_rapl.h
12843F: drivers/powercap/ 12844F: drivers/powercap/
12844F: kernel/configs/nopm.config 12845F: kernel/configs/nopm.config
12845 12846
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 33c30c1e6a30..b063bc41b0a9 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -1536,7 +1536,8 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
1536 if (ret) 1536 if (ret)
1537 genpd_free_dev_data(dev, gpd_data); 1537 genpd_free_dev_data(dev, gpd_data);
1538 else 1538 else
1539 dev_pm_qos_add_notifier(dev, &gpd_data->nb); 1539 dev_pm_qos_add_notifier(dev, &gpd_data->nb,
1540 DEV_PM_QOS_RESUME_LATENCY);
1540 1541
1541 return ret; 1542 return ret;
1542} 1543}
@@ -1569,7 +1570,8 @@ static int genpd_remove_device(struct generic_pm_domain *genpd,
1569 1570
1570 pdd = dev->power.subsys_data->domain_data; 1571 pdd = dev->power.subsys_data->domain_data;
1571 gpd_data = to_gpd_data(pdd); 1572 gpd_data = to_gpd_data(pdd);
1572 dev_pm_qos_remove_notifier(dev, &gpd_data->nb); 1573 dev_pm_qos_remove_notifier(dev, &gpd_data->nb,
1574 DEV_PM_QOS_RESUME_LATENCY);
1573 1575
1574 genpd_lock(genpd); 1576 genpd_lock(genpd);
1575 1577
@@ -1597,7 +1599,7 @@ static int genpd_remove_device(struct generic_pm_domain *genpd,
1597 1599
1598 out: 1600 out:
1599 genpd_unlock(genpd); 1601 genpd_unlock(genpd);
1600 dev_pm_qos_add_notifier(dev, &gpd_data->nb); 1602 dev_pm_qos_add_notifier(dev, &gpd_data->nb, DEV_PM_QOS_RESUME_LATENCY);
1601 1603
1602 return ret; 1604 return ret;
1603} 1605}
diff --git a/drivers/base/power/domain_governor.c b/drivers/base/power/domain_governor.c
index 3838045c9277..daa8c7689f7e 100644
--- a/drivers/base/power/domain_governor.c
+++ b/drivers/base/power/domain_governor.c
@@ -33,7 +33,7 @@ static int dev_update_qos_constraint(struct device *dev, void *data)
33 * take its current PM QoS constraint (that's the only thing 33 * take its current PM QoS constraint (that's the only thing
34 * known at this point anyway). 34 * known at this point anyway).
35 */ 35 */
36 constraint_ns = dev_pm_qos_read_value(dev); 36 constraint_ns = dev_pm_qos_read_value(dev, DEV_PM_QOS_RESUME_LATENCY);
37 constraint_ns *= NSEC_PER_USEC; 37 constraint_ns *= NSEC_PER_USEC;
38 } 38 }
39 39
@@ -66,7 +66,7 @@ static bool default_suspend_ok(struct device *dev)
66 td->constraint_changed = false; 66 td->constraint_changed = false;
67 td->cached_suspend_ok = false; 67 td->cached_suspend_ok = false;
68 td->effective_constraint_ns = 0; 68 td->effective_constraint_ns = 0;
69 constraint_ns = __dev_pm_qos_read_value(dev); 69 constraint_ns = __dev_pm_qos_resume_latency(dev);
70 70
71 spin_unlock_irqrestore(&dev->power.lock, flags); 71 spin_unlock_irqrestore(&dev->power.lock, flags);
72 72
diff --git a/drivers/base/power/qos.c b/drivers/base/power/qos.c
index 6c91f8df1d59..6c90fd7e2ff8 100644
--- a/drivers/base/power/qos.c
+++ b/drivers/base/power/qos.c
@@ -90,29 +90,49 @@ enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask)
90EXPORT_SYMBOL_GPL(dev_pm_qos_flags); 90EXPORT_SYMBOL_GPL(dev_pm_qos_flags);
91 91
92/** 92/**
93 * __dev_pm_qos_read_value - Get PM QoS constraint for a given device. 93 * __dev_pm_qos_resume_latency - Get resume latency constraint for a given device.
94 * @dev: Device to get the PM QoS constraint value for. 94 * @dev: Device to get the PM QoS constraint value for.
95 * 95 *
96 * This routine must be called with dev->power.lock held. 96 * This routine must be called with dev->power.lock held.
97 */ 97 */
98s32 __dev_pm_qos_read_value(struct device *dev) 98s32 __dev_pm_qos_resume_latency(struct device *dev)
99{ 99{
100 lockdep_assert_held(&dev->power.lock); 100 lockdep_assert_held(&dev->power.lock);
101 101
102 return dev_pm_qos_raw_read_value(dev); 102 return dev_pm_qos_raw_resume_latency(dev);
103} 103}
104 104
105/** 105/**
106 * dev_pm_qos_read_value - Get PM QoS constraint for a given device (locked). 106 * dev_pm_qos_read_value - Get PM QoS constraint for a given device (locked).
107 * @dev: Device to get the PM QoS constraint value for. 107 * @dev: Device to get the PM QoS constraint value for.
108 * @type: QoS request type.
108 */ 109 */
109s32 dev_pm_qos_read_value(struct device *dev) 110s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type)
110{ 111{
112 struct dev_pm_qos *qos = dev->power.qos;
111 unsigned long flags; 113 unsigned long flags;
112 s32 ret; 114 s32 ret;
113 115
114 spin_lock_irqsave(&dev->power.lock, flags); 116 spin_lock_irqsave(&dev->power.lock, flags);
115 ret = __dev_pm_qos_read_value(dev); 117
118 switch (type) {
119 case DEV_PM_QOS_RESUME_LATENCY:
120 ret = IS_ERR_OR_NULL(qos) ? PM_QOS_RESUME_LATENCY_NO_CONSTRAINT
121 : pm_qos_read_value(&qos->resume_latency);
122 break;
123 case DEV_PM_QOS_MIN_FREQUENCY:
124 ret = IS_ERR_OR_NULL(qos) ? PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE
125 : pm_qos_read_value(&qos->min_frequency);
126 break;
127 case DEV_PM_QOS_MAX_FREQUENCY:
128 ret = IS_ERR_OR_NULL(qos) ? PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE
129 : pm_qos_read_value(&qos->max_frequency);
130 break;
131 default:
132 WARN_ON(1);
133 ret = 0;
134 }
135
116 spin_unlock_irqrestore(&dev->power.lock, flags); 136 spin_unlock_irqrestore(&dev->power.lock, flags);
117 137
118 return ret; 138 return ret;
@@ -149,6 +169,14 @@ static int apply_constraint(struct dev_pm_qos_request *req,
149 req->dev->power.set_latency_tolerance(req->dev, value); 169 req->dev->power.set_latency_tolerance(req->dev, value);
150 } 170 }
151 break; 171 break;
172 case DEV_PM_QOS_MIN_FREQUENCY:
173 ret = pm_qos_update_target(&qos->min_frequency,
174 &req->data.pnode, action, value);
175 break;
176 case DEV_PM_QOS_MAX_FREQUENCY:
177 ret = pm_qos_update_target(&qos->max_frequency,
178 &req->data.pnode, action, value);
179 break;
152 case DEV_PM_QOS_FLAGS: 180 case DEV_PM_QOS_FLAGS:
153 ret = pm_qos_update_flags(&qos->flags, &req->data.flr, 181 ret = pm_qos_update_flags(&qos->flags, &req->data.flr,
154 action, value); 182 action, value);
@@ -177,12 +205,11 @@ static int dev_pm_qos_constraints_allocate(struct device *dev)
177 if (!qos) 205 if (!qos)
178 return -ENOMEM; 206 return -ENOMEM;
179 207
180 n = kzalloc(sizeof(*n), GFP_KERNEL); 208 n = kzalloc(3 * sizeof(*n), GFP_KERNEL);
181 if (!n) { 209 if (!n) {
182 kfree(qos); 210 kfree(qos);
183 return -ENOMEM; 211 return -ENOMEM;
184 } 212 }
185 BLOCKING_INIT_NOTIFIER_HEAD(n);
186 213
187 c = &qos->resume_latency; 214 c = &qos->resume_latency;
188 plist_head_init(&c->list); 215 plist_head_init(&c->list);
@@ -191,6 +218,7 @@ static int dev_pm_qos_constraints_allocate(struct device *dev)
191 c->no_constraint_value = PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; 218 c->no_constraint_value = PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
192 c->type = PM_QOS_MIN; 219 c->type = PM_QOS_MIN;
193 c->notifiers = n; 220 c->notifiers = n;
221 BLOCKING_INIT_NOTIFIER_HEAD(n);
194 222
195 c = &qos->latency_tolerance; 223 c = &qos->latency_tolerance;
196 plist_head_init(&c->list); 224 plist_head_init(&c->list);
@@ -199,6 +227,24 @@ static int dev_pm_qos_constraints_allocate(struct device *dev)
199 c->no_constraint_value = PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; 227 c->no_constraint_value = PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT;
200 c->type = PM_QOS_MIN; 228 c->type = PM_QOS_MIN;
201 229
230 c = &qos->min_frequency;
231 plist_head_init(&c->list);
232 c->target_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
233 c->default_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
234 c->no_constraint_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
235 c->type = PM_QOS_MAX;
236 c->notifiers = ++n;
237 BLOCKING_INIT_NOTIFIER_HEAD(n);
238
239 c = &qos->max_frequency;
240 plist_head_init(&c->list);
241 c->target_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
242 c->default_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
243 c->no_constraint_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
244 c->type = PM_QOS_MIN;
245 c->notifiers = ++n;
246 BLOCKING_INIT_NOTIFIER_HEAD(n);
247
202 INIT_LIST_HEAD(&qos->flags.list); 248 INIT_LIST_HEAD(&qos->flags.list);
203 249
204 spin_lock_irq(&dev->power.lock); 250 spin_lock_irq(&dev->power.lock);
@@ -252,11 +298,25 @@ void dev_pm_qos_constraints_destroy(struct device *dev)
252 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE); 298 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);
253 memset(req, 0, sizeof(*req)); 299 memset(req, 0, sizeof(*req));
254 } 300 }
301
255 c = &qos->latency_tolerance; 302 c = &qos->latency_tolerance;
256 plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) { 303 plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) {
257 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE); 304 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);
258 memset(req, 0, sizeof(*req)); 305 memset(req, 0, sizeof(*req));
259 } 306 }
307
308 c = &qos->min_frequency;
309 plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) {
310 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE);
311 memset(req, 0, sizeof(*req));
312 }
313
314 c = &qos->max_frequency;
315 plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) {
316 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE);
317 memset(req, 0, sizeof(*req));
318 }
319
260 f = &qos->flags; 320 f = &qos->flags;
261 list_for_each_entry_safe(req, tmp, &f->list, data.flr.node) { 321 list_for_each_entry_safe(req, tmp, &f->list, data.flr.node) {
262 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE); 322 apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);
@@ -368,6 +428,8 @@ static int __dev_pm_qos_update_request(struct dev_pm_qos_request *req,
368 switch(req->type) { 428 switch(req->type) {
369 case DEV_PM_QOS_RESUME_LATENCY: 429 case DEV_PM_QOS_RESUME_LATENCY:
370 case DEV_PM_QOS_LATENCY_TOLERANCE: 430 case DEV_PM_QOS_LATENCY_TOLERANCE:
431 case DEV_PM_QOS_MIN_FREQUENCY:
432 case DEV_PM_QOS_MAX_FREQUENCY:
371 curr_value = req->data.pnode.prio; 433 curr_value = req->data.pnode.prio;
372 break; 434 break;
373 case DEV_PM_QOS_FLAGS: 435 case DEV_PM_QOS_FLAGS:
@@ -467,6 +529,7 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_remove_request);
467 * 529 *
468 * @dev: target device for the constraint 530 * @dev: target device for the constraint
469 * @notifier: notifier block managed by caller. 531 * @notifier: notifier block managed by caller.
532 * @type: request type.
470 * 533 *
471 * Will register the notifier into a notification chain that gets called 534 * Will register the notifier into a notification chain that gets called
472 * upon changes to the target value for the device. 535 * upon changes to the target value for the device.
@@ -474,7 +537,8 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_remove_request);
474 * If the device's constraints object doesn't exist when this routine is called, 537 * If the device's constraints object doesn't exist when this routine is called,
475 * it will be created (or error code will be returned if that fails). 538 * it will be created (or error code will be returned if that fails).
476 */ 539 */
477int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier) 540int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier,
541 enum dev_pm_qos_req_type type)
478{ 542{
479 int ret = 0; 543 int ret = 0;
480 544
@@ -485,10 +549,28 @@ int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier)
485 else if (!dev->power.qos) 549 else if (!dev->power.qos)
486 ret = dev_pm_qos_constraints_allocate(dev); 550 ret = dev_pm_qos_constraints_allocate(dev);
487 551
488 if (!ret) 552 if (ret)
553 goto unlock;
554
555 switch (type) {
556 case DEV_PM_QOS_RESUME_LATENCY:
489 ret = blocking_notifier_chain_register(dev->power.qos->resume_latency.notifiers, 557 ret = blocking_notifier_chain_register(dev->power.qos->resume_latency.notifiers,
490 notifier); 558 notifier);
559 break;
560 case DEV_PM_QOS_MIN_FREQUENCY:
561 ret = blocking_notifier_chain_register(dev->power.qos->min_frequency.notifiers,
562 notifier);
563 break;
564 case DEV_PM_QOS_MAX_FREQUENCY:
565 ret = blocking_notifier_chain_register(dev->power.qos->max_frequency.notifiers,
566 notifier);
567 break;
568 default:
569 WARN_ON(1);
570 ret = -EINVAL;
571 }
491 572
573unlock:
492 mutex_unlock(&dev_pm_qos_mtx); 574 mutex_unlock(&dev_pm_qos_mtx);
493 return ret; 575 return ret;
494} 576}
@@ -500,24 +582,44 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_add_notifier);
500 * 582 *
501 * @dev: target device for the constraint 583 * @dev: target device for the constraint
502 * @notifier: notifier block to be removed. 584 * @notifier: notifier block to be removed.
585 * @type: request type.
503 * 586 *
504 * Will remove the notifier from the notification chain that gets called 587 * Will remove the notifier from the notification chain that gets called
505 * upon changes to the target value. 588 * upon changes to the target value.
506 */ 589 */
507int dev_pm_qos_remove_notifier(struct device *dev, 590int dev_pm_qos_remove_notifier(struct device *dev,
508 struct notifier_block *notifier) 591 struct notifier_block *notifier,
592 enum dev_pm_qos_req_type type)
509{ 593{
510 int retval = 0; 594 int ret = 0;
511 595
512 mutex_lock(&dev_pm_qos_mtx); 596 mutex_lock(&dev_pm_qos_mtx);
513 597
514 /* Silently return if the constraints object is not present. */ 598 /* Silently return if the constraints object is not present. */
515 if (!IS_ERR_OR_NULL(dev->power.qos)) 599 if (IS_ERR_OR_NULL(dev->power.qos))
516 retval = blocking_notifier_chain_unregister(dev->power.qos->resume_latency.notifiers, 600 goto unlock;
517 notifier); 601
602 switch (type) {
603 case DEV_PM_QOS_RESUME_LATENCY:
604 ret = blocking_notifier_chain_unregister(dev->power.qos->resume_latency.notifiers,
605 notifier);
606 break;
607 case DEV_PM_QOS_MIN_FREQUENCY:
608 ret = blocking_notifier_chain_unregister(dev->power.qos->min_frequency.notifiers,
609 notifier);
610 break;
611 case DEV_PM_QOS_MAX_FREQUENCY:
612 ret = blocking_notifier_chain_unregister(dev->power.qos->max_frequency.notifiers,
613 notifier);
614 break;
615 default:
616 WARN_ON(1);
617 ret = -EINVAL;
618 }
518 619
620unlock:
519 mutex_unlock(&dev_pm_qos_mtx); 621 mutex_unlock(&dev_pm_qos_mtx);
520 return retval; 622 return ret;
521} 623}
522EXPORT_SYMBOL_GPL(dev_pm_qos_remove_notifier); 624EXPORT_SYMBOL_GPL(dev_pm_qos_remove_notifier);
523 625
@@ -577,6 +679,9 @@ static void __dev_pm_qos_drop_user_request(struct device *dev,
577 req = dev->power.qos->flags_req; 679 req = dev->power.qos->flags_req;
578 dev->power.qos->flags_req = NULL; 680 dev->power.qos->flags_req = NULL;
579 break; 681 break;
682 default:
683 WARN_ON(1);
684 return;
580 } 685 }
581 __dev_pm_qos_remove_request(req); 686 __dev_pm_qos_remove_request(req);
582 kfree(req); 687 kfree(req);
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 952a1e7057c7..b75335508d2c 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -275,7 +275,7 @@ static int rpm_check_suspend_allowed(struct device *dev)
275 || (dev->power.request_pending 275 || (dev->power.request_pending
276 && dev->power.request == RPM_REQ_RESUME)) 276 && dev->power.request == RPM_REQ_RESUME))
277 retval = -EAGAIN; 277 retval = -EAGAIN;
278 else if (__dev_pm_qos_read_value(dev) == 0) 278 else if (__dev_pm_qos_resume_latency(dev) == 0)
279 retval = -EPERM; 279 retval = -EPERM;
280 else if (dev->power.runtime_status == RPM_SUSPENDED) 280 else if (dev->power.runtime_status == RPM_SUSPENDED)
281 retval = 1; 281 retval = 1;
diff --git a/drivers/cpufreq/bmips-cpufreq.c b/drivers/cpufreq/bmips-cpufreq.c
index 56a4ebbf00e0..f7c23fa468f0 100644
--- a/drivers/cpufreq/bmips-cpufreq.c
+++ b/drivers/cpufreq/bmips-cpufreq.c
@@ -131,23 +131,18 @@ static int bmips_cpufreq_exit(struct cpufreq_policy *policy)
131static int bmips_cpufreq_init(struct cpufreq_policy *policy) 131static int bmips_cpufreq_init(struct cpufreq_policy *policy)
132{ 132{
133 struct cpufreq_frequency_table *freq_table; 133 struct cpufreq_frequency_table *freq_table;
134 int ret;
135 134
136 freq_table = bmips_cpufreq_get_freq_table(policy); 135 freq_table = bmips_cpufreq_get_freq_table(policy);
137 if (IS_ERR(freq_table)) { 136 if (IS_ERR(freq_table)) {
138 ret = PTR_ERR(freq_table); 137 pr_err("%s: couldn't determine frequency table (%ld).\n",
139 pr_err("%s: couldn't determine frequency table (%d).\n", 138 BMIPS_CPUFREQ_NAME, PTR_ERR(freq_table));
140 BMIPS_CPUFREQ_NAME, ret); 139 return PTR_ERR(freq_table);
141 return ret;
142 } 140 }
143 141
144 ret = cpufreq_generic_init(policy, freq_table, TRANSITION_LATENCY); 142 cpufreq_generic_init(policy, freq_table, TRANSITION_LATENCY);
145 if (ret) 143 pr_info("%s: registered\n", BMIPS_CPUFREQ_NAME);
146 bmips_cpufreq_exit(policy);
147 else
148 pr_info("%s: registered\n", BMIPS_CPUFREQ_NAME);
149 144
150 return ret; 145 return 0;
151} 146}
152 147
153static struct cpufreq_driver bmips_cpufreq_driver = { 148static struct cpufreq_driver bmips_cpufreq_driver = {
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 0a9f675f2af4..8dda62367816 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -23,6 +23,7 @@
23#include <linux/kernel_stat.h> 23#include <linux/kernel_stat.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/mutex.h> 25#include <linux/mutex.h>
26#include <linux/pm_qos.h>
26#include <linux/slab.h> 27#include <linux/slab.h>
27#include <linux/suspend.h> 28#include <linux/suspend.h>
28#include <linux/syscore_ops.h> 29#include <linux/syscore_ops.h>
@@ -158,7 +159,7 @@ EXPORT_SYMBOL_GPL(arch_set_freq_scale);
158 * - set policies transition latency 159 * - set policies transition latency
159 * - policy->cpus with all possible CPUs 160 * - policy->cpus with all possible CPUs
160 */ 161 */
161int cpufreq_generic_init(struct cpufreq_policy *policy, 162void cpufreq_generic_init(struct cpufreq_policy *policy,
162 struct cpufreq_frequency_table *table, 163 struct cpufreq_frequency_table *table,
163 unsigned int transition_latency) 164 unsigned int transition_latency)
164{ 165{
@@ -170,8 +171,6 @@ int cpufreq_generic_init(struct cpufreq_policy *policy,
170 * share the clock and voltage and clock. 171 * share the clock and voltage and clock.
171 */ 172 */
172 cpumask_setall(policy->cpus); 173 cpumask_setall(policy->cpus);
173
174 return 0;
175} 174}
176EXPORT_SYMBOL_GPL(cpufreq_generic_init); 175EXPORT_SYMBOL_GPL(cpufreq_generic_init);
177 176
@@ -714,23 +713,15 @@ static ssize_t show_scaling_cur_freq(struct cpufreq_policy *policy, char *buf)
714static ssize_t store_##file_name \ 713static ssize_t store_##file_name \
715(struct cpufreq_policy *policy, const char *buf, size_t count) \ 714(struct cpufreq_policy *policy, const char *buf, size_t count) \
716{ \ 715{ \
717 int ret, temp; \ 716 unsigned long val; \
718 struct cpufreq_policy new_policy; \ 717 int ret; \
719 \ 718 \
720 memcpy(&new_policy, policy, sizeof(*policy)); \ 719 ret = sscanf(buf, "%lu", &val); \
721 new_policy.min = policy->user_policy.min; \
722 new_policy.max = policy->user_policy.max; \
723 \
724 ret = sscanf(buf, "%u", &new_policy.object); \
725 if (ret != 1) \ 720 if (ret != 1) \
726 return -EINVAL; \ 721 return -EINVAL; \
727 \ 722 \
728 temp = new_policy.object; \ 723 ret = dev_pm_qos_update_request(policy->object##_freq_req, val);\
729 ret = cpufreq_set_policy(policy, &new_policy); \ 724 return ret >= 0 ? count : ret; \
730 if (!ret) \
731 policy->user_policy.object = temp; \
732 \
733 return ret ? ret : count; \
734} 725}
735 726
736store_one(scaling_min_freq, min); 727store_one(scaling_min_freq, min);
@@ -996,7 +987,7 @@ static void add_cpu_dev_symlink(struct cpufreq_policy *policy, unsigned int cpu)
996{ 987{
997 struct device *dev = get_cpu_device(cpu); 988 struct device *dev = get_cpu_device(cpu);
998 989
999 if (!dev) 990 if (unlikely(!dev))
1000 return; 991 return;
1001 992
1002 if (cpumask_test_and_set_cpu(cpu, policy->real_cpus)) 993 if (cpumask_test_and_set_cpu(cpu, policy->real_cpus))
@@ -1112,17 +1103,18 @@ static int cpufreq_add_policy_cpu(struct cpufreq_policy *policy, unsigned int cp
1112 return ret; 1103 return ret;
1113} 1104}
1114 1105
1115static void refresh_frequency_limits(struct cpufreq_policy *policy) 1106void refresh_frequency_limits(struct cpufreq_policy *policy)
1116{ 1107{
1117 struct cpufreq_policy new_policy = *policy; 1108 struct cpufreq_policy new_policy;
1118
1119 pr_debug("updating policy for CPU %u\n", policy->cpu);
1120 1109
1121 new_policy.min = policy->user_policy.min; 1110 if (!policy_is_inactive(policy)) {
1122 new_policy.max = policy->user_policy.max; 1111 new_policy = *policy;
1112 pr_debug("updating policy for CPU %u\n", policy->cpu);
1123 1113
1124 cpufreq_set_policy(policy, &new_policy); 1114 cpufreq_set_policy(policy, &new_policy);
1115 }
1125} 1116}
1117EXPORT_SYMBOL(refresh_frequency_limits);
1126 1118
1127static void handle_update(struct work_struct *work) 1119static void handle_update(struct work_struct *work)
1128{ 1120{
@@ -1130,14 +1122,60 @@ static void handle_update(struct work_struct *work)
1130 container_of(work, struct cpufreq_policy, update); 1122 container_of(work, struct cpufreq_policy, update);
1131 1123
1132 pr_debug("handle_update for cpu %u called\n", policy->cpu); 1124 pr_debug("handle_update for cpu %u called\n", policy->cpu);
1125 down_write(&policy->rwsem);
1133 refresh_frequency_limits(policy); 1126 refresh_frequency_limits(policy);
1127 up_write(&policy->rwsem);
1128}
1129
1130static int cpufreq_notifier_min(struct notifier_block *nb, unsigned long freq,
1131 void *data)
1132{
1133 struct cpufreq_policy *policy = container_of(nb, struct cpufreq_policy, nb_min);
1134
1135 schedule_work(&policy->update);
1136 return 0;
1137}
1138
1139static int cpufreq_notifier_max(struct notifier_block *nb, unsigned long freq,
1140 void *data)
1141{
1142 struct cpufreq_policy *policy = container_of(nb, struct cpufreq_policy, nb_max);
1143
1144 schedule_work(&policy->update);
1145 return 0;
1146}
1147
1148static void cpufreq_policy_put_kobj(struct cpufreq_policy *policy)
1149{
1150 struct kobject *kobj;
1151 struct completion *cmp;
1152
1153 down_write(&policy->rwsem);
1154 cpufreq_stats_free_table(policy);
1155 kobj = &policy->kobj;
1156 cmp = &policy->kobj_unregister;
1157 up_write(&policy->rwsem);
1158 kobject_put(kobj);
1159
1160 /*
1161 * We need to make sure that the underlying kobj is
1162 * actually not referenced anymore by anybody before we
1163 * proceed with unloading.
1164 */
1165 pr_debug("waiting for dropping of refcount\n");
1166 wait_for_completion(cmp);
1167 pr_debug("wait complete\n");
1134} 1168}
1135 1169
1136static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu) 1170static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
1137{ 1171{
1138 struct cpufreq_policy *policy; 1172 struct cpufreq_policy *policy;
1173 struct device *dev = get_cpu_device(cpu);
1139 int ret; 1174 int ret;
1140 1175
1176 if (!dev)
1177 return NULL;
1178
1141 policy = kzalloc(sizeof(*policy), GFP_KERNEL); 1179 policy = kzalloc(sizeof(*policy), GFP_KERNEL);
1142 if (!policy) 1180 if (!policy)
1143 return NULL; 1181 return NULL;
@@ -1154,7 +1192,7 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
1154 ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, 1192 ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq,
1155 cpufreq_global_kobject, "policy%u", cpu); 1193 cpufreq_global_kobject, "policy%u", cpu);
1156 if (ret) { 1194 if (ret) {
1157 pr_err("%s: failed to init policy->kobj: %d\n", __func__, ret); 1195 dev_err(dev, "%s: failed to init policy->kobj: %d\n", __func__, ret);
1158 /* 1196 /*
1159 * The entire policy object will be freed below, but the extra 1197 * The entire policy object will be freed below, but the extra
1160 * memory allocated for the kobject name needs to be freed by 1198 * memory allocated for the kobject name needs to be freed by
@@ -1164,6 +1202,25 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
1164 goto err_free_real_cpus; 1202 goto err_free_real_cpus;
1165 } 1203 }
1166 1204
1205 policy->nb_min.notifier_call = cpufreq_notifier_min;
1206 policy->nb_max.notifier_call = cpufreq_notifier_max;
1207
1208 ret = dev_pm_qos_add_notifier(dev, &policy->nb_min,
1209 DEV_PM_QOS_MIN_FREQUENCY);
1210 if (ret) {
1211 dev_err(dev, "Failed to register MIN QoS notifier: %d (%*pbl)\n",
1212 ret, cpumask_pr_args(policy->cpus));
1213 goto err_kobj_remove;
1214 }
1215
1216 ret = dev_pm_qos_add_notifier(dev, &policy->nb_max,
1217 DEV_PM_QOS_MAX_FREQUENCY);
1218 if (ret) {
1219 dev_err(dev, "Failed to register MAX QoS notifier: %d (%*pbl)\n",
1220 ret, cpumask_pr_args(policy->cpus));
1221 goto err_min_qos_notifier;
1222 }
1223
1167 INIT_LIST_HEAD(&policy->policy_list); 1224 INIT_LIST_HEAD(&policy->policy_list);
1168 init_rwsem(&policy->rwsem); 1225 init_rwsem(&policy->rwsem);
1169 spin_lock_init(&policy->transition_lock); 1226 spin_lock_init(&policy->transition_lock);
@@ -1174,6 +1231,11 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
1174 policy->cpu = cpu; 1231 policy->cpu = cpu;
1175 return policy; 1232 return policy;
1176 1233
1234err_min_qos_notifier:
1235 dev_pm_qos_remove_notifier(dev, &policy->nb_min,
1236 DEV_PM_QOS_MIN_FREQUENCY);
1237err_kobj_remove:
1238 cpufreq_policy_put_kobj(policy);
1177err_free_real_cpus: 1239err_free_real_cpus:
1178 free_cpumask_var(policy->real_cpus); 1240 free_cpumask_var(policy->real_cpus);
1179err_free_rcpumask: 1241err_free_rcpumask:
@@ -1186,30 +1248,9 @@ err_free_policy:
1186 return NULL; 1248 return NULL;
1187} 1249}
1188 1250
1189static void cpufreq_policy_put_kobj(struct cpufreq_policy *policy)
1190{
1191 struct kobject *kobj;
1192 struct completion *cmp;
1193
1194 down_write(&policy->rwsem);
1195 cpufreq_stats_free_table(policy);
1196 kobj = &policy->kobj;
1197 cmp = &policy->kobj_unregister;
1198 up_write(&policy->rwsem);
1199 kobject_put(kobj);
1200
1201 /*
1202 * We need to make sure that the underlying kobj is
1203 * actually not referenced anymore by anybody before we
1204 * proceed with unloading.
1205 */
1206 pr_debug("waiting for dropping of refcount\n");
1207 wait_for_completion(cmp);
1208 pr_debug("wait complete\n");
1209}
1210
1211static void cpufreq_policy_free(struct cpufreq_policy *policy) 1251static void cpufreq_policy_free(struct cpufreq_policy *policy)
1212{ 1252{
1253 struct device *dev = get_cpu_device(policy->cpu);
1213 unsigned long flags; 1254 unsigned long flags;
1214 int cpu; 1255 int cpu;
1215 1256
@@ -1221,6 +1262,14 @@ static void cpufreq_policy_free(struct cpufreq_policy *policy)
1221 per_cpu(cpufreq_cpu_data, cpu) = NULL; 1262 per_cpu(cpufreq_cpu_data, cpu) = NULL;
1222 write_unlock_irqrestore(&cpufreq_driver_lock, flags); 1263 write_unlock_irqrestore(&cpufreq_driver_lock, flags);
1223 1264
1265 dev_pm_qos_remove_notifier(dev, &policy->nb_max,
1266 DEV_PM_QOS_MAX_FREQUENCY);
1267 dev_pm_qos_remove_notifier(dev, &policy->nb_min,
1268 DEV_PM_QOS_MIN_FREQUENCY);
1269 dev_pm_qos_remove_request(policy->max_freq_req);
1270 dev_pm_qos_remove_request(policy->min_freq_req);
1271 kfree(policy->min_freq_req);
1272
1224 cpufreq_policy_put_kobj(policy); 1273 cpufreq_policy_put_kobj(policy);
1225 free_cpumask_var(policy->real_cpus); 1274 free_cpumask_var(policy->real_cpus);
1226 free_cpumask_var(policy->related_cpus); 1275 free_cpumask_var(policy->related_cpus);
@@ -1298,16 +1347,50 @@ static int cpufreq_online(unsigned int cpu)
1298 cpumask_and(policy->cpus, policy->cpus, cpu_online_mask); 1347 cpumask_and(policy->cpus, policy->cpus, cpu_online_mask);
1299 1348
1300 if (new_policy) { 1349 if (new_policy) {
1301 policy->user_policy.min = policy->min; 1350 struct device *dev = get_cpu_device(cpu);
1302 policy->user_policy.max = policy->max;
1303 1351
1304 for_each_cpu(j, policy->related_cpus) { 1352 for_each_cpu(j, policy->related_cpus) {
1305 per_cpu(cpufreq_cpu_data, j) = policy; 1353 per_cpu(cpufreq_cpu_data, j) = policy;
1306 add_cpu_dev_symlink(policy, j); 1354 add_cpu_dev_symlink(policy, j);
1307 } 1355 }
1308 } else { 1356
1309 policy->min = policy->user_policy.min; 1357 policy->min_freq_req = kzalloc(2 * sizeof(*policy->min_freq_req),
1310 policy->max = policy->user_policy.max; 1358 GFP_KERNEL);
1359 if (!policy->min_freq_req)
1360 goto out_destroy_policy;
1361
1362 ret = dev_pm_qos_add_request(dev, policy->min_freq_req,
1363 DEV_PM_QOS_MIN_FREQUENCY,
1364 policy->min);
1365 if (ret < 0) {
1366 /*
1367 * So we don't call dev_pm_qos_remove_request() for an
1368 * uninitialized request.
1369 */
1370 kfree(policy->min_freq_req);
1371 policy->min_freq_req = NULL;
1372
1373 dev_err(dev, "Failed to add min-freq constraint (%d)\n",
1374 ret);
1375 goto out_destroy_policy;
1376 }
1377
1378 /*
1379 * This must be initialized right here to avoid calling
1380 * dev_pm_qos_remove_request() on uninitialized request in case
1381 * of errors.
1382 */
1383 policy->max_freq_req = policy->min_freq_req + 1;
1384
1385 ret = dev_pm_qos_add_request(dev, policy->max_freq_req,
1386 DEV_PM_QOS_MAX_FREQUENCY,
1387 policy->max);
1388 if (ret < 0) {
1389 policy->max_freq_req = NULL;
1390 dev_err(dev, "Failed to add max-freq constraint (%d)\n",
1391 ret);
1392 goto out_destroy_policy;
1393 }
1311 } 1394 }
1312 1395
1313 if (cpufreq_driver->get && has_target()) { 1396 if (cpufreq_driver->get && has_target()) {
@@ -2280,6 +2363,7 @@ int cpufreq_set_policy(struct cpufreq_policy *policy,
2280 struct cpufreq_policy *new_policy) 2363 struct cpufreq_policy *new_policy)
2281{ 2364{
2282 struct cpufreq_governor *old_gov; 2365 struct cpufreq_governor *old_gov;
2366 struct device *cpu_dev = get_cpu_device(policy->cpu);
2283 int ret; 2367 int ret;
2284 2368
2285 pr_debug("setting new policy for CPU %u: %u - %u kHz\n", 2369 pr_debug("setting new policy for CPU %u: %u - %u kHz\n",
@@ -2288,17 +2372,21 @@ int cpufreq_set_policy(struct cpufreq_policy *policy,
2288 memcpy(&new_policy->cpuinfo, &policy->cpuinfo, sizeof(policy->cpuinfo)); 2372 memcpy(&new_policy->cpuinfo, &policy->cpuinfo, sizeof(policy->cpuinfo));
2289 2373
2290 /* 2374 /*
2291 * This check works well when we store new min/max freq attributes, 2375 * PM QoS framework collects all the requests from users and provide us
2292 * because new_policy is a copy of policy with one field updated. 2376 * the final aggregated value here.
2293 */ 2377 */
2294 if (new_policy->min > new_policy->max) 2378 new_policy->min = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_MIN_FREQUENCY);
2295 return -EINVAL; 2379 new_policy->max = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_MAX_FREQUENCY);
2296 2380
2297 /* verify the cpu speed can be set within this limit */ 2381 /* verify the cpu speed can be set within this limit */
2298 ret = cpufreq_driver->verify(new_policy); 2382 ret = cpufreq_driver->verify(new_policy);
2299 if (ret) 2383 if (ret)
2300 return ret; 2384 return ret;
2301 2385
2386 /*
2387 * The notifier-chain shall be removed once all the users of
2388 * CPUFREQ_ADJUST are moved to use the QoS framework.
2389 */
2302 /* adjust if necessary - all reasons */ 2390 /* adjust if necessary - all reasons */
2303 blocking_notifier_call_chain(&cpufreq_policy_notifier_list, 2391 blocking_notifier_call_chain(&cpufreq_policy_notifier_list,
2304 CPUFREQ_ADJUST, new_policy); 2392 CPUFREQ_ADJUST, new_policy);
@@ -2377,10 +2465,9 @@ int cpufreq_set_policy(struct cpufreq_policy *policy,
2377 * @cpu: CPU to re-evaluate the policy for. 2465 * @cpu: CPU to re-evaluate the policy for.
2378 * 2466 *
2379 * Update the current frequency for the cpufreq policy of @cpu and use 2467 * Update the current frequency for the cpufreq policy of @cpu and use
2380 * cpufreq_set_policy() to re-apply the min and max limits saved in the 2468 * cpufreq_set_policy() to re-apply the min and max limits, which triggers the
2381 * user_policy sub-structure of that policy, which triggers the evaluation 2469 * evaluation of policy notifiers and the cpufreq driver's ->verify() callback
2382 * of policy notifiers and the cpufreq driver's ->verify() callback for the 2470 * for the policy in question, among other things.
2383 * policy in question, among other things.
2384 */ 2471 */
2385void cpufreq_update_policy(unsigned int cpu) 2472void cpufreq_update_policy(unsigned int cpu)
2386{ 2473{
@@ -2440,10 +2527,9 @@ static int cpufreq_boost_set_sw(int state)
2440 break; 2527 break;
2441 } 2528 }
2442 2529
2443 down_write(&policy->rwsem); 2530 ret = dev_pm_qos_update_request(policy->max_freq_req, policy->max);
2444 policy->user_policy.max = policy->max; 2531 if (ret)
2445 cpufreq_governor_limits(policy); 2532 break;
2446 up_write(&policy->rwsem);
2447 } 2533 }
2448 2534
2449 return ret; 2535 return ret;
diff --git a/drivers/cpufreq/davinci-cpufreq.c b/drivers/cpufreq/davinci-cpufreq.c
index 3de48ae60c29..297d23cad8b5 100644
--- a/drivers/cpufreq/davinci-cpufreq.c
+++ b/drivers/cpufreq/davinci-cpufreq.c
@@ -90,7 +90,8 @@ static int davinci_cpu_init(struct cpufreq_policy *policy)
90 * Setting the latency to 2000 us to accommodate addition of drivers 90 * Setting the latency to 2000 us to accommodate addition of drivers
91 * to pre/post change notification list. 91 * to pre/post change notification list.
92 */ 92 */
93 return cpufreq_generic_init(policy, freq_table, 2000 * 1000); 93 cpufreq_generic_init(policy, freq_table, 2000 * 1000);
94 return 0;
94} 95}
95 96
96static struct cpufreq_driver davinci_driver = { 97static struct cpufreq_driver davinci_driver = {
diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
index b54fd26ea7df..4f85f3112784 100644
--- a/drivers/cpufreq/imx-cpufreq-dt.c
+++ b/drivers/cpufreq/imx-cpufreq-dt.c
@@ -44,10 +44,11 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
44 * According to datasheet minimum speed grading is not supported for 44 * According to datasheet minimum speed grading is not supported for
45 * consumer parts so clamp to 1 to avoid warning for "no OPPs" 45 * consumer parts so clamp to 1 to avoid warning for "no OPPs"
46 * 46 *
47 * Applies to 8mq and 8mm. 47 * Applies to i.MX8M series SoCs.
48 */ 48 */
49 if (mkt_segment == 0 && speed_grade == 0 && ( 49 if (mkt_segment == 0 && speed_grade == 0 && (
50 of_machine_is_compatible("fsl,imx8mm") || 50 of_machine_is_compatible("fsl,imx8mm") ||
51 of_machine_is_compatible("fsl,imx8mn") ||
51 of_machine_is_compatible("fsl,imx8mq"))) 52 of_machine_is_compatible("fsl,imx8mq")))
52 speed_grade = 1; 53 speed_grade = 1;
53 54
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 47ccfa6b17b7..648a09a1778a 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -190,14 +190,12 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
190 190
191static int imx6q_cpufreq_init(struct cpufreq_policy *policy) 191static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
192{ 192{
193 int ret;
194
195 policy->clk = clks[ARM].clk; 193 policy->clk = clks[ARM].clk;
196 ret = cpufreq_generic_init(policy, freq_table, transition_latency); 194 cpufreq_generic_init(policy, freq_table, transition_latency);
197 policy->suspend_freq = max_freq; 195 policy->suspend_freq = max_freq;
198 dev_pm_opp_of_register_em(policy->cpus); 196 dev_pm_opp_of_register_em(policy->cpus);
199 197
200 return ret; 198 return 0;
201} 199}
202 200
203static struct cpufreq_driver imx6q_cpufreq_driver = { 201static struct cpufreq_driver imx6q_cpufreq_driver = {
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index f2ff5de988c1..cc27d4c59dca 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -898,7 +898,6 @@ static void intel_pstate_update_policies(void)
898static void intel_pstate_update_max_freq(unsigned int cpu) 898static void intel_pstate_update_max_freq(unsigned int cpu)
899{ 899{
900 struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu); 900 struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu);
901 struct cpufreq_policy new_policy;
902 struct cpudata *cpudata; 901 struct cpudata *cpudata;
903 902
904 if (!policy) 903 if (!policy)
@@ -908,11 +907,7 @@ static void intel_pstate_update_max_freq(unsigned int cpu)
908 policy->cpuinfo.max_freq = global.turbo_disabled_mf ? 907 policy->cpuinfo.max_freq = global.turbo_disabled_mf ?
909 cpudata->pstate.max_freq : cpudata->pstate.turbo_freq; 908 cpudata->pstate.max_freq : cpudata->pstate.turbo_freq;
910 909
911 memcpy(&new_policy, policy, sizeof(*policy)); 910 refresh_frequency_limits(policy);
912 new_policy.max = min(policy->user_policy.max, policy->cpuinfo.max_freq);
913 new_policy.min = min(policy->user_policy.min, new_policy.max);
914
915 cpufreq_set_policy(policy, &new_policy);
916 911
917 cpufreq_cpu_release(policy); 912 cpufreq_cpu_release(policy);
918} 913}
diff --git a/drivers/cpufreq/kirkwood-cpufreq.c b/drivers/cpufreq/kirkwood-cpufreq.c
index 7ab564c1f7ae..cb74bdc5baaa 100644
--- a/drivers/cpufreq/kirkwood-cpufreq.c
+++ b/drivers/cpufreq/kirkwood-cpufreq.c
@@ -85,7 +85,8 @@ static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
85/* Module init and exit code */ 85/* Module init and exit code */
86static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy) 86static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
87{ 87{
88 return cpufreq_generic_init(policy, kirkwood_freq_table, 5000); 88 cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
89 return 0;
89} 90}
90 91
91static struct cpufreq_driver kirkwood_cpufreq_driver = { 92static struct cpufreq_driver kirkwood_cpufreq_driver = {
diff --git a/drivers/cpufreq/loongson1-cpufreq.c b/drivers/cpufreq/loongson1-cpufreq.c
index 21c9ce8526c0..0ea88778882a 100644
--- a/drivers/cpufreq/loongson1-cpufreq.c
+++ b/drivers/cpufreq/loongson1-cpufreq.c
@@ -81,7 +81,7 @@ static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
81 struct device *cpu_dev = get_cpu_device(policy->cpu); 81 struct device *cpu_dev = get_cpu_device(policy->cpu);
82 struct cpufreq_frequency_table *freq_tbl; 82 struct cpufreq_frequency_table *freq_tbl;
83 unsigned int pll_freq, freq; 83 unsigned int pll_freq, freq;
84 int steps, i, ret; 84 int steps, i;
85 85
86 pll_freq = clk_get_rate(cpufreq->pll_clk) / 1000; 86 pll_freq = clk_get_rate(cpufreq->pll_clk) / 1000;
87 87
@@ -103,11 +103,9 @@ static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
103 freq_tbl[i].frequency = CPUFREQ_TABLE_END; 103 freq_tbl[i].frequency = CPUFREQ_TABLE_END;
104 104
105 policy->clk = cpufreq->clk; 105 policy->clk = cpufreq->clk;
106 ret = cpufreq_generic_init(policy, freq_tbl, 0); 106 cpufreq_generic_init(policy, freq_tbl, 0);
107 if (ret)
108 kfree(freq_tbl);
109 107
110 return ret; 108 return 0;
111} 109}
112 110
113static int ls1x_cpufreq_exit(struct cpufreq_policy *policy) 111static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index da344696beed..890813e0bb76 100644
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
@@ -95,7 +95,8 @@ static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy)
95 } 95 }
96 96
97 policy->clk = cpuclk; 97 policy->clk = cpuclk;
98 return cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0); 98 cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0);
99 return 0;
99} 100}
100 101
101static int loongson2_cpufreq_exit(struct cpufreq_policy *policy) 102static int loongson2_cpufreq_exit(struct cpufreq_policy *policy)
diff --git a/drivers/cpufreq/maple-cpufreq.c b/drivers/cpufreq/maple-cpufreq.c
index f5220b3d4ec5..28d346062166 100644
--- a/drivers/cpufreq/maple-cpufreq.c
+++ b/drivers/cpufreq/maple-cpufreq.c
@@ -140,7 +140,8 @@ static unsigned int maple_cpufreq_get_speed(unsigned int cpu)
140 140
141static int maple_cpufreq_cpu_init(struct cpufreq_policy *policy) 141static int maple_cpufreq_cpu_init(struct cpufreq_policy *policy)
142{ 142{
143 return cpufreq_generic_init(policy, maple_cpu_freqs, 12000); 143 cpufreq_generic_init(policy, maple_cpu_freqs, 12000);
144 return 0;
144} 145}
145 146
146static struct cpufreq_driver maple_cpufreq_driver = { 147static struct cpufreq_driver maple_cpufreq_driver = {
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 29643f06a3c3..8d14b42a8c6f 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -122,23 +122,18 @@ static int omap_cpu_init(struct cpufreq_policy *policy)
122 dev_err(mpu_dev, 122 dev_err(mpu_dev,
123 "%s: cpu%d: failed creating freq table[%d]\n", 123 "%s: cpu%d: failed creating freq table[%d]\n",
124 __func__, policy->cpu, result); 124 __func__, policy->cpu, result);
125 goto fail; 125 clk_put(policy->clk);
126 return result;
126 } 127 }
127 } 128 }
128 129
129 atomic_inc_return(&freq_table_users); 130 atomic_inc_return(&freq_table_users);
130 131
131 /* FIXME: what's the actual transition time? */ 132 /* FIXME: what's the actual transition time? */
132 result = cpufreq_generic_init(policy, freq_table, 300 * 1000); 133 cpufreq_generic_init(policy, freq_table, 300 * 1000);
133 if (!result) { 134 dev_pm_opp_of_register_em(policy->cpus);
134 dev_pm_opp_of_register_em(policy->cpus);
135 return 0;
136 }
137 135
138 freq_table_free(); 136 return 0;
139fail:
140 clk_put(policy->clk);
141 return result;
142} 137}
143 138
144static int omap_cpu_exit(struct cpufreq_policy *policy) 139static int omap_cpu_exit(struct cpufreq_policy *policy)
diff --git a/drivers/cpufreq/pasemi-cpufreq.c b/drivers/cpufreq/pasemi-cpufreq.c
index 6b1e4abe3248..93f39a1d4c3d 100644
--- a/drivers/cpufreq/pasemi-cpufreq.c
+++ b/drivers/cpufreq/pasemi-cpufreq.c
@@ -196,7 +196,8 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
196 policy->cur = pas_freqs[cur_astate].frequency; 196 policy->cur = pas_freqs[cur_astate].frequency;
197 ppc_proc_freq = policy->cur * 1000ul; 197 ppc_proc_freq = policy->cur * 1000ul;
198 198
199 return cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency()); 199 cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
200 return 0;
200 201
201out_unmap_sdcpwr: 202out_unmap_sdcpwr:
202 iounmap(sdcpwr_mapbase); 203 iounmap(sdcpwr_mapbase);
diff --git a/drivers/cpufreq/pmac32-cpufreq.c b/drivers/cpufreq/pmac32-cpufreq.c
index 650104d729f3..73621bc11976 100644
--- a/drivers/cpufreq/pmac32-cpufreq.c
+++ b/drivers/cpufreq/pmac32-cpufreq.c
@@ -372,7 +372,8 @@ static int pmac_cpufreq_target( struct cpufreq_policy *policy,
372 372
373static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 373static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
374{ 374{
375 return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency); 375 cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
376 return 0;
376} 377}
377 378
378static u32 read_gpio(struct device_node *np) 379static u32 read_gpio(struct device_node *np)
diff --git a/drivers/cpufreq/pmac64-cpufreq.c b/drivers/cpufreq/pmac64-cpufreq.c
index 1af3492a000d..d7542a106e6b 100644
--- a/drivers/cpufreq/pmac64-cpufreq.c
+++ b/drivers/cpufreq/pmac64-cpufreq.c
@@ -321,7 +321,8 @@ static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
321 321
322static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy) 322static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
323{ 323{
324 return cpufreq_generic_init(policy, g5_cpu_freqs, transition_latency); 324 cpufreq_generic_init(policy, g5_cpu_freqs, transition_latency);
325 return 0;
325} 326}
326 327
327static struct cpufreq_driver g5_cpufreq_driver = { 328static struct cpufreq_driver g5_cpufreq_driver = {
diff --git a/drivers/cpufreq/s3c2416-cpufreq.c b/drivers/cpufreq/s3c2416-cpufreq.c
index f7ff1ed7fef1..106910351c41 100644
--- a/drivers/cpufreq/s3c2416-cpufreq.c
+++ b/drivers/cpufreq/s3c2416-cpufreq.c
@@ -447,21 +447,16 @@ static int s3c2416_cpufreq_driver_init(struct cpufreq_policy *policy)
447 /* Datasheet says PLL stabalisation time must be at least 300us, 447 /* Datasheet says PLL stabalisation time must be at least 300us,
448 * so but add some fudge. (reference in LOCKCON0 register description) 448 * so but add some fudge. (reference in LOCKCON0 register description)
449 */ 449 */
450 ret = cpufreq_generic_init(policy, s3c_freq->freq_table, 450 cpufreq_generic_init(policy, s3c_freq->freq_table,
451 (500 * 1000) + s3c_freq->regulator_latency); 451 (500 * 1000) + s3c_freq->regulator_latency);
452 if (ret)
453 goto err_freq_table;
454
455 register_reboot_notifier(&s3c2416_cpufreq_reboot_notifier); 452 register_reboot_notifier(&s3c2416_cpufreq_reboot_notifier);
456 453
457 return 0; 454 return 0;
458 455
459err_freq_table:
460#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE 456#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE
461 regulator_put(s3c_freq->vddarm);
462err_vddarm: 457err_vddarm:
463#endif
464 clk_put(s3c_freq->armclk); 458 clk_put(s3c_freq->armclk);
459#endif
465err_armclk: 460err_armclk:
466 clk_put(s3c_freq->hclk); 461 clk_put(s3c_freq->hclk);
467err_hclk: 462err_hclk:
diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c b/drivers/cpufreq/s3c64xx-cpufreq.c
index 37df2d892eb0..af0c00dabb22 100644
--- a/drivers/cpufreq/s3c64xx-cpufreq.c
+++ b/drivers/cpufreq/s3c64xx-cpufreq.c
@@ -144,7 +144,6 @@ out:
144 144
145static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy) 145static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
146{ 146{
147 int ret;
148 struct cpufreq_frequency_table *freq; 147 struct cpufreq_frequency_table *freq;
149 148
150 if (policy->cpu != 0) 149 if (policy->cpu != 0)
@@ -165,8 +164,7 @@ static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
165#ifdef CONFIG_REGULATOR 164#ifdef CONFIG_REGULATOR
166 vddarm = regulator_get(NULL, "vddarm"); 165 vddarm = regulator_get(NULL, "vddarm");
167 if (IS_ERR(vddarm)) { 166 if (IS_ERR(vddarm)) {
168 ret = PTR_ERR(vddarm); 167 pr_err("Failed to obtain VDDARM: %ld\n", PTR_ERR(vddarm));
169 pr_err("Failed to obtain VDDARM: %d\n", ret);
170 pr_err("Only frequency scaling available\n"); 168 pr_err("Only frequency scaling available\n");
171 vddarm = NULL; 169 vddarm = NULL;
172 } else { 170 } else {
@@ -196,16 +194,9 @@ static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
196 * the PLLs, which we don't currently) is ~300us worst case, 194 * the PLLs, which we don't currently) is ~300us worst case,
197 * but add some fudge. 195 * but add some fudge.
198 */ 196 */
199 ret = cpufreq_generic_init(policy, s3c64xx_freq_table, 197 cpufreq_generic_init(policy, s3c64xx_freq_table,
200 (500 * 1000) + regulator_latency); 198 (500 * 1000) + regulator_latency);
201 if (ret != 0) { 199 return 0;
202 pr_err("Failed to configure frequency table: %d\n",
203 ret);
204 regulator_put(vddarm);
205 clk_put(policy->clk);
206 }
207
208 return ret;
209} 200}
210 201
211static struct cpufreq_driver s3c64xx_cpufreq_driver = { 202static struct cpufreq_driver s3c64xx_cpufreq_driver = {
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
index e5cb17d4be7b..5d10030f2560 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -541,7 +541,8 @@ static int s5pv210_cpu_init(struct cpufreq_policy *policy)
541 s5pv210_dram_conf[1].freq = clk_get_rate(dmc1_clk); 541 s5pv210_dram_conf[1].freq = clk_get_rate(dmc1_clk);
542 542
543 policy->suspend_freq = SLEEP_FREQ; 543 policy->suspend_freq = SLEEP_FREQ;
544 return cpufreq_generic_init(policy, s5pv210_freq_table, 40000); 544 cpufreq_generic_init(policy, s5pv210_freq_table, 40000);
545 return 0;
545 546
546out_dmc1: 547out_dmc1:
547 clk_put(dmc0_clk); 548 clk_put(dmc0_clk);
diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
index ab5cab93e638..5c075ef6adc0 100644
--- a/drivers/cpufreq/sa1100-cpufreq.c
+++ b/drivers/cpufreq/sa1100-cpufreq.c
@@ -181,7 +181,8 @@ static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
181 181
182static int __init sa1100_cpu_init(struct cpufreq_policy *policy) 182static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
183{ 183{
184 return cpufreq_generic_init(policy, sa11x0_freq_table, 0); 184 cpufreq_generic_init(policy, sa11x0_freq_table, 0);
185 return 0;
185} 186}
186 187
187static struct cpufreq_driver sa1100_driver __refdata = { 188static struct cpufreq_driver sa1100_driver __refdata = {
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index dab54e051c0e..d9d04d935b3a 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -303,7 +303,8 @@ static int sa1110_target(struct cpufreq_policy *policy, unsigned int ppcr)
303 303
304static int __init sa1110_cpu_init(struct cpufreq_policy *policy) 304static int __init sa1110_cpu_init(struct cpufreq_policy *policy)
305{ 305{
306 return cpufreq_generic_init(policy, sa11x0_freq_table, 0); 306 cpufreq_generic_init(policy, sa11x0_freq_table, 0);
307 return 0;
307} 308}
308 309
309/* sa1110_driver needs __refdata because it must remain after init registers 310/* sa1110_driver needs __refdata because it must remain after init registers
diff --git a/drivers/cpufreq/spear-cpufreq.c b/drivers/cpufreq/spear-cpufreq.c
index 4074e2615522..73bd8dc47074 100644
--- a/drivers/cpufreq/spear-cpufreq.c
+++ b/drivers/cpufreq/spear-cpufreq.c
@@ -153,8 +153,9 @@ static int spear_cpufreq_target(struct cpufreq_policy *policy,
153static int spear_cpufreq_init(struct cpufreq_policy *policy) 153static int spear_cpufreq_init(struct cpufreq_policy *policy)
154{ 154{
155 policy->clk = spear_cpufreq.clk; 155 policy->clk = spear_cpufreq.clk;
156 return cpufreq_generic_init(policy, spear_cpufreq.freq_tbl, 156 cpufreq_generic_init(policy, spear_cpufreq.freq_tbl,
157 spear_cpufreq.transition_latency); 157 spear_cpufreq.transition_latency);
158 return 0;
158} 159}
159 160
160static struct cpufreq_driver spear_cpufreq_driver = { 161static struct cpufreq_driver spear_cpufreq_driver = {
diff --git a/drivers/cpufreq/tegra20-cpufreq.c b/drivers/cpufreq/tegra20-cpufreq.c
index 3c32cc7b0671..f84ecd22f488 100644
--- a/drivers/cpufreq/tegra20-cpufreq.c
+++ b/drivers/cpufreq/tegra20-cpufreq.c
@@ -118,17 +118,11 @@ static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
118static int tegra_cpu_init(struct cpufreq_policy *policy) 118static int tegra_cpu_init(struct cpufreq_policy *policy)
119{ 119{
120 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data(); 120 struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
121 int ret;
122 121
123 clk_prepare_enable(cpufreq->cpu_clk); 122 clk_prepare_enable(cpufreq->cpu_clk);
124 123
125 /* FIXME: what's the actual transition time? */ 124 /* FIXME: what's the actual transition time? */
126 ret = cpufreq_generic_init(policy, freq_table, 300 * 1000); 125 cpufreq_generic_init(policy, freq_table, 300 * 1000);
127 if (ret) {
128 clk_disable_unprepare(cpufreq->cpu_clk);
129 return ret;
130 }
131
132 policy->clk = cpufreq->cpu_clk; 126 policy->clk = cpufreq->cpu_clk;
133 policy->suspend_freq = freq_table[0].frequency; 127 policy->suspend_freq = freq_table[0].frequency;
134 return 0; 128 return 0;
diff --git a/drivers/cpuidle/governor.c b/drivers/cpuidle/governor.c
index 9fddf828a76f..2e3e14192bee 100644
--- a/drivers/cpuidle/governor.c
+++ b/drivers/cpuidle/governor.c
@@ -110,7 +110,7 @@ int cpuidle_governor_latency_req(unsigned int cpu)
110{ 110{
111 int global_req = pm_qos_request(PM_QOS_CPU_DMA_LATENCY); 111 int global_req = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
112 struct device *device = get_cpu_device(cpu); 112 struct device *device = get_cpu_device(cpu);
113 int device_req = dev_pm_qos_raw_read_value(device); 113 int device_req = dev_pm_qos_raw_resume_latency(device);
114 114
115 return device_req < global_req ? device_req : global_req; 115 return device_req < global_req ? device_req : global_req;
116} 116}
diff --git a/drivers/powercap/Kconfig b/drivers/powercap/Kconfig
index 42d3798c88f0..dc1c1381d7fa 100644
--- a/drivers/powercap/Kconfig
+++ b/drivers/powercap/Kconfig
@@ -16,14 +16,17 @@ menuconfig POWERCAP
16 16
17if POWERCAP 17if POWERCAP
18# Client driver configurations go here. 18# Client driver configurations go here.
19config INTEL_RAPL_CORE
20 tristate
21
19config INTEL_RAPL 22config INTEL_RAPL
20 tristate "Intel RAPL Support" 23 tristate "Intel RAPL Support via MSR Interface"
21 depends on X86 && IOSF_MBI 24 depends on X86 && IOSF_MBI
22 default n 25 select INTEL_RAPL_CORE
23 ---help--- 26 ---help---
24 This enables support for the Intel Running Average Power Limit (RAPL) 27 This enables support for the Intel Running Average Power Limit (RAPL)
25 technology which allows power limits to be enforced and monitored on 28 technology via MSR interface, which allows power limits to be enforced
26 modern Intel processors (Sandy Bridge and later). 29 and monitored on modern Intel processors (Sandy Bridge and later).
27 30
28 In RAPL, the platform level settings are divided into domains for 31 In RAPL, the platform level settings are divided into domains for
29 fine grained control. These domains include processor package, DRAM 32 fine grained control. These domains include processor package, DRAM
diff --git a/drivers/powercap/Makefile b/drivers/powercap/Makefile
index 81c8ccaba6e7..7255c94ec61c 100644
--- a/drivers/powercap/Makefile
+++ b/drivers/powercap/Makefile
@@ -1,4 +1,5 @@
1# SPDX-License-Identifier: GPL-2.0-only 1# SPDX-License-Identifier: GPL-2.0-only
2obj-$(CONFIG_POWERCAP) += powercap_sys.o 2obj-$(CONFIG_POWERCAP) += powercap_sys.o
3obj-$(CONFIG_INTEL_RAPL) += intel_rapl.o 3obj-$(CONFIG_INTEL_RAPL_CORE) += intel_rapl_common.o
4obj-$(CONFIG_INTEL_RAPL) += intel_rapl_msr.o
4obj-$(CONFIG_IDLE_INJECT) += idle_inject.o 5obj-$(CONFIG_IDLE_INJECT) += idle_inject.o
diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl_common.c
index 8692f6b79f93..9fd6dd342169 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -1,7 +1,7 @@
1// SPDX-License-Identifier: GPL-2.0-only 1// SPDX-License-Identifier: GPL-2.0-only
2/* 2/*
3 * Intel Running Average Power Limit (RAPL) Driver 3 * Common code for Intel Running Average Power Limit (RAPL) support.
4 * Copyright (c) 2013, Intel Corporation. 4 * Copyright (c) 2019, Intel Corporation.
5 */ 5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 7
@@ -18,9 +18,11 @@
18#include <linux/cpu.h> 18#include <linux/cpu.h>
19#include <linux/powercap.h> 19#include <linux/powercap.h>
20#include <linux/suspend.h> 20#include <linux/suspend.h>
21#include <asm/iosf_mbi.h> 21#include <linux/intel_rapl.h>
22#include <linux/processor.h>
23#include <linux/platform_device.h>
22 24
23#include <asm/processor.h> 25#include <asm/iosf_mbi.h>
24#include <asm/cpu_device_id.h> 26#include <asm/cpu_device_id.h>
25#include <asm/intel-family.h> 27#include <asm/intel-family.h>
26 28
@@ -37,8 +39,8 @@
37#define POWER_LIMIT2_MASK (0x7FFFULL<<32) 39#define POWER_LIMIT2_MASK (0x7FFFULL<<32)
38#define POWER_LIMIT2_ENABLE BIT_ULL(47) 40#define POWER_LIMIT2_ENABLE BIT_ULL(47)
39#define POWER_LIMIT2_CLAMP BIT_ULL(48) 41#define POWER_LIMIT2_CLAMP BIT_ULL(48)
40#define POWER_PACKAGE_LOCK BIT_ULL(63) 42#define POWER_HIGH_LOCK BIT_ULL(63)
41#define POWER_PP_LOCK BIT(31) 43#define POWER_LOW_LOCK BIT(31)
42 44
43#define TIME_WINDOW1_MASK (0x7FULL<<17) 45#define TIME_WINDOW1_MASK (0x7FULL<<17)
44#define TIME_WINDOW2_MASK (0x7FULL<<49) 46#define TIME_WINDOW2_MASK (0x7FULL<<49)
@@ -61,143 +63,38 @@
61#define PP_POLICY_MASK 0x1F 63#define PP_POLICY_MASK 0x1F
62 64
63/* Non HW constants */ 65/* Non HW constants */
64#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */ 66#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
65#define RAPL_PRIMITIVE_DUMMY BIT(2) 67#define RAPL_PRIMITIVE_DUMMY BIT(2)
66 68
67#define TIME_WINDOW_MAX_MSEC 40000 69#define TIME_WINDOW_MAX_MSEC 40000
68#define TIME_WINDOW_MIN_MSEC 250 70#define TIME_WINDOW_MIN_MSEC 250
69#define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */ 71#define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */
70enum unit_type { 72enum unit_type {
71 ARBITRARY_UNIT, /* no translation */ 73 ARBITRARY_UNIT, /* no translation */
72 POWER_UNIT, 74 POWER_UNIT,
73 ENERGY_UNIT, 75 ENERGY_UNIT,
74 TIME_UNIT, 76 TIME_UNIT,
75}; 77};
76 78
77enum rapl_domain_type {
78 RAPL_DOMAIN_PACKAGE, /* entire package/socket */
79 RAPL_DOMAIN_PP0, /* core power plane */
80 RAPL_DOMAIN_PP1, /* graphics uncore */
81 RAPL_DOMAIN_DRAM,/* DRAM control_type */
82 RAPL_DOMAIN_PLATFORM, /* PSys control_type */
83 RAPL_DOMAIN_MAX,
84};
85
86enum rapl_domain_msr_id {
87 RAPL_DOMAIN_MSR_LIMIT,
88 RAPL_DOMAIN_MSR_STATUS,
89 RAPL_DOMAIN_MSR_PERF,
90 RAPL_DOMAIN_MSR_POLICY,
91 RAPL_DOMAIN_MSR_INFO,
92 RAPL_DOMAIN_MSR_MAX,
93};
94
95/* per domain data, some are optional */ 79/* per domain data, some are optional */
96enum rapl_primitives {
97 ENERGY_COUNTER,
98 POWER_LIMIT1,
99 POWER_LIMIT2,
100 FW_LOCK,
101
102 PL1_ENABLE, /* power limit 1, aka long term */
103 PL1_CLAMP, /* allow frequency to go below OS request */
104 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
105 PL2_CLAMP,
106
107 TIME_WINDOW1, /* long term */
108 TIME_WINDOW2, /* short term */
109 THERMAL_SPEC_POWER,
110 MAX_POWER,
111
112 MIN_POWER,
113 MAX_TIME_WINDOW,
114 THROTTLED_TIME,
115 PRIORITY_LEVEL,
116
117 /* below are not raw primitive data */
118 AVERAGE_POWER,
119 NR_RAPL_PRIMITIVES,
120};
121
122#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2) 80#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
123 81
124/* Can be expanded to include events, etc.*/
125struct rapl_domain_data {
126 u64 primitives[NR_RAPL_PRIMITIVES];
127 unsigned long timestamp;
128};
129
130struct msrl_action {
131 u32 msr_no;
132 u64 clear_mask;
133 u64 set_mask;
134 int err;
135};
136
137#define DOMAIN_STATE_INACTIVE BIT(0) 82#define DOMAIN_STATE_INACTIVE BIT(0)
138#define DOMAIN_STATE_POWER_LIMIT_SET BIT(1) 83#define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
139#define DOMAIN_STATE_BIOS_LOCKED BIT(2) 84#define DOMAIN_STATE_BIOS_LOCKED BIT(2)
140 85
141#define NR_POWER_LIMITS (2)
142struct rapl_power_limit {
143 struct powercap_zone_constraint *constraint;
144 int prim_id; /* primitive ID used to enable */
145 struct rapl_domain *domain;
146 const char *name;
147 u64 last_power_limit;
148};
149
150static const char pl1_name[] = "long_term"; 86static const char pl1_name[] = "long_term";
151static const char pl2_name[] = "short_term"; 87static const char pl2_name[] = "short_term";
152 88
153struct rapl_package;
154struct rapl_domain {
155 const char *name;
156 enum rapl_domain_type id;
157 int msrs[RAPL_DOMAIN_MSR_MAX];
158 struct powercap_zone power_zone;
159 struct rapl_domain_data rdd;
160 struct rapl_power_limit rpl[NR_POWER_LIMITS];
161 u64 attr_map; /* track capabilities */
162 unsigned int state;
163 unsigned int domain_energy_unit;
164 struct rapl_package *rp;
165};
166#define power_zone_to_rapl_domain(_zone) \ 89#define power_zone_to_rapl_domain(_zone) \
167 container_of(_zone, struct rapl_domain, power_zone) 90 container_of(_zone, struct rapl_domain, power_zone)
168 91
169/* maximum rapl package domain name: package-%d-die-%d */
170#define PACKAGE_DOMAIN_NAME_LENGTH 30
171
172
173/* Each rapl package contains multiple domains, these are the common
174 * data across RAPL domains within a package.
175 */
176struct rapl_package {
177 unsigned int id; /* logical die id, equals physical 1-die systems */
178 unsigned int nr_domains;
179 unsigned long domain_map; /* bit map of active domains */
180 unsigned int power_unit;
181 unsigned int energy_unit;
182 unsigned int time_unit;
183 struct rapl_domain *domains; /* array of domains, sized at runtime */
184 struct powercap_zone *power_zone; /* keep track of parent zone */
185 unsigned long power_limit_irq; /* keep track of package power limit
186 * notify interrupt enable status.
187 */
188 struct list_head plist;
189 int lead_cpu; /* one active cpu per package for access */
190 /* Track active cpus */
191 struct cpumask cpumask;
192 char name[PACKAGE_DOMAIN_NAME_LENGTH];
193};
194
195struct rapl_defaults { 92struct rapl_defaults {
196 u8 floor_freq_reg_addr; 93 u8 floor_freq_reg_addr;
197 int (*check_unit)(struct rapl_package *rp, int cpu); 94 int (*check_unit)(struct rapl_package *rp, int cpu);
198 void (*set_floor_freq)(struct rapl_domain *rd, bool mode); 95 void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
199 u64 (*compute_time_window)(struct rapl_package *rp, u64 val, 96 u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
200 bool to_raw); 97 bool to_raw);
201 unsigned int dram_domain_energy_unit; 98 unsigned int dram_domain_energy_unit;
202}; 99};
203static struct rapl_defaults *rapl_defaults; 100static struct rapl_defaults *rapl_defaults;
@@ -216,7 +113,7 @@ struct rapl_primitive_info {
216 const char *name; 113 const char *name;
217 u64 mask; 114 u64 mask;
218 int shift; 115 int shift;
219 enum rapl_domain_msr_id id; 116 enum rapl_domain_reg_id id;
220 enum unit_type unit; 117 enum unit_type unit;
221 u32 flag; 118 u32 flag;
222}; 119};
@@ -232,19 +129,18 @@ struct rapl_primitive_info {
232 129
233static void rapl_init_domains(struct rapl_package *rp); 130static void rapl_init_domains(struct rapl_package *rp);
234static int rapl_read_data_raw(struct rapl_domain *rd, 131static int rapl_read_data_raw(struct rapl_domain *rd,
235 enum rapl_primitives prim, 132 enum rapl_primitives prim,
236 bool xlate, u64 *data); 133 bool xlate, u64 *data);
237static int rapl_write_data_raw(struct rapl_domain *rd, 134static int rapl_write_data_raw(struct rapl_domain *rd,
238 enum rapl_primitives prim, 135 enum rapl_primitives prim,
239 unsigned long long value); 136 unsigned long long value);
240static u64 rapl_unit_xlate(struct rapl_domain *rd, 137static u64 rapl_unit_xlate(struct rapl_domain *rd,
241 enum unit_type type, u64 value, 138 enum unit_type type, u64 value, int to_raw);
242 int to_raw);
243static void package_power_limit_irq_save(struct rapl_package *rp); 139static void package_power_limit_irq_save(struct rapl_package *rp);
244 140
245static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */ 141static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */
246 142
247static const char * const rapl_domain_names[] = { 143static const char *const rapl_domain_names[] = {
248 "package", 144 "package",
249 "core", 145 "core",
250 "uncore", 146 "uncore",
@@ -252,24 +148,8 @@ static const char * const rapl_domain_names[] = {
252 "psys", 148 "psys",
253}; 149};
254 150
255static struct powercap_control_type *control_type; /* PowerCap Controller */ 151static int get_energy_counter(struct powercap_zone *power_zone,
256static struct rapl_domain *platform_rapl_domain; /* Platform (PSys) domain */ 152 u64 *energy_raw)
257
258/* caller to ensure CPU hotplug lock is held */
259static struct rapl_package *rapl_find_package_domain(int cpu)
260{
261 int id = topology_logical_die_id(cpu);
262 struct rapl_package *rp;
263
264 list_for_each_entry(rp, &rapl_packages, plist) {
265 if (rp->id == id)
266 return rp;
267 }
268
269 return NULL;
270}
271
272static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw)
273{ 153{
274 struct rapl_domain *rd; 154 struct rapl_domain *rd;
275 u64 energy_now; 155 u64 energy_now;
@@ -368,50 +248,49 @@ static int get_domain_enable(struct powercap_zone *power_zone, bool *mode)
368static const struct powercap_zone_ops zone_ops[] = { 248static const struct powercap_zone_ops zone_ops[] = {
369 /* RAPL_DOMAIN_PACKAGE */ 249 /* RAPL_DOMAIN_PACKAGE */
370 { 250 {
371 .get_energy_uj = get_energy_counter, 251 .get_energy_uj = get_energy_counter,
372 .get_max_energy_range_uj = get_max_energy_counter, 252 .get_max_energy_range_uj = get_max_energy_counter,
373 .release = release_zone, 253 .release = release_zone,
374 .set_enable = set_domain_enable, 254 .set_enable = set_domain_enable,
375 .get_enable = get_domain_enable, 255 .get_enable = get_domain_enable,
376 }, 256 },
377 /* RAPL_DOMAIN_PP0 */ 257 /* RAPL_DOMAIN_PP0 */
378 { 258 {
379 .get_energy_uj = get_energy_counter, 259 .get_energy_uj = get_energy_counter,
380 .get_max_energy_range_uj = get_max_energy_counter, 260 .get_max_energy_range_uj = get_max_energy_counter,
381 .release = release_zone, 261 .release = release_zone,
382 .set_enable = set_domain_enable, 262 .set_enable = set_domain_enable,
383 .get_enable = get_domain_enable, 263 .get_enable = get_domain_enable,
384 }, 264 },
385 /* RAPL_DOMAIN_PP1 */ 265 /* RAPL_DOMAIN_PP1 */
386 { 266 {
387 .get_energy_uj = get_energy_counter, 267 .get_energy_uj = get_energy_counter,
388 .get_max_energy_range_uj = get_max_energy_counter, 268 .get_max_energy_range_uj = get_max_energy_counter,
389 .release = release_zone, 269 .release = release_zone,
390 .set_enable = set_domain_enable, 270 .set_enable = set_domain_enable,
391 .get_enable = get_domain_enable, 271 .get_enable = get_domain_enable,
392 }, 272 },
393 /* RAPL_DOMAIN_DRAM */ 273 /* RAPL_DOMAIN_DRAM */
394 { 274 {
395 .get_energy_uj = get_energy_counter, 275 .get_energy_uj = get_energy_counter,
396 .get_max_energy_range_uj = get_max_energy_counter, 276 .get_max_energy_range_uj = get_max_energy_counter,
397 .release = release_zone, 277 .release = release_zone,
398 .set_enable = set_domain_enable, 278 .set_enable = set_domain_enable,
399 .get_enable = get_domain_enable, 279 .get_enable = get_domain_enable,
400 }, 280 },
401 /* RAPL_DOMAIN_PLATFORM */ 281 /* RAPL_DOMAIN_PLATFORM */
402 { 282 {
403 .get_energy_uj = get_energy_counter, 283 .get_energy_uj = get_energy_counter,
404 .get_max_energy_range_uj = get_max_energy_counter, 284 .get_max_energy_range_uj = get_max_energy_counter,
405 .release = release_zone, 285 .release = release_zone,
406 .set_enable = set_domain_enable, 286 .set_enable = set_domain_enable,
407 .get_enable = get_domain_enable, 287 .get_enable = get_domain_enable,
408 }, 288 },
409}; 289};
410 290
411
412/* 291/*
413 * Constraint index used by powercap can be different than power limit (PL) 292 * Constraint index used by powercap can be different than power limit (PL)
414 * index in that some PLs maybe missing due to non-existant MSRs. So we 293 * index in that some PLs maybe missing due to non-existent MSRs. So we
415 * need to convert here by finding the valid PLs only (name populated). 294 * need to convert here by finding the valid PLs only (name populated).
416 */ 295 */
417static int contraint_to_pl(struct rapl_domain *rd, int cid) 296static int contraint_to_pl(struct rapl_domain *rd, int cid)
@@ -430,7 +309,7 @@ static int contraint_to_pl(struct rapl_domain *rd, int cid)
430} 309}
431 310
432static int set_power_limit(struct powercap_zone *power_zone, int cid, 311static int set_power_limit(struct powercap_zone *power_zone, int cid,
433 u64 power_limit) 312 u64 power_limit)
434{ 313{
435 struct rapl_domain *rd; 314 struct rapl_domain *rd;
436 struct rapl_package *rp; 315 struct rapl_package *rp;
@@ -448,8 +327,8 @@ static int set_power_limit(struct powercap_zone *power_zone, int cid,
448 rp = rd->rp; 327 rp = rd->rp;
449 328
450 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { 329 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
451 dev_warn(&power_zone->dev, "%s locked by BIOS, monitoring only\n", 330 dev_warn(&power_zone->dev,
452 rd->name); 331 "%s locked by BIOS, monitoring only\n", rd->name);
453 ret = -EACCES; 332 ret = -EACCES;
454 goto set_exit; 333 goto set_exit;
455 } 334 }
@@ -472,7 +351,7 @@ set_exit:
472} 351}
473 352
474static int get_current_power_limit(struct powercap_zone *power_zone, int cid, 353static int get_current_power_limit(struct powercap_zone *power_zone, int cid,
475 u64 *data) 354 u64 *data)
476{ 355{
477 struct rapl_domain *rd; 356 struct rapl_domain *rd;
478 u64 val; 357 u64 val;
@@ -511,7 +390,7 @@ get_exit:
511} 390}
512 391
513static int set_time_window(struct powercap_zone *power_zone, int cid, 392static int set_time_window(struct powercap_zone *power_zone, int cid,
514 u64 window) 393 u64 window)
515{ 394{
516 struct rapl_domain *rd; 395 struct rapl_domain *rd;
517 int ret = 0; 396 int ret = 0;
@@ -541,7 +420,8 @@ set_time_exit:
541 return ret; 420 return ret;
542} 421}
543 422
544static int get_time_window(struct powercap_zone *power_zone, int cid, u64 *data) 423static int get_time_window(struct powercap_zone *power_zone, int cid,
424 u64 *data)
545{ 425{
546 struct rapl_domain *rd; 426 struct rapl_domain *rd;
547 u64 val; 427 u64 val;
@@ -576,7 +456,8 @@ get_time_exit:
576 return ret; 456 return ret;
577} 457}
578 458
579static const char *get_constraint_name(struct powercap_zone *power_zone, int cid) 459static const char *get_constraint_name(struct powercap_zone *power_zone,
460 int cid)
580{ 461{
581 struct rapl_domain *rd; 462 struct rapl_domain *rd;
582 int id; 463 int id;
@@ -589,9 +470,7 @@ static const char *get_constraint_name(struct powercap_zone *power_zone, int cid
589 return NULL; 470 return NULL;
590} 471}
591 472
592 473static int get_max_power(struct powercap_zone *power_zone, int id, u64 *data)
593static int get_max_power(struct powercap_zone *power_zone, int id,
594 u64 *data)
595{ 474{
596 struct rapl_domain *rd; 475 struct rapl_domain *rd;
597 u64 val; 476 u64 val;
@@ -633,73 +512,43 @@ static const struct powercap_zone_constraint_ops constraint_ops = {
633/* called after domain detection and package level data are set */ 512/* called after domain detection and package level data are set */
634static void rapl_init_domains(struct rapl_package *rp) 513static void rapl_init_domains(struct rapl_package *rp)
635{ 514{
636 int i; 515 enum rapl_domain_type i;
516 enum rapl_domain_reg_id j;
637 struct rapl_domain *rd = rp->domains; 517 struct rapl_domain *rd = rp->domains;
638 518
639 for (i = 0; i < RAPL_DOMAIN_MAX; i++) { 519 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
640 unsigned int mask = rp->domain_map & (1 << i); 520 unsigned int mask = rp->domain_map & (1 << i);
641 switch (mask) { 521
642 case BIT(RAPL_DOMAIN_PACKAGE): 522 if (!mask)
643 rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE]; 523 continue;
644 rd->id = RAPL_DOMAIN_PACKAGE; 524
645 rd->msrs[0] = MSR_PKG_POWER_LIMIT; 525 rd->rp = rp;
646 rd->msrs[1] = MSR_PKG_ENERGY_STATUS; 526 rd->name = rapl_domain_names[i];
647 rd->msrs[2] = MSR_PKG_PERF_STATUS; 527 rd->id = i;
648 rd->msrs[3] = 0; 528 rd->rpl[0].prim_id = PL1_ENABLE;
649 rd->msrs[4] = MSR_PKG_POWER_INFO; 529 rd->rpl[0].name = pl1_name;
650 rd->rpl[0].prim_id = PL1_ENABLE; 530 /* some domain may support two power limits */
651 rd->rpl[0].name = pl1_name; 531 if (rp->priv->limits[i] == 2) {
652 rd->rpl[1].prim_id = PL2_ENABLE; 532 rd->rpl[1].prim_id = PL2_ENABLE;
653 rd->rpl[1].name = pl2_name; 533 rd->rpl[1].name = pl2_name;
654 break; 534 }
655 case BIT(RAPL_DOMAIN_PP0): 535
656 rd->name = rapl_domain_names[RAPL_DOMAIN_PP0]; 536 for (j = 0; j < RAPL_DOMAIN_REG_MAX; j++)
657 rd->id = RAPL_DOMAIN_PP0; 537 rd->regs[j] = rp->priv->regs[i][j];
658 rd->msrs[0] = MSR_PP0_POWER_LIMIT; 538
659 rd->msrs[1] = MSR_PP0_ENERGY_STATUS; 539 if (i == RAPL_DOMAIN_DRAM) {
660 rd->msrs[2] = 0;
661 rd->msrs[3] = MSR_PP0_POLICY;
662 rd->msrs[4] = 0;
663 rd->rpl[0].prim_id = PL1_ENABLE;
664 rd->rpl[0].name = pl1_name;
665 break;
666 case BIT(RAPL_DOMAIN_PP1):
667 rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
668 rd->id = RAPL_DOMAIN_PP1;
669 rd->msrs[0] = MSR_PP1_POWER_LIMIT;
670 rd->msrs[1] = MSR_PP1_ENERGY_STATUS;
671 rd->msrs[2] = 0;
672 rd->msrs[3] = MSR_PP1_POLICY;
673 rd->msrs[4] = 0;
674 rd->rpl[0].prim_id = PL1_ENABLE;
675 rd->rpl[0].name = pl1_name;
676 break;
677 case BIT(RAPL_DOMAIN_DRAM):
678 rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
679 rd->id = RAPL_DOMAIN_DRAM;
680 rd->msrs[0] = MSR_DRAM_POWER_LIMIT;
681 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS;
682 rd->msrs[2] = MSR_DRAM_PERF_STATUS;
683 rd->msrs[3] = 0;
684 rd->msrs[4] = MSR_DRAM_POWER_INFO;
685 rd->rpl[0].prim_id = PL1_ENABLE;
686 rd->rpl[0].name = pl1_name;
687 rd->domain_energy_unit = 540 rd->domain_energy_unit =
688 rapl_defaults->dram_domain_energy_unit; 541 rapl_defaults->dram_domain_energy_unit;
689 if (rd->domain_energy_unit) 542 if (rd->domain_energy_unit)
690 pr_info("DRAM domain energy unit %dpj\n", 543 pr_info("DRAM domain energy unit %dpj\n",
691 rd->domain_energy_unit); 544 rd->domain_energy_unit);
692 break;
693 }
694 if (mask) {
695 rd->rp = rp;
696 rd++;
697 } 545 }
546 rd++;
698 } 547 }
699} 548}
700 549
701static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type, 550static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type,
702 u64 value, int to_raw) 551 u64 value, int to_raw)
703{ 552{
704 u64 units = 1; 553 u64 units = 1;
705 struct rapl_package *rp = rd->rp; 554 struct rapl_package *rp = rd->rp;
@@ -736,40 +585,40 @@ static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type,
736static struct rapl_primitive_info rpi[] = { 585static struct rapl_primitive_info rpi[] = {
737 /* name, mask, shift, msr index, unit divisor */ 586 /* name, mask, shift, msr index, unit divisor */
738 PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0, 587 PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
739 RAPL_DOMAIN_MSR_STATUS, ENERGY_UNIT, 0), 588 RAPL_DOMAIN_REG_STATUS, ENERGY_UNIT, 0),
740 PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0, 589 PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
741 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0), 590 RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
742 PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32, 591 PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
743 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0), 592 RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
744 PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31, 593 PRIMITIVE_INFO_INIT(FW_LOCK, POWER_LOW_LOCK, 31,
745 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), 594 RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
746 PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15, 595 PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
747 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), 596 RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
748 PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16, 597 PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
749 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), 598 RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
750 PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47, 599 PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
751 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), 600 RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
752 PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48, 601 PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
753 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), 602 RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
754 PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17, 603 PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
755 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0), 604 RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
756 PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49, 605 PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
757 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0), 606 RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
758 PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK, 607 PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK,
759 0, RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), 608 0, RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
760 PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32, 609 PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
761 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), 610 RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
762 PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16, 611 PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
763 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), 612 RAPL_DOMAIN_REG_INFO, POWER_UNIT, 0),
764 PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48, 613 PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48,
765 RAPL_DOMAIN_MSR_INFO, TIME_UNIT, 0), 614 RAPL_DOMAIN_REG_INFO, TIME_UNIT, 0),
766 PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0, 615 PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0,
767 RAPL_DOMAIN_MSR_PERF, TIME_UNIT, 0), 616 RAPL_DOMAIN_REG_PERF, TIME_UNIT, 0),
768 PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0, 617 PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
769 RAPL_DOMAIN_MSR_POLICY, ARBITRARY_UNIT, 0), 618 RAPL_DOMAIN_REG_POLICY, ARBITRARY_UNIT, 0),
770 /* non-hardware */ 619 /* non-hardware */
771 PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT, 620 PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
772 RAPL_PRIMITIVE_DERIVED), 621 RAPL_PRIMITIVE_DERIVED),
773 {NULL, 0, 0, 0}, 622 {NULL, 0, 0, 0},
774}; 623};
775 624
@@ -787,26 +636,25 @@ static struct rapl_primitive_info rpi[] = {
787 * 63-------------------------- 31--------------------------- 0 636 * 63-------------------------- 31--------------------------- 0
788 */ 637 */
789static int rapl_read_data_raw(struct rapl_domain *rd, 638static int rapl_read_data_raw(struct rapl_domain *rd,
790 enum rapl_primitives prim, 639 enum rapl_primitives prim, bool xlate, u64 *data)
791 bool xlate, u64 *data)
792{ 640{
793 u64 value, final; 641 u64 value;
794 u32 msr;
795 struct rapl_primitive_info *rp = &rpi[prim]; 642 struct rapl_primitive_info *rp = &rpi[prim];
643 struct reg_action ra;
796 int cpu; 644 int cpu;
797 645
798 if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY) 646 if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
799 return -EINVAL; 647 return -EINVAL;
800 648
801 msr = rd->msrs[rp->id]; 649 ra.reg = rd->regs[rp->id];
802 if (!msr) 650 if (!ra.reg)
803 return -EINVAL; 651 return -EINVAL;
804 652
805 cpu = rd->rp->lead_cpu; 653 cpu = rd->rp->lead_cpu;
806 654
807 /* special-case package domain, which uses a different bit*/ 655 /* domain with 2 limits has different bit */
808 if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) { 656 if (prim == FW_LOCK && rd->rp->priv->limits[rd->id] == 2) {
809 rp->mask = POWER_PACKAGE_LOCK; 657 rp->mask = POWER_HIGH_LOCK;
810 rp->shift = 63; 658 rp->shift = 63;
811 } 659 }
812 /* non-hardware data are collected by the polling thread */ 660 /* non-hardware data are collected by the polling thread */
@@ -815,56 +663,32 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
815 return 0; 663 return 0;
816 } 664 }
817 665
818 if (rdmsrl_safe_on_cpu(cpu, msr, &value)) { 666 ra.mask = rp->mask;
819 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); 667
668 if (rd->rp->priv->read_raw(cpu, &ra)) {
669 pr_debug("failed to read reg 0x%llx on cpu %d\n", ra.reg, cpu);
820 return -EIO; 670 return -EIO;
821 } 671 }
822 672
823 final = value & rp->mask; 673 value = ra.value >> rp->shift;
824 final = final >> rp->shift; 674
825 if (xlate) 675 if (xlate)
826 *data = rapl_unit_xlate(rd, rp->unit, final, 0); 676 *data = rapl_unit_xlate(rd, rp->unit, value, 0);
827 else 677 else
828 *data = final; 678 *data = value;
829 679
830 return 0; 680 return 0;
831} 681}
832 682
833
834static int msrl_update_safe(u32 msr_no, u64 clear_mask, u64 set_mask)
835{
836 int err;
837 u64 val;
838
839 err = rdmsrl_safe(msr_no, &val);
840 if (err)
841 goto out;
842
843 val &= ~clear_mask;
844 val |= set_mask;
845
846 err = wrmsrl_safe(msr_no, val);
847
848out:
849 return err;
850}
851
852static void msrl_update_func(void *info)
853{
854 struct msrl_action *ma = info;
855
856 ma->err = msrl_update_safe(ma->msr_no, ma->clear_mask, ma->set_mask);
857}
858
859/* Similar use of primitive info in the read counterpart */ 683/* Similar use of primitive info in the read counterpart */
860static int rapl_write_data_raw(struct rapl_domain *rd, 684static int rapl_write_data_raw(struct rapl_domain *rd,
861 enum rapl_primitives prim, 685 enum rapl_primitives prim,
862 unsigned long long value) 686 unsigned long long value)
863{ 687{
864 struct rapl_primitive_info *rp = &rpi[prim]; 688 struct rapl_primitive_info *rp = &rpi[prim];
865 int cpu; 689 int cpu;
866 u64 bits; 690 u64 bits;
867 struct msrl_action ma; 691 struct reg_action ra;
868 int ret; 692 int ret;
869 693
870 cpu = rd->rp->lead_cpu; 694 cpu = rd->rp->lead_cpu;
@@ -872,17 +696,13 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
872 bits <<= rp->shift; 696 bits <<= rp->shift;
873 bits &= rp->mask; 697 bits &= rp->mask;
874 698
875 memset(&ma, 0, sizeof(ma)); 699 memset(&ra, 0, sizeof(ra));
876 700
877 ma.msr_no = rd->msrs[rp->id]; 701 ra.reg = rd->regs[rp->id];
878 ma.clear_mask = rp->mask; 702 ra.mask = rp->mask;
879 ma.set_mask = bits; 703 ra.value = bits;
880 704
881 ret = smp_call_function_single(cpu, msrl_update_func, &ma, 1); 705 ret = rd->rp->priv->write_raw(cpu, &ra);
882 if (ret)
883 WARN_ON_ONCE(ret);
884 else
885 ret = ma.err;
886 706
887 return ret; 707 return ret;
888} 708}
@@ -900,51 +720,56 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
900 */ 720 */
901static int rapl_check_unit_core(struct rapl_package *rp, int cpu) 721static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
902{ 722{
903 u64 msr_val; 723 struct reg_action ra;
904 u32 value; 724 u32 value;
905 725
906 if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { 726 ra.reg = rp->priv->reg_unit;
907 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", 727 ra.mask = ~0;
908 MSR_RAPL_POWER_UNIT, cpu); 728 if (rp->priv->read_raw(cpu, &ra)) {
729 pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
730 rp->priv->reg_unit, cpu);
909 return -ENODEV; 731 return -ENODEV;
910 } 732 }
911 733
912 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 734 value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
913 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value); 735 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
914 736
915 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 737 value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
916 rp->power_unit = 1000000 / (1 << value); 738 rp->power_unit = 1000000 / (1 << value);
917 739
918 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 740 value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
919 rp->time_unit = 1000000 / (1 << value); 741 rp->time_unit = 1000000 / (1 << value);
920 742
921 pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n", 743 pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n",
922 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit); 744 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit);
923 745
924 return 0; 746 return 0;
925} 747}
926 748
927static int rapl_check_unit_atom(struct rapl_package *rp, int cpu) 749static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
928{ 750{
929 u64 msr_val; 751 struct reg_action ra;
930 u32 value; 752 u32 value;
931 753
932 if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { 754 ra.reg = rp->priv->reg_unit;
933 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", 755 ra.mask = ~0;
934 MSR_RAPL_POWER_UNIT, cpu); 756 if (rp->priv->read_raw(cpu, &ra)) {
757 pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
758 rp->priv->reg_unit, cpu);
935 return -ENODEV; 759 return -ENODEV;
936 } 760 }
937 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 761
762 value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
938 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value; 763 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
939 764
940 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 765 value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
941 rp->power_unit = (1 << value) * 1000; 766 rp->power_unit = (1 << value) * 1000;
942 767
943 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 768 value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
944 rp->time_unit = 1000000 / (1 << value); 769 rp->time_unit = 1000000 / (1 << value);
945 770
946 pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n", 771 pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n",
947 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit); 772 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit);
948 773
949 return 0; 774 return 0;
950} 775}
@@ -964,7 +789,6 @@ static void power_limit_irq_save_cpu(void *info)
964 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); 789 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
965} 790}
966 791
967
968/* REVISIT: 792/* REVISIT:
969 * When package power limit is set artificially low by RAPL, LVT 793 * When package power limit is set artificially low by RAPL, LVT
970 * thermal interrupt for package power limit should be ignored 794 * thermal interrupt for package power limit should be ignored
@@ -1048,9 +872,9 @@ static void set_floor_freq_atom(struct rapl_domain *rd, bool enable)
1048} 872}
1049 873
1050static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value, 874static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,
1051 bool to_raw) 875 bool to_raw)
1052{ 876{
1053 u64 f, y; /* fraction and exp. used for time unit */ 877 u64 f, y; /* fraction and exp. used for time unit */
1054 878
1055 /* 879 /*
1056 * Special processing based on 2^Y*(1+F/4), refer 880 * Special processing based on 2^Y*(1+F/4), refer
@@ -1070,7 +894,7 @@ static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,
1070} 894}
1071 895
1072static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value, 896static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value,
1073 bool to_raw) 897 bool to_raw)
1074{ 898{
1075 /* 899 /*
1076 * Atom time unit encoding is straight forward val * time_unit, 900 * Atom time unit encoding is straight forward val * time_unit,
@@ -1078,8 +902,8 @@ static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value,
1078 */ 902 */
1079 if (!to_raw) 903 if (!to_raw)
1080 return (value) ? value *= rp->time_unit : rp->time_unit; 904 return (value) ? value *= rp->time_unit : rp->time_unit;
1081 else 905
1082 value = div64_u64(value, rp->time_unit); 906 value = div64_u64(value, rp->time_unit);
1083 907
1084 return value; 908 return value;
1085} 909}
@@ -1127,43 +951,48 @@ static const struct rapl_defaults rapl_defaults_cht = {
1127}; 951};
1128 952
1129static const struct x86_cpu_id rapl_ids[] __initconst = { 953static const struct x86_cpu_id rapl_ids[] __initconst = {
1130 INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core), 954 INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core),
1131 INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core), 955 INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core),
1132 956
1133 INTEL_CPU_FAM6(IVYBRIDGE, rapl_defaults_core), 957 INTEL_CPU_FAM6(IVYBRIDGE, rapl_defaults_core),
1134 INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core), 958 INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core),
1135 959
1136 INTEL_CPU_FAM6(HASWELL_CORE, rapl_defaults_core), 960 INTEL_CPU_FAM6(HASWELL_CORE, rapl_defaults_core),
1137 INTEL_CPU_FAM6(HASWELL_ULT, rapl_defaults_core), 961 INTEL_CPU_FAM6(HASWELL_ULT, rapl_defaults_core),
1138 INTEL_CPU_FAM6(HASWELL_GT3E, rapl_defaults_core), 962 INTEL_CPU_FAM6(HASWELL_GT3E, rapl_defaults_core),
1139 INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server), 963 INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server),
1140 964
1141 INTEL_CPU_FAM6(BROADWELL_CORE, rapl_defaults_core), 965 INTEL_CPU_FAM6(BROADWELL_CORE, rapl_defaults_core),
1142 INTEL_CPU_FAM6(BROADWELL_GT3E, rapl_defaults_core), 966 INTEL_CPU_FAM6(BROADWELL_GT3E, rapl_defaults_core),
1143 INTEL_CPU_FAM6(BROADWELL_XEON_D, rapl_defaults_core), 967 INTEL_CPU_FAM6(BROADWELL_XEON_D, rapl_defaults_core),
1144 INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_server), 968 INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_server),
1145 969
1146 INTEL_CPU_FAM6(SKYLAKE_DESKTOP, rapl_defaults_core), 970 INTEL_CPU_FAM6(SKYLAKE_DESKTOP, rapl_defaults_core),
1147 INTEL_CPU_FAM6(SKYLAKE_MOBILE, rapl_defaults_core), 971 INTEL_CPU_FAM6(SKYLAKE_MOBILE, rapl_defaults_core),
1148 INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server), 972 INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server),
1149 INTEL_CPU_FAM6(KABYLAKE_MOBILE, rapl_defaults_core), 973 INTEL_CPU_FAM6(KABYLAKE_MOBILE, rapl_defaults_core),
1150 INTEL_CPU_FAM6(KABYLAKE_DESKTOP, rapl_defaults_core), 974 INTEL_CPU_FAM6(KABYLAKE_DESKTOP, rapl_defaults_core),
1151 INTEL_CPU_FAM6(CANNONLAKE_MOBILE, rapl_defaults_core), 975 INTEL_CPU_FAM6(CANNONLAKE_MOBILE, rapl_defaults_core),
1152 INTEL_CPU_FAM6(ICELAKE_MOBILE, rapl_defaults_core), 976 INTEL_CPU_FAM6(ICELAKE_MOBILE, rapl_defaults_core),
1153 977 INTEL_CPU_FAM6(ICELAKE_DESKTOP, rapl_defaults_core),
1154 INTEL_CPU_FAM6(ATOM_SILVERMONT, rapl_defaults_byt), 978 INTEL_CPU_FAM6(ICELAKE_NNPI, rapl_defaults_core),
1155 INTEL_CPU_FAM6(ATOM_AIRMONT, rapl_defaults_cht), 979 INTEL_CPU_FAM6(ICELAKE_X, rapl_defaults_hsw_server),
1156 INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, rapl_defaults_tng), 980 INTEL_CPU_FAM6(ICELAKE_XEON_D, rapl_defaults_hsw_server),
1157 INTEL_CPU_FAM6(ATOM_AIRMONT_MID, rapl_defaults_ann), 981
1158 INTEL_CPU_FAM6(ATOM_GOLDMONT, rapl_defaults_core), 982 INTEL_CPU_FAM6(ATOM_SILVERMONT, rapl_defaults_byt),
1159 INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, rapl_defaults_core), 983 INTEL_CPU_FAM6(ATOM_AIRMONT, rapl_defaults_cht),
1160 INTEL_CPU_FAM6(ATOM_GOLDMONT_X, rapl_defaults_core), 984 INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, rapl_defaults_tng),
1161 INTEL_CPU_FAM6(ATOM_TREMONT_X, rapl_defaults_core), 985 INTEL_CPU_FAM6(ATOM_AIRMONT_MID, rapl_defaults_ann),
1162 986 INTEL_CPU_FAM6(ATOM_GOLDMONT, rapl_defaults_core),
1163 INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_server), 987 INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, rapl_defaults_core),
1164 INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_server), 988 INTEL_CPU_FAM6(ATOM_GOLDMONT_X, rapl_defaults_core),
989 INTEL_CPU_FAM6(ATOM_TREMONT_X, rapl_defaults_core),
990
991 INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_server),
992 INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_server),
1165 {} 993 {}
1166}; 994};
995
1167MODULE_DEVICE_TABLE(x86cpu, rapl_ids); 996MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
1168 997
1169/* Read once for all raw primitive data for domains */ 998/* Read once for all raw primitive data for domains */
@@ -1179,22 +1008,12 @@ static void rapl_update_domain_data(struct rapl_package *rp)
1179 for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) { 1008 for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) {
1180 if (!rapl_read_data_raw(&rp->domains[dmn], prim, 1009 if (!rapl_read_data_raw(&rp->domains[dmn], prim,
1181 rpi[prim].unit, &val)) 1010 rpi[prim].unit, &val))
1182 rp->domains[dmn].rdd.primitives[prim] = val; 1011 rp->domains[dmn].rdd.primitives[prim] = val;
1183 } 1012 }
1184 } 1013 }
1185 1014
1186} 1015}
1187 1016
1188static void rapl_unregister_powercap(void)
1189{
1190 if (platform_rapl_domain) {
1191 powercap_unregister_zone(control_type,
1192 &platform_rapl_domain->power_zone);
1193 kfree(platform_rapl_domain);
1194 }
1195 powercap_unregister_control_type(control_type);
1196}
1197
1198static int rapl_package_register_powercap(struct rapl_package *rp) 1017static int rapl_package_register_powercap(struct rapl_package *rp)
1199{ 1018{
1200 struct rapl_domain *rd; 1019 struct rapl_domain *rd;
@@ -1204,20 +1023,18 @@ static int rapl_package_register_powercap(struct rapl_package *rp)
1204 /* Update the domain data of the new package */ 1023 /* Update the domain data of the new package */
1205 rapl_update_domain_data(rp); 1024 rapl_update_domain_data(rp);
1206 1025
1207 /* first we register package domain as the parent zone*/ 1026 /* first we register package domain as the parent zone */
1208 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { 1027 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1209 if (rd->id == RAPL_DOMAIN_PACKAGE) { 1028 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1210 nr_pl = find_nr_power_limit(rd); 1029 nr_pl = find_nr_power_limit(rd);
1211 pr_debug("register package domain %s\n", rp->name); 1030 pr_debug("register package domain %s\n", rp->name);
1212 power_zone = powercap_register_zone(&rd->power_zone, 1031 power_zone = powercap_register_zone(&rd->power_zone,
1213 control_type, 1032 rp->priv->control_type, rp->name,
1214 rp->name, NULL, 1033 NULL, &zone_ops[rd->id], nr_pl,
1215 &zone_ops[rd->id], 1034 &constraint_ops);
1216 nr_pl,
1217 &constraint_ops);
1218 if (IS_ERR(power_zone)) { 1035 if (IS_ERR(power_zone)) {
1219 pr_debug("failed to register power zone %s\n", 1036 pr_debug("failed to register power zone %s\n",
1220 rp->name); 1037 rp->name);
1221 return PTR_ERR(power_zone); 1038 return PTR_ERR(power_zone);
1222 } 1039 }
1223 /* track parent zone in per package/socket data */ 1040 /* track parent zone in per package/socket data */
@@ -1230,21 +1047,21 @@ static int rapl_package_register_powercap(struct rapl_package *rp)
1230 pr_err("no package domain found, unknown topology!\n"); 1047 pr_err("no package domain found, unknown topology!\n");
1231 return -ENODEV; 1048 return -ENODEV;
1232 } 1049 }
1233 /* now register domains as children of the socket/package*/ 1050 /* now register domains as children of the socket/package */
1234 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { 1051 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1235 if (rd->id == RAPL_DOMAIN_PACKAGE) 1052 if (rd->id == RAPL_DOMAIN_PACKAGE)
1236 continue; 1053 continue;
1237 /* number of power limits per domain varies */ 1054 /* number of power limits per domain varies */
1238 nr_pl = find_nr_power_limit(rd); 1055 nr_pl = find_nr_power_limit(rd);
1239 power_zone = powercap_register_zone(&rd->power_zone, 1056 power_zone = powercap_register_zone(&rd->power_zone,
1240 control_type, rd->name, 1057 rp->priv->control_type,
1241 rp->power_zone, 1058 rd->name, rp->power_zone,
1242 &zone_ops[rd->id], nr_pl, 1059 &zone_ops[rd->id], nr_pl,
1243 &constraint_ops); 1060 &constraint_ops);
1244 1061
1245 if (IS_ERR(power_zone)) { 1062 if (IS_ERR(power_zone)) {
1246 pr_debug("failed to register power_zone, %s:%s\n", 1063 pr_debug("failed to register power_zone, %s:%s\n",
1247 rp->name, rd->name); 1064 rp->name, rd->name);
1248 ret = PTR_ERR(power_zone); 1065 ret = PTR_ERR(power_zone);
1249 goto err_cleanup; 1066 goto err_cleanup;
1250 } 1067 }
@@ -1258,22 +1075,30 @@ err_cleanup:
1258 */ 1075 */
1259 while (--rd >= rp->domains) { 1076 while (--rd >= rp->domains) {
1260 pr_debug("unregister %s domain %s\n", rp->name, rd->name); 1077 pr_debug("unregister %s domain %s\n", rp->name, rd->name);
1261 powercap_unregister_zone(control_type, &rd->power_zone); 1078 powercap_unregister_zone(rp->priv->control_type,
1079 &rd->power_zone);
1262 } 1080 }
1263 1081
1264 return ret; 1082 return ret;
1265} 1083}
1266 1084
1267static int __init rapl_register_psys(void) 1085int rapl_add_platform_domain(struct rapl_if_priv *priv)
1268{ 1086{
1269 struct rapl_domain *rd; 1087 struct rapl_domain *rd;
1270 struct powercap_zone *power_zone; 1088 struct powercap_zone *power_zone;
1271 u64 val; 1089 struct reg_action ra;
1090 int ret;
1272 1091
1273 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_ENERGY_STATUS, &val) || !val) 1092 ra.reg = priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
1093 ra.mask = ~0;
1094 ret = priv->read_raw(0, &ra);
1095 if (ret || !ra.value)
1274 return -ENODEV; 1096 return -ENODEV;
1275 1097
1276 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_POWER_LIMIT, &val) || !val) 1098 ra.reg = priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
1099 ra.mask = ~0;
1100 ret = priv->read_raw(0, &ra);
1101 if (ret || !ra.value)
1277 return -ENODEV; 1102 return -ENODEV;
1278 1103
1279 rd = kzalloc(sizeof(*rd), GFP_KERNEL); 1104 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
@@ -1282,15 +1107,17 @@ static int __init rapl_register_psys(void)
1282 1107
1283 rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM]; 1108 rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM];
1284 rd->id = RAPL_DOMAIN_PLATFORM; 1109 rd->id = RAPL_DOMAIN_PLATFORM;
1285 rd->msrs[0] = MSR_PLATFORM_POWER_LIMIT; 1110 rd->regs[RAPL_DOMAIN_REG_LIMIT] =
1286 rd->msrs[1] = MSR_PLATFORM_ENERGY_STATUS; 1111 priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
1112 rd->regs[RAPL_DOMAIN_REG_STATUS] =
1113 priv->regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
1287 rd->rpl[0].prim_id = PL1_ENABLE; 1114 rd->rpl[0].prim_id = PL1_ENABLE;
1288 rd->rpl[0].name = pl1_name; 1115 rd->rpl[0].name = pl1_name;
1289 rd->rpl[1].prim_id = PL2_ENABLE; 1116 rd->rpl[1].prim_id = PL2_ENABLE;
1290 rd->rpl[1].name = pl2_name; 1117 rd->rpl[1].name = pl2_name;
1291 rd->rp = rapl_find_package_domain(0); 1118 rd->rp = rapl_find_package_domain(0, priv);
1292 1119
1293 power_zone = powercap_register_zone(&rd->power_zone, control_type, 1120 power_zone = powercap_register_zone(&rd->power_zone, priv->control_type,
1294 "psys", NULL, 1121 "psys", NULL,
1295 &zone_ops[RAPL_DOMAIN_PLATFORM], 1122 &zone_ops[RAPL_DOMAIN_PLATFORM],
1296 2, &constraint_ops); 1123 2, &constraint_ops);
@@ -1300,38 +1127,32 @@ static int __init rapl_register_psys(void)
1300 return PTR_ERR(power_zone); 1127 return PTR_ERR(power_zone);
1301 } 1128 }
1302 1129
1303 platform_rapl_domain = rd; 1130 priv->platform_rapl_domain = rd;
1304 1131
1305 return 0; 1132 return 0;
1306} 1133}
1134EXPORT_SYMBOL_GPL(rapl_add_platform_domain);
1307 1135
1308static int __init rapl_register_powercap(void) 1136void rapl_remove_platform_domain(struct rapl_if_priv *priv)
1309{ 1137{
1310 control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); 1138 if (priv->platform_rapl_domain) {
1311 if (IS_ERR(control_type)) { 1139 powercap_unregister_zone(priv->control_type,
1312 pr_debug("failed to register powercap control_type.\n"); 1140 &priv->platform_rapl_domain->power_zone);
1313 return PTR_ERR(control_type); 1141 kfree(priv->platform_rapl_domain);
1314 } 1142 }
1315 return 0;
1316} 1143}
1144EXPORT_SYMBOL_GPL(rapl_remove_platform_domain);
1317 1145
1318static int rapl_check_domain(int cpu, int domain) 1146static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
1319{ 1147{
1320 unsigned msr; 1148 struct reg_action ra;
1321 u64 val = 0;
1322 1149
1323 switch (domain) { 1150 switch (domain) {
1324 case RAPL_DOMAIN_PACKAGE: 1151 case RAPL_DOMAIN_PACKAGE:
1325 msr = MSR_PKG_ENERGY_STATUS;
1326 break;
1327 case RAPL_DOMAIN_PP0: 1152 case RAPL_DOMAIN_PP0:
1328 msr = MSR_PP0_ENERGY_STATUS;
1329 break;
1330 case RAPL_DOMAIN_PP1: 1153 case RAPL_DOMAIN_PP1:
1331 msr = MSR_PP1_ENERGY_STATUS;
1332 break;
1333 case RAPL_DOMAIN_DRAM: 1154 case RAPL_DOMAIN_DRAM:
1334 msr = MSR_DRAM_ENERGY_STATUS; 1155 ra.reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS];
1335 break; 1156 break;
1336 case RAPL_DOMAIN_PLATFORM: 1157 case RAPL_DOMAIN_PLATFORM:
1337 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */ 1158 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
@@ -1343,19 +1164,20 @@ static int rapl_check_domain(int cpu, int domain)
1343 /* make sure domain counters are available and contains non-zero 1164 /* make sure domain counters are available and contains non-zero
1344 * values, otherwise skip it. 1165 * values, otherwise skip it.
1345 */ 1166 */
1346 if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val) 1167
1168 ra.mask = ~0;
1169 if (rp->priv->read_raw(cpu, &ra) || !ra.value)
1347 return -ENODEV; 1170 return -ENODEV;
1348 1171
1349 return 0; 1172 return 0;
1350} 1173}
1351 1174
1352
1353/* 1175/*
1354 * Check if power limits are available. Two cases when they are not available: 1176 * Check if power limits are available. Two cases when they are not available:
1355 * 1. Locked by BIOS, in this case we still provide read-only access so that 1177 * 1. Locked by BIOS, in this case we still provide read-only access so that
1356 * users can see what limit is set by the BIOS. 1178 * users can see what limit is set by the BIOS.
1357 * 2. Some CPUs make some domains monitoring only which means PLx MSRs may not 1179 * 2. Some CPUs make some domains monitoring only which means PLx MSRs may not
1358 * exist at all. In this case, we do not show the contraints in powercap. 1180 * exist at all. In this case, we do not show the constraints in powercap.
1359 * 1181 *
1360 * Called after domains are detected and initialized. 1182 * Called after domains are detected and initialized.
1361 */ 1183 */
@@ -1372,9 +1194,10 @@ static void rapl_detect_powerlimit(struct rapl_domain *rd)
1372 rd->state |= DOMAIN_STATE_BIOS_LOCKED; 1194 rd->state |= DOMAIN_STATE_BIOS_LOCKED;
1373 } 1195 }
1374 } 1196 }
1375 /* check if power limit MSRs exists, otherwise domain is monitoring only */ 1197 /* check if power limit MSR exists, otherwise domain is monitoring only */
1376 for (i = 0; i < NR_POWER_LIMITS; i++) { 1198 for (i = 0; i < NR_POWER_LIMITS; i++) {
1377 int prim = rd->rpl[i].prim_id; 1199 int prim = rd->rpl[i].prim_id;
1200
1378 if (rapl_read_data_raw(rd, prim, false, &val64)) 1201 if (rapl_read_data_raw(rd, prim, false, &val64))
1379 rd->rpl[i].name = NULL; 1202 rd->rpl[i].name = NULL;
1380 } 1203 }
@@ -1390,12 +1213,12 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
1390 1213
1391 for (i = 0; i < RAPL_DOMAIN_MAX; i++) { 1214 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
1392 /* use physical package id to read counters */ 1215 /* use physical package id to read counters */
1393 if (!rapl_check_domain(cpu, i)) { 1216 if (!rapl_check_domain(cpu, i, rp)) {
1394 rp->domain_map |= 1 << i; 1217 rp->domain_map |= 1 << i;
1395 pr_info("Found RAPL domain %s\n", rapl_domain_names[i]); 1218 pr_info("Found RAPL domain %s\n", rapl_domain_names[i]);
1396 } 1219 }
1397 } 1220 }
1398 rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX); 1221 rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX);
1399 if (!rp->nr_domains) { 1222 if (!rp->nr_domains) {
1400 pr_debug("no valid rapl domains found in %s\n", rp->name); 1223 pr_debug("no valid rapl domains found in %s\n", rp->name);
1401 return -ENODEV; 1224 return -ENODEV;
@@ -1403,7 +1226,7 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
1403 pr_debug("found %d domains on %s\n", rp->nr_domains, rp->name); 1226 pr_debug("found %d domains on %s\n", rp->nr_domains, rp->name);
1404 1227
1405 rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain), 1228 rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain),
1406 GFP_KERNEL); 1229 GFP_KERNEL);
1407 if (!rp->domains) 1230 if (!rp->domains)
1408 return -ENOMEM; 1231 return -ENOMEM;
1409 1232
@@ -1416,7 +1239,7 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
1416} 1239}
1417 1240
1418/* called from CPU hotplug notifier, hotplug lock held */ 1241/* called from CPU hotplug notifier, hotplug lock held */
1419static void rapl_remove_package(struct rapl_package *rp) 1242void rapl_remove_package(struct rapl_package *rp)
1420{ 1243{
1421 struct rapl_domain *rd, *rd_package = NULL; 1244 struct rapl_domain *rd, *rd_package = NULL;
1422 1245
@@ -1435,16 +1258,35 @@ static void rapl_remove_package(struct rapl_package *rp)
1435 } 1258 }
1436 pr_debug("remove package, undo power limit on %s: %s\n", 1259 pr_debug("remove package, undo power limit on %s: %s\n",
1437 rp->name, rd->name); 1260 rp->name, rd->name);
1438 powercap_unregister_zone(control_type, &rd->power_zone); 1261 powercap_unregister_zone(rp->priv->control_type,
1262 &rd->power_zone);
1439 } 1263 }
1440 /* do parent zone last */ 1264 /* do parent zone last */
1441 powercap_unregister_zone(control_type, &rd_package->power_zone); 1265 powercap_unregister_zone(rp->priv->control_type,
1266 &rd_package->power_zone);
1442 list_del(&rp->plist); 1267 list_del(&rp->plist);
1443 kfree(rp); 1268 kfree(rp);
1444} 1269}
1270EXPORT_SYMBOL_GPL(rapl_remove_package);
1271
1272/* caller to ensure CPU hotplug lock is held */
1273struct rapl_package *rapl_find_package_domain(int cpu, struct rapl_if_priv *priv)
1274{
1275 int id = topology_logical_die_id(cpu);
1276 struct rapl_package *rp;
1277
1278 list_for_each_entry(rp, &rapl_packages, plist) {
1279 if (rp->id == id
1280 && rp->priv->control_type == priv->control_type)
1281 return rp;
1282 }
1283
1284 return NULL;
1285}
1286EXPORT_SYMBOL_GPL(rapl_find_package_domain);
1445 1287
1446/* called from CPU hotplug notifier, hotplug lock held */ 1288/* called from CPU hotplug notifier, hotplug lock held */
1447static struct rapl_package *rapl_add_package(int cpu) 1289struct rapl_package *rapl_add_package(int cpu, struct rapl_if_priv *priv)
1448{ 1290{
1449 int id = topology_logical_die_id(cpu); 1291 int id = topology_logical_die_id(cpu);
1450 struct rapl_package *rp; 1292 struct rapl_package *rp;
@@ -1458,17 +1300,17 @@ static struct rapl_package *rapl_add_package(int cpu)
1458 /* add the new package to the list */ 1300 /* add the new package to the list */
1459 rp->id = id; 1301 rp->id = id;
1460 rp->lead_cpu = cpu; 1302 rp->lead_cpu = cpu;
1303 rp->priv = priv;
1461 1304
1462 if (topology_max_die_per_package() > 1) 1305 if (topology_max_die_per_package() > 1)
1463 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, 1306 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH,
1464 "package-%d-die-%d", c->phys_proc_id, c->cpu_die_id); 1307 "package-%d-die-%d", c->phys_proc_id, c->cpu_die_id);
1465 else 1308 else
1466 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, "package-%d", 1309 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, "package-%d",
1467 c->phys_proc_id); 1310 c->phys_proc_id);
1468 1311
1469 /* check if the package contains valid domains */ 1312 /* check if the package contains valid domains */
1470 if (rapl_detect_domains(rp, cpu) || 1313 if (rapl_detect_domains(rp, cpu) || rapl_defaults->check_unit(rp, cpu)) {
1471 rapl_defaults->check_unit(rp, cpu)) {
1472 ret = -ENODEV; 1314 ret = -ENODEV;
1473 goto err_free_package; 1315 goto err_free_package;
1474 } 1316 }
@@ -1484,47 +1326,7 @@ err_free_package:
1484 kfree(rp); 1326 kfree(rp);
1485 return ERR_PTR(ret); 1327 return ERR_PTR(ret);
1486} 1328}
1487 1329EXPORT_SYMBOL_GPL(rapl_add_package);
1488/* Handles CPU hotplug on multi-socket systems.
1489 * If a CPU goes online as the first CPU of the physical package
1490 * we add the RAPL package to the system. Similarly, when the last
1491 * CPU of the package is removed, we remove the RAPL package and its
1492 * associated domains. Cooling devices are handled accordingly at
1493 * per-domain level.
1494 */
1495static int rapl_cpu_online(unsigned int cpu)
1496{
1497 struct rapl_package *rp;
1498
1499 rp = rapl_find_package_domain(cpu);
1500 if (!rp) {
1501 rp = rapl_add_package(cpu);
1502 if (IS_ERR(rp))
1503 return PTR_ERR(rp);
1504 }
1505 cpumask_set_cpu(cpu, &rp->cpumask);
1506 return 0;
1507}
1508
1509static int rapl_cpu_down_prep(unsigned int cpu)
1510{
1511 struct rapl_package *rp;
1512 int lead_cpu;
1513
1514 rp = rapl_find_package_domain(cpu);
1515 if (!rp)
1516 return 0;
1517
1518 cpumask_clear_cpu(cpu, &rp->cpumask);
1519 lead_cpu = cpumask_first(&rp->cpumask);
1520 if (lead_cpu >= nr_cpu_ids)
1521 rapl_remove_package(rp);
1522 else if (rp->lead_cpu == cpu)
1523 rp->lead_cpu = lead_cpu;
1524 return 0;
1525}
1526
1527static enum cpuhp_state pcap_rapl_online;
1528 1330
1529static void power_limit_state_save(void) 1331static void power_limit_state_save(void)
1530{ 1332{
@@ -1542,17 +1344,15 @@ static void power_limit_state_save(void)
1542 switch (rd->rpl[i].prim_id) { 1344 switch (rd->rpl[i].prim_id) {
1543 case PL1_ENABLE: 1345 case PL1_ENABLE:
1544 ret = rapl_read_data_raw(rd, 1346 ret = rapl_read_data_raw(rd,
1545 POWER_LIMIT1, 1347 POWER_LIMIT1, true,
1546 true, 1348 &rd->rpl[i].last_power_limit);
1547 &rd->rpl[i].last_power_limit);
1548 if (ret) 1349 if (ret)
1549 rd->rpl[i].last_power_limit = 0; 1350 rd->rpl[i].last_power_limit = 0;
1550 break; 1351 break;
1551 case PL2_ENABLE: 1352 case PL2_ENABLE:
1552 ret = rapl_read_data_raw(rd, 1353 ret = rapl_read_data_raw(rd,
1553 POWER_LIMIT2, 1354 POWER_LIMIT2, true,
1554 true, 1355 &rd->rpl[i].last_power_limit);
1555 &rd->rpl[i].last_power_limit);
1556 if (ret) 1356 if (ret)
1557 rd->rpl[i].last_power_limit = 0; 1357 rd->rpl[i].last_power_limit = 0;
1558 break; 1358 break;
@@ -1578,15 +1378,13 @@ static void power_limit_state_restore(void)
1578 switch (rd->rpl[i].prim_id) { 1378 switch (rd->rpl[i].prim_id) {
1579 case PL1_ENABLE: 1379 case PL1_ENABLE:
1580 if (rd->rpl[i].last_power_limit) 1380 if (rd->rpl[i].last_power_limit)
1581 rapl_write_data_raw(rd, 1381 rapl_write_data_raw(rd, POWER_LIMIT1,
1582 POWER_LIMIT1, 1382 rd->rpl[i].last_power_limit);
1583 rd->rpl[i].last_power_limit);
1584 break; 1383 break;
1585 case PL2_ENABLE: 1384 case PL2_ENABLE:
1586 if (rd->rpl[i].last_power_limit) 1385 if (rd->rpl[i].last_power_limit)
1587 rapl_write_data_raw(rd, 1386 rapl_write_data_raw(rd, POWER_LIMIT2,
1588 POWER_LIMIT2, 1387 rd->rpl[i].last_power_limit);
1589 rd->rpl[i].last_power_limit);
1590 break; 1388 break;
1591 } 1389 }
1592 } 1390 }
@@ -1595,7 +1393,7 @@ static void power_limit_state_restore(void)
1595} 1393}
1596 1394
1597static int rapl_pm_callback(struct notifier_block *nb, 1395static int rapl_pm_callback(struct notifier_block *nb,
1598 unsigned long mode, void *_unused) 1396 unsigned long mode, void *_unused)
1599{ 1397{
1600 switch (mode) { 1398 switch (mode) {
1601 case PM_SUSPEND_PREPARE: 1399 case PM_SUSPEND_PREPARE:
@@ -1612,6 +1410,8 @@ static struct notifier_block rapl_pm_notifier = {
1612 .notifier_call = rapl_pm_callback, 1410 .notifier_call = rapl_pm_callback,
1613}; 1411};
1614 1412
1413static struct platform_device *rapl_msr_platdev;
1414
1615static int __init rapl_init(void) 1415static int __init rapl_init(void)
1616{ 1416{
1617 const struct x86_cpu_id *id; 1417 const struct x86_cpu_id *id;
@@ -1620,50 +1420,43 @@ static int __init rapl_init(void)
1620 id = x86_match_cpu(rapl_ids); 1420 id = x86_match_cpu(rapl_ids);
1621 if (!id) { 1421 if (!id) {
1622 pr_err("driver does not support CPU family %d model %d\n", 1422 pr_err("driver does not support CPU family %d model %d\n",
1623 boot_cpu_data.x86, boot_cpu_data.x86_model); 1423 boot_cpu_data.x86, boot_cpu_data.x86_model);
1624 1424
1625 return -ENODEV; 1425 return -ENODEV;
1626 } 1426 }
1627 1427
1628 rapl_defaults = (struct rapl_defaults *)id->driver_data; 1428 rapl_defaults = (struct rapl_defaults *)id->driver_data;
1629 1429
1630 ret = rapl_register_powercap(); 1430 ret = register_pm_notifier(&rapl_pm_notifier);
1631 if (ret) 1431 if (ret)
1632 return ret; 1432 return ret;
1633 1433
1634 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online", 1434 rapl_msr_platdev = platform_device_alloc("intel_rapl_msr", 0);
1635 rapl_cpu_online, rapl_cpu_down_prep); 1435 if (!rapl_msr_platdev) {
1636 if (ret < 0) 1436 ret = -ENOMEM;
1637 goto err_unreg; 1437 goto end;
1638 pcap_rapl_online = ret; 1438 }
1639
1640 /* Don't bail out if PSys is not supported */
1641 rapl_register_psys();
1642 1439
1643 ret = register_pm_notifier(&rapl_pm_notifier); 1440 ret = platform_device_add(rapl_msr_platdev);
1644 if (ret) 1441 if (ret)
1645 goto err_unreg_all; 1442 platform_device_put(rapl_msr_platdev);
1646 1443
1647 return 0; 1444end:
1648 1445 if (ret)
1649err_unreg_all: 1446 unregister_pm_notifier(&rapl_pm_notifier);
1650 cpuhp_remove_state(pcap_rapl_online);
1651 1447
1652err_unreg:
1653 rapl_unregister_powercap();
1654 return ret; 1448 return ret;
1655} 1449}
1656 1450
1657static void __exit rapl_exit(void) 1451static void __exit rapl_exit(void)
1658{ 1452{
1453 platform_device_unregister(rapl_msr_platdev);
1659 unregister_pm_notifier(&rapl_pm_notifier); 1454 unregister_pm_notifier(&rapl_pm_notifier);
1660 cpuhp_remove_state(pcap_rapl_online);
1661 rapl_unregister_powercap();
1662} 1455}
1663 1456
1664module_init(rapl_init); 1457module_init(rapl_init);
1665module_exit(rapl_exit); 1458module_exit(rapl_exit);
1666 1459
1667MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)"); 1460MODULE_DESCRIPTION("Intel Runtime Average Power Limit (RAPL) common code");
1668MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>"); 1461MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
1669MODULE_LICENSE("GPL v2"); 1462MODULE_LICENSE("GPL v2");
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
new file mode 100644
index 000000000000..d5487965bdfe
--- /dev/null
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -0,0 +1,183 @@
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel Running Average Power Limit (RAPL) Driver via MSR interface
4 * Copyright (c) 2019, Intel Corporation.
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/list.h>
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/slab.h>
14#include <linux/log2.h>
15#include <linux/bitmap.h>
16#include <linux/delay.h>
17#include <linux/sysfs.h>
18#include <linux/cpu.h>
19#include <linux/powercap.h>
20#include <linux/suspend.h>
21#include <linux/intel_rapl.h>
22#include <linux/processor.h>
23#include <linux/platform_device.h>
24
25#include <asm/iosf_mbi.h>
26#include <asm/cpu_device_id.h>
27#include <asm/intel-family.h>
28
29/* Local defines */
30#define MSR_PLATFORM_POWER_LIMIT 0x0000065C
31
32/* private data for RAPL MSR Interface */
33static struct rapl_if_priv rapl_msr_priv = {
34 .reg_unit = MSR_RAPL_POWER_UNIT,
35 .regs[RAPL_DOMAIN_PACKAGE] = {
36 MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
37 .regs[RAPL_DOMAIN_PP0] = {
38 MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
39 .regs[RAPL_DOMAIN_PP1] = {
40 MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
41 .regs[RAPL_DOMAIN_DRAM] = {
42 MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
43 .regs[RAPL_DOMAIN_PLATFORM] = {
44 MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
45 .limits[RAPL_DOMAIN_PACKAGE] = 2,
46};
47
48/* Handles CPU hotplug on multi-socket systems.
49 * If a CPU goes online as the first CPU of the physical package
50 * we add the RAPL package to the system. Similarly, when the last
51 * CPU of the package is removed, we remove the RAPL package and its
52 * associated domains. Cooling devices are handled accordingly at
53 * per-domain level.
54 */
55static int rapl_cpu_online(unsigned int cpu)
56{
57 struct rapl_package *rp;
58
59 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
60 if (!rp) {
61 rp = rapl_add_package(cpu, &rapl_msr_priv);
62 if (IS_ERR(rp))
63 return PTR_ERR(rp);
64 }
65 cpumask_set_cpu(cpu, &rp->cpumask);
66 return 0;
67}
68
69static int rapl_cpu_down_prep(unsigned int cpu)
70{
71 struct rapl_package *rp;
72 int lead_cpu;
73
74 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
75 if (!rp)
76 return 0;
77
78 cpumask_clear_cpu(cpu, &rp->cpumask);
79 lead_cpu = cpumask_first(&rp->cpumask);
80 if (lead_cpu >= nr_cpu_ids)
81 rapl_remove_package(rp);
82 else if (rp->lead_cpu == cpu)
83 rp->lead_cpu = lead_cpu;
84 return 0;
85}
86
87static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
88{
89 u32 msr = (u32)ra->reg;
90
91 if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
92 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
93 return -EIO;
94 }
95 ra->value &= ra->mask;
96 return 0;
97}
98
99static void rapl_msr_update_func(void *info)
100{
101 struct reg_action *ra = info;
102 u32 msr = (u32)ra->reg;
103 u64 val;
104
105 ra->err = rdmsrl_safe(msr, &val);
106 if (ra->err)
107 return;
108
109 val &= ~ra->mask;
110 val |= ra->value;
111
112 ra->err = wrmsrl_safe(msr, val);
113}
114
115static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
116{
117 int ret;
118
119 ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
120 if (WARN_ON_ONCE(ret))
121 return ret;
122
123 return ra->err;
124}
125
126static int rapl_msr_probe(struct platform_device *pdev)
127{
128 int ret;
129
130 rapl_msr_priv.read_raw = rapl_msr_read_raw;
131 rapl_msr_priv.write_raw = rapl_msr_write_raw;
132
133 rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
134 if (IS_ERR(rapl_msr_priv.control_type)) {
135 pr_debug("failed to register powercap control_type.\n");
136 return PTR_ERR(rapl_msr_priv.control_type);
137 }
138
139 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
140 rapl_cpu_online, rapl_cpu_down_prep);
141 if (ret < 0)
142 goto out;
143 rapl_msr_priv.pcap_rapl_online = ret;
144
145 /* Don't bail out if PSys is not supported */
146 rapl_add_platform_domain(&rapl_msr_priv);
147
148 return 0;
149
150out:
151 if (ret)
152 powercap_unregister_control_type(rapl_msr_priv.control_type);
153 return ret;
154}
155
156static int rapl_msr_remove(struct platform_device *pdev)
157{
158 cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
159 rapl_remove_platform_domain(&rapl_msr_priv);
160 powercap_unregister_control_type(rapl_msr_priv.control_type);
161 return 0;
162}
163
164static const struct platform_device_id rapl_msr_ids[] = {
165 { .name = "intel_rapl_msr", },
166 {}
167};
168MODULE_DEVICE_TABLE(platform, rapl_msr_ids);
169
170static struct platform_driver intel_rapl_msr_driver = {
171 .probe = rapl_msr_probe,
172 .remove = rapl_msr_remove,
173 .id_table = rapl_msr_ids,
174 .driver = {
175 .name = "intel_rapl_msr",
176 },
177};
178
179module_platform_driver(intel_rapl_msr_driver);
180
181MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
182MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
183MODULE_LICENSE("GPL v2");
diff --git a/drivers/thermal/intel/int340x_thermal/Kconfig b/drivers/thermal/intel/int340x_thermal/Kconfig
index 5333e018c88c..797907542e43 100644
--- a/drivers/thermal/intel/int340x_thermal/Kconfig
+++ b/drivers/thermal/intel/int340x_thermal/Kconfig
@@ -40,4 +40,10 @@ config INT3406_THERMAL
40 brightness in order to address a thermal condition or to reduce 40 brightness in order to address a thermal condition or to reduce
41 power consumed by display device. 41 power consumed by display device.
42 42
43config PROC_THERMAL_MMIO_RAPL
44 bool
45 depends on 64BIT
46 depends on POWERCAP
47 select INTEL_RAPL_CORE
48 default y
43endif 49endif
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
index 77dae1e7c3bf..213ab3cc6b80 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
@@ -11,6 +11,8 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/acpi.h> 12#include <linux/acpi.h>
13#include <linux/thermal.h> 13#include <linux/thermal.h>
14#include <linux/cpuhotplug.h>
15#include <linux/intel_rapl.h>
14#include "int340x_thermal_zone.h" 16#include "int340x_thermal_zone.h"
15#include "../intel_soc_dts_iosf.h" 17#include "../intel_soc_dts_iosf.h"
16 18
@@ -37,6 +39,8 @@
37/* GeminiLake thermal reporting device */ 39/* GeminiLake thermal reporting device */
38#define PCI_DEVICE_ID_PROC_GLK_THERMAL 0x318C 40#define PCI_DEVICE_ID_PROC_GLK_THERMAL 0x318C
39 41
42#define DRV_NAME "proc_thermal"
43
40struct power_config { 44struct power_config {
41 u32 index; 45 u32 index;
42 u32 min_uw; 46 u32 min_uw;
@@ -52,6 +56,7 @@ struct proc_thermal_device {
52 struct power_config power_limits[2]; 56 struct power_config power_limits[2];
53 struct int34x_thermal_zone *int340x_zone; 57 struct int34x_thermal_zone *int340x_zone;
54 struct intel_soc_dts_sensors *soc_dts; 58 struct intel_soc_dts_sensors *soc_dts;
59 void __iomem *mmio_base;
55}; 60};
56 61
57enum proc_thermal_emum_mode_type { 62enum proc_thermal_emum_mode_type {
@@ -60,6 +65,12 @@ enum proc_thermal_emum_mode_type {
60 PROC_THERMAL_PLATFORM_DEV 65 PROC_THERMAL_PLATFORM_DEV
61}; 66};
62 67
68struct rapl_mmio_regs {
69 u64 reg_unit;
70 u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
71 int limits[RAPL_DOMAIN_MAX];
72};
73
63/* 74/*
64 * We can have only one type of enumeration, PCI or Platform, 75 * We can have only one type of enumeration, PCI or Platform,
65 * not both. So we don't need instance specific data. 76 * not both. So we don't need instance specific data.
@@ -367,8 +378,151 @@ static irqreturn_t proc_thermal_pci_msi_irq(int irq, void *devid)
367 return IRQ_HANDLED; 378 return IRQ_HANDLED;
368} 379}
369 380
381#ifdef CONFIG_PROC_THERMAL_MMIO_RAPL
382
383#define MCHBAR 0
384
385/* RAPL Support via MMIO interface */
386static struct rapl_if_priv rapl_mmio_priv;
387
388static int rapl_mmio_cpu_online(unsigned int cpu)
389{
390 struct rapl_package *rp;
391
392 /* mmio rapl supports package 0 only for now */
393 if (topology_physical_package_id(cpu))
394 return 0;
395
396 rp = rapl_find_package_domain(cpu, &rapl_mmio_priv);
397 if (!rp) {
398 rp = rapl_add_package(cpu, &rapl_mmio_priv);
399 if (IS_ERR(rp))
400 return PTR_ERR(rp);
401 }
402 cpumask_set_cpu(cpu, &rp->cpumask);
403 return 0;
404}
405
406static int rapl_mmio_cpu_down_prep(unsigned int cpu)
407{
408 struct rapl_package *rp;
409 int lead_cpu;
410
411 rp = rapl_find_package_domain(cpu, &rapl_mmio_priv);
412 if (!rp)
413 return 0;
414
415 cpumask_clear_cpu(cpu, &rp->cpumask);
416 lead_cpu = cpumask_first(&rp->cpumask);
417 if (lead_cpu >= nr_cpu_ids)
418 rapl_remove_package(rp);
419 else if (rp->lead_cpu == cpu)
420 rp->lead_cpu = lead_cpu;
421 return 0;
422}
423
424static int rapl_mmio_read_raw(int cpu, struct reg_action *ra)
425{
426 if (!ra->reg)
427 return -EINVAL;
428
429 ra->value = readq((void __iomem *)ra->reg);
430 ra->value &= ra->mask;
431 return 0;
432}
433
434static int rapl_mmio_write_raw(int cpu, struct reg_action *ra)
435{
436 u64 val;
437
438 if (!ra->reg)
439 return -EINVAL;
440
441 val = readq((void __iomem *)ra->reg);
442 val &= ~ra->mask;
443 val |= ra->value;
444 writeq(val, (void __iomem *)ra->reg);
445 return 0;
446}
447
448static int proc_thermal_rapl_add(struct pci_dev *pdev,
449 struct proc_thermal_device *proc_priv,
450 struct rapl_mmio_regs *rapl_regs)
451{
452 enum rapl_domain_reg_id reg;
453 enum rapl_domain_type domain;
454 int ret;
455
456 if (!rapl_regs)
457 return 0;
458
459 ret = pcim_iomap_regions(pdev, 1 << MCHBAR, DRV_NAME);
460 if (ret) {
461 dev_err(&pdev->dev, "cannot reserve PCI memory region\n");
462 return -ENOMEM;
463 }
464
465 proc_priv->mmio_base = pcim_iomap_table(pdev)[MCHBAR];
466
467 for (domain = RAPL_DOMAIN_PACKAGE; domain < RAPL_DOMAIN_MAX; domain++) {
468 for (reg = RAPL_DOMAIN_REG_LIMIT; reg < RAPL_DOMAIN_REG_MAX; reg++)
469 if (rapl_regs->regs[domain][reg])
470 rapl_mmio_priv.regs[domain][reg] =
471 (u64)proc_priv->mmio_base +
472 rapl_regs->regs[domain][reg];
473 rapl_mmio_priv.limits[domain] = rapl_regs->limits[domain];
474 }
475 rapl_mmio_priv.reg_unit = (u64)proc_priv->mmio_base + rapl_regs->reg_unit;
476
477 rapl_mmio_priv.read_raw = rapl_mmio_read_raw;
478 rapl_mmio_priv.write_raw = rapl_mmio_write_raw;
479
480 rapl_mmio_priv.control_type = powercap_register_control_type(NULL, "intel-rapl-mmio", NULL);
481 if (IS_ERR(rapl_mmio_priv.control_type)) {
482 pr_debug("failed to register powercap control_type.\n");
483 return PTR_ERR(rapl_mmio_priv.control_type);
484 }
485
486 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
487 rapl_mmio_cpu_online, rapl_mmio_cpu_down_prep);
488 if (ret < 0) {
489 powercap_unregister_control_type(rapl_mmio_priv.control_type);
490 return ret;
491 }
492 rapl_mmio_priv.pcap_rapl_online = ret;
493
494 return 0;
495}
496
497static void proc_thermal_rapl_remove(void)
498{
499 cpuhp_remove_state(rapl_mmio_priv.pcap_rapl_online);
500 powercap_unregister_control_type(rapl_mmio_priv.control_type);
501}
502
503static const struct rapl_mmio_regs rapl_mmio_hsw = {
504 .reg_unit = 0x5938,
505 .regs[RAPL_DOMAIN_PACKAGE] = { 0x59a0, 0x593c, 0x58f0, 0, 0x5930},
506 .regs[RAPL_DOMAIN_DRAM] = { 0x58e0, 0x58e8, 0x58ec, 0, 0},
507 .limits[RAPL_DOMAIN_PACKAGE] = 2,
508 .limits[RAPL_DOMAIN_DRAM] = 2,
509};
510
511#else
512
513static int proc_thermal_rapl_add(struct pci_dev *pdev,
514 struct proc_thermal_device *proc_priv,
515 struct rapl_mmio_regs *rapl_regs)
516{
517 return 0;
518}
519static void proc_thermal_rapl_remove(void) {}
520static const struct rapl_mmio_regs rapl_mmio_hsw;
521
522#endif /* CONFIG_MMIO_RAPL */
523
370static int proc_thermal_pci_probe(struct pci_dev *pdev, 524static int proc_thermal_pci_probe(struct pci_dev *pdev,
371 const struct pci_device_id *unused) 525 const struct pci_device_id *id)
372{ 526{
373 struct proc_thermal_device *proc_priv; 527 struct proc_thermal_device *proc_priv;
374 int ret; 528 int ret;
@@ -378,15 +532,21 @@ static int proc_thermal_pci_probe(struct pci_dev *pdev,
378 return -ENODEV; 532 return -ENODEV;
379 } 533 }
380 534
381 ret = pci_enable_device(pdev); 535 ret = pcim_enable_device(pdev);
382 if (ret < 0) { 536 if (ret < 0) {
383 dev_err(&pdev->dev, "error: could not enable device\n"); 537 dev_err(&pdev->dev, "error: could not enable device\n");
384 return ret; 538 return ret;
385 } 539 }
386 540
387 ret = proc_thermal_add(&pdev->dev, &proc_priv); 541 ret = proc_thermal_add(&pdev->dev, &proc_priv);
542 if (ret)
543 return ret;
544
545 ret = proc_thermal_rapl_add(pdev, proc_priv,
546 (struct rapl_mmio_regs *)id->driver_data);
388 if (ret) { 547 if (ret) {
389 pci_disable_device(pdev); 548 dev_err(&pdev->dev, "failed to add RAPL MMIO interface\n");
549 proc_thermal_remove(proc_priv);
390 return ret; 550 return ret;
391 } 551 }
392 552
@@ -439,8 +599,8 @@ static void proc_thermal_pci_remove(struct pci_dev *pdev)
439 pci_disable_msi(pdev); 599 pci_disable_msi(pdev);
440 } 600 }
441 } 601 }
602 proc_thermal_rapl_remove();
442 proc_thermal_remove(proc_priv); 603 proc_thermal_remove(proc_priv);
443 pci_disable_device(pdev);
444} 604}
445 605
446#ifdef CONFIG_PM_SLEEP 606#ifdef CONFIG_PM_SLEEP
@@ -462,7 +622,8 @@ static SIMPLE_DEV_PM_OPS(proc_thermal_pm, NULL, proc_thermal_resume);
462static const struct pci_device_id proc_thermal_pci_ids[] = { 622static const struct pci_device_id proc_thermal_pci_ids[] = {
463 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BDW_THERMAL)}, 623 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BDW_THERMAL)},
464 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_HSB_THERMAL)}, 624 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_HSB_THERMAL)},
465 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_SKL_THERMAL)}, 625 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_SKL_THERMAL),
626 .driver_data = (kernel_ulong_t)&rapl_mmio_hsw, },
466 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BSW_THERMAL)}, 627 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BSW_THERMAL)},
467 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BXT0_THERMAL)}, 628 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BXT0_THERMAL)},
468 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BXT1_THERMAL)}, 629 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PROC_BXT1_THERMAL)},
@@ -477,7 +638,7 @@ static const struct pci_device_id proc_thermal_pci_ids[] = {
477MODULE_DEVICE_TABLE(pci, proc_thermal_pci_ids); 638MODULE_DEVICE_TABLE(pci, proc_thermal_pci_ids);
478 639
479static struct pci_driver proc_thermal_pci_driver = { 640static struct pci_driver proc_thermal_pci_driver = {
480 .name = "proc_thermal", 641 .name = DRV_NAME,
481 .probe = proc_thermal_pci_probe, 642 .probe = proc_thermal_pci_probe,
482 .remove = proc_thermal_pci_remove, 643 .remove = proc_thermal_pci_remove,
483 .id_table = proc_thermal_pci_ids, 644 .id_table = proc_thermal_pci_ids,
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 46b167fba155..536a049d7ecc 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -47,11 +47,6 @@ struct cpufreq_cpuinfo {
47 unsigned int transition_latency; 47 unsigned int transition_latency;
48}; 48};
49 49
50struct cpufreq_user_policy {
51 unsigned int min; /* in kHz */
52 unsigned int max; /* in kHz */
53};
54
55struct cpufreq_policy { 50struct cpufreq_policy {
56 /* CPUs sharing clock, require sw coordination */ 51 /* CPUs sharing clock, require sw coordination */
57 cpumask_var_t cpus; /* Online CPUs only */ 52 cpumask_var_t cpus; /* Online CPUs only */
@@ -81,7 +76,8 @@ struct cpufreq_policy {
81 struct work_struct update; /* if update_policy() needs to be 76 struct work_struct update; /* if update_policy() needs to be
82 * called, but you're in IRQ context */ 77 * called, but you're in IRQ context */
83 78
84 struct cpufreq_user_policy user_policy; 79 struct dev_pm_qos_request *min_freq_req;
80 struct dev_pm_qos_request *max_freq_req;
85 struct cpufreq_frequency_table *freq_table; 81 struct cpufreq_frequency_table *freq_table;
86 enum cpufreq_table_sorting freq_table_sorted; 82 enum cpufreq_table_sorting freq_table_sorted;
87 83
@@ -144,6 +140,9 @@ struct cpufreq_policy {
144 140
145 /* Pointer to the cooling device if used for thermal mitigation */ 141 /* Pointer to the cooling device if used for thermal mitigation */
146 struct thermal_cooling_device *cdev; 142 struct thermal_cooling_device *cdev;
143
144 struct notifier_block nb_min;
145 struct notifier_block nb_max;
147}; 146};
148 147
149struct cpufreq_freqs { 148struct cpufreq_freqs {
@@ -201,6 +200,7 @@ void cpufreq_cpu_release(struct cpufreq_policy *policy);
201int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu); 200int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu);
202int cpufreq_set_policy(struct cpufreq_policy *policy, 201int cpufreq_set_policy(struct cpufreq_policy *policy,
203 struct cpufreq_policy *new_policy); 202 struct cpufreq_policy *new_policy);
203void refresh_frequency_limits(struct cpufreq_policy *policy);
204void cpufreq_update_policy(unsigned int cpu); 204void cpufreq_update_policy(unsigned int cpu);
205void cpufreq_update_limits(unsigned int cpu); 205void cpufreq_update_limits(unsigned int cpu);
206bool have_governor_per_policy(void); 206bool have_governor_per_policy(void);
@@ -992,7 +992,7 @@ extern struct freq_attr *cpufreq_generic_attr[];
992int cpufreq_table_validate_and_sort(struct cpufreq_policy *policy); 992int cpufreq_table_validate_and_sort(struct cpufreq_policy *policy);
993 993
994unsigned int cpufreq_generic_get(unsigned int cpu); 994unsigned int cpufreq_generic_get(unsigned int cpu);
995int cpufreq_generic_init(struct cpufreq_policy *policy, 995void cpufreq_generic_init(struct cpufreq_policy *policy,
996 struct cpufreq_frequency_table *table, 996 struct cpufreq_frequency_table *table,
997 unsigned int transition_latency); 997 unsigned int transition_latency);
998#endif /* _LINUX_CPUFREQ_H */ 998#endif /* _LINUX_CPUFREQ_H */
diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h
new file mode 100644
index 000000000000..efb3ce892c20
--- /dev/null
+++ b/include/linux/intel_rapl.h
@@ -0,0 +1,155 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Data types and headers for RAPL support
4 *
5 * Copyright (C) 2019 Intel Corporation.
6 *
7 * Author: Zhang Rui <rui.zhang@intel.com>
8 */
9
10#ifndef __INTEL_RAPL_H__
11#define __INTEL_RAPL_H__
12
13#include <linux/types.h>
14#include <linux/powercap.h>
15#include <linux/cpuhotplug.h>
16
17enum rapl_domain_type {
18 RAPL_DOMAIN_PACKAGE, /* entire package/socket */
19 RAPL_DOMAIN_PP0, /* core power plane */
20 RAPL_DOMAIN_PP1, /* graphics uncore */
21 RAPL_DOMAIN_DRAM, /* DRAM control_type */
22 RAPL_DOMAIN_PLATFORM, /* PSys control_type */
23 RAPL_DOMAIN_MAX,
24};
25
26enum rapl_domain_reg_id {
27 RAPL_DOMAIN_REG_LIMIT,
28 RAPL_DOMAIN_REG_STATUS,
29 RAPL_DOMAIN_REG_PERF,
30 RAPL_DOMAIN_REG_POLICY,
31 RAPL_DOMAIN_REG_INFO,
32 RAPL_DOMAIN_REG_MAX,
33};
34
35struct rapl_package;
36
37enum rapl_primitives {
38 ENERGY_COUNTER,
39 POWER_LIMIT1,
40 POWER_LIMIT2,
41 FW_LOCK,
42
43 PL1_ENABLE, /* power limit 1, aka long term */
44 PL1_CLAMP, /* allow frequency to go below OS request */
45 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
46 PL2_CLAMP,
47
48 TIME_WINDOW1, /* long term */
49 TIME_WINDOW2, /* short term */
50 THERMAL_SPEC_POWER,
51 MAX_POWER,
52
53 MIN_POWER,
54 MAX_TIME_WINDOW,
55 THROTTLED_TIME,
56 PRIORITY_LEVEL,
57
58 /* below are not raw primitive data */
59 AVERAGE_POWER,
60 NR_RAPL_PRIMITIVES,
61};
62
63struct rapl_domain_data {
64 u64 primitives[NR_RAPL_PRIMITIVES];
65 unsigned long timestamp;
66};
67
68#define NR_POWER_LIMITS (2)
69struct rapl_power_limit {
70 struct powercap_zone_constraint *constraint;
71 int prim_id; /* primitive ID used to enable */
72 struct rapl_domain *domain;
73 const char *name;
74 u64 last_power_limit;
75};
76
77struct rapl_package;
78
79struct rapl_domain {
80 const char *name;
81 enum rapl_domain_type id;
82 u64 regs[RAPL_DOMAIN_REG_MAX];
83 struct powercap_zone power_zone;
84 struct rapl_domain_data rdd;
85 struct rapl_power_limit rpl[NR_POWER_LIMITS];
86 u64 attr_map; /* track capabilities */
87 unsigned int state;
88 unsigned int domain_energy_unit;
89 struct rapl_package *rp;
90};
91
92struct reg_action {
93 u64 reg;
94 u64 mask;
95 u64 value;
96 int err;
97};
98
99/**
100 * struct rapl_if_priv: private data for different RAPL interfaces
101 * @control_type: Each RAPL interface must have its own powercap
102 * control type.
103 * @platform_rapl_domain: Optional. Some RAPL interface may have platform
104 * level RAPL control.
105 * @pcap_rapl_online: CPU hotplug state for each RAPL interface.
106 * @reg_unit: Register for getting energy/power/time unit.
107 * @regs: Register sets for different RAPL Domains.
108 * @limits: Number of power limits supported by each domain.
109 * @read_raw: Callback for reading RAPL interface specific
110 * registers.
111 * @write_raw: Callback for writing RAPL interface specific
112 * registers.
113 */
114struct rapl_if_priv {
115 struct powercap_control_type *control_type;
116 struct rapl_domain *platform_rapl_domain;
117 enum cpuhp_state pcap_rapl_online;
118 u64 reg_unit;
119 u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
120 int limits[RAPL_DOMAIN_MAX];
121 int (*read_raw)(int cpu, struct reg_action *ra);
122 int (*write_raw)(int cpu, struct reg_action *ra);
123};
124
125/* maximum rapl package domain name: package-%d-die-%d */
126#define PACKAGE_DOMAIN_NAME_LENGTH 30
127
128struct rapl_package {
129 unsigned int id; /* logical die id, equals physical 1-die systems */
130 unsigned int nr_domains;
131 unsigned long domain_map; /* bit map of active domains */
132 unsigned int power_unit;
133 unsigned int energy_unit;
134 unsigned int time_unit;
135 struct rapl_domain *domains; /* array of domains, sized at runtime */
136 struct powercap_zone *power_zone; /* keep track of parent zone */
137 unsigned long power_limit_irq; /* keep track of package power limit
138 * notify interrupt enable status.
139 */
140 struct list_head plist;
141 int lead_cpu; /* one active cpu per package for access */
142 /* Track active cpus */
143 struct cpumask cpumask;
144 char name[PACKAGE_DOMAIN_NAME_LENGTH];
145 struct rapl_if_priv *priv;
146};
147
148struct rapl_package *rapl_find_package_domain(int cpu, struct rapl_if_priv *priv);
149struct rapl_package *rapl_add_package(int cpu, struct rapl_if_priv *priv);
150void rapl_remove_package(struct rapl_package *rp);
151
152int rapl_add_platform_domain(struct rapl_if_priv *priv);
153void rapl_remove_platform_domain(struct rapl_if_priv *priv);
154
155#endif /* __INTEL_RAPL_H__ */
diff --git a/include/linux/pm_qos.h b/include/linux/pm_qos.h
index 6ea1ae373d77..2aebbc5b9950 100644
--- a/include/linux/pm_qos.h
+++ b/include/linux/pm_qos.h
@@ -40,6 +40,8 @@ enum pm_qos_flags_status {
40#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT PM_QOS_LATENCY_ANY 40#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT PM_QOS_LATENCY_ANY
41#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS PM_QOS_LATENCY_ANY_NS 41#define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS PM_QOS_LATENCY_ANY_NS
42#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0 42#define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0
43#define PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE 0
44#define PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE (-1)
43#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1) 45#define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1)
44 46
45#define PM_QOS_FLAG_NO_POWER_OFF (1 << 0) 47#define PM_QOS_FLAG_NO_POWER_OFF (1 << 0)
@@ -58,6 +60,8 @@ struct pm_qos_flags_request {
58enum dev_pm_qos_req_type { 60enum dev_pm_qos_req_type {
59 DEV_PM_QOS_RESUME_LATENCY = 1, 61 DEV_PM_QOS_RESUME_LATENCY = 1,
60 DEV_PM_QOS_LATENCY_TOLERANCE, 62 DEV_PM_QOS_LATENCY_TOLERANCE,
63 DEV_PM_QOS_MIN_FREQUENCY,
64 DEV_PM_QOS_MAX_FREQUENCY,
61 DEV_PM_QOS_FLAGS, 65 DEV_PM_QOS_FLAGS,
62}; 66};
63 67
@@ -99,10 +103,14 @@ struct pm_qos_flags {
99struct dev_pm_qos { 103struct dev_pm_qos {
100 struct pm_qos_constraints resume_latency; 104 struct pm_qos_constraints resume_latency;
101 struct pm_qos_constraints latency_tolerance; 105 struct pm_qos_constraints latency_tolerance;
106 struct pm_qos_constraints min_frequency;
107 struct pm_qos_constraints max_frequency;
102 struct pm_qos_flags flags; 108 struct pm_qos_flags flags;
103 struct dev_pm_qos_request *resume_latency_req; 109 struct dev_pm_qos_request *resume_latency_req;
104 struct dev_pm_qos_request *latency_tolerance_req; 110 struct dev_pm_qos_request *latency_tolerance_req;
105 struct dev_pm_qos_request *flags_req; 111 struct dev_pm_qos_request *flags_req;
112 struct dev_pm_qos_request *min_frequency_req;
113 struct dev_pm_qos_request *max_frequency_req;
106}; 114};
107 115
108/* Action requested to pm_qos_update_target */ 116/* Action requested to pm_qos_update_target */
@@ -139,16 +147,18 @@ s32 pm_qos_read_value(struct pm_qos_constraints *c);
139#ifdef CONFIG_PM 147#ifdef CONFIG_PM
140enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask); 148enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask);
141enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask); 149enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask);
142s32 __dev_pm_qos_read_value(struct device *dev); 150s32 __dev_pm_qos_resume_latency(struct device *dev);
143s32 dev_pm_qos_read_value(struct device *dev); 151s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type);
144int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req, 152int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req,
145 enum dev_pm_qos_req_type type, s32 value); 153 enum dev_pm_qos_req_type type, s32 value);
146int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value); 154int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value);
147int dev_pm_qos_remove_request(struct dev_pm_qos_request *req); 155int dev_pm_qos_remove_request(struct dev_pm_qos_request *req);
148int dev_pm_qos_add_notifier(struct device *dev, 156int dev_pm_qos_add_notifier(struct device *dev,
149 struct notifier_block *notifier); 157 struct notifier_block *notifier,
158 enum dev_pm_qos_req_type type);
150int dev_pm_qos_remove_notifier(struct device *dev, 159int dev_pm_qos_remove_notifier(struct device *dev,
151 struct notifier_block *notifier); 160 struct notifier_block *notifier,
161 enum dev_pm_qos_req_type type);
152void dev_pm_qos_constraints_init(struct device *dev); 162void dev_pm_qos_constraints_init(struct device *dev);
153void dev_pm_qos_constraints_destroy(struct device *dev); 163void dev_pm_qos_constraints_destroy(struct device *dev);
154int dev_pm_qos_add_ancestor_request(struct device *dev, 164int dev_pm_qos_add_ancestor_request(struct device *dev,
@@ -174,7 +184,7 @@ static inline s32 dev_pm_qos_requested_flags(struct device *dev)
174 return dev->power.qos->flags_req->data.flr.flags; 184 return dev->power.qos->flags_req->data.flr.flags;
175} 185}
176 186
177static inline s32 dev_pm_qos_raw_read_value(struct device *dev) 187static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
178{ 188{
179 return IS_ERR_OR_NULL(dev->power.qos) ? 189 return IS_ERR_OR_NULL(dev->power.qos) ?
180 PM_QOS_RESUME_LATENCY_NO_CONSTRAINT : 190 PM_QOS_RESUME_LATENCY_NO_CONSTRAINT :
@@ -187,10 +197,24 @@ static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev,
187static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, 197static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev,
188 s32 mask) 198 s32 mask)
189 { return PM_QOS_FLAGS_UNDEFINED; } 199 { return PM_QOS_FLAGS_UNDEFINED; }
190static inline s32 __dev_pm_qos_read_value(struct device *dev) 200static inline s32 __dev_pm_qos_resume_latency(struct device *dev)
191 { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
192static inline s32 dev_pm_qos_read_value(struct device *dev)
193 { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; } 201 { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; }
202static inline s32 dev_pm_qos_read_value(struct device *dev,
203 enum dev_pm_qos_req_type type)
204{
205 switch (type) {
206 case DEV_PM_QOS_RESUME_LATENCY:
207 return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
208 case DEV_PM_QOS_MIN_FREQUENCY:
209 return PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
210 case DEV_PM_QOS_MAX_FREQUENCY:
211 return PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
212 default:
213 WARN_ON(1);
214 return 0;
215 }
216}
217
194static inline int dev_pm_qos_add_request(struct device *dev, 218static inline int dev_pm_qos_add_request(struct device *dev,
195 struct dev_pm_qos_request *req, 219 struct dev_pm_qos_request *req,
196 enum dev_pm_qos_req_type type, 220 enum dev_pm_qos_req_type type,
@@ -202,10 +226,12 @@ static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req,
202static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req) 226static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req)
203 { return 0; } 227 { return 0; }
204static inline int dev_pm_qos_add_notifier(struct device *dev, 228static inline int dev_pm_qos_add_notifier(struct device *dev,
205 struct notifier_block *notifier) 229 struct notifier_block *notifier,
230 enum dev_pm_qos_req_type type)
206 { return 0; } 231 { return 0; }
207static inline int dev_pm_qos_remove_notifier(struct device *dev, 232static inline int dev_pm_qos_remove_notifier(struct device *dev,
208 struct notifier_block *notifier) 233 struct notifier_block *notifier,
234 enum dev_pm_qos_req_type type)
209 { return 0; } 235 { return 0; }
210static inline void dev_pm_qos_constraints_init(struct device *dev) 236static inline void dev_pm_qos_constraints_init(struct device *dev)
211{ 237{
@@ -241,7 +267,7 @@ static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev)
241 return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; 267 return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
242} 268}
243static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; } 269static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; }
244static inline s32 dev_pm_qos_raw_read_value(struct device *dev) 270static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev)
245{ 271{
246 return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; 272 return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
247} 273}