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authorMark Brown <broonie@kernel.org>2019-02-20 12:58:18 -0500
committerMark Brown <broonie@kernel.org>2019-02-20 12:58:18 -0500
commitbf9f742c38c4604a8ee349f7baefca58b3a5ff67 (patch)
treefa4d349e4a843bf5543f6e7ab6e73dce1eda10e9
parent484a9a68d669f899657a97dbb369cb3e3be7e7f5 (diff)
parentef070b4e4aa25bb5f8632ad196644026c11903bf (diff)
Merge branch 'for-5.0' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.1
-rw-r--r--drivers/spi/spi-dw.c36
-rw-r--r--drivers/spi/spi-fsl-dspi.c2
-rw-r--r--drivers/spi/spi-fsl-lpspi.c92
-rw-r--r--drivers/spi/spi-mem.c3
-rw-r--r--drivers/spi/spi-npcm-pspi.c3
-rw-r--r--drivers/spi/spi-omap2-mcspi.c4
-rw-r--r--drivers/spi/spi-pxa2xx.c1
-rw-r--r--drivers/spi/spi-sprd.c10
-rw-r--r--drivers/spi/spi-ti-qspi.c6
-rw-r--r--drivers/spi/spi-topcliff-pch.c6
10 files changed, 89 insertions, 74 deletions
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 8abb94248d97..ac81025f86ab 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -53,41 +53,41 @@ static ssize_t dw_spi_show_regs(struct file *file, char __user *user_buf,
53 if (!buf) 53 if (!buf)
54 return 0; 54 return 0;
55 55
56 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 56 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
57 "%s registers:\n", dev_name(&dws->master->dev)); 57 "%s registers:\n", dev_name(&dws->master->dev));
58 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 58 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
59 "=================================\n"); 59 "=================================\n");
60 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 60 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
61 "CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0)); 61 "CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0));
62 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 62 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
63 "CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1)); 63 "CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1));
64 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 64 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
65 "SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR)); 65 "SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR));
66 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 66 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
67 "SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER)); 67 "SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER));
68 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 68 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
69 "BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR)); 69 "BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR));
70 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 70 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
71 "TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR)); 71 "TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR));
72 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 72 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
73 "RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR)); 73 "RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR));
74 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 74 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
75 "TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR)); 75 "TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR));
76 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 76 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
77 "RXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_RXFLR)); 77 "RXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_RXFLR));
78 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 78 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
79 "SR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SR)); 79 "SR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SR));
80 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 80 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
81 "IMR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_IMR)); 81 "IMR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_IMR));
82 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 82 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
83 "ISR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_ISR)); 83 "ISR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_ISR));
84 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 84 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
85 "DMACR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_DMACR)); 85 "DMACR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_DMACR));
86 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 86 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
87 "DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR)); 87 "DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR));
88 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 88 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
89 "DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR)); 89 "DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR));
90 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, 90 len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
91 "=================================\n"); 91 "=================================\n");
92 92
93 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); 93 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 348682be9dd5..53335ccc98f6 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -67,7 +67,7 @@
67#define SPI_SR 0x2c 67#define SPI_SR 0x2c
68#define SPI_SR_EOQF 0x10000000 68#define SPI_SR_EOQF 0x10000000
69#define SPI_SR_TCFQF 0x80000000 69#define SPI_SR_TCFQF 0x80000000
70#define SPI_SR_CLEAR 0xdaad0000 70#define SPI_SR_CLEAR 0x9aaf0000
71 71
72#define SPI_RSER_TFFFE BIT(25) 72#define SPI_RSER_TFFFE BIT(25)
73#define SPI_RSER_TFFFD BIT(24) 73#define SPI_RSER_TFFFD BIT(24)
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index 08dcc3c22e88..391863914043 100644
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -48,10 +48,13 @@
48#define CR_RTF BIT(8) 48#define CR_RTF BIT(8)
49#define CR_RST BIT(1) 49#define CR_RST BIT(1)
50#define CR_MEN BIT(0) 50#define CR_MEN BIT(0)
51#define SR_MBF BIT(24)
51#define SR_TCF BIT(10) 52#define SR_TCF BIT(10)
53#define SR_FCF BIT(9)
52#define SR_RDF BIT(1) 54#define SR_RDF BIT(1)
53#define SR_TDF BIT(0) 55#define SR_TDF BIT(0)
54#define IER_TCIE BIT(10) 56#define IER_TCIE BIT(10)
57#define IER_FCIE BIT(9)
55#define IER_RDIE BIT(1) 58#define IER_RDIE BIT(1)
56#define IER_TDIE BIT(0) 59#define IER_TDIE BIT(0)
57#define CFGR1_PCSCFG BIT(27) 60#define CFGR1_PCSCFG BIT(27)
@@ -59,6 +62,7 @@
59#define CFGR1_PCSPOL BIT(8) 62#define CFGR1_PCSPOL BIT(8)
60#define CFGR1_NOSTALL BIT(3) 63#define CFGR1_NOSTALL BIT(3)
61#define CFGR1_MASTER BIT(0) 64#define CFGR1_MASTER BIT(0)
65#define FSR_RXCOUNT (BIT(16)|BIT(17)|BIT(18))
62#define RSR_RXEMPTY BIT(1) 66#define RSR_RXEMPTY BIT(1)
63#define TCR_CPOL BIT(31) 67#define TCR_CPOL BIT(31)
64#define TCR_CPHA BIT(30) 68#define TCR_CPHA BIT(30)
@@ -161,28 +165,10 @@ static int lpspi_unprepare_xfer_hardware(struct spi_controller *controller)
161 return 0; 165 return 0;
162} 166}
163 167
164static int fsl_lpspi_txfifo_empty(struct fsl_lpspi_data *fsl_lpspi)
165{
166 u32 txcnt;
167 unsigned long orig_jiffies = jiffies;
168
169 do {
170 txcnt = readl(fsl_lpspi->base + IMX7ULP_FSR) & 0xff;
171
172 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
173 dev_dbg(fsl_lpspi->dev, "txfifo empty timeout\n");
174 return -ETIMEDOUT;
175 }
176 cond_resched();
177
178 } while (txcnt);
179
180 return 0;
181}
182
183static void fsl_lpspi_write_tx_fifo(struct fsl_lpspi_data *fsl_lpspi) 168static void fsl_lpspi_write_tx_fifo(struct fsl_lpspi_data *fsl_lpspi)
184{ 169{
185 u8 txfifo_cnt; 170 u8 txfifo_cnt;
171 u32 temp;
186 172
187 txfifo_cnt = readl(fsl_lpspi->base + IMX7ULP_FSR) & 0xff; 173 txfifo_cnt = readl(fsl_lpspi->base + IMX7ULP_FSR) & 0xff;
188 174
@@ -193,9 +179,15 @@ static void fsl_lpspi_write_tx_fifo(struct fsl_lpspi_data *fsl_lpspi)
193 txfifo_cnt++; 179 txfifo_cnt++;
194 } 180 }
195 181
196 if (!fsl_lpspi->remain && (txfifo_cnt < fsl_lpspi->txfifosize)) 182 if (txfifo_cnt < fsl_lpspi->txfifosize) {
197 writel(0, fsl_lpspi->base + IMX7ULP_TDR); 183 if (!fsl_lpspi->is_slave) {
198 else 184 temp = readl(fsl_lpspi->base + IMX7ULP_TCR);
185 temp &= ~TCR_CONTC;
186 writel(temp, fsl_lpspi->base + IMX7ULP_TCR);
187 }
188
189 fsl_lpspi_intctrl(fsl_lpspi, IER_FCIE);
190 } else
199 fsl_lpspi_intctrl(fsl_lpspi, IER_TDIE); 191 fsl_lpspi_intctrl(fsl_lpspi, IER_TDIE);
200} 192}
201 193
@@ -276,10 +268,6 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi)
276 u32 temp; 268 u32 temp;
277 int ret; 269 int ret;
278 270
279 temp = CR_RST;
280 writel(temp, fsl_lpspi->base + IMX7ULP_CR);
281 writel(0, fsl_lpspi->base + IMX7ULP_CR);
282
283 if (!fsl_lpspi->is_slave) { 271 if (!fsl_lpspi->is_slave) {
284 ret = fsl_lpspi_set_bitrate(fsl_lpspi); 272 ret = fsl_lpspi_set_bitrate(fsl_lpspi);
285 if (ret) 273 if (ret)
@@ -370,6 +358,24 @@ static int fsl_lpspi_wait_for_completion(struct spi_controller *controller)
370 return 0; 358 return 0;
371} 359}
372 360
361static int fsl_lpspi_reset(struct fsl_lpspi_data *fsl_lpspi)
362{
363 u32 temp;
364
365 /* Disable all interrupt */
366 fsl_lpspi_intctrl(fsl_lpspi, 0);
367
368 /* W1C for all flags in SR */
369 temp = 0x3F << 8;
370 writel(temp, fsl_lpspi->base + IMX7ULP_SR);
371
372 /* Clear FIFO and disable module */
373 temp = CR_RRF | CR_RTF;
374 writel(temp, fsl_lpspi->base + IMX7ULP_CR);
375
376 return 0;
377}
378
373static int fsl_lpspi_transfer_one(struct spi_controller *controller, 379static int fsl_lpspi_transfer_one(struct spi_controller *controller,
374 struct spi_device *spi, 380 struct spi_device *spi,
375 struct spi_transfer *t) 381 struct spi_transfer *t)
@@ -391,11 +397,7 @@ static int fsl_lpspi_transfer_one(struct spi_controller *controller,
391 if (ret) 397 if (ret)
392 return ret; 398 return ret;
393 399
394 ret = fsl_lpspi_txfifo_empty(fsl_lpspi); 400 fsl_lpspi_reset(fsl_lpspi);
395 if (ret)
396 return ret;
397
398 fsl_lpspi_read_rx_fifo(fsl_lpspi);
399 401
400 return 0; 402 return 0;
401} 403}
@@ -408,7 +410,6 @@ static int fsl_lpspi_transfer_one_msg(struct spi_controller *controller,
408 struct spi_device *spi = msg->spi; 410 struct spi_device *spi = msg->spi;
409 struct spi_transfer *xfer; 411 struct spi_transfer *xfer;
410 bool is_first_xfer = true; 412 bool is_first_xfer = true;
411 u32 temp;
412 int ret = 0; 413 int ret = 0;
413 414
414 msg->status = 0; 415 msg->status = 0;
@@ -428,13 +429,6 @@ static int fsl_lpspi_transfer_one_msg(struct spi_controller *controller,
428 } 429 }
429 430
430complete: 431complete:
431 if (!fsl_lpspi->is_slave) {
432 /* de-assert SS, then finalize current message */
433 temp = readl(fsl_lpspi->base + IMX7ULP_TCR);
434 temp &= ~TCR_CONTC;
435 writel(temp, fsl_lpspi->base + IMX7ULP_TCR);
436 }
437
438 msg->status = ret; 432 msg->status = ret;
439 spi_finalize_current_message(controller); 433 spi_finalize_current_message(controller);
440 434
@@ -443,20 +437,30 @@ complete:
443 437
444static irqreturn_t fsl_lpspi_isr(int irq, void *dev_id) 438static irqreturn_t fsl_lpspi_isr(int irq, void *dev_id)
445{ 439{
440 u32 temp_SR, temp_IER;
446 struct fsl_lpspi_data *fsl_lpspi = dev_id; 441 struct fsl_lpspi_data *fsl_lpspi = dev_id;
447 u32 temp;
448 442
443 temp_IER = readl(fsl_lpspi->base + IMX7ULP_IER);
449 fsl_lpspi_intctrl(fsl_lpspi, 0); 444 fsl_lpspi_intctrl(fsl_lpspi, 0);
450 temp = readl(fsl_lpspi->base + IMX7ULP_SR); 445 temp_SR = readl(fsl_lpspi->base + IMX7ULP_SR);
451 446
452 fsl_lpspi_read_rx_fifo(fsl_lpspi); 447 fsl_lpspi_read_rx_fifo(fsl_lpspi);
453 448
454 if (temp & SR_TDF) { 449 if ((temp_SR & SR_TDF) && (temp_IER & IER_TDIE)) {
455 fsl_lpspi_write_tx_fifo(fsl_lpspi); 450 fsl_lpspi_write_tx_fifo(fsl_lpspi);
451 return IRQ_HANDLED;
452 }
456 453
457 if (!fsl_lpspi->remain) 454 if (temp_SR & SR_MBF ||
458 complete(&fsl_lpspi->xfer_done); 455 readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_RXCOUNT) {
456 writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);
457 fsl_lpspi_intctrl(fsl_lpspi, IER_FCIE);
458 return IRQ_HANDLED;
459 }
459 460
461 if (temp_SR & SR_FCF && (temp_IER & IER_FCIE)) {
462 writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);
463 complete(&fsl_lpspi->xfer_done);
460 return IRQ_HANDLED; 464 return IRQ_HANDLED;
461 } 465 }
462 466
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 08e326a124cc..a4d8d19ecff9 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -537,7 +537,6 @@ EXPORT_SYMBOL_GPL(spi_mem_dirmap_create);
537/** 537/**
538 * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor 538 * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor
539 * @desc: the direct mapping descriptor to destroy 539 * @desc: the direct mapping descriptor to destroy
540 * @info: direct mapping information
541 * 540 *
542 * This function destroys a direct mapping descriptor previously created by 541 * This function destroys a direct mapping descriptor previously created by
543 * spi_mem_dirmap_create(). 542 * spi_mem_dirmap_create().
@@ -548,6 +547,8 @@ void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc)
548 547
549 if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy) 548 if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy)
550 ctlr->mem_ops->dirmap_destroy(desc); 549 ctlr->mem_ops->dirmap_destroy(desc);
550
551 kfree(desc);
551} 552}
552EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy); 553EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy);
553 554
diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c
index e1dca79b9090..734a2b956959 100644
--- a/drivers/spi/spi-npcm-pspi.c
+++ b/drivers/spi/spi-npcm-pspi.c
@@ -465,7 +465,8 @@ out_master_put:
465 465
466static int npcm_pspi_remove(struct platform_device *pdev) 466static int npcm_pspi_remove(struct platform_device *pdev)
467{ 467{
468 struct npcm_pspi *priv = platform_get_drvdata(pdev); 468 struct spi_master *master = platform_get_drvdata(pdev);
469 struct npcm_pspi *priv = spi_master_get_devdata(master);
469 470
470 npcm_pspi_reset_hw(priv); 471 npcm_pspi_reset_hw(priv);
471 clk_disable_unprepare(priv->clk); 472 clk_disable_unprepare(priv->clk);
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 2fd8881fcd65..8be304379628 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -623,8 +623,8 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
623 cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0; 623 cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
624 cfg.src_addr_width = width; 624 cfg.src_addr_width = width;
625 cfg.dst_addr_width = width; 625 cfg.dst_addr_width = width;
626 cfg.src_maxburst = es; 626 cfg.src_maxburst = 1;
627 cfg.dst_maxburst = es; 627 cfg.dst_maxburst = 1;
628 628
629 rx = xfer->rx_buf; 629 rx = xfer->rx_buf;
630 tx = xfer->tx_buf; 630 tx = xfer->tx_buf;
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 69e874a2ad1e..b6ddba833d02 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1696,6 +1696,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
1696 platform_info->enable_dma = false; 1696 platform_info->enable_dma = false;
1697 } else { 1697 } else {
1698 controller->can_dma = pxa2xx_spi_can_dma; 1698 controller->can_dma = pxa2xx_spi_can_dma;
1699 controller->max_dma_len = MAX_DMA_LEN;
1699 } 1700 }
1700 } 1701 }
1701 1702
diff --git a/drivers/spi/spi-sprd.c b/drivers/spi/spi-sprd.c
index f6c8838f7dc3..1b7eebb72c07 100644
--- a/drivers/spi/spi-sprd.c
+++ b/drivers/spi/spi-sprd.c
@@ -403,7 +403,7 @@ static int sprd_spi_txrx_bufs(struct spi_device *sdev, struct spi_transfer *t)
403{ 403{
404 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); 404 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller);
405 u32 trans_len = ss->trans_len, len; 405 u32 trans_len = ss->trans_len, len;
406 int ret, write_size = 0; 406 int ret, write_size = 0, read_size = 0;
407 407
408 while (trans_len) { 408 while (trans_len) {
409 len = trans_len > SPRD_SPI_FIFO_SIZE ? SPRD_SPI_FIFO_SIZE : 409 len = trans_len > SPRD_SPI_FIFO_SIZE ? SPRD_SPI_FIFO_SIZE :
@@ -439,13 +439,15 @@ static int sprd_spi_txrx_bufs(struct spi_device *sdev, struct spi_transfer *t)
439 goto complete; 439 goto complete;
440 440
441 if (ss->trans_mode & SPRD_SPI_RX_MODE) 441 if (ss->trans_mode & SPRD_SPI_RX_MODE)
442 ss->read_bufs(ss, len); 442 read_size += ss->read_bufs(ss, len);
443 443
444 trans_len -= len; 444 trans_len -= len;
445 } 445 }
446 446
447 ret = write_size; 447 if (ss->trans_mode & SPRD_SPI_TX_MODE)
448 448 ret = write_size;
449 else
450 ret = read_size;
449complete: 451complete:
450 sprd_spi_enter_idle(ss); 452 sprd_spi_enter_idle(ss);
451 453
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 5f19016bbf10..b9fb6493cd6b 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -490,8 +490,8 @@ static void ti_qspi_enable_memory_map(struct spi_device *spi)
490 ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG); 490 ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG);
491 if (qspi->ctrl_base) { 491 if (qspi->ctrl_base) {
492 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, 492 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg,
493 MEM_CS_EN(spi->chip_select), 493 MEM_CS_MASK,
494 MEM_CS_MASK); 494 MEM_CS_EN(spi->chip_select));
495 } 495 }
496 qspi->mmap_enabled = true; 496 qspi->mmap_enabled = true;
497} 497}
@@ -503,7 +503,7 @@ static void ti_qspi_disable_memory_map(struct spi_device *spi)
503 ti_qspi_write(qspi, 0, QSPI_SPI_SWITCH_REG); 503 ti_qspi_write(qspi, 0, QSPI_SPI_SWITCH_REG);
504 if (qspi->ctrl_base) 504 if (qspi->ctrl_base)
505 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, 505 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg,
506 0, MEM_CS_MASK); 506 MEM_CS_MASK, 0);
507 qspi->mmap_enabled = false; 507 qspi->mmap_enabled = false;
508} 508}
509 509
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index 97d137591b18..e7e8ea1edcce 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -1008,6 +1008,9 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw)
1008 1008
1009 /* RX */ 1009 /* RX */
1010 dma->sg_rx_p = kcalloc(num, sizeof(*dma->sg_rx_p), GFP_ATOMIC); 1010 dma->sg_rx_p = kcalloc(num, sizeof(*dma->sg_rx_p), GFP_ATOMIC);
1011 if (!dma->sg_rx_p)
1012 return;
1013
1011 sg_init_table(dma->sg_rx_p, num); /* Initialize SG table */ 1014 sg_init_table(dma->sg_rx_p, num); /* Initialize SG table */
1012 /* offset, length setting */ 1015 /* offset, length setting */
1013 sg = dma->sg_rx_p; 1016 sg = dma->sg_rx_p;
@@ -1068,6 +1071,9 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw)
1068 } 1071 }
1069 1072
1070 dma->sg_tx_p = kcalloc(num, sizeof(*dma->sg_tx_p), GFP_ATOMIC); 1073 dma->sg_tx_p = kcalloc(num, sizeof(*dma->sg_tx_p), GFP_ATOMIC);
1074 if (!dma->sg_tx_p)
1075 return;
1076
1071 sg_init_table(dma->sg_tx_p, num); /* Initialize SG table */ 1077 sg_init_table(dma->sg_tx_p, num); /* Initialize SG table */
1072 /* offset, length setting */ 1078 /* offset, length setting */
1073 sg = dma->sg_tx_p; 1079 sg = dma->sg_tx_p;