diff options
author | Fenghua Yu <fenghua.yu@intel.com> | 2019-06-19 12:51:09 -0400 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2019-06-20 06:38:44 -0400 |
commit | acec0ce081de0c36459eea91647faf99296445a3 (patch) | |
tree | 5a88cd98f2f585a1c55e6c047e443ec91d353774 | |
parent | 45fc56e629caa451467e7664fbd4c797c434a6c4 (diff) |
x86/cpufeatures: Combine word 11 and 12 into a new scattered features word
It's a waste for the four X86_FEATURE_CQM_* feature bits to occupy two
whole feature bits words. To better utilize feature words, re-define
word 11 to host scattered features and move the four X86_FEATURE_CQM_*
features into Linux defined word 11. More scattered features can be
added in word 11 in the future.
Rename leaf 11 in cpuid_leafs to CPUID_LNX_4 to reflect it's a
Linux-defined leaf.
Rename leaf 12 as CPUID_DUMMY which will be replaced by a meaningful
name in the next patch when CPUID.7.1:EAX occupies world 12.
Maximum number of RMID and cache occupancy scale are retrieved from
CPUID.0xf.1 after scattered CQM features are enumerated. Carve out the
code into a separate function.
KVM doesn't support resctrl now. So it's safe to move the
X86_FEATURE_CQM_* features to scattered features word 11 for KVM.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aaron Lewis <aaronlewis@google.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Babu Moger <babu.moger@amd.com>
Cc: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: "Sean J Christopherson" <sean.j.christopherson@intel.com>
Cc: Frederic Weisbecker <frederic@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jann Horn <jannh@google.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: kvm ML <kvm@vger.kernel.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Nadav Amit <namit@vmware.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Pavel Tatashin <pasha.tatashin@oracle.com>
Cc: Peter Feiner <pfeiner@google.com>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Ravi V Shankar <ravi.v.shankar@intel.com>
Cc: Sherry Hurwitz <sherry.hurwitz@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Lendacky <Thomas.Lendacky@amd.com>
Cc: x86 <x86@kernel.org>
Link: https://lkml.kernel.org/r/1560794416-217638-2-git-send-email-fenghua.yu@intel.com
-rw-r--r-- | arch/x86/include/asm/cpufeature.h | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/cpufeatures.h | 17 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 38 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/cpuid-deps.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/scattered.c | 4 | ||||
-rw-r--r-- | arch/x86/kvm/cpuid.h | 2 |
6 files changed, 34 insertions, 34 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 1d337c51f7e6..403f70c2e431 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
@@ -22,8 +22,8 @@ enum cpuid_leafs | |||
22 | CPUID_LNX_3, | 22 | CPUID_LNX_3, |
23 | CPUID_7_0_EBX, | 23 | CPUID_7_0_EBX, |
24 | CPUID_D_1_EAX, | 24 | CPUID_D_1_EAX, |
25 | CPUID_F_0_EDX, | 25 | CPUID_LNX_4, |
26 | CPUID_F_1_EDX, | 26 | CPUID_DUMMY, |
27 | CPUID_8000_0008_EBX, | 27 | CPUID_8000_0008_EBX, |
28 | CPUID_6_EAX, | 28 | CPUID_6_EAX, |
29 | CPUID_8000_000A_EDX, | 29 | CPUID_8000_000A_EDX, |
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 1017b9c7dfe0..be858b86023a 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h | |||
@@ -271,13 +271,16 @@ | |||
271 | #define X86_FEATURE_XGETBV1 (10*32+ 2) /* XGETBV with ECX = 1 instruction */ | 271 | #define X86_FEATURE_XGETBV1 (10*32+ 2) /* XGETBV with ECX = 1 instruction */ |
272 | #define X86_FEATURE_XSAVES (10*32+ 3) /* XSAVES/XRSTORS instructions */ | 272 | #define X86_FEATURE_XSAVES (10*32+ 3) /* XSAVES/XRSTORS instructions */ |
273 | 273 | ||
274 | /* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:0 (EDX), word 11 */ | 274 | /* |
275 | #define X86_FEATURE_CQM_LLC (11*32+ 1) /* LLC QoS if 1 */ | 275 | * Extended auxiliary flags: Linux defined - for features scattered in various |
276 | 276 | * CPUID levels like 0xf, etc. | |
277 | /* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (EDX), word 12 */ | 277 | * |
278 | #define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring */ | 278 | * Reuse free bits when adding new feature flags! |
279 | #define X86_FEATURE_CQM_MBM_TOTAL (12*32+ 1) /* LLC Total MBM monitoring */ | 279 | */ |
280 | #define X86_FEATURE_CQM_MBM_LOCAL (12*32+ 2) /* LLC Local MBM monitoring */ | 280 | #define X86_FEATURE_CQM_LLC (11*32+ 0) /* LLC QoS if 1 */ |
281 | #define X86_FEATURE_CQM_OCCUP_LLC (11*32+ 1) /* LLC occupancy monitoring */ | ||
282 | #define X86_FEATURE_CQM_MBM_TOTAL (11*32+ 2) /* LLC Total MBM monitoring */ | ||
283 | #define X86_FEATURE_CQM_MBM_LOCAL (11*32+ 3) /* LLC Local MBM monitoring */ | ||
281 | 284 | ||
282 | /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ | 285 | /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ |
283 | #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ | 286 | #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index fe6ed9696467..efb114298cfb 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -803,33 +803,25 @@ static void init_speculation_control(struct cpuinfo_x86 *c) | |||
803 | 803 | ||
804 | static void init_cqm(struct cpuinfo_x86 *c) | 804 | static void init_cqm(struct cpuinfo_x86 *c) |
805 | { | 805 | { |
806 | u32 eax, ebx, ecx, edx; | 806 | if (!cpu_has(c, X86_FEATURE_CQM_LLC)) { |
807 | 807 | c->x86_cache_max_rmid = -1; | |
808 | /* Additional Intel-defined flags: level 0x0000000F */ | 808 | c->x86_cache_occ_scale = -1; |
809 | if (c->cpuid_level >= 0x0000000F) { | 809 | return; |
810 | } | ||
810 | 811 | ||
811 | /* QoS sub-leaf, EAX=0Fh, ECX=0 */ | 812 | /* will be overridden if occupancy monitoring exists */ |
812 | cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx); | 813 | c->x86_cache_max_rmid = cpuid_ebx(0xf); |
813 | c->x86_capability[CPUID_F_0_EDX] = edx; | ||
814 | 814 | ||
815 | if (cpu_has(c, X86_FEATURE_CQM_LLC)) { | 815 | if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC) || |
816 | /* will be overridden if occupancy monitoring exists */ | 816 | cpu_has(c, X86_FEATURE_CQM_MBM_TOTAL) || |
817 | c->x86_cache_max_rmid = ebx; | 817 | cpu_has(c, X86_FEATURE_CQM_MBM_LOCAL)) { |
818 | u32 eax, ebx, ecx, edx; | ||
818 | 819 | ||
819 | /* QoS sub-leaf, EAX=0Fh, ECX=1 */ | 820 | /* QoS sub-leaf, EAX=0Fh, ECX=1 */ |
820 | cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx); | 821 | cpuid_count(0xf, 1, &eax, &ebx, &ecx, &edx); |
821 | c->x86_capability[CPUID_F_1_EDX] = edx; | ||
822 | 822 | ||
823 | if ((cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) || | 823 | c->x86_cache_max_rmid = ecx; |
824 | ((cpu_has(c, X86_FEATURE_CQM_MBM_TOTAL)) || | 824 | c->x86_cache_occ_scale = ebx; |
825 | (cpu_has(c, X86_FEATURE_CQM_MBM_LOCAL)))) { | ||
826 | c->x86_cache_max_rmid = ecx; | ||
827 | c->x86_cache_occ_scale = ebx; | ||
828 | } | ||
829 | } else { | ||
830 | c->x86_cache_max_rmid = -1; | ||
831 | c->x86_cache_occ_scale = -1; | ||
832 | } | ||
833 | } | 825 | } |
834 | } | 826 | } |
835 | 827 | ||
diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c index 2c0bd38a44ab..fa07a224e7b9 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c | |||
@@ -59,6 +59,9 @@ static const struct cpuid_dep cpuid_deps[] = { | |||
59 | { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, | 59 | { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, |
60 | { X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F }, | 60 | { X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F }, |
61 | { X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F }, | 61 | { X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F }, |
62 | { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, | ||
63 | { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, | ||
64 | { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, | ||
62 | {} | 65 | {} |
63 | }; | 66 | }; |
64 | 67 | ||
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 94aa1c72ca98..adf9b71386ef 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c | |||
@@ -26,6 +26,10 @@ struct cpuid_bit { | |||
26 | static const struct cpuid_bit cpuid_bits[] = { | 26 | static const struct cpuid_bit cpuid_bits[] = { |
27 | { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, | 27 | { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, |
28 | { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, | 28 | { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, |
29 | { X86_FEATURE_CQM_LLC, CPUID_EDX, 1, 0x0000000f, 0 }, | ||
30 | { X86_FEATURE_CQM_OCCUP_LLC, CPUID_EDX, 0, 0x0000000f, 1 }, | ||
31 | { X86_FEATURE_CQM_MBM_TOTAL, CPUID_EDX, 1, 0x0000000f, 1 }, | ||
32 | { X86_FEATURE_CQM_MBM_LOCAL, CPUID_EDX, 2, 0x0000000f, 1 }, | ||
29 | { X86_FEATURE_CAT_L3, CPUID_EBX, 1, 0x00000010, 0 }, | 33 | { X86_FEATURE_CAT_L3, CPUID_EBX, 1, 0x00000010, 0 }, |
30 | { X86_FEATURE_CAT_L2, CPUID_EBX, 2, 0x00000010, 0 }, | 34 | { X86_FEATURE_CAT_L2, CPUID_EBX, 2, 0x00000010, 0 }, |
31 | { X86_FEATURE_CDP_L3, CPUID_ECX, 2, 0x00000010, 1 }, | 35 | { X86_FEATURE_CDP_L3, CPUID_ECX, 2, 0x00000010, 1 }, |
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h index 9a327d5b6d1f..d78a61408243 100644 --- a/arch/x86/kvm/cpuid.h +++ b/arch/x86/kvm/cpuid.h | |||
@@ -47,8 +47,6 @@ static const struct cpuid_reg reverse_cpuid[] = { | |||
47 | [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, | 47 | [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, |
48 | [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, | 48 | [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, |
49 | [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, | 49 | [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, |
50 | [CPUID_F_0_EDX] = { 0xf, 0, CPUID_EDX}, | ||
51 | [CPUID_F_1_EDX] = { 0xf, 1, CPUID_EDX}, | ||
52 | [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, | 50 | [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, |
53 | [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, | 51 | [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, |
54 | [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, | 52 | [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, |