diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2018-10-10 14:39:18 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2018-10-10 15:05:35 -0400 |
commit | a85c928f6a7856a09e47d9b37faa3407c7ac6a8e (patch) | |
tree | b24470db19b4e4cdff166bbbcea853d0c16343e9 | |
parent | dab6558f57c8632d90dd75e00da78877a1dcf243 (diff) |
pinctrl: gemini: Fix up TVC clock group
The previous fix made the TVC clock get muxed in on the
D-Link DIR-685 instead of giving nagging warnings of this
not working. Not good. We didn't want that, as it breaks
video.
Create a specific group for the TVC CLK, and break out
a specific GPIO group for it on the SL3516 so we can use
that line as GPIO if we don't need the TVC CLK.
Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/pinctrl/pinctrl-gemini.c | 44 |
1 files changed, 36 insertions, 8 deletions
diff --git a/drivers/pinctrl/pinctrl-gemini.c b/drivers/pinctrl/pinctrl-gemini.c index d0b7ab098e6a..f75bf6f16a2e 100644 --- a/drivers/pinctrl/pinctrl-gemini.c +++ b/drivers/pinctrl/pinctrl-gemini.c | |||
@@ -591,13 +591,16 @@ static const unsigned int tvc_3512_pins[] = { | |||
591 | 319, /* TVC_DATA[1] */ | 591 | 319, /* TVC_DATA[1] */ |
592 | 301, /* TVC_DATA[2] */ | 592 | 301, /* TVC_DATA[2] */ |
593 | 283, /* TVC_DATA[3] */ | 593 | 283, /* TVC_DATA[3] */ |
594 | 265, /* TVC_CLK */ | ||
595 | 320, /* TVC_DATA[4] */ | 594 | 320, /* TVC_DATA[4] */ |
596 | 302, /* TVC_DATA[5] */ | 595 | 302, /* TVC_DATA[5] */ |
597 | 284, /* TVC_DATA[6] */ | 596 | 284, /* TVC_DATA[6] */ |
598 | 266, /* TVC_DATA[7] */ | 597 | 266, /* TVC_DATA[7] */ |
599 | }; | 598 | }; |
600 | 599 | ||
600 | static const unsigned int tvc_clk_3512_pins[] = { | ||
601 | 265, /* TVC_CLK */ | ||
602 | }; | ||
603 | |||
601 | /* NAND flash pins */ | 604 | /* NAND flash pins */ |
602 | static const unsigned int nflash_3512_pins[] = { | 605 | static const unsigned int nflash_3512_pins[] = { |
603 | 199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252, | 606 | 199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252, |
@@ -629,7 +632,7 @@ static const unsigned int pflash_3512_pins_extended[] = { | |||
629 | /* Serial flash pins CE0, CE1, DI, DO, CK */ | 632 | /* Serial flash pins CE0, CE1, DI, DO, CK */ |
630 | static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 }; | 633 | static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 }; |
631 | 634 | ||
632 | /* The GPIO0A (0) pin overlap with TVC and extended parallel flash */ | 635 | /* The GPIO0A (0) pin overlap with TVC CLK and extended parallel flash */ |
633 | static const unsigned int gpio0a_3512_pins[] = { 265 }; | 636 | static const unsigned int gpio0a_3512_pins[] = { 265 }; |
634 | 637 | ||
635 | /* The GPIO0B (1-4) pins overlap with TVC and ICE */ | 638 | /* The GPIO0B (1-4) pins overlap with TVC and ICE */ |
@@ -823,7 +826,13 @@ static const struct gemini_pin_group gemini_3512_pin_groups[] = { | |||
823 | .num_pins = ARRAY_SIZE(tvc_3512_pins), | 826 | .num_pins = ARRAY_SIZE(tvc_3512_pins), |
824 | /* Conflict with character LCD and ICE */ | 827 | /* Conflict with character LCD and ICE */ |
825 | .mask = LCD_PADS_ENABLE, | 828 | .mask = LCD_PADS_ENABLE, |
826 | .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE, | 829 | .value = TVC_PADS_ENABLE, |
830 | }, | ||
831 | { | ||
832 | .name = "tvcclkgrp", | ||
833 | .pins = tvc_clk_3512_pins, | ||
834 | .num_pins = ARRAY_SIZE(tvc_clk_3512_pins), | ||
835 | .value = TVC_CLK_PAD_ENABLE, | ||
827 | }, | 836 | }, |
828 | /* | 837 | /* |
829 | * The construction is done such that it is possible to use a serial | 838 | * The construction is done such that it is possible to use a serial |
@@ -860,8 +869,8 @@ static const struct gemini_pin_group gemini_3512_pin_groups[] = { | |||
860 | .name = "gpio0agrp", | 869 | .name = "gpio0agrp", |
861 | .pins = gpio0a_3512_pins, | 870 | .pins = gpio0a_3512_pins, |
862 | .num_pins = ARRAY_SIZE(gpio0a_3512_pins), | 871 | .num_pins = ARRAY_SIZE(gpio0a_3512_pins), |
863 | /* Conflict with TVC */ | 872 | /* Conflict with TVC CLK */ |
864 | .mask = TVC_PADS_ENABLE, | 873 | .mask = TVC_CLK_PAD_ENABLE, |
865 | }, | 874 | }, |
866 | { | 875 | { |
867 | .name = "gpio0bgrp", | 876 | .name = "gpio0bgrp", |
@@ -1531,13 +1540,16 @@ static const unsigned int tvc_3516_pins[] = { | |||
1531 | 311, /* TVC_DATA[1] */ | 1540 | 311, /* TVC_DATA[1] */ |
1532 | 394, /* TVC_DATA[2] */ | 1541 | 394, /* TVC_DATA[2] */ |
1533 | 374, /* TVC_DATA[3] */ | 1542 | 374, /* TVC_DATA[3] */ |
1534 | 333, /* TVC_CLK */ | ||
1535 | 354, /* TVC_DATA[4] */ | 1543 | 354, /* TVC_DATA[4] */ |
1536 | 395, /* TVC_DATA[5] */ | 1544 | 395, /* TVC_DATA[5] */ |
1537 | 312, /* TVC_DATA[6] */ | 1545 | 312, /* TVC_DATA[6] */ |
1538 | 334, /* TVC_DATA[7] */ | 1546 | 334, /* TVC_DATA[7] */ |
1539 | }; | 1547 | }; |
1540 | 1548 | ||
1549 | static const unsigned int tvc_clk_3516_pins[] = { | ||
1550 | 333, /* TVC_CLK */ | ||
1551 | }; | ||
1552 | |||
1541 | /* NAND flash pins */ | 1553 | /* NAND flash pins */ |
1542 | static const unsigned int nflash_3516_pins[] = { | 1554 | static const unsigned int nflash_3516_pins[] = { |
1543 | 243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283, | 1555 | 243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283, |
@@ -1570,7 +1582,7 @@ static const unsigned int pflash_3516_pins_extended[] = { | |||
1570 | static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 }; | 1582 | static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 }; |
1571 | 1583 | ||
1572 | /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */ | 1584 | /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */ |
1573 | static const unsigned int gpio0a_3516_pins[] = { 333, 354, 395, 312, 334 }; | 1585 | static const unsigned int gpio0a_3516_pins[] = { 354, 395, 312, 334 }; |
1574 | 1586 | ||
1575 | /* The GPIO0B (5-7) pins overlap with ICE */ | 1587 | /* The GPIO0B (5-7) pins overlap with ICE */ |
1576 | static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 }; | 1588 | static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 }; |
@@ -1602,6 +1614,9 @@ static const unsigned int gpio0j_3516_pins[] = { 359, 339 }; | |||
1602 | /* The GPIO0K (30,31) pins overlap with NAND flash */ | 1614 | /* The GPIO0K (30,31) pins overlap with NAND flash */ |
1603 | static const unsigned int gpio0k_3516_pins[] = { 275, 298 }; | 1615 | static const unsigned int gpio0k_3516_pins[] = { 275, 298 }; |
1604 | 1616 | ||
1617 | /* The GPIO0L (0) pins overlap with TVC_CLK */ | ||
1618 | static const unsigned int gpio0l_3516_pins[] = { 333 }; | ||
1619 | |||
1605 | /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */ | 1620 | /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */ |
1606 | static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 }; | 1621 | static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 }; |
1607 | 1622 | ||
@@ -1761,7 +1776,13 @@ static const struct gemini_pin_group gemini_3516_pin_groups[] = { | |||
1761 | .num_pins = ARRAY_SIZE(tvc_3516_pins), | 1776 | .num_pins = ARRAY_SIZE(tvc_3516_pins), |
1762 | /* Conflict with character LCD */ | 1777 | /* Conflict with character LCD */ |
1763 | .mask = LCD_PADS_ENABLE, | 1778 | .mask = LCD_PADS_ENABLE, |
1764 | .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE, | 1779 | .value = TVC_PADS_ENABLE, |
1780 | }, | ||
1781 | { | ||
1782 | .name = "tvcclkgrp", | ||
1783 | .pins = tvc_clk_3516_pins, | ||
1784 | .num_pins = ARRAY_SIZE(tvc_clk_3516_pins), | ||
1785 | .value = TVC_CLK_PAD_ENABLE, | ||
1765 | }, | 1786 | }, |
1766 | /* | 1787 | /* |
1767 | * The construction is done such that it is possible to use a serial | 1788 | * The construction is done such that it is possible to use a serial |
@@ -1873,6 +1894,13 @@ static const struct gemini_pin_group gemini_3516_pin_groups[] = { | |||
1873 | .value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE, | 1894 | .value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE, |
1874 | }, | 1895 | }, |
1875 | { | 1896 | { |
1897 | .name = "gpio0lgrp", | ||
1898 | .pins = gpio0l_3516_pins, | ||
1899 | .num_pins = ARRAY_SIZE(gpio0l_3516_pins), | ||
1900 | /* Conflict with TVE CLK */ | ||
1901 | .mask = TVC_CLK_PAD_ENABLE, | ||
1902 | }, | ||
1903 | { | ||
1876 | .name = "gpio1agrp", | 1904 | .name = "gpio1agrp", |
1877 | .pins = gpio1a_3516_pins, | 1905 | .pins = gpio1a_3516_pins, |
1878 | .num_pins = ARRAY_SIZE(gpio1a_3516_pins), | 1906 | .num_pins = ARRAY_SIZE(gpio1a_3516_pins), |