diff options
author | Jens Frederich <jfrederich@gmail.com> | 2013-08-15 15:34:55 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-08-15 20:22:27 -0400 |
commit | 98d4f93c79b002f85480320fe63fefaa31d58b6c (patch) | |
tree | 0bd102d568f888d5e1eb4e359018211851bf93fd | |
parent | 01f865ba4a1ee95d4828b4f3fa69d68f9ac4b9ba (diff) |
Staging: olpc_dcon: replace some magic numbers
This patch replace some magic numbers. I believe it makes
the driver more readable.
The magic number 0x26 is the XO system embedded controller
(EC) command 'DCON power enable/disable'.
Number 0x41, and 0x42 are special memory controller settings
register. The 0x41 initialize bit sequence 0x101 means:
enable memory power down function and special SDRAM clock
delay for synchronize SDRAM output and clock signal.
The 0x42 initialize squence 0x101 is wrong. According to
the specification Bit 8 is reserved, thus not in use.
I removed it.
Signed-off-by: Jens Frederich <jfrederich@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/staging/olpc_dcon/olpc_dcon.c | 13 | ||||
-rw-r--r-- | drivers/staging/olpc_dcon/olpc_dcon.h | 27 | ||||
-rw-r--r-- | include/linux/olpc-ec.h | 1 |
3 files changed, 26 insertions, 15 deletions
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c index 7c460f2c0d23..5ca4fa4fd246 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon.c +++ b/drivers/staging/olpc_dcon/olpc_dcon.c | |||
@@ -90,9 +90,10 @@ static int dcon_hw_init(struct dcon_priv *dcon, int is_init) | |||
90 | 90 | ||
91 | /* SDRAM setup/hold time */ | 91 | /* SDRAM setup/hold time */ |
92 | dcon_write(dcon, 0x3a, 0xc040); | 92 | dcon_write(dcon, 0x3a, 0xc040); |
93 | dcon_write(dcon, 0x41, 0x0000); | 93 | dcon_write(dcon, DCON_REG_MEM_OPT_A, 0x0000); /* clear option bits */ |
94 | dcon_write(dcon, 0x41, 0x0101); | 94 | dcon_write(dcon, DCON_REG_MEM_OPT_A, |
95 | dcon_write(dcon, 0x42, 0x0101); | 95 | MEM_DLL_CLOCK_DELAY | MEM_POWER_DOWN); |
96 | dcon_write(dcon, DCON_REG_MEM_OPT_B, MEM_SOFT_RESET); | ||
96 | 97 | ||
97 | /* Colour swizzle, AA, no passthrough, backlight */ | 98 | /* Colour swizzle, AA, no passthrough, backlight */ |
98 | if (is_init) { | 99 | if (is_init) { |
@@ -126,7 +127,7 @@ static int dcon_bus_stabilize(struct dcon_priv *dcon, int is_powered_down) | |||
126 | power_up: | 127 | power_up: |
127 | if (is_powered_down) { | 128 | if (is_powered_down) { |
128 | x = 1; | 129 | x = 1; |
129 | x = olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); | 130 | x = olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0); |
130 | if (x) { | 131 | if (x) { |
131 | pr_warn("unable to force dcon to power up: %d!\n", x); | 132 | pr_warn("unable to force dcon to power up: %d!\n", x); |
132 | return x; | 133 | return x; |
@@ -144,7 +145,7 @@ power_up: | |||
144 | pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n"); | 145 | pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n"); |
145 | BUG_ON(olpc_board_at_least(olpc_board(0xc2))); | 146 | BUG_ON(olpc_board_at_least(olpc_board(0xc2))); |
146 | x = 0; | 147 | x = 0; |
147 | olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); | 148 | olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0); |
148 | msleep(100); | 149 | msleep(100); |
149 | is_powered_down = 1; | 150 | is_powered_down = 1; |
150 | goto power_up; /* argh, stupid hardware.. */ | 151 | goto power_up; /* argh, stupid hardware.. */ |
@@ -208,7 +209,7 @@ static void dcon_sleep(struct dcon_priv *dcon, bool sleep) | |||
208 | 209 | ||
209 | if (sleep) { | 210 | if (sleep) { |
210 | x = 0; | 211 | x = 0; |
211 | x = olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); | 212 | x = olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0); |
212 | if (x) | 213 | if (x) |
213 | pr_warn("unable to force dcon to power down: %d!\n", x); | 214 | pr_warn("unable to force dcon to power down: %d!\n", x); |
214 | else | 215 | else |
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.h b/drivers/staging/olpc_dcon/olpc_dcon.h index 997bded2949f..524ee49fbacb 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon.h +++ b/drivers/staging/olpc_dcon/olpc_dcon.h | |||
@@ -22,15 +22,24 @@ | |||
22 | #define MODE_DEBUG (1<<14) | 22 | #define MODE_DEBUG (1<<14) |
23 | #define MODE_SELFTEST (1<<15) | 23 | #define MODE_SELFTEST (1<<15) |
24 | 24 | ||
25 | #define DCON_REG_HRES 2 | 25 | #define DCON_REG_HRES 0x2 |
26 | #define DCON_REG_HTOTAL 3 | 26 | #define DCON_REG_HTOTAL 0x3 |
27 | #define DCON_REG_HSYNC_WIDTH 4 | 27 | #define DCON_REG_HSYNC_WIDTH 0x4 |
28 | #define DCON_REG_VRES 5 | 28 | #define DCON_REG_VRES 0x5 |
29 | #define DCON_REG_VTOTAL 6 | 29 | #define DCON_REG_VTOTAL 0x6 |
30 | #define DCON_REG_VSYNC_WIDTH 7 | 30 | #define DCON_REG_VSYNC_WIDTH 0x7 |
31 | #define DCON_REG_TIMEOUT 8 | 31 | #define DCON_REG_TIMEOUT 0x8 |
32 | #define DCON_REG_SCAN_INT 9 | 32 | #define DCON_REG_SCAN_INT 0x9 |
33 | #define DCON_REG_BRIGHT 10 | 33 | #define DCON_REG_BRIGHT 0x10 |
34 | #define DCON_REG_MEM_OPT_A 0x41 | ||
35 | #define DCON_REG_MEM_OPT_B 0x42 | ||
36 | |||
37 | /* Load Delay Locked Loop (DLL) settings for clock delay */ | ||
38 | #define MEM_DLL_CLOCK_DELAY (1<<0) | ||
39 | /* Memory controller power down function */ | ||
40 | #define MEM_POWER_DOWN (1<<8) | ||
41 | /* Memory controller software reset */ | ||
42 | #define MEM_SOFT_RESET (1<<0) | ||
34 | 43 | ||
35 | /* Status values */ | 44 | /* Status values */ |
36 | 45 | ||
diff --git a/include/linux/olpc-ec.h b/include/linux/olpc-ec.h index 5bb6e760aa61..2925df3ce78a 100644 --- a/include/linux/olpc-ec.h +++ b/include/linux/olpc-ec.h | |||
@@ -6,6 +6,7 @@ | |||
6 | #define EC_WRITE_SCI_MASK 0x1b | 6 | #define EC_WRITE_SCI_MASK 0x1b |
7 | #define EC_WAKE_UP_WLAN 0x24 | 7 | #define EC_WAKE_UP_WLAN 0x24 |
8 | #define EC_WLAN_LEAVE_RESET 0x25 | 8 | #define EC_WLAN_LEAVE_RESET 0x25 |
9 | #define EC_DCON_POWER_MODE 0x26 | ||
9 | #define EC_READ_EB_MODE 0x2a | 10 | #define EC_READ_EB_MODE 0x2a |
10 | #define EC_SET_SCI_INHIBIT 0x32 | 11 | #define EC_SET_SCI_INHIBIT 0x32 |
11 | #define EC_SET_SCI_INHIBIT_RELEASE 0x34 | 12 | #define EC_SET_SCI_INHIBIT_RELEASE 0x34 |