Merge tag 'mfd-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones: "New Device Support: - New Clocksource driver from ST - New MFD/ACPI/DMA drivers for Intel's Sunrisepoint PCH based platforms - Add support for Arizona WM8998 and WM1814 - Add support for Dialog Semi DA9062 and DA9063 - Add support for Kontron COMe-bBL6 and COMe-cBW6 - Add support for X-Powers AXP152 - Add support for Atmel, many - Add support for STMPE, many - Add support for USB in X-Powers AXP22X Core Frameworks: - New Base API to traverse devices and their children in reverse order Bug Fixes: - Fix race between runtime-suspend and IRQs - Obtain platform data form more reliable source Fix-ups: - Constifying things - Variable signage changes - Kconfig depends|selects changes - Make use of BIT() macro - Do not supply .owner attribute in *_driver structures - MAINTAINERS entries - Stop using set_irq_flags() - Start using irq_set_chained_handler_and_data() - Export DT device ID structures" * tag 'mfd-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (69 commits) mfd: jz4740-adc: Init mask cache in generic IRQ chip mfd: cros_ec: spi: Add OF match table mfd: stmpe: Add OF match table mfd: max77686: Split out regulator part from the DT binding mfd: Add DT binding for Maxim MAX77802 IC mfd: max77686: Use a generic name for the PMIC node in the example mfd: max77686: Don't suggest in binding to use a deprecated property mfd: Add MFD_CROS_EC dependencies mfd: cros_ec: Remove CROS_EC_PROTO dependency for SPI and I2C drivers mfd: axp20x: Add a cell for the usb power_supply part of the axp20x PMICs mfd: axp20x: Add missing registers, and mark more registers volatile mfd: arizona: Fixup some formatting/white space errors mfd: wm8994: Fix NULL pointer exception on missing pdata of: Add vendor prefix for Nuvoton mfd: mt6397: Implement wake handler and suspend/resume to handle wake up event mfd: atmel-hlcdc: Add support for new SoCs mfd: Export OF module alias information in missing drivers mfd: stw481x: Export I2C module alias information mfd: da9062: Support for the DA9063 OnKey in the DA9062 core mfd: max899x: Avoid redundant irq_data lookup ...
author: Linus Torvalds <torvalds@linux-foundation.org> 2015-09-04 14:35:03 -0400
committer: Linus Torvalds <torvalds@linux-foundation.org> 2015-09-04 14:35:03 -0400
commit: 8bd8fd0a29bfd5ad8e1976edd8c4c40cdb39aa4f (patch)
tree: 1d7b2e30083194cc4223d9b150583fc2924bd032
parent: 352712274507645b6f82b8763977ad87321919a3 (diff)
parent: 5a688c455066c21c133bc8ffa7b11f8c66b7fe0b (diff)
125 files changed, 4816 insertions, 581 deletions
diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
index f64de95a8e8b..ad5d90482a0e 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
@@ -2,7 +2,11 @@ Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
 Required properties:
 - compatible: value should be one of the following:
+   "atmel,at91sam9n12-hlcdc"
+   "atmel,at91sam9x5-hlcdc"
+   "atmel,sama5d2-hlcdc"
   "atmel,sama5d3-hlcdc"
+   "atmel,sama5d4-hlcdc"
 - reg: base address and size of the HLCDC device registers.
 - clock-names: the name of the 3 clocks requested by the HLCDC device.
   Should contain "periph_clk", "sys_clk" and "slow_clk".
diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 753f14f46e85..41811223e5be 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -1,12 +1,14 @@
 AXP family PMIC device tree bindings
 The axp20x family current members :
+axp152 (X-Powers)
 axp202 (X-Powers)
 axp209 (X-Powers)
 axp221 (X-Powers)
 Required properties:
- compatible: "x-powers,axp202", "x-powers,axp209", "x-powers,axp221"
+- compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",
+              "x-powers,axp221"
 - reg: The I2C slave address for the AXP chip
 - interrupt-parent: The parent interrupt controller
 - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
diff --git a/Documentation/devicetree/bindings/mfd/da9062.txt b/Documentation/devicetree/bindings/mfd/da9062.txt
new file mode 100644
index 000000000000..38802b54d48a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/da9062.txt
@@ -0,0 +1,88 @@
+* Dialog DA9062 Power Management Integrated Circuit (PMIC)
+DA9062 consists of a large and varied group of sub-devices:
+Device                   Supply Names    Description
+------                   ------------    -----------
+da9062-regulator        :               : LDOs & BUCKs
+da9062-rtc              :               : Real-Time Clock
+da9062-watchdog         :               : Watchdog Timer
+======
+Required properties:
+- compatible : Should be "dlg,da9062".
+- reg : Specifies the I2C slave address (this defaults to 0x58 but it can be
+  modified to match the chip's OTP settings).
+- interrupt-parent : Specifies the reference to the interrupt controller for
+  the DA9062.
+- interrupts : IRQ line information.
+- interrupt-controller
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
+further information on IRQ bindings.
+Sub-nodes:
+- regulators : This node defines the settings for the LDOs and BUCKs. The
+  DA9062 regulators are bound using their names listed below:
+    buck1    : BUCK_1
+    buck2    : BUCK_2
+    buck3    : BUCK_3
+    buck4    : BUCK_4
+    ldo1     : LDO_1
+    ldo2     : LDO_2
+    ldo3     : LDO_3
+    ldo4     : LDO_4
+  The component follows the standard regulator framework and the bindings
+  details of individual regulator device can be found in:
+  Documentation/devicetree/bindings/regulator/regulator.txt
+- rtc : This node defines settings required for the Real-Time Clock associated
+  with the DA9062. There are currently no entries in this binding, however
+  compatible = "dlg,da9062-rtc" should be added if a node is created.
+- watchdog: This node defines the settings for the watchdog driver associated
+  with the DA9062 PMIC. The compatible = "dlg,da9062-watchdog" should be added
+  if a node is created.
+Example:
+        pmic0: da9062@58 {
+                compatible = "dlg,da9062";
+                reg = <0x58>;
+                interrupt-parent = <&gpio6>;
+                interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+                interrupt-controller;
+                rtc {
+                        compatible = "dlg,da9062-rtc";
+                };
+                watchdog {
+                        compatible = "dlg,da9062-watchdog";
+                };
+                regulators {
+                        DA9062_BUCK1: buck1 {
+                                regulator-name = "BUCK1";
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1570000>;
+                                regulator-min-microamp = <500000>;
+                                regulator-max-microamp = <2000000>;
+                                regulator-boot-on;
+                        };
+                        DA9062_LDO1: ldo1 {
+                                regulator-name = "LDO_1";
+                                regulator-min-microvolt = <900000>;
+                                regulator-max-microvolt = <3600000>;
+                                regulator-boot-on;
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/mfd/max77686.txt b/Documentation/devicetree/bindings/mfd/max77686.txt
index 163bd81a4607..741e76688cf2 100644
--- a/Documentation/devicetree/bindings/mfd/max77686.txt
+++ b/Documentation/devicetree/bindings/mfd/max77686.txt
@@ -7,8 +7,9 @@ different i2c slave address,presently for which we are statically creating i2c
 client while probing.This document describes the binding for mfd device and
 PMIC submodule.
-Binding for the built-in 32k clock generator block is defined separately
+Bindings for the built-in 32k clock generator block and
-in bindings/clk/maxim,max77686.txt file.
+regulators are defined in ../clk/maxim,max77686.txt and
+../regulator/max77686.txt respectively.
 Required properties:
 - compatible : Must be "maxim,max77686";
@@ -16,67 +17,11 @@ Required properties:
 - interrupts : This i2c device has an IRQ line connected to the main SoC.
 - interrupt-parent : The parent interrupt controller.
-Optional node:
- voltage-regulators : The regulators of max77686 have to be instantiated
-  under subnode named "voltage-regulators" using the following format.
-        regulator_name {
-                regulator-compatible = LDOn/BUCKn
-                standard regulator constraints....
-        };
-        refer Documentation/devicetree/bindings/regulator/regulator.txt
-  The regulator-compatible property of regulator should initialized with string
-to get matched with their hardware counterparts as follow:
-        -LDOn   :       for LDOs, where n can lie in range 1 to 26.
-                        example: LDO1, LDO2, LDO26.
-        -BUCKn  :       for BUCKs, where n can lie in range 1 to 9.
-                        example: BUCK1, BUCK5, BUCK9.
-  Regulators which can be turned off during system suspend:
-        -LDOn   :       2, 6-8, 10-12, 14-16,
-        -BUCKn  :       1-4.
-  Use standard regulator bindings for it ('regulator-off-in-suspend').
-  LDO20, LDO21, LDO22, BUCK8 and BUCK9 can be configured to GPIO enable
-  control. To turn this feature on this property must be added to the regulator
-  sub-node:
-        - maxim,ena-gpios :     one GPIO specifier enable control (the gpio
-                                flags are actually ignored and always
-                                ACTIVE_HIGH is used)
 Example:
-        max77686@09 {
+        max77686: pmic@09 {
                compatible = "maxim,max77686";
                interrupt-parent = <&wakeup_eint>;
                interrupts = <26 0>;
                reg = <0x09>;
+        };
-                voltage-regulators {
-                        ldo11_reg {
-                                regulator-compatible = "LDO11";
-                                regulator-name = "vdd_ldo11";
-                                regulator-min-microvolt = <1900000>;
-                                regulator-max-microvolt = <1900000>;
-                                regulator-always-on;
-                        };
-                        buck1_reg {
-                                regulator-compatible = "BUCK1";
-                                regulator-name = "vdd_mif";
-                                regulator-min-microvolt = <950000>;
-                                regulator-max-microvolt = <1300000>;
-                                regulator-always-on;
-                                regulator-boot-on;
-                        };
-                        buck9_reg {
-                                regulator-compatible = "BUCK9";
-                                regulator-name = "CAM_ISP_CORE_1.2V";
-                                regulator-min-microvolt = <1000000>;
-                                regulator-max-microvolt = <1200000>;
-                                maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
-                        };
-        }
diff --git a/Documentation/devicetree/bindings/mfd/max77802.txt b/Documentation/devicetree/bindings/mfd/max77802.txt
new file mode 100644
index 000000000000..51fc1a60caa5
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77802.txt
@@ -0,0 +1,26 @@
+Maxim MAX77802 multi-function device
+The Maxim MAX77802 is a Power Management IC (PMIC) that contains 10 high
+efficiency Buck regulators, 32 Low-DropOut (LDO) regulators used to power
+up application processors and peripherals, a 2-channel 32kHz clock outputs,
+a Real-Time-Clock (RTC) and a I2C interface to program the individual
+regulators, clocks outputs and the RTC.
+Bindings for the built-in 32k clock generator block and
+regulators are defined in ../clk/maxim,max77802.txt and
+../regulator/max77802.txt respectively.
+Required properties:
+- compatible            : Must be "maxim,max77802"
+- reg                   : Specifies the I2C slave address of PMIC block.
+- interrupts            : I2C device IRQ line connected to the main SoC.
+- interrupt-parent      : The parent interrupt controller.
+Example:
+        max77802: pmic@09 {
+                compatible = "maxim,max77802";
+                interrupt-parent = <&intc>;
+                interrupts = <26 IRQ_TYPE_NONE>;
+                reg = <0x09>;
+        };
diff --git a/Documentation/devicetree/bindings/regulator/max77686.txt b/Documentation/devicetree/bindings/regulator/max77686.txt
new file mode 100644
index 000000000000..0dded64d89d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max77686.txt
@@ -0,0 +1,71 @@
+Binding for Maxim MAX77686 regulators
+This is a part of the device tree bindings of MAX77686 multi-function device.
+More information can be found in ../mfd/max77686.txt file.
+The MAX77686 PMIC has 9 high-efficiency Buck and 26 Low-DropOut (LDO)
+regulators that can be controlled over I2C.
+Following properties should be present in main device node of the MFD chip.
+Optional node:
+- voltage-regulators : The regulators of max77686 have to be instantiated
+  under subnode named "voltage-regulators" using the following format.
+        regulator_name {
+                regulator-compatible = LDOn/BUCKn
+                standard regulator constraints....
+        };
+        refer Documentation/devicetree/bindings/regulator/regulator.txt
+  The regulator node's name should be initialized with a string
+to get matched with their hardware counterparts as follow:
+        -LDOn   :       for LDOs, where n can lie in range 1 to 26.
+                        example: LDO1, LDO2, LDO26.
+        -BUCKn  :       for BUCKs, where n can lie in range 1 to 9.
+                        example: BUCK1, BUCK5, BUCK9.
+  Regulators which can be turned off during system suspend:
+        -LDOn   :       2, 6-8, 10-12, 14-16,
+        -BUCKn  :       1-4.
+  Use standard regulator bindings for it ('regulator-off-in-suspend').
+  LDO20, LDO21, LDO22, BUCK8 and BUCK9 can be configured to GPIO enable
+  control. To turn this feature on this property must be added to the regulator
+  sub-node:
+        - maxim,ena-gpios :     one GPIO specifier enable control (the gpio
+                                flags are actually ignored and always
+                                ACTIVE_HIGH is used)
+Example:
+        max77686: pmic@09 {
+                compatible = "maxim,max77686";
+                interrupt-parent = <&wakeup_eint>;
+                interrupts = <26 IRQ_TYPE_NONE>;
+                reg = <0x09>;
+                voltage-regulators {
+                        ldo11_reg: LDO11 {
+                                regulator-name = "vdd_ldo11";
+                                regulator-min-microvolt = <1900000>;
+                                regulator-max-microvolt = <1900000>;
+                                regulator-always-on;
+                        };
+                        buck1_reg: BUCK1 {
+                                regulator-name = "vdd_mif";
+                                regulator-min-microvolt = <950000>;
+                                regulator-max-microvolt = <1300000>;
+                                regulator-always-on;
+                                regulator-boot-on;
+                        };
+                        buck9_reg: BUCK9 {
+                                regulator-name = "CAM_ISP_CORE_1.2V";
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <1200000>;
+                                maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
+                        };
+        };
diff --git a/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt b/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt
index 73407f502e4e..daf88265df32 100644
--- a/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt
+++ b/Documentation/devicetree/bindings/rtc/rtc-st-lpc.txt
@@ -1,20 +1,23 @@
 STMicroelectronics Low Power Controller (LPC) - RTC
 ===================================================
-LPC currently supports Watchdog OR Real Time Clock functionality.
+LPC currently supports Watchdog OR Real Time Clock OR Clocksource
+functionality.
 [See: ../watchdog/st_lpc_wdt.txt for Watchdog options]
+[See: ../timer/st,stih407-lpc for Clocksource options]
 Required properties
- compatible    : Must be one of: "st,stih407-lpc" "st,stih416-lpc"
+- compatible    : Must be: "st,stih407-lpc"
-                                  "st,stih415-lpc" "st,stid127-lpc"
 - reg           : LPC registers base address + size
 - interrupts    : LPC interrupt line number and associated flags
 - clocks        : Clock used by LPC device (See: ../clock/clock-bindings.txt)
- st,lpc-mode   : The LPC can run either one of two modes ST_LPC_MODE_RTC [0] or
+- st,lpc-mode   : The LPC can run either one of three modes:
-                  ST_LPC_MODE_WDT [1].  One (and only one) mode must be
+                  ST_LPC_MODE_RTC    [0]
-                  selected.
+                  ST_LPC_MODE_WDT    [1]
+                  ST_LPC_MODE_CLKSRC [2]
+                 One (and only one) mode must be selected.
 Example:
        lpc@fde05000 {
diff --git a/Documentation/devicetree/bindings/timer/st,stih407-lpc b/Documentation/devicetree/bindings/timer/st,stih407-lpc
new file mode 100644
index 000000000000..72acb487b856
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/st,stih407-lpc
@@ -0,0 +1,28 @@
+STMicroelectronics Low Power Controller (LPC) - Clocksource
+===========================================================
+LPC currently supports Watchdog OR Real Time Clock OR Clocksource
+functionality.
+[See: ../watchdog/st_lpc_wdt.txt for Watchdog options]
+[See: ../rtc/rtc-st-lpc.txt for RTC options]
+Required properties
+- compatible   : Must be: "st,stih407-lpc"
+- reg          : LPC registers base address + size
+- interrupts   : LPC interrupt line number and associated flags
+- clocks       : Clock used by LPC device (See: ../clock/clock-bindings.txt)
+- st,lpc-mode  : The LPC can run either one of three modes:
+                  ST_LPC_MODE_RTC    [0]
+                  ST_LPC_MODE_WDT    [1]
+                  ST_LPC_MODE_CLKSRC [2]
+                 One (and only one) mode must be selected.
+Example:
+       lpc@fde05000 {
+               compatible      = "st,stih407-lpc";
+               reg             = <0xfde05000 0x1000>;
+               clocks          = <&clk_s_d3_flexgen CLK_LPC_0>;
+               st,lpc-mode     = <ST_LPC_MODE_CLKSRC>;
+       };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 56a6d4e79383..80a72099ed76 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -150,6 +150,7 @@ netxeon		Shenzhen Netxeon Technology CO., LTD
 newhaven        Newhaven Display International
 nintendo        Nintendo
 nokia   Nokia
+nuvoton Nuvoton Technology Corporation
 nvidia  NVIDIA
 nxp     NXP Semiconductors
 onnn    ON Semiconductor Corp.
diff --git a/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt b/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt
index 388c88a01222..039c5ca45577 100644
--- a/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/st_lpc_wdt.txt
@@ -1,9 +1,11 @@
 STMicroelectronics Low Power Controller (LPC) - Watchdog
 ========================================================
-LPC currently supports Watchdog OR Real Time Clock functionality.
+LPC currently supports Watchdog OR Real Time Clock OR Clocksource
+functionality.
 [See: ../rtc/rtc-st-lpc.txt for RTC options]
+[See: ../timer/st,stih407-lpc for Clocksource options]
 Required properties
@@ -12,9 +14,11 @@ Required properties
 - reg           : LPC registers base address + size
 - interrupts    : LPC interrupt line number and associated flags
 - clocks        : Clock used by LPC device (See: ../clock/clock-bindings.txt)
- st,lpc-mode   : The LPC can run either one of two modes ST_LPC_MODE_RTC [0] or
+- st,lpc-mode   : The LPC can run either one of three modes:
-                  ST_LPC_MODE_WDT [1].  One (and only one) mode must be
+                  ST_LPC_MODE_RTC    [0]
-                  selected.
+                  ST_LPC_MODE_WDT    [1]
+                  ST_LPC_MODE_CLKSRC [2]
+                 One (and only one) mode must be selected.
 Required properties [watchdog mode]
diff --git a/MAINTAINERS b/MAINTAINERS
index 29a0576e87f1..6592bdc6c1f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1517,6 +1517,7 @@ S:	Maintained
 F:      arch/arm/mach-sti/
 F:      arch/arm/boot/dts/sti*
 F:      drivers/clocksource/arm_global_timer.c
+F:      drivers/clocksource/clksrc_st_lpc.c
 F:      drivers/i2c/busses/i2c-st.c
 F:      drivers/media/rc/st_rc.c
 F:      drivers/mmc/host/sdhci-st.c
@@ -6594,6 +6595,14 @@ S:	Supported
 F:      drivers/power/max14577_charger.c
 F:      drivers/power/max77693_charger.c
+MAXIM MAX77802 MULTIFUNCTION PMIC DEVICE DRIVERS
+M:      Javier Martinez Canillas <javier@osg.samsung.com>
+L:      linux-kernel@vger.kernel.org
+S:      Supported
+F:      drivers/*/*max77802.c
+F:      Documentation/devicetree/bindings/*/*max77802.txt
+F:      include/dt-bindings/*/*max77802.h
 MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS
 M:      Chanwoo Choi <cw00.choi@samsung.com>
 M:      Krzysztof Kozlowski <k.kozlowski@samsung.com>
@@ -6607,7 +6616,7 @@ F:	drivers/extcon/extcon-max77693.c
 F:      drivers/rtc/rtc-max77686.c
 F:      drivers/clk/clk-max77686.c
 F:      Documentation/devicetree/bindings/mfd/max14577.txt
-F:      Documentation/devicetree/bindings/mfd/max77686.txt
+F:      Documentation/devicetree/bindings/*/max77686.txt
 F:      Documentation/devicetree/bindings/mfd/max77693.txt
 F:      Documentation/devicetree/bindings/clock/maxim,max77686.txt
 F:      include/linux/mfd/max14577*.h
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 552c9b134cc5..a7726db13abb 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -297,4 +297,12 @@ config CLKSRC_IMX_GPT
        depends on ARM && CLKDEV_LOOKUP
        select CLKSRC_MMIO
+config CLKSRC_ST_LPC
+        bool
+        depends on ARCH_STI
+        select CLKSRC_OF if OF
+        help
+          Enable this option to use the Low Power controller timer
+          as clocksource.
 endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 066337e24737..5c00863c3e33 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o
 obj-$(CONFIG_H8300)                     += h8300_timer8.o
 obj-$(CONFIG_H8300_TMR16)               += h8300_timer16.o
 obj-$(CONFIG_H8300_TPU)                 += h8300_tpu.o
+obj-$(CONFIG_CLKSRC_ST_LPC)             += clksrc_st_lpc.o
diff --git a/drivers/clocksource/clksrc_st_lpc.c b/drivers/clocksource/clksrc_st_lpc.c
new file mode 100644
index 000000000000..65ec4674416d
--- /dev/null
+++ b/drivers/clocksource/clksrc_st_lpc.c
@@ -0,0 +1,131 @@
+/*
+ * Clocksource using the Low Power Timer found in the Low Power Controller (LPC)
+ *
+ * Copyright (C) 2015 STMicroelectronics – All Rights Reserved
+ *
+ * Author(s): Francesco Virlinzi <francesco.virlinzi@st.com>
+ *            Ajit Pal Singh <ajitpal.singh@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/clk.h>
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/sched_clock.h>
+#include <linux/slab.h>
+#include <dt-bindings/mfd/st-lpc.h>
+/* Low Power Timer */
+#define LPC_LPT_LSB_OFF         0x400
+#define LPC_LPT_MSB_OFF         0x404
+#define LPC_LPT_START_OFF       0x408
+static struct st_clksrc_ddata {
+        struct clk              *clk;
+        void __iomem            *base;
+} ddata;
+static void __init st_clksrc_reset(void)
+{
+        writel_relaxed(0, ddata.base + LPC_LPT_START_OFF);
+        writel_relaxed(0, ddata.base + LPC_LPT_MSB_OFF);
+        writel_relaxed(0, ddata.base + LPC_LPT_LSB_OFF);
+        writel_relaxed(1, ddata.base + LPC_LPT_START_OFF);
+}
+static u64 notrace st_clksrc_sched_clock_read(void)
+{
+        return (u64)readl_relaxed(ddata.base + LPC_LPT_LSB_OFF);
+}
+static int __init st_clksrc_init(void)
+{
+        unsigned long rate;
+        int ret;
+        st_clksrc_reset();
+        rate = clk_get_rate(ddata.clk);
+        sched_clock_register(st_clksrc_sched_clock_read, 32, rate);
+        ret = clocksource_mmio_init(ddata.base + LPC_LPT_LSB_OFF,
+                                    "clksrc-st-lpc", rate, 300, 32,
+                                    clocksource_mmio_readl_up);
+        if (ret) {
+                pr_err("clksrc-st-lpc: Failed to register clocksource\n");
+                return ret;
+        }
+        return 0;
+}
+static int __init st_clksrc_setup_clk(struct device_node *np)
+{
+        struct clk *clk;
+        clk = of_clk_get(np, 0);
+        if (IS_ERR(clk)) {
+                pr_err("clksrc-st-lpc: Failed to get LPC clock\n");
+                return PTR_ERR(clk);
+        }
+        if (clk_prepare_enable(clk)) {
+                pr_err("clksrc-st-lpc: Failed to enable LPC clock\n");
+                return -EINVAL;
+        }
+        if (!clk_get_rate(clk)) {
+                pr_err("clksrc-st-lpc: Failed to get LPC clock rate\n");
+                clk_disable_unprepare(clk);
+                return -EINVAL;
+        }
+        ddata.clk = clk;
+        return 0;
+}
+static void __init st_clksrc_of_register(struct device_node *np)
+{
+        int ret;
+        uint32_t mode;
+        ret = of_property_read_u32(np, "st,lpc-mode", &mode);
+        if (ret) {
+                pr_err("clksrc-st-lpc: An LPC mode must be provided\n");
+                return;
+        }
+        /* LPC can either run as a Clocksource or in RTC or WDT mode */
+        if (mode != ST_LPC_MODE_CLKSRC)
+                return;
+        ddata.base = of_iomap(np, 0);
+        if (!ddata.base) {
+                pr_err("clksrc-st-lpc: Unable to map iomem\n");
+                return;
+        }
+        if (st_clksrc_setup_clk(np)) {
+                iounmap(ddata.base);
+                return;
+        }
+        if (st_clksrc_init()) {
+                clk_disable_unprepare(ddata.clk);
+                clk_put(ddata.clk);
+                iounmap(ddata.base);
+                return;
+        }
+        pr_info("clksrc-st-lpc: clocksource initialised - running @ %luHz\n",
+                clk_get_rate(ddata.clk));
+}
+CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 5ecbb3fdc27e..eaef9bc9d88c 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -88,12 +88,13 @@
 #include <linux/slab.h>
 #include <linux/wait.h>
 #include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/itco_wdt.h>
 #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
                defined CONFIG_DMI
 #include <linux/gpio.h>
 #include <linux/i2c-mux-gpio.h>
-#include <linux/platform_device.h>
 #endif
 /* I801 SMBus address offsets */
@@ -113,6 +114,16 @@
 #define SMBPCICTL       0x004
 #define SMBPCISTS       0x006
 #define SMBHSTCFG       0x040
+#define TCOBASE         0x050
+#define TCOCTL          0x054
+#define ACPIBASE                0x040
+#define ACPIBASE_SMI_OFF        0x030
+#define ACPICTRL                0x044
+#define ACPICTRL_EN             0x080
+#define SBREG_BAR               0x10
+#define SBREG_SMBCTRL           0xc6000c
 /* Host status bits for SMBPCISTS */
 #define SMBPCISTS_INTS          0x08
@@ -125,6 +136,9 @@
 #define SMBHSTCFG_SMB_SMI_EN    2
 #define SMBHSTCFG_I2C_EN        4
+/* TCO configuration bits for TCOCTL */
+#define TCOCTL_EN               0x0100
 /* Auxiliary control register bits, ICH4+ only */
 #define SMBAUXCTL_CRC           1
 #define SMBAUXCTL_E32B          2
@@ -221,6 +235,7 @@ struct i801_priv {
        const struct i801_mux_config *mux_drvdata;
        struct platform_device *mux_pdev;
 #endif
+        struct platform_device *tco_pdev;
 };
 #define FEATURE_SMBUS_PEC       (1 << 0)
@@ -230,6 +245,7 @@ struct i801_priv {
 #define FEATURE_IRQ             (1 << 4)
 /* Not really a feature, but it's convenient to handle it as such */
 #define FEATURE_IDF             (1 << 15)
+#define FEATURE_TCO             (1 << 16)
 static const char *i801_feature_names[] = {
        "SMBus PEC",
@@ -1132,6 +1148,95 @@ static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
 }
 #endif
+static const struct itco_wdt_platform_data tco_platform_data = {
+        .name = "Intel PCH",
+        .version = 4,
+};
+static DEFINE_SPINLOCK(p2sb_spinlock);
+static void i801_add_tco(struct i801_priv *priv)
+{
+        struct pci_dev *pci_dev = priv->pci_dev;
+        struct resource tco_res[3], *res;
+        struct platform_device *pdev;
+        unsigned int devfn;
+        u32 tco_base, tco_ctl;
+        u32 base_addr, ctrl_val;
+        u64 base64_addr;
+        if (!(priv->features & FEATURE_TCO))
+                return;
+        pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
+        pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
+        if (!(tco_ctl & TCOCTL_EN))
+                return;
+        memset(tco_res, 0, sizeof(tco_res));
+        res = &tco_res[ICH_RES_IO_TCO];
+        res->start = tco_base & ~1;
+        res->end = res->start + 32 - 1;
+        res->flags = IORESOURCE_IO;
+        /*
+         * Power Management registers.
+         */
+        devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 2);
+        pci_bus_read_config_dword(pci_dev->bus, devfn, ACPIBASE, &base_addr);
+        res = &tco_res[ICH_RES_IO_SMI];
+        res->start = (base_addr & ~1) + ACPIBASE_SMI_OFF;
+        res->end = res->start + 3;
+        res->flags = IORESOURCE_IO;
+        /*
+         * Enable the ACPI I/O space.
+         */
+        pci_bus_read_config_dword(pci_dev->bus, devfn, ACPICTRL, &ctrl_val);
+        ctrl_val |= ACPICTRL_EN;
+        pci_bus_write_config_dword(pci_dev->bus, devfn, ACPICTRL, ctrl_val);
+        /*
+         * We must access the NO_REBOOT bit over the Primary to Sideband
+         * bridge (P2SB). The BIOS prevents the P2SB device from being
+         * enumerated by the PCI subsystem, so we need to unhide/hide it
+         * to lookup the P2SB BAR.
+         */
+        spin_lock(&p2sb_spinlock);
+        devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
+        /* Unhide the P2SB device */
+        pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
+        pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
+        base64_addr = base_addr & 0xfffffff0;
+        pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
+        base64_addr |= (u64)base_addr << 32;
+        /* Hide the P2SB device */
+        pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x1);
+        spin_unlock(&p2sb_spinlock);
+        res = &tco_res[ICH_RES_MEM_OFF];
+        res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
+        res->end = res->start + 3;
+        res->flags = IORESOURCE_MEM;
+        pdev = platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
+                                                 tco_res, 3, &tco_platform_data,
+                                                 sizeof(tco_platform_data));
+        if (IS_ERR(pdev)) {
+                dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
+                return;
+        }
+        priv->tco_pdev = pdev;
+}
 static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
        unsigned char temp;
@@ -1149,6 +1254,15 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
        priv->pci_dev = dev;
        switch (dev->device) {
+        case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
+        case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
+                priv->features |= FEATURE_I2C_BLOCK_READ;
+                priv->features |= FEATURE_IRQ;
+                priv->features |= FEATURE_SMBUS_PEC;
+                priv->features |= FEATURE_BLOCK_BUFFER;
+                priv->features |= FEATURE_TCO;
+                break;
        case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
        case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
        case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
@@ -1265,6 +1379,8 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
        dev_info(&dev->dev, "SMBus using %s\n",
                 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
+        i801_add_tco(priv);
        /* set up the sysfs linkage to our parent device */
        priv->adapter.dev.parent = &dev->dev;
@@ -1296,6 +1412,8 @@ static void i801_remove(struct pci_dev *dev)
        i2c_del_adapter(&priv->adapter);
        pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
+        platform_device_unregister(priv->tco_pdev);
        /*
         * do not call pci_disable_device(dev) since it can cause hard hangs on
         * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c
index 841717a2842c..f2d9fb4c4e8e 100644
--- a/drivers/mfd/88pm800.c
+++ b/drivers/mfd/88pm800.c
@@ -609,7 +609,6 @@ static int pm800_remove(struct i2c_client *client)
 static struct i2c_driver pm800_driver = {
        .driver = {
                .name = "88PM800",
-                .owner = THIS_MODULE,
                .pm = &pm80x_pm_ops,
                },
        .probe = pm800_probe,
diff --git a/drivers/mfd/88pm805.c b/drivers/mfd/88pm805.c
index e9d50644660c..39f2302e137b 100644
--- a/drivers/mfd/88pm805.c
+++ b/drivers/mfd/88pm805.c
@@ -267,7 +267,6 @@ static int pm805_remove(struct i2c_client *client)
 static struct i2c_driver pm805_driver = {
        .driver = {
                .name = "88PM805",
-                .owner = THIS_MODULE,
                .pm = &pm80x_pm_ops,
                },
        .probe = pm805_probe,
diff --git a/drivers/mfd/88pm860x-core.c b/drivers/mfd/88pm860x-core.c
index e03b7f45b8f7..3269a9990b24 100644
--- a/drivers/mfd/88pm860x-core.c
+++ b/drivers/mfd/88pm860x-core.c
@@ -558,11 +558,7 @@ static int pm860x_irq_domain_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_data(virq, d->host_data);
        irq_set_chip_and_handler(virq, &pm860x_irq_chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
@@ -1258,7 +1254,6 @@ MODULE_DEVICE_TABLE(of, pm860x_dt_ids);
 static struct i2c_driver pm860x_driver = {
        .driver = {
                .name   = "88PM860x",
-                .owner  = THIS_MODULE,
                .pm     = &pm860x_pm_ops,
                .of_match_table = pm860x_dt_ids,
        },
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 076f593f90d3..5fa21739c54f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -97,6 +97,7 @@ config MFD_CROS_EC
        select MFD_CORE
        select CHROME_PLATFORMS
        select CROS_EC_PROTO
+        depends on X86 || ARM || COMPILE_TEST
        help
          If you say Y here you get support for the ChromeOS Embedded
          Controller (EC) providing keyboard, battery and power services.
@@ -105,7 +106,7 @@ config MFD_CROS_EC
 config MFD_CROS_EC_I2C
        tristate "ChromeOS Embedded Controller (I2C)"
-        depends on MFD_CROS_EC && CROS_EC_PROTO && I2C
+        depends on MFD_CROS_EC && I2C
        help
          If you say Y here, you get support for talking to the ChromeOS
@@ -115,7 +116,7 @@ config MFD_CROS_EC_I2C
 config MFD_CROS_EC_SPI
        tristate "ChromeOS Embedded Controller (SPI)"
-        depends on MFD_CROS_EC && CROS_EC_PROTO && SPI
+        depends on MFD_CROS_EC && SPI
        ---help---
          If you say Y here, you get support for talking to the ChromeOS EC
@@ -186,6 +187,18 @@ config MFD_DA9055
          This driver can be built as a module. If built as a module it will be
          called "da9055"
+config MFD_DA9062
+        tristate "Dialog Semiconductor DA9062 PMIC Support"
+        select MFD_CORE
+        select REGMAP_I2C
+        select REGMAP_IRQ
+        depends on I2C=y
+        help
+          Say yes here for support for the Dialog Semiconductor DA9062 PMIC.
+          This includes the I2C driver and core APIs.
+          Additional drivers must be enabled in order to use the functionality
+          of the device.
 config MFD_DA9063
        bool "Dialog Semiconductor DA9063 PMIC Support"
        select MFD_CORE
@@ -398,12 +411,14 @@ config MFD_KEMPLD
          device may provide functions like watchdog, GPIO, UART and I2C bus.
          The following modules are supported:
+                * COMe-bBL6
                * COMe-bHL6
                * COMe-bIP#
                * COMe-bPC2 (ETXexpress-PC)
                * COMe-bSC# (ETXexpress-SC T#)
                * COMe-cBL6
                * COMe-cBT6
+                * COMe-cBW6
                * COMe-cCT6
                * COMe-cDC2 (microETXexpress-DC)
                * COMe-cHL6
@@ -1379,6 +1394,12 @@ config MFD_WM8997
        help
          Support for Wolfson Microelectronics WM8997 low power audio SoC
+config MFD_WM8998
+        bool "Wolfson Microelectronics WM8998"
+        depends on MFD_ARIZONA
+        help
+          Support for Wolfson Microelectronics WM8998 low power audio SoC
 config MFD_WM8400
        bool "Wolfson Microelectronics WM8400"
        select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 9d730a2d1878..a59e3fcc8626 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -48,6 +48,9 @@ endif
 ifeq ($(CONFIG_MFD_WM8997),y)
 obj-$(CONFIG_MFD_ARIZONA)       += wm8997-tables.o
 endif
+ifeq ($(CONFIG_MFD_WM8998),y)
+obj-$(CONFIG_MFD_ARIZONA)       += wm8998-tables.o
+endif
 obj-$(CONFIG_MFD_WM8400)        += wm8400-core.o
 wm831x-objs                     := wm831x-core.o wm831x-irq.o wm831x-otp.o
 wm831x-objs                     += wm831x-auxadc.o
@@ -110,10 +113,11 @@ obj-$(CONFIG_MFD_LP8788)	+= lp8788.o lp8788-irq.o
 da9055-objs                     := da9055-core.o da9055-i2c.o
 obj-$(CONFIG_MFD_DA9055)        += da9055.o
+obj-$(CONFIG_MFD_DA9062)        += da9062-core.o
 da9063-objs                     := da9063-core.o da9063-irq.o da9063-i2c.o
 obj-$(CONFIG_MFD_DA9063)        += da9063.o
 obj-$(CONFIG_MFD_DA9150)        += da9150-core.o
 obj-$(CONFIG_MFD_MAX14577)      += max14577.o
 obj-$(CONFIG_MFD_MAX77686)      += max77686.o
 obj-$(CONFIG_MFD_MAX77693)      += max77693.o
diff --git a/drivers/mfd/aat2870-core.c b/drivers/mfd/aat2870-core.c
index 4e6e03d63e12..29b6a2d4ac72 100644
--- a/drivers/mfd/aat2870-core.c
+++ b/drivers/mfd/aat2870-core.c
@@ -500,7 +500,6 @@ MODULE_DEVICE_TABLE(i2c, aat2870_i2c_id_table);
 static struct i2c_driver aat2870_i2c_driver = {
        .driver = {
                .name   = "aat2870",
-                .owner  = THIS_MODULE,
                .pm     = &aat2870_pm_ops,
        },
        .probe          = aat2870_i2c_probe,
diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c
index 4659ac1db039..f0afb44271f8 100644
--- a/drivers/mfd/ab3100-core.c
+++ b/drivers/mfd/ab3100-core.c
@@ -972,7 +972,6 @@ MODULE_DEVICE_TABLE(i2c, ab3100_id);
 static struct i2c_driver ab3100_driver = {
        .driver = {
                .name   = "ab3100",
-                .owner  = THIS_MODULE,
        },
        .id_table       = ab3100_id,
        .probe          = ab3100_probe,
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c
index 000da72a0ae9..fefbe4cfa61d 100644
--- a/drivers/mfd/ab8500-core.c
+++ b/drivers/mfd/ab8500-core.c
@@ -565,11 +565,7 @@ static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_and_handler(virq, &ab8500_irq_chip,
                                handle_simple_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/adp5520.c b/drivers/mfd/adp5520.c
index f495b8b57dd7..ae88654595dc 100644
--- a/drivers/mfd/adp5520.c
+++ b/drivers/mfd/adp5520.c
@@ -351,7 +351,6 @@ MODULE_DEVICE_TABLE(i2c, adp5520_id);
 static struct i2c_driver adp5520_driver = {
        .driver = {
                .name   = "adp5520",
-                .owner  = THIS_MODULE,
                .pm     = &adp5520_pm,
        },
        .probe          = adp5520_probe,
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index a72ddb295078..08b36fa5b0c5 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -30,7 +30,7 @@
 #include "arizona.h"
-static const char *wm5102_core_supplies[] = {
+static const char * const wm5102_core_supplies[] = {
        "AVDD",
        "DBVDD1",
 };
@@ -146,17 +146,31 @@ static irqreturn_t arizona_underclocked(int irq, void *data)
 static irqreturn_t arizona_overclocked(int irq, void *data)
 {
        struct arizona *arizona = data;
-        unsigned int val[2];
+        unsigned int val[3];
        int ret;
-        
        ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
-                               &val[0], 2);
+                               &val[0], 3);
        if (ret != 0) {
                dev_err(arizona->dev, "Failed to read overclock status: %d\n",
                        ret);
                return IRQ_NONE;
        }
+        switch (arizona->type) {
+        case WM8998:
+        case WM1814:
+                /* Some bits are shifted on WM8998,
+                 * rearrange to match the standard bit layout
+                 */
+                val[0] = ((val[0] & 0x60e0) >> 1) |
+                         ((val[0] & 0x1e00) >> 2) |
+                         (val[0] & 0x000f);
+                break;
+        default:
+                break;
+        }
        if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
                dev_err(arizona->dev, "PWM overclocked\n");
        if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
@@ -201,6 +215,9 @@ static irqreturn_t arizona_overclocked(int irq, void *data)
        if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
                dev_err(arizona->dev, "ISRC1 overclocked\n");
+        if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
+                dev_err(arizona->dev, "SPDIF overclocked\n");
        return IRQ_HANDLED;
 }
@@ -550,9 +567,8 @@ static int arizona_runtime_resume(struct device *dev)
                break;
        default:
                ret = arizona_wait_for_boot(arizona);
-                if (ret != 0) {
+                if (ret != 0)
                        goto err;
-                }
                if (arizona->external_dcvdd) {
                        ret = regmap_update_bits(arizona->regmap,
@@ -759,8 +775,8 @@ static int arizona_of_get_core_pdata(struct arizona *arizona)
        ret = of_property_read_u32_array(arizona->dev->of_node,
                                         "wlf,gpio-defaults",
-                                         arizona->pdata.gpio_defaults,
+                                         pdata->gpio_defaults,
-                                         ARRAY_SIZE(arizona->pdata.gpio_defaults));
+                                         ARRAY_SIZE(pdata->gpio_defaults));
        if (ret >= 0) {
                /*
                 * All values are literal except out of range values
@@ -768,11 +784,11 @@ static int arizona_of_get_core_pdata(struct arizona *arizona)
                 * data which uses 0 as chip default and out of range
                 * as zero.
                 */
-                for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
+                for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
-                        if (arizona->pdata.gpio_defaults[i] > 0xffff)
+                        if (pdata->gpio_defaults[i] > 0xffff)
-                                arizona->pdata.gpio_defaults[i] = 0;
+                                pdata->gpio_defaults[i] = 0;
-                        else if (arizona->pdata.gpio_defaults[i] == 0)
+                        else if (pdata->gpio_defaults[i] == 0)
-                                arizona->pdata.gpio_defaults[i] = 0x10000;
+                                pdata->gpio_defaults[i] = 0x10000;
                }
        } else {
                dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
@@ -781,20 +797,20 @@ static int arizona_of_get_core_pdata(struct arizona *arizona)
        of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
                                 cur, val) {
-                if (count == ARRAY_SIZE(arizona->pdata.inmode))
+                if (count == ARRAY_SIZE(pdata->inmode))
                        break;
-                arizona->pdata.inmode[count] = val;
+                pdata->inmode[count] = val;
                count++;
        }
        count = 0;
        of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
                                 cur, val) {
-                if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
+                if (count == ARRAY_SIZE(pdata->dmic_ref))
                        break;
-                arizona->pdata.dmic_ref[count] = val;
+                pdata->dmic_ref[count] = val;
                count++;
        }
@@ -806,6 +822,8 @@ const struct of_device_id arizona_of_match[] = {
        { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
        { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
        { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
+        { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
+        { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
        {},
 };
 EXPORT_SYMBOL_GPL(arizona_of_match);
@@ -820,7 +838,7 @@ static const struct mfd_cell early_devs[] = {
        { .name = "arizona-ldo1" },
 };
-static const char *wm5102_supplies[] = {
+static const char * const wm5102_supplies[] = {
        "MICVDD",
        "DBVDD2",
        "DBVDD3",
@@ -863,7 +881,7 @@ static const struct mfd_cell wm5110_devs[] = {
        },
 };
-static const char *wm8997_supplies[] = {
+static const char * const wm8997_supplies[] = {
        "MICVDD",
        "DBVDD2",
        "CPVDD",
@@ -887,11 +905,28 @@ static const struct mfd_cell wm8997_devs[] = {
        },
 };
+static const struct mfd_cell wm8998_devs[] = {
+        {
+                .name = "arizona-extcon",
+                .parent_supplies = wm5102_supplies,
+                .num_parent_supplies = 1, /* We only need MICVDD */
+        },
+        { .name = "arizona-gpio" },
+        { .name = "arizona-haptics" },
+        { .name = "arizona-pwm" },
+        {
+                .name = "wm8998-codec",
+                .parent_supplies = wm5102_supplies,
+                .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
+        },
+        { .name = "arizona-micsupp" },
+};
 int arizona_dev_init(struct arizona *arizona)
 {
        struct device *dev = arizona->dev;
        const char *type_name;
-        unsigned int reg, val;
+        unsigned int reg, val, mask;
        int (*apply_patch)(struct arizona *) = NULL;
        int ret, i;
@@ -911,6 +946,8 @@ int arizona_dev_init(struct arizona *arizona)
        case WM5110:
        case WM8280:
        case WM8997:
+        case WM8998:
+        case WM1814:
                for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
                        arizona->core_supplies[i].supply
                                = wm5102_core_supplies[i];
@@ -992,6 +1029,7 @@ int arizona_dev_init(struct arizona *arizona)
        switch (reg) {
        case 0x5102:
        case 0x5110:
+        case 0x6349:
        case 0x8997:
                break;
        default:
@@ -1093,6 +1131,27 @@ int arizona_dev_init(struct arizona *arizona)
                apply_patch = wm8997_patch;
                break;
 #endif
+#ifdef CONFIG_MFD_WM8998
+        case 0x6349:
+                switch (arizona->type) {
+                case WM8998:
+                        type_name = "WM8998";
+                        break;
+                case WM1814:
+                        type_name = "WM1814";
+                        break;
+                default:
+                        type_name = "WM8998";
+                        dev_err(arizona->dev, "WM8998 registered as %d\n",
+                                arizona->type);
+                        arizona->type = WM8998;
+                }
+                apply_patch = wm8998_patch;
+                break;
+#endif
        default:
                dev_err(arizona->dev, "Unknown device ID %x\n", reg);
                goto err_reset;
@@ -1204,14 +1263,38 @@ int arizona_dev_init(struct arizona *arizona)
                        << ARIZONA_IN1_DMIC_SUP_SHIFT;
                if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
                        val |= 1 << ARIZONA_IN1_MODE_SHIFT;
-                if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
-                        val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
+                switch (arizona->type) {
+                case WM8998:
+                case WM1814:
+                        regmap_update_bits(arizona->regmap,
+                                ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
+                                ARIZONA_IN1L_SRC_SE_MASK,
+                                (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
+                                        << ARIZONA_IN1L_SRC_SE_SHIFT);
+                        regmap_update_bits(arizona->regmap,
+                                ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
+                                ARIZONA_IN1R_SRC_SE_MASK,
+                                (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
+                                        << ARIZONA_IN1R_SRC_SE_SHIFT);
+                        mask = ARIZONA_IN1_DMIC_SUP_MASK |
+                                ARIZONA_IN1_MODE_MASK;
+                        break;
+                default:
+                        if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
+                                val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
+                        mask = ARIZONA_IN1_DMIC_SUP_MASK |
+                                ARIZONA_IN1_MODE_MASK |
+                                ARIZONA_IN1_SINGLE_ENDED_MASK;
+                        break;
+                }
                regmap_update_bits(arizona->regmap,
                                   ARIZONA_IN1L_CONTROL + (i * 8),
-                                   ARIZONA_IN1_DMIC_SUP_MASK |
+                                   mask, val);
-                                   ARIZONA_IN1_MODE_MASK |
-                                   ARIZONA_IN1_SINGLE_ENDED_MASK, val);
        }
        for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
@@ -1273,6 +1356,11 @@ int arizona_dev_init(struct arizona *arizona)
                ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
                                      ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
                break;
+        case WM8998:
+        case WM1814:
+                ret = mfd_add_devices(arizona->dev, -1, wm8998_devs,
+                                      ARRAY_SIZE(wm8998_devs), NULL, 0, NULL);
+                break;
        }
        if (ret != 0) {
diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c
index ff782a5de235..cea1b409fa27 100644
--- a/drivers/mfd/arizona-i2c.c
+++ b/drivers/mfd/arizona-i2c.c
@@ -53,6 +53,12 @@ static int arizona_i2c_probe(struct i2c_client *i2c,
                regmap_config = &wm8997_i2c_regmap;
                break;
 #endif
+#ifdef CONFIG_MFD_WM8998
+        case WM8998:
+        case WM1814:
+                regmap_config = &wm8998_i2c_regmap;
+                break;
+#endif
        default:
                dev_err(&i2c->dev, "Unknown device type %ld\n",
                        id->driver_data);
@@ -90,6 +96,8 @@ static const struct i2c_device_id arizona_i2c_id[] = {
        { "wm5110", WM5110 },
        { "wm8280", WM8280 },
        { "wm8997", WM8997 },
+        { "wm8998", WM8998 },
+        { "wm1814", WM1814 },
        { }
 };
 MODULE_DEVICE_TABLE(i2c, arizona_i2c_id);
@@ -97,7 +105,6 @@ MODULE_DEVICE_TABLE(i2c, arizona_i2c_id);
 static struct i2c_driver arizona_i2c_driver = {
        .driver = {
                .name   = "arizona",
-                .owner  = THIS_MODULE,
                .pm     = &arizona_pm_ops,
                .of_match_table = of_match_ptr(arizona_of_match),
        },
diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c
index 2b9965d53e4e..2cac4f463f1e 100644
--- a/drivers/mfd/arizona-irq.c
+++ b/drivers/mfd/arizona-irq.c
@@ -174,14 +174,7 @@ static int arizona_irq_map(struct irq_domain *h, unsigned int virq,
        irq_set_chip_data(virq, data);
        irq_set_chip_and_handler(virq, &arizona_irq_chip, handle_simple_irq);
        irq_set_nested_thread(virq, 1);
-        /* ARM needs us to explicitly flag the IRQ as valid
-         * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
@@ -234,6 +227,15 @@ int arizona_irq_init(struct arizona *arizona)
                arizona->ctrlif_error = false;
                break;
 #endif
+#ifdef CONFIG_MFD_WM8998
+        case WM8998:
+        case WM1814:
+                aod = &wm8998_aod;
+                irq = &wm8998_irq;
+                arizona->ctrlif_error = false;
+                break;
+#endif
        default:
                BUG_ON("Unknown Arizona class device" == NULL);
                return -EINVAL;
diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h
index fbe2843271c5..3af12e938f57 100644
--- a/drivers/mfd/arizona.h
+++ b/drivers/mfd/arizona.h
@@ -27,6 +27,8 @@ extern const struct regmap_config wm5110_spi_regmap;
 extern const struct regmap_config wm8997_i2c_regmap;
+extern const struct regmap_config wm8998_i2c_regmap;
 extern const struct dev_pm_ops arizona_pm_ops;
 extern const struct of_device_id arizona_of_match[];
@@ -41,6 +43,9 @@ extern const struct regmap_irq_chip wm5110_revd_irq;
 extern const struct regmap_irq_chip wm8997_aod;
 extern const struct regmap_irq_chip wm8997_irq;
+extern struct regmap_irq_chip wm8998_aod;
+extern struct regmap_irq_chip wm8998_irq;
 int arizona_dev_init(struct arizona *arizona);
 int arizona_dev_exit(struct arizona *arizona);
 int arizona_irq_init(struct arizona *arizona);
diff --git a/drivers/mfd/as3711.c b/drivers/mfd/as3711.c
index d9706ede8d39..d001f7e238f5 100644
--- a/drivers/mfd/as3711.c
+++ b/drivers/mfd/as3711.c
@@ -211,7 +211,6 @@ MODULE_DEVICE_TABLE(i2c, as3711_i2c_id);
 static struct i2c_driver as3711_i2c_driver = {
        .driver = {
                   .name = "as3711",
-                   .owner = THIS_MODULE,
                   .of_match_table = of_match_ptr(as3711_of_match),
        },
        .probe = as3711_i2c_probe,
diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c
index 39fa554f13bb..924ea90494ae 100644
--- a/drivers/mfd/as3722.c
+++ b/drivers/mfd/as3722.c
@@ -437,7 +437,6 @@ MODULE_DEVICE_TABLE(i2c, as3722_i2c_id);
 static struct i2c_driver as3722_i2c_driver = {
        .driver = {
                .name = "as3722",
-                .owner = THIS_MODULE,
                .of_match_table = as3722_of_match,
        },
        .probe = as3722_i2c_probe,
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 120df5c08741..4b54128bc78e 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -411,7 +411,7 @@ static int __init asic3_irq_probe(struct platform_device *pdev)
                irq_set_chip_data(irq, asic);
                irq_set_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+                irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
        }
        asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK),
@@ -431,7 +431,7 @@ static void asic3_irq_remove(struct platform_device *pdev)
        irq_base = asic->irq_base;
        for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) {
-                set_irq_flags(irq, 0);
+                irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
                irq_set_chip_and_handler(irq, NULL, NULL);
                irq_set_chip_data(irq, NULL);
        }
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
index cfd58f4cc5c3..3fff6b5d0426 100644
--- a/drivers/mfd/atmel-hlcdc.c
+++ b/drivers/mfd/atmel-hlcdc.c
@@ -18,6 +18,7 @@
 */
 #include <linux/clk.h>
+#include <linux/iopoll.h>
 #include <linux/mfd/atmel-hlcdc.h>
 #include <linux/mfd/core.h>
 #include <linux/module.h>
@@ -26,6 +27,10 @@
 #define ATMEL_HLCDC_REG_MAX             (0x4000 - 0x4)
+struct atmel_hlcdc_regmap {
+        void __iomem *regs;
+};
 static const struct mfd_cell atmel_hlcdc_cells[] = {
        {
                .name = "atmel-hlcdc-pwm",
@@ -37,28 +42,62 @@ static const struct mfd_cell atmel_hlcdc_cells[] = {
        },
 };
+static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
+                                        unsigned int val)
+{
+        struct atmel_hlcdc_regmap *hregmap = context;
+        if (reg <= ATMEL_HLCDC_DIS) {
+                u32 status;
+                readl_poll_timeout(hregmap->regs + ATMEL_HLCDC_SR, status,
+                                   !(status & ATMEL_HLCDC_SIP), 1, 100);
+        }
+        writel(val, hregmap->regs + reg);
+        return 0;
+}
+static int regmap_atmel_hlcdc_reg_read(void *context, unsigned int reg,
+                                       unsigned int *val)
+{
+        struct atmel_hlcdc_regmap *hregmap = context;
+        *val = readl(hregmap->regs + reg);
+        return 0;
+}
 static const struct regmap_config atmel_hlcdc_regmap_config = {
        .reg_bits = 32,
        .val_bits = 32,
        .reg_stride = 4,
        .max_register = ATMEL_HLCDC_REG_MAX,
+        .reg_write = regmap_atmel_hlcdc_reg_write,
+        .reg_read = regmap_atmel_hlcdc_reg_read,
+        .fast_io = true,
 };
 static int atmel_hlcdc_probe(struct platform_device *pdev)
 {
+        struct atmel_hlcdc_regmap *hregmap;
        struct device *dev = &pdev->dev;
        struct atmel_hlcdc *hlcdc;
        struct resource *res;
-        void __iomem *regs;
+        hregmap = devm_kzalloc(dev, sizeof(*hregmap), GFP_KERNEL);
+        if (!hregmap)
+                return -ENOMEM;
        hlcdc = devm_kzalloc(dev, sizeof(*hlcdc), GFP_KERNEL);
        if (!hlcdc)
                return -ENOMEM;
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        regs = devm_ioremap_resource(dev, res);
+        hregmap->regs = devm_ioremap_resource(dev, res);
-        if (IS_ERR(regs))
+        if (IS_ERR(hregmap->regs))
-                return PTR_ERR(regs);
+                return PTR_ERR(hregmap->regs);
        hlcdc->irq = platform_get_irq(pdev, 0);
        if (hlcdc->irq < 0)
@@ -82,8 +121,8 @@ static int atmel_hlcdc_probe(struct platform_device *pdev)
                return PTR_ERR(hlcdc->slow_clk);
        }
-        hlcdc->regmap = devm_regmap_init_mmio(dev, regs,
+        hlcdc->regmap = devm_regmap_init(dev, NULL, hregmap,
-                                              &atmel_hlcdc_regmap_config);
+                                         &atmel_hlcdc_regmap_config);
        if (IS_ERR(hlcdc->regmap))
                return PTR_ERR(hlcdc->regmap);
@@ -102,7 +141,11 @@ static int atmel_hlcdc_remove(struct platform_device *pdev)
 }
 static const struct of_device_id atmel_hlcdc_match[] = {
+        { .compatible = "atmel,at91sam9n12-hlcdc" },
+        { .compatible = "atmel,at91sam9x5-hlcdc" },
+        { .compatible = "atmel,sama5d2-hlcdc" },
        { .compatible = "atmel,sama5d3-hlcdc" },
+        { .compatible = "atmel,sama5d4-hlcdc" },
        { /* sentinel */ },
 };
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 6df91556faf3..3f576b76c322 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -30,19 +30,47 @@
 #define AXP20X_OFF      0x80
 static const char * const axp20x_model_names[] = {
+        "AXP152",
        "AXP202",
        "AXP209",
        "AXP221",
        "AXP288",
 };
+static const struct regmap_range axp152_writeable_ranges[] = {
+        regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
+        regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
+};
+static const struct regmap_range axp152_volatile_ranges[] = {
+        regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
+        regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
+        regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
+};
+static const struct regmap_access_table axp152_writeable_table = {
+        .yes_ranges     = axp152_writeable_ranges,
+        .n_yes_ranges   = ARRAY_SIZE(axp152_writeable_ranges),
+};
+static const struct regmap_access_table axp152_volatile_table = {
+        .yes_ranges     = axp152_volatile_ranges,
+        .n_yes_ranges   = ARRAY_SIZE(axp152_volatile_ranges),
+};
 static const struct regmap_range axp20x_writeable_ranges[] = {
        regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
        regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
+        regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
 };
 static const struct regmap_range axp20x_volatile_ranges[] = {
+        regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
+        regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
        regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
+        regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
+        regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
+        regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
 };
 static const struct regmap_access_table axp20x_writeable_table = {
@@ -93,6 +121,11 @@ static const struct regmap_access_table axp288_volatile_table = {
        .n_yes_ranges   = ARRAY_SIZE(axp288_volatile_ranges),
 };
+static struct resource axp152_pek_resources[] = {
+        DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
+        DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
+};
 static struct resource axp20x_pek_resources[] = {
        {
                .name   = "PEK_DBR",
@@ -107,6 +140,13 @@ static struct resource axp20x_pek_resources[] = {
        },
 };
+static struct resource axp20x_usb_power_supply_resources[] = {
+        DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
+        DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
+        DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
+        DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
+};
 static struct resource axp22x_pek_resources[] = {
        {
                .name   = "PEK_DBR",
@@ -154,12 +194,21 @@ static struct resource axp288_fuel_gauge_resources[] = {
        },
 };
+static const struct regmap_config axp152_regmap_config = {
+        .reg_bits       = 8,
+        .val_bits       = 8,
+        .wr_table       = &axp152_writeable_table,
+        .volatile_table = &axp152_volatile_table,
+        .max_register   = AXP152_PWM1_DUTY_CYCLE,
+        .cache_type     = REGCACHE_RBTREE,
+};
 static const struct regmap_config axp20x_regmap_config = {
        .reg_bits       = 8,
        .val_bits       = 8,
        .wr_table       = &axp20x_writeable_table,
        .volatile_table = &axp20x_volatile_table,
-        .max_register   = AXP20X_FG_RES,
+        .max_register   = AXP20X_OCV(AXP20X_OCV_MAX),
        .cache_type     = REGCACHE_RBTREE,
 };
@@ -184,6 +233,26 @@ static const struct regmap_config axp288_regmap_config = {
 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)                    \
        [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
+static const struct regmap_irq axp152_regmap_irqs[] = {
+        INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT,         0, 6),
+        INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL,         0, 5),
+        INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT,        0, 3),
+        INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL,        0, 2),
+        INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW,            1, 5),
+        INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW,            1, 4),
+        INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW,            1, 3),
+        INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW,            1, 2),
+        INIT_REGMAP_IRQ(AXP152, PEK_SHORT,              1, 1),
+        INIT_REGMAP_IRQ(AXP152, PEK_LONG,               1, 0),
+        INIT_REGMAP_IRQ(AXP152, TIMER,                  2, 7),
+        INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE,           2, 6),
+        INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE,           2, 5),
+        INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT,            2, 3),
+        INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT,            2, 2),
+        INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT,            2, 1),
+        INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT,            2, 0),
+};
 static const struct regmap_irq axp20x_regmap_irqs[] = {
        INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V,            0, 7),
        INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN,            0, 6),
@@ -293,6 +362,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
 };
 static const struct of_device_id axp20x_of_match[] = {
+        { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },
        { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
        { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
        { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
@@ -317,6 +387,18 @@ static const struct acpi_device_id axp20x_acpi_match[] = {
 };
 MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);
+static const struct regmap_irq_chip axp152_regmap_irq_chip = {
+        .name                   = "axp152_irq_chip",
+        .status_base            = AXP152_IRQ1_STATE,
+        .ack_base               = AXP152_IRQ1_STATE,
+        .mask_base              = AXP152_IRQ1_EN,
+        .mask_invert            = true,
+        .init_ack_masked        = true,
+        .irqs                   = axp152_regmap_irqs,
+        .num_irqs               = ARRAY_SIZE(axp152_regmap_irqs),
+        .num_regs               = 3,
+};
 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
        .name                   = "axp20x_irq_chip",
        .status_base            = AXP20X_IRQ1_STATE,
@@ -357,11 +439,16 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
 static struct mfd_cell axp20x_cells[] = {
        {
-                .name                   = "axp20x-pek",
+                .name           = "axp20x-pek",
-                .num_resources          = ARRAY_SIZE(axp20x_pek_resources),
+                .num_resources  = ARRAY_SIZE(axp20x_pek_resources),
-                .resources              = axp20x_pek_resources,
+                .resources      = axp20x_pek_resources,
        }, {
-                .name                   = "axp20x-regulator",
+                .name           = "axp20x-regulator",
+        }, {
+                .name           = "axp20x-usb-power-supply",
+                .of_compatible  = "x-powers,axp202-usb-power-supply",
+                .num_resources  = ARRAY_SIZE(axp20x_usb_power_supply_resources),
+                .resources      = axp20x_usb_power_supply_resources,
        },
 };
@@ -375,6 +462,14 @@ static struct mfd_cell axp22x_cells[] = {
        },
 };
+static struct mfd_cell axp152_cells[] = {
+        {
+                .name                   = "axp20x-pek",
+                .num_resources          = ARRAY_SIZE(axp152_pek_resources),
+                .resources              = axp152_pek_resources,
+        },
+};
 static struct resource axp288_adc_resources[] = {
        {
                .name  = "GPADC",
@@ -513,6 +608,12 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
        }
        switch (axp20x->variant) {
+        case AXP152_ID:
+                axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
+                axp20x->cells = axp152_cells;
+                axp20x->regmap_cfg = &axp152_regmap_config;
+                axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
+                break;
        case AXP202_ID:
        case AXP209_ID:
                axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
@@ -613,7 +714,6 @@ static int axp20x_i2c_remove(struct i2c_client *i2c)
 static struct i2c_driver axp20x_i2c_driver = {
        .driver = {
                .name   = "axp20x",
-                .owner  = THIS_MODULE,
                .of_match_table = of_match_ptr(axp20x_of_match),
                .acpi_match_table = ACPI_PTR(axp20x_acpi_match),
        },
diff --git a/drivers/mfd/bcm590xx.c b/drivers/mfd/bcm590xx.c
index e334de000e8c..da2af5b4f855 100644
--- a/drivers/mfd/bcm590xx.c
+++ b/drivers/mfd/bcm590xx.c
@@ -117,7 +117,6 @@ MODULE_DEVICE_TABLE(i2c, bcm590xx_i2c_id);
 static struct i2c_driver bcm590xx_i2c_driver = {
        .driver = {
                   .name = "bcm590xx",
-                   .owner = THIS_MODULE,
                   .of_match_table = of_match_ptr(bcm590xx_of_match),
        },
        .probe = bcm590xx_i2c_probe,
diff --git a/drivers/mfd/cros_ec_i2c.c b/drivers/mfd/cros_ec_i2c.c
index b9a0963ca5c3..d06e4b46db80 100644
--- a/drivers/mfd/cros_ec_i2c.c
+++ b/drivers/mfd/cros_ec_i2c.c
@@ -353,7 +353,6 @@ MODULE_DEVICE_TABLE(i2c, cros_ec_i2c_id);
 static struct i2c_driver cros_ec_driver = {
        .driver = {
                .name   = "cros-ec-i2c",
-                .owner  = THIS_MODULE,
                .pm     = &cros_ec_i2c_pm_ops,
        },
        .probe          = cros_ec_i2c_probe,
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c
index 16f228dc243f..30a296b4e748 100644
--- a/drivers/mfd/cros_ec_spi.c
+++ b/drivers/mfd/cros_ec_spi.c
@@ -701,6 +701,12 @@ static int cros_ec_spi_resume(struct device *dev)
 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
                         cros_ec_spi_resume);
+static const struct of_device_id cros_ec_spi_of_match[] = {
+        { .compatible = "google,cros-ec-spi", },
+        { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
 static const struct spi_device_id cros_ec_spi_id[] = {
        { "cros-ec-spi", 0 },
        { }
@@ -710,6 +716,7 @@ MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
 static struct spi_driver cros_ec_driver_spi = {
        .driver = {
                .name   = "cros-ec-spi",
+                .of_match_table = of_match_ptr(cros_ec_spi_of_match),
                .owner  = THIS_MODULE,
                .pm     = &cros_ec_spi_pm_ops,
        },
diff --git a/drivers/mfd/da903x.c b/drivers/mfd/da903x.c
index e0a2e0ee603b..ef7fe2ae2fa4 100644
--- a/drivers/mfd/da903x.c
+++ b/drivers/mfd/da903x.c
@@ -550,7 +550,6 @@ static int da903x_remove(struct i2c_client *client)
 static struct i2c_driver da903x_driver = {
        .driver = {
                .name   = "da903x",
-                .owner  = THIS_MODULE,
        },
        .probe          = da903x_probe,
        .remove         = da903x_remove,
diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c
index ec39287a245b..02887001e800 100644
--- a/drivers/mfd/da9052-i2c.c
+++ b/drivers/mfd/da9052-i2c.c
@@ -195,7 +195,6 @@ static struct i2c_driver da9052_i2c_driver = {
        .id_table = da9052_i2c_id,
        .driver = {
                .name = "da9052",
-                .owner = THIS_MODULE,
 #ifdef CONFIG_OF
                .of_match_table = dialog_dt_ids,
 #endif
diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c
index d4d4c165eb95..b53e100f577c 100644
--- a/drivers/mfd/da9055-i2c.c
+++ b/drivers/mfd/da9055-i2c.c
@@ -79,7 +79,6 @@ static struct i2c_driver da9055_i2c_driver = {
        .id_table = da9055_i2c_id,
        .driver = {
                .name = "da9055-pmic",
-                .owner = THIS_MODULE,
                .of_match_table = of_match_ptr(da9055_of_match),
        },
 };
diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c
new file mode 100644
index 000000000000..f80d9471f2e7
--- /dev/null
+++ b/drivers/mfd/da9062-core.c
@@ -0,0 +1,533 @@
+/*
+ * Core, IRQ and I2C device driver for DA9062 PMIC
+ * Copyright (C) 2015  Dialog Semiconductor Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/regmap.h>
+#include <linux/irq.h>
+#include <linux/mfd/core.h>
+#include <linux/i2c.h>
+#include <linux/mfd/da9062/core.h>
+#include <linux/mfd/da9062/registers.h>
+#include <linux/regulator/of_regulator.h>
+#define DA9062_REG_EVENT_A_OFFSET       0
+#define DA9062_REG_EVENT_B_OFFSET       1
+#define DA9062_REG_EVENT_C_OFFSET       2
+static struct regmap_irq da9062_irqs[] = {
+        /* EVENT A */
+        [DA9062_IRQ_ONKEY] = {
+                .reg_offset = DA9062_REG_EVENT_A_OFFSET,
+                .mask = DA9062AA_M_NONKEY_MASK,
+        },
+        [DA9062_IRQ_ALARM] = {
+                .reg_offset = DA9062_REG_EVENT_A_OFFSET,
+                .mask = DA9062AA_M_ALARM_MASK,
+        },
+        [DA9062_IRQ_TICK] = {
+                .reg_offset = DA9062_REG_EVENT_A_OFFSET,
+                .mask = DA9062AA_M_TICK_MASK,
+        },
+        [DA9062_IRQ_WDG_WARN] = {
+                .reg_offset = DA9062_REG_EVENT_A_OFFSET,
+                .mask = DA9062AA_M_WDG_WARN_MASK,
+        },
+        [DA9062_IRQ_SEQ_RDY] = {
+                .reg_offset = DA9062_REG_EVENT_A_OFFSET,
+                .mask = DA9062AA_M_SEQ_RDY_MASK,
+        },
+        /* EVENT B */
+        [DA9062_IRQ_TEMP] = {
+                .reg_offset = DA9062_REG_EVENT_B_OFFSET,
+                .mask = DA9062AA_M_TEMP_MASK,
+        },
+        [DA9062_IRQ_LDO_LIM] = {
+                .reg_offset = DA9062_REG_EVENT_B_OFFSET,
+                .mask = DA9062AA_M_LDO_LIM_MASK,
+        },
+        [DA9062_IRQ_DVC_RDY] = {
+                .reg_offset = DA9062_REG_EVENT_B_OFFSET,
+                .mask = DA9062AA_M_DVC_RDY_MASK,
+        },
+        [DA9062_IRQ_VDD_WARN] = {
+                .reg_offset = DA9062_REG_EVENT_B_OFFSET,
+                .mask = DA9062AA_M_VDD_WARN_MASK,
+        },
+        /* EVENT C */
+        [DA9062_IRQ_GPI0] = {
+                .reg_offset = DA9062_REG_EVENT_C_OFFSET,
+                .mask = DA9062AA_M_GPI0_MASK,
+        },
+        [DA9062_IRQ_GPI1] = {
+                .reg_offset = DA9062_REG_EVENT_C_OFFSET,
+                .mask = DA9062AA_M_GPI1_MASK,
+        },
+        [DA9062_IRQ_GPI2] = {
+                .reg_offset = DA9062_REG_EVENT_C_OFFSET,
+                .mask = DA9062AA_M_GPI2_MASK,
+        },
+        [DA9062_IRQ_GPI3] = {
+                .reg_offset = DA9062_REG_EVENT_C_OFFSET,
+                .mask = DA9062AA_M_GPI3_MASK,
+        },
+        [DA9062_IRQ_GPI4] = {
+                .reg_offset = DA9062_REG_EVENT_C_OFFSET,
+                .mask = DA9062AA_M_GPI4_MASK,
+        },
+};
+static struct regmap_irq_chip da9062_irq_chip = {
+        .name = "da9062-irq",
+        .irqs = da9062_irqs,
+        .num_irqs = DA9062_NUM_IRQ,
+        .num_regs = 3,
+        .status_base = DA9062AA_EVENT_A,
+        .mask_base = DA9062AA_IRQ_MASK_A,
+        .ack_base = DA9062AA_EVENT_A,
+};
+static struct resource da9062_core_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ),
+};
+static struct resource da9062_regulators_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ),
+};
+static struct resource da9062_thermal_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ),
+};
+static struct resource da9062_wdt_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ),
+};
+static struct resource da9062_rtc_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_ALARM, 1, "ALARM", IORESOURCE_IRQ),
+        DEFINE_RES_NAMED(DA9062_IRQ_TICK, 1, "TICK", IORESOURCE_IRQ),
+};
+static struct resource da9062_onkey_resources[] = {
+        DEFINE_RES_NAMED(DA9062_IRQ_ONKEY, 1, "ONKEY", IORESOURCE_IRQ),
+};
+static const struct mfd_cell da9062_devs[] = {
+        {
+                .name           = "da9062-core",
+                .num_resources  = ARRAY_SIZE(da9062_core_resources),
+                .resources      = da9062_core_resources,
+        },
+        {
+                .name           = "da9062-regulators",
+                .num_resources  = ARRAY_SIZE(da9062_regulators_resources),
+                .resources      = da9062_regulators_resources,
+        },
+        {
+                .name           = "da9062-watchdog",
+                .num_resources  = ARRAY_SIZE(da9062_wdt_resources),
+                .resources      = da9062_wdt_resources,
+                .of_compatible  = "dlg,da9062-wdt",
+        },
+        {
+                .name           = "da9062-thermal",
+                .num_resources  = ARRAY_SIZE(da9062_thermal_resources),
+                .resources      = da9062_thermal_resources,
+                .of_compatible  = "dlg,da9062-thermal",
+        },
+        {
+                .name           = "da9062-rtc",
+                .num_resources  = ARRAY_SIZE(da9062_rtc_resources),
+                .resources      = da9062_rtc_resources,
+                .of_compatible  = "dlg,da9062-rtc",
+        },
+        {
+                .name           = "da9062-onkey",
+                .num_resources  = ARRAY_SIZE(da9062_onkey_resources),
+                .resources      = da9062_onkey_resources,
+                .of_compatible = "dlg,da9062-onkey",
+        },
+};
+static int da9062_clear_fault_log(struct da9062 *chip)
+{
+        int ret;
+        int fault_log;
+        ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);
+        if (ret < 0)
+                return ret;
+        if (fault_log) {
+                if (fault_log & DA9062AA_TWD_ERROR_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: TWD_ERROR\n");
+                if (fault_log & DA9062AA_POR_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: POR\n");
+                if (fault_log & DA9062AA_VDD_FAULT_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: VDD_FAULT\n");
+                if (fault_log & DA9062AA_VDD_START_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: VDD_START\n");
+                if (fault_log & DA9062AA_TEMP_CRIT_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: TEMP_CRIT\n");
+                if (fault_log & DA9062AA_KEY_RESET_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: KEY_RESET\n");
+                if (fault_log & DA9062AA_NSHUTDOWN_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: NSHUTDOWN\n");
+                if (fault_log & DA9062AA_WAIT_SHUT_MASK)
+                        dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n");
+                ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,
+                                   fault_log);
+        }
+        return ret;
+}
+int get_device_type(struct da9062 *chip)
+{
+        int device_id, variant_id, variant_mrc;
+        int ret;
+        ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);
+        if (ret < 0) {
+                dev_err(chip->dev, "Cannot read chip ID.\n");
+                return -EIO;
+        }
+        if (device_id != DA9062_PMIC_DEVICE_ID) {
+                dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
+                return -ENODEV;
+        }
+        ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);
+        if (ret < 0) {
+                dev_err(chip->dev, "Cannot read chip variant id.\n");
+                return -EIO;
+        }
+        dev_info(chip->dev,
+                 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n",
+                 device_id, variant_id);
+        variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;
+        if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {
+                dev_err(chip->dev,
+                        "Cannot support variant MRC: 0x%02X\n", variant_mrc);
+                return -ENODEV;
+        }
+        return ret;
+}
+static const struct regmap_range da9062_aa_readable_ranges[] = {
+        {
+                .range_min = DA9062AA_PAGE_CON,
+                .range_max = DA9062AA_STATUS_B,
+        }, {
+                .range_min = DA9062AA_STATUS_D,
+                .range_max = DA9062AA_EVENT_C,
+        }, {
+                .range_min = DA9062AA_IRQ_MASK_A,
+                .range_max = DA9062AA_IRQ_MASK_C,
+        }, {
+                .range_min = DA9062AA_CONTROL_A,
+                .range_max = DA9062AA_GPIO_4,
+        }, {
+                .range_min = DA9062AA_GPIO_WKUP_MODE,
+                .range_max = DA9062AA_BUCK4_CONT,
+        }, {
+                .range_min = DA9062AA_BUCK3_CONT,
+                .range_max = DA9062AA_BUCK3_CONT,
+        }, {
+                .range_min = DA9062AA_LDO1_CONT,
+                .range_max = DA9062AA_LDO4_CONT,
+        }, {
+                .range_min = DA9062AA_DVC_1,
+                .range_max = DA9062AA_DVC_1,
+        }, {
+                .range_min = DA9062AA_COUNT_S,
+                .range_max = DA9062AA_SECOND_D,
+        }, {
+                .range_min = DA9062AA_SEQ,
+                .range_max = DA9062AA_ID_4_3,
+        }, {
+                .range_min = DA9062AA_ID_12_11,
+                .range_max = DA9062AA_ID_16_15,
+        }, {
+                .range_min = DA9062AA_ID_22_21,
+                .range_max = DA9062AA_ID_32_31,
+        }, {
+                .range_min = DA9062AA_SEQ_A,
+                .range_max = DA9062AA_BUCK3_CFG,
+        }, {
+                .range_min = DA9062AA_VBUCK2_A,
+                .range_max = DA9062AA_VBUCK4_A,
+        }, {
+                .range_min = DA9062AA_VBUCK3_A,
+                .range_max = DA9062AA_VBUCK3_A,
+        }, {
+                .range_min = DA9062AA_VLDO1_A,
+                .range_max = DA9062AA_VLDO4_A,
+        }, {
+                .range_min = DA9062AA_VBUCK2_B,
+                .range_max = DA9062AA_VBUCK4_B,
+        }, {
+                .range_min = DA9062AA_VBUCK3_B,
+                .range_max = DA9062AA_VBUCK3_B,
+        }, {
+                .range_min = DA9062AA_VLDO1_B,
+                .range_max = DA9062AA_VLDO4_B,
+        }, {
+                .range_min = DA9062AA_BBAT_CONT,
+                .range_max = DA9062AA_BBAT_CONT,
+        }, {
+                .range_min = DA9062AA_INTERFACE,
+                .range_max = DA9062AA_CONFIG_E,
+        }, {
+                .range_min = DA9062AA_CONFIG_G,
+                .range_max = DA9062AA_CONFIG_K,
+        }, {
+                .range_min = DA9062AA_CONFIG_M,
+                .range_max = DA9062AA_CONFIG_M,
+        }, {
+                .range_min = DA9062AA_TRIM_CLDR,
+                .range_max = DA9062AA_GP_ID_19,
+        }, {
+                .range_min = DA9062AA_DEVICE_ID,
+                .range_max = DA9062AA_CONFIG_ID,
+        },
+};
+static const struct regmap_range da9062_aa_writeable_ranges[] = {
+        {
+                .range_min = DA9062AA_PAGE_CON,
+                .range_max = DA9062AA_PAGE_CON,
+        }, {
+                .range_min = DA9062AA_FAULT_LOG,
+                .range_max = DA9062AA_EVENT_C,
+        }, {
+                .range_min = DA9062AA_IRQ_MASK_A,
+                .range_max = DA9062AA_IRQ_MASK_C,
+        }, {
+                .range_min = DA9062AA_CONTROL_A,
+                .range_max = DA9062AA_GPIO_4,
+        }, {
+                .range_min = DA9062AA_GPIO_WKUP_MODE,
+                .range_max = DA9062AA_BUCK4_CONT,
+        }, {
+                .range_min = DA9062AA_BUCK3_CONT,
+                .range_max = DA9062AA_BUCK3_CONT,
+        }, {
+                .range_min = DA9062AA_LDO1_CONT,
+                .range_max = DA9062AA_LDO4_CONT,
+        }, {
+                .range_min = DA9062AA_DVC_1,
+                .range_max = DA9062AA_DVC_1,
+        }, {
+                .range_min = DA9062AA_COUNT_S,
+                .range_max = DA9062AA_ALARM_Y,
+        }, {
+                .range_min = DA9062AA_SEQ,
+                .range_max = DA9062AA_ID_4_3,
+        }, {
+                .range_min = DA9062AA_ID_12_11,
+                .range_max = DA9062AA_ID_16_15,
+        }, {
+                .range_min = DA9062AA_ID_22_21,
+                .range_max = DA9062AA_ID_32_31,
+        }, {
+                .range_min = DA9062AA_SEQ_A,
+                .range_max = DA9062AA_BUCK3_CFG,
+        }, {
+                .range_min = DA9062AA_VBUCK2_A,
+                .range_max = DA9062AA_VBUCK4_A,
+        }, {
+                .range_min = DA9062AA_VBUCK3_A,
+                .range_max = DA9062AA_VBUCK3_A,
+        }, {
+                .range_min = DA9062AA_VLDO1_A,
+                .range_max = DA9062AA_VLDO4_A,
+        }, {
+                .range_min = DA9062AA_VBUCK2_B,
+                .range_max = DA9062AA_VBUCK4_B,
+        }, {
+                .range_min = DA9062AA_VBUCK3_B,
+                .range_max = DA9062AA_VBUCK3_B,
+        }, {
+                .range_min = DA9062AA_VLDO1_B,
+                .range_max = DA9062AA_VLDO4_B,
+        }, {
+                .range_min = DA9062AA_BBAT_CONT,
+                .range_max = DA9062AA_BBAT_CONT,
+        }, {
+                .range_min = DA9062AA_GP_ID_0,
+                .range_max = DA9062AA_GP_ID_19,
+        },
+};
+static const struct regmap_range da9062_aa_volatile_ranges[] = {
+        {
+                .range_min = DA9062AA_PAGE_CON,
+                .range_max = DA9062AA_STATUS_B,
+        }, {
+                .range_min = DA9062AA_STATUS_D,
+                .range_max = DA9062AA_EVENT_C,
+        }, {
+                .range_min = DA9062AA_CONTROL_F,
+                .range_max = DA9062AA_CONTROL_F,
+        }, {
+                .range_min = DA9062AA_COUNT_S,
+                .range_max = DA9062AA_SECOND_D,
+        },
+};
+static const struct regmap_access_table da9062_aa_readable_table = {
+        .yes_ranges = da9062_aa_readable_ranges,
+        .n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),
+};
+static const struct regmap_access_table da9062_aa_writeable_table = {
+        .yes_ranges = da9062_aa_writeable_ranges,
+        .n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),
+};
+static const struct regmap_access_table da9062_aa_volatile_table = {
+        .yes_ranges = da9062_aa_volatile_ranges,
+        .n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),
+};
+static const struct regmap_range_cfg da9062_range_cfg[] = {
+        {
+                .range_min = DA9062AA_PAGE_CON,
+                .range_max = DA9062AA_CONFIG_ID,
+                .selector_reg = DA9062AA_PAGE_CON,
+                .selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
+                .selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
+                .window_start = 0,
+                .window_len = 256,
+        }
+};
+static struct regmap_config da9062_regmap_config = {
+        .reg_bits = 8,
+        .val_bits = 8,
+        .ranges = da9062_range_cfg,
+        .num_ranges = ARRAY_SIZE(da9062_range_cfg),
+        .max_register = DA9062AA_CONFIG_ID,
+        .cache_type = REGCACHE_RBTREE,
+        .rd_table = &da9062_aa_readable_table,
+        .wr_table = &da9062_aa_writeable_table,
+        .volatile_table = &da9062_aa_volatile_table,
+};
+static int da9062_i2c_probe(struct i2c_client *i2c,
+        const struct i2c_device_id *id)
+{
+        struct da9062 *chip;
+        unsigned int irq_base;
+        int ret;
+        chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);
+        if (!chip)
+                return -ENOMEM;
+        i2c_set_clientdata(i2c, chip);
+        chip->dev = &i2c->dev;
+        if (!i2c->irq) {
+                dev_err(chip->dev, "No IRQ configured\n");
+                return -EINVAL;
+        }
+        chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);
+        if (IS_ERR(chip->regmap)) {
+                ret = PTR_ERR(chip->regmap);
+                dev_err(chip->dev, "Failed to allocate register map: %d\n",
+                        ret);
+                return ret;
+        }
+        ret = da9062_clear_fault_log(chip);
+        if (ret < 0)
+                dev_warn(chip->dev, "Cannot clear fault log\n");
+        ret = get_device_type(chip);
+        if (ret)
+                return ret;
+        ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
+                        IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
+                        -1, &da9062_irq_chip,
+                        &chip->regmap_irq);
+        if (ret) {
+                dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
+                        i2c->irq, ret);
+                return ret;
+        }
+        irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
+        ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,
+                              ARRAY_SIZE(da9062_devs), NULL, irq_base,
+                              NULL);
+        if (ret) {
+                dev_err(chip->dev, "Cannot register child devices\n");
+                regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
+                return ret;
+        }
+        return ret;
+}
+static int da9062_i2c_remove(struct i2c_client *i2c)
+{
+        struct da9062 *chip = i2c_get_clientdata(i2c);
+        mfd_remove_devices(chip->dev);
+        regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
+        return 0;
+}
+static const struct i2c_device_id da9062_i2c_id[] = {
+        { "da9062", 0 },
+        { },
+};
+MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);
+static const struct of_device_id da9062_dt_ids[] = {
+        { .compatible = "dlg,da9062", },
+        { }
+};
+MODULE_DEVICE_TABLE(of, da9062_dt_ids);
+static struct i2c_driver da9062_i2c_driver = {
+        .driver = {
+                .name = "da9062",
+                .of_match_table = of_match_ptr(da9062_dt_ids),
+        },
+        .probe    = da9062_i2c_probe,
+        .remove   = da9062_i2c_remove,
+        .id_table = da9062_i2c_id,
+};
+module_i2c_driver(da9062_i2c_driver);
+MODULE_DESCRIPTION("Core device driver for Dialog DA9062");
+MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c
index 6f3a7c0001f9..2d4e3e0f4e94 100644
--- a/drivers/mfd/da9063-i2c.c
+++ b/drivers/mfd/da9063-i2c.c
@@ -264,7 +264,6 @@ MODULE_DEVICE_TABLE(i2c, da9063_i2c_id);
 static struct i2c_driver da9063_i2c_driver = {
        .driver = {
                .name = "da9063",
-                .owner = THIS_MODULE,
                .of_match_table = of_match_ptr(da9063_dt_ids),
        },
        .probe    = da9063_i2c_probe,
diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c
index eaf1ec9208b2..26302634633c 100644
--- a/drivers/mfd/da9063-irq.c
+++ b/drivers/mfd/da9063-irq.c
@@ -77,6 +77,10 @@ static const struct regmap_irq da9063_irqs[] = {
                .reg_offset = DA9063_REG_EVENT_B_OFFSET,
                .mask = DA9063_M_UVOV,
        },
+        [DA9063_IRQ_DVC_RDY] = {
+                .reg_offset = DA9063_REG_EVENT_B_OFFSET,
+                .mask = DA9063_M_DVC_RDY,
+        },
        [DA9063_IRQ_VDD_MON] = {
                .reg_offset = DA9063_REG_EVENT_B_OFFSET,
                .mask = DA9063_M_VDD_MON,
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 8b14740f9fca..e6e4bacb09ee 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -2654,7 +2654,6 @@ static int db8500_irq_map(struct irq_domain *d, unsigned int virq,
 {
        irq_set_chip_and_handler(virq, &prcmu_irq_chip,
                                handle_simple_irq);
-        set_irq_flags(virq, IRQF_VALID);
        return 0;
 }
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
index 5991faddd3c6..a76eb6ef47a0 100644
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -207,7 +207,7 @@ static void pcap_isr_work(struct work_struct *work)
 static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct pcap_chip *pcap = irq_get_handler_data(irq);
+        struct pcap_chip *pcap = irq_desc_get_handler_data(desc);
        desc->irq_data.chip->irq_ack(&desc->irq_data);
        queue_work(pcap->workqueue, &pcap->isr_work);
@@ -463,11 +463,7 @@ static int ezx_pcap_probe(struct spi_device *spi)
        for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) {
                irq_set_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq);
                irq_set_chip_data(i, pcap);
-#ifdef CONFIG_ARM
+                irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
-                set_irq_flags(i, IRQF_VALID);
-#else
-                irq_set_noprobe(i);
-#endif
        }
        /* mask/ack all PCAP interrupts */
@@ -476,8 +472,7 @@ static int ezx_pcap_probe(struct spi_device *spi)
        pcap->msr = PCAP_MASK_ALL_INTERRUPT;
        irq_set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING);
-        irq_set_handler_data(spi->irq, pcap);
+        irq_set_chained_handler_and_data(spi->irq, pcap_irq_handler, pcap);
-        irq_set_chained_handler(spi->irq, pcap_irq_handler);
        irq_set_irq_wake(spi->irq, 1);
        /* ADC */
diff --git a/drivers/mfd/htc-egpio.c b/drivers/mfd/htc-egpio.c
index 49f39feca784..9131cdcdc64a 100644
--- a/drivers/mfd/htc-egpio.c
+++ b/drivers/mfd/htc-egpio.c
@@ -350,11 +350,11 @@ static int __init egpio_probe(struct platform_device *pdev)
                        irq_set_chip_and_handler(irq, &egpio_muxed_chip,
                                                 handle_simple_irq);
                        irq_set_chip_data(irq, ei);
-                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+                        irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
                }
                irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
-                irq_set_handler_data(ei->chained_irq, ei);
+                irq_set_chained_handler_and_data(ei->chained_irq,
-                irq_set_chained_handler(ei->chained_irq, egpio_handler);
+                                                 egpio_handler, ei);
                ack_irqs(ei);
                device_init_wakeup(&pdev->dev, 1);
@@ -376,7 +376,7 @@ static int __exit egpio_remove(struct platform_device *pdev)
                irq_end = ei->irq_start + ei->nirqs;
                for (irq = ei->irq_start; irq < irq_end; irq++) {
                        irq_set_chip_and_handler(irq, NULL, NULL);
-                        set_irq_flags(irq, 0);
+                        irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
                }
                irq_set_chained_handler(ei->chained_irq, NULL);
                device_init_wakeup(&pdev->dev, 0);
diff --git a/drivers/mfd/htc-i2cpld.c b/drivers/mfd/htc-i2cpld.c
index b54baad30164..1bd5b042c8b3 100644
--- a/drivers/mfd/htc-i2cpld.c
+++ b/drivers/mfd/htc-i2cpld.c
@@ -330,11 +330,7 @@ static int htcpld_setup_chip_irq(
                irq_set_chip_and_handler(irq, &htcpld_muxed_chip,
                                         handle_simple_irq);
                irq_set_chip_data(irq, chip);
-#ifdef CONFIG_ARM
+                irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-#else
-                irq_set_probe(irq);
-#endif
        }
        return ret;
diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c
index 7b50b6b208a5..ffbf6f6680b0 100644
--- a/drivers/mfd/intel_soc_pmic_core.c
+++ b/drivers/mfd/intel_soc_pmic_core.c
@@ -147,7 +147,7 @@ static const struct i2c_device_id intel_soc_pmic_i2c_id[] = {
 MODULE_DEVICE_TABLE(i2c, intel_soc_pmic_i2c_id);
 #if defined(CONFIG_ACPI)
-static struct acpi_device_id intel_soc_pmic_acpi_match[] = {
+static const struct acpi_device_id intel_soc_pmic_acpi_match[] = {
        {"INT33FD", (kernel_ulong_t)&intel_soc_pmic_config_crc},
        { },
 };
@@ -157,7 +157,6 @@ MODULE_DEVICE_TABLE(acpi, intel_soc_pmic_acpi_match);
 static struct i2c_driver intel_soc_pmic_i2c_driver = {
        .driver = {
                .name = "intel_soc_pmic_i2c",
-                .owner = THIS_MODULE,
                .pm = &intel_soc_pmic_pm_ops,
                .acpi_match_table = ACPI_PTR(intel_soc_pmic_acpi_match),
        },
diff --git a/drivers/mfd/ipaq-micro.c b/drivers/mfd/ipaq-micro.c
index 8df3266064e4..a41859c55bda 100644
--- a/drivers/mfd/ipaq-micro.c
+++ b/drivers/mfd/ipaq-micro.c
@@ -53,8 +53,8 @@ static void ipaq_micro_trigger_tx(struct ipaq_micro *micro)
        tx->buf[bp++] = checksum;
        tx->len = bp;
        tx->index = 0;
-        print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_OFFSET, 16, 1,
+        print_hex_dump_debug("data: ", DUMP_PREFIX_OFFSET, 16, 1,
-                       tx->buf, tx->len, true);
+                             tx->buf, tx->len, true);
        /* Enable interrupt */
        val = readl(micro->base + UTCR3);
@@ -242,7 +242,7 @@ static u16 ipaq_micro_to_u16(u8 *data)
        return data[1] << 8 | data[0];
 }
-static void ipaq_micro_eeprom_dump(struct ipaq_micro *micro)
+static void __init ipaq_micro_eeprom_dump(struct ipaq_micro *micro)
 {
        u8 dump[256];
        char *str;
@@ -250,7 +250,7 @@ static void ipaq_micro_eeprom_dump(struct ipaq_micro *micro)
        ipaq_micro_eeprom_read(micro, 0, 128, dump);
        str = ipaq_micro_str(dump, 10);
        if (str) {
-                dev_info(micro->dev, "HM version %s\n", str);
+                dev_info(micro->dev, "HW version %s\n", str);
                kfree(str);
        }
        str = ipaq_micro_str(dump+10, 40);
@@ -281,8 +281,8 @@ static void ipaq_micro_eeprom_dump(struct ipaq_micro *micro)
        dev_info(micro->dev, "RAM size: %u KiB\n", ipaq_micro_to_u16(dump+92));
        dev_info(micro->dev, "screen: %u x %u\n",
                 ipaq_micro_to_u16(dump+94), ipaq_micro_to_u16(dump+96));
-        print_hex_dump(KERN_DEBUG, "eeprom: ", DUMP_PREFIX_OFFSET, 16, 1,
+        print_hex_dump_debug("eeprom: ", DUMP_PREFIX_OFFSET, 16, 1,
-                       dump, 256, true);
+                             dump, 256, true);
 }
@@ -386,7 +386,7 @@ static int micro_resume(struct device *dev)
        return 0;
 }
-static int micro_probe(struct platform_device *pdev)
+static int __init micro_probe(struct platform_device *pdev)
 {
        struct ipaq_micro *micro;
        struct resource *res;
@@ -448,21 +448,6 @@ static int micro_probe(struct platform_device *pdev)
        return 0;
 }
-static int micro_remove(struct platform_device *pdev)
-{
-        struct ipaq_micro *micro = platform_get_drvdata(pdev);
-        u32 val;
-        mfd_remove_devices(&pdev->dev);
-        val = readl(micro->base + UTCR3);
-        val &= ~(UTCR3_RXE | UTCR3_RIE); /* disable receive interrupt */
-        val &= ~(UTCR3_TXE | UTCR3_TIE); /* disable transmit interrupt */
-        writel(val, micro->base + UTCR3);
-        return 0;
-}
 static const struct dev_pm_ops micro_dev_pm_ops = {
        SET_SYSTEM_SLEEP_PM_OPS(NULL, micro_resume)
 };
@@ -471,12 +456,7 @@ static struct platform_driver micro_device_driver = {
        .driver   = {
                .name   = "ipaq-h3xxx-micro",
                .pm     = &micro_dev_pm_ops,
+                .suppress_bind_attrs = true,
        },
-        .probe    = micro_probe,
-        .remove   = micro_remove,
-        /* .shutdown = micro_suspend, // FIXME */
 };
-module_platform_driver(micro_device_driver);
+builtin_platform_driver_probe(micro_device_driver, micro_probe);
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("driver for iPAQ Atmel micro core and backlight");
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
index b31c54e4ecb2..5bb49f08955d 100644
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -273,12 +273,12 @@ static int jz4740_adc_probe(struct platform_device *pdev)
        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
        ct->chip.irq_ack = irq_gc_ack_set_bit;
-        irq_setup_generic_chip(gc, IRQ_MSK(5), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
+        irq_setup_generic_chip(gc, IRQ_MSK(5), IRQ_GC_INIT_MASK_CACHE, 0,
+                                IRQ_NOPROBE | IRQ_LEVEL);
        adc->gc = gc;
-        irq_set_handler_data(adc->irq, gc);
+        irq_set_chained_handler_and_data(adc->irq, jz4740_adc_irq_demux, gc);
-        irq_set_chained_handler(adc->irq, jz4740_adc_irq_demux);
        writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
        writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
@@ -308,8 +308,7 @@ static int jz4740_adc_remove(struct platform_device *pdev)
        irq_remove_generic_chip(adc->gc, IRQ_MSK(5), IRQ_NOPROBE | IRQ_LEVEL, 0);
        kfree(adc->gc);
-        irq_set_handler_data(adc->irq, NULL);
+        irq_set_chained_handler_and_data(adc->irq, NULL, NULL);
-        irq_set_chained_handler(adc->irq, NULL);
        iounmap(adc->base);
        release_mem_region(adc->mem->start, resource_size(adc->mem));
diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c
index 8057849d51ac..463f4eae20c1 100644
--- a/drivers/mfd/kempld-core.c
+++ b/drivers/mfd/kempld-core.c
@@ -501,6 +501,14 @@ static struct platform_driver kempld_driver = {
 static struct dmi_system_id kempld_dmi_table[] __initdata = {
        {
+                .ident = "BBL6",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
+                        DMI_MATCH(DMI_BOARD_NAME, "COMe-bBL6"),
+                },
+                .driver_data = (void *)&kempld_platform_data_generic,
+                .callback = kempld_create_platform_device,
+        }, {
                .ident = "BHL6",
                .matches = {
                        DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
@@ -517,6 +525,14 @@ static struct dmi_system_id kempld_dmi_table[] __initdata = {
                .driver_data = (void *)&kempld_platform_data_generic,
                .callback = kempld_create_platform_device,
        }, {
+                .ident = "CBW6",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
+                        DMI_MATCH(DMI_BOARD_NAME, "COMe-cBW6"),
+                },
+                .driver_data = (void *)&kempld_platform_data_generic,
+                .callback = kempld_create_platform_device,
+        }, {
                .ident = "CCR2",
                .matches = {
                        DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c
index d42fbb667d8c..643f3750e830 100644
--- a/drivers/mfd/lm3533-core.c
+++ b/drivers/mfd/lm3533-core.c
@@ -640,7 +640,6 @@ MODULE_DEVICE_TABLE(i2c, lm3533_i2c_ids);
 static struct i2c_driver lm3533_i2c_driver = {
        .driver = {
                   .name = "lm3533",
-                   .owner = THIS_MODULE,
        },
        .id_table       = lm3533_i2c_ids,
        .probe          = lm3533_i2c_probe,
diff --git a/drivers/mfd/lp3943.c b/drivers/mfd/lp3943.c
index 335b930112b2..eecbb13de1bd 100644
--- a/drivers/mfd/lp3943.c
+++ b/drivers/mfd/lp3943.c
@@ -154,7 +154,6 @@ static struct i2c_driver lp3943_driver = {
        .remove = lp3943_remove,
        .driver = {
                .name = "lp3943",
-                .owner = THIS_MODULE,
                .of_match_table = of_match_ptr(lp3943_of_match),
        },
        .id_table = lp3943_ids,
diff --git a/drivers/mfd/lp8788-irq.c b/drivers/mfd/lp8788-irq.c
index a87f2b548f71..c7a9825aa4ce 100644
--- a/drivers/mfd/lp8788-irq.c
+++ b/drivers/mfd/lp8788-irq.c
@@ -141,12 +141,7 @@ static int lp8788_irq_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_data(virq, irqd);
        irq_set_chip_and_handler(virq, chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/lp8788.c b/drivers/mfd/lp8788.c
index a30bc15fe5ba..acf616559512 100644
--- a/drivers/mfd/lp8788.c
+++ b/drivers/mfd/lp8788.c
@@ -221,7 +221,6 @@ MODULE_DEVICE_TABLE(i2c, lp8788_ids);
 static struct i2c_driver lp8788_driver = {
        .driver = {
                .name = "lp8788",
-                .owner = THIS_MODULE,
        },
        .probe = lp8788_probe,
        .remove = lp8788_remove,
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index 8de34398abc0..c5a9a08b5dfb 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -66,6 +66,7 @@
 #include <linux/pci.h>
 #include <linux/mfd/core.h>
 #include <linux/mfd/lpc_ich.h>
+#include <linux/platform_data/itco_wdt.h>
 #define ACPIBASE                0x40
 #define ACPIBASE_GPE_OFF        0x28
@@ -835,9 +836,31 @@ static void lpc_ich_enable_pmc_space(struct pci_dev *dev)
        priv->actrl_pbase_save = reg_save;
 }
-static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell)
+static int lpc_ich_finalize_wdt_cell(struct pci_dev *dev)
 {
+        struct itco_wdt_platform_data *pdata;
        struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+        struct lpc_ich_info *info;
+        struct mfd_cell *cell = &lpc_ich_cells[LPC_WDT];
+        pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
+        if (!pdata)
+                return -ENOMEM;
+        info = &lpc_chipset_info[priv->chipset];
+        pdata->version = info->iTCO_version;
+        strlcpy(pdata->name, info->name, sizeof(pdata->name));
+        cell->platform_data = pdata;
+        cell->pdata_size = sizeof(*pdata);
+        return 0;
+}
+static void lpc_ich_finalize_gpio_cell(struct pci_dev *dev)
+{
+        struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+        struct mfd_cell *cell = &lpc_ich_cells[LPC_GPIO];
        cell->platform_data = &lpc_chipset_info[priv->chipset];
        cell->pdata_size = sizeof(struct lpc_ich_info);
@@ -933,7 +956,7 @@ gpe0_done:
        lpc_chipset_info[priv->chipset].use_gpio = ret;
        lpc_ich_enable_gpio_space(dev);
-        lpc_ich_finalize_cell(dev, &lpc_ich_cells[LPC_GPIO]);
+        lpc_ich_finalize_gpio_cell(dev);
        ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
                              &lpc_ich_cells[LPC_GPIO], 1, NULL, 0, NULL);
@@ -1007,7 +1030,10 @@ static int lpc_ich_init_wdt(struct pci_dev *dev)
                res->end = base_addr + ACPIBASE_PMC_END;
        }
-        lpc_ich_finalize_cell(dev, &lpc_ich_cells[LPC_WDT]);
+        ret = lpc_ich_finalize_wdt_cell(dev);
+        if (ret)
+                goto wdt_done;
        ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
                              &lpc_ich_cells[LPC_WDT], 1, NULL, 0, NULL);
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index 3bf8def82f1e..56e216dedc91 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -532,7 +532,6 @@ static SIMPLE_DEV_PM_OPS(max14577_pm, max14577_suspend, max14577_resume);
 static struct i2c_driver max14577_i2c_driver = {
        .driver = {
                .name = "max14577",
-                .owner = THIS_MODULE,
                .pm = &max14577_pm,
                .of_match_table = max14577_dt_match,
        },
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 760d08d7923d..d19be64cd32b 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -391,7 +391,6 @@ static SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume);
 static struct i2c_driver max77686_i2c_driver = {
        .driver = {
                   .name = "max77686",
-                   .owner = THIS_MODULE,
                   .pm = &max77686_pm,
                   .of_match_table = of_match_ptr(max77686_pmic_dt_match),
        },
diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c
index 67bc53fdc389..007f729e150b 100644
--- a/drivers/mfd/max77693.c
+++ b/drivers/mfd/max77693.c
@@ -373,7 +373,6 @@ static const struct of_device_id max77693_dt_match[] = {
 static struct i2c_driver max77693_i2c_driver = {
        .driver = {
                   .name = "max77693",
-                   .owner = THIS_MODULE,
                   .pm = &max77693_pm,
                   .of_match_table = of_match_ptr(max77693_dt_match),
        },
diff --git a/drivers/mfd/max8907.c b/drivers/mfd/max8907.c
index 232749c8813d..2974c8b1273b 100644
--- a/drivers/mfd/max8907.c
+++ b/drivers/mfd/max8907.c
@@ -321,7 +321,6 @@ MODULE_DEVICE_TABLE(i2c, max8907_i2c_id);
 static struct i2c_driver max8907_i2c_driver = {
        .driver = {
                .name = "max8907",
-                .owner = THIS_MODULE,
                .of_match_table = of_match_ptr(max8907_of_match),
        },
        .probe = max8907_i2c_probe,
diff --git a/drivers/mfd/max8925-core.c b/drivers/mfd/max8925-core.c
index 8520bd68c1ff..fd8b15cd84fd 100644
--- a/drivers/mfd/max8925-core.c
+++ b/drivers/mfd/max8925-core.c
@@ -650,11 +650,8 @@ static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_data(virq, d->host_data);
        irq_set_chip_and_handler(virq, &max8925_irq_chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/max8925-i2c.c b/drivers/mfd/max8925-i2c.c
index c880c895c5a6..b0fe8103e401 100644
--- a/drivers/mfd/max8925-i2c.c
+++ b/drivers/mfd/max8925-i2c.c
@@ -245,7 +245,6 @@ MODULE_DEVICE_TABLE(of, max8925_dt_ids);
 static struct i2c_driver max8925_driver = {
        .driver = {
                .name   = "max8925",
-                .owner  = THIS_MODULE,
                .pm     = &max8925_pm_ops,
                .of_match_table = max8925_dt_ids,
        },
diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
index d3025be57f39..b95a46d79b9d 100644
--- a/drivers/mfd/max8997-irq.c
+++ b/drivers/mfd/max8997-irq.c
@@ -113,14 +113,14 @@ static const struct max8997_irq_data max8997_irqs[] = {
 static void max8997_irq_lock(struct irq_data *data)
 {
-        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
+        struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
        mutex_lock(&max8997->irqlock);
 }
 static void max8997_irq_sync_unlock(struct irq_data *data)
 {
-        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
+        struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
        int i;
        for (i = 0; i < MAX8997_IRQ_GROUP_NR; i++) {
@@ -140,26 +140,25 @@ static void max8997_irq_sync_unlock(struct irq_data *data)
 }
 static const inline struct max8997_irq_data *
-irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
+irq_to_max8997_irq(struct max8997_dev *max8997, struct irq_data *data)
 {
-        struct irq_data *data = irq_get_irq_data(irq);
        return &max8997_irqs[data->hwirq];
 }
 static void max8997_irq_mask(struct irq_data *data)
 {
-        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
+        struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
        const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
-                                                                data->irq);
+                                                                     data);
        max8997->irq_masks_cur[irq_data->group] |= irq_data->mask;
 }
 static void max8997_irq_unmask(struct irq_data *data)
 {
-        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
+        struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
        const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
-                                                                data->irq);
+                                                                     data);
        max8997->irq_masks_cur[irq_data->group] &= ~irq_data->mask;
 }
@@ -295,11 +294,8 @@ static int max8997_irq_domain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_data(irq, max8997);
        irq_set_chip_and_handler(irq, &max8997_irq_chip, handle_edge_irq);
        irq_set_nested_thread(irq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(irq, IRQF_VALID);
-#else
        irq_set_noprobe(irq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/max8997.c b/drivers/mfd/max8997.c
index 595364ee178a..d3cfa9cf5c8f 100644
--- a/drivers/mfd/max8997.c
+++ b/drivers/mfd/max8997.c
@@ -508,7 +508,6 @@ static const struct dev_pm_ops max8997_pm = {
 static struct i2c_driver max8997_i2c_driver = {
        .driver = {
                   .name = "max8997",
-                   .owner = THIS_MODULE,
                   .pm = &max8997_pm,
                   .of_match_table = of_match_ptr(max8997_pmic_dt_match),
        },
diff --git a/drivers/mfd/max8998-irq.c b/drivers/mfd/max8998-irq.c
index 3702056628a8..90bad9ffa7e2 100644
--- a/drivers/mfd/max8998-irq.c
+++ b/drivers/mfd/max8998-irq.c
@@ -98,9 +98,8 @@ static struct max8998_irq_data max8998_irqs[] = {
 };
 static inline struct max8998_irq_data *
-irq_to_max8998_irq(struct max8998_dev *max8998, int irq)
+irq_to_max8998_irq(struct max8998_dev *max8998, struct irq_data *data)
 {
-        struct irq_data *data = irq_get_irq_data(irq);
        return &max8998_irqs[data->hwirq];
 }
@@ -134,8 +133,7 @@ static void max8998_irq_sync_unlock(struct irq_data *data)
 static void max8998_irq_unmask(struct irq_data *data)
 {
        struct max8998_dev *max8998 = irq_data_get_irq_chip_data(data);
-        struct max8998_irq_data *irq_data = irq_to_max8998_irq(max8998,
+        struct max8998_irq_data *irq_data = irq_to_max8998_irq(max8998, data);
-                                                               data->irq);
        max8998->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
 }
@@ -143,8 +141,7 @@ static void max8998_irq_unmask(struct irq_data *data)
 static void max8998_irq_mask(struct irq_data *data)
 {
        struct max8998_dev *max8998 = irq_data_get_irq_chip_data(data);
-        struct max8998_irq_data *irq_data = irq_to_max8998_irq(max8998,
+        struct max8998_irq_data *irq_data = irq_to_max8998_irq(max8998, data);
-                                                               data->irq);
        max8998->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
 }
@@ -206,11 +203,8 @@ static int max8998_irq_domain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_data(irq, max8998);
        irq_set_chip_and_handler(irq, &max8998_irq_chip, handle_edge_irq);
        irq_set_nested_thread(irq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(irq, IRQF_VALID);
-#else
        irq_set_noprobe(irq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/max8998.c b/drivers/mfd/max8998.c
index a37cb7444b6e..a7afe3bf27fc 100644
--- a/drivers/mfd/max8998.c
+++ b/drivers/mfd/max8998.c
@@ -377,7 +377,6 @@ static const struct dev_pm_ops max8998_pm = {
 static struct i2c_driver max8998_i2c_driver = {
        .driver = {
                   .name = "max8998",
-                   .owner = THIS_MODULE,
                   .pm = &max8998_pm,
                   .of_match_table = of_match_ptr(max8998_dt_match),
        },
diff --git a/drivers/mfd/mc13xxx-i2c.c b/drivers/mfd/mc13xxx-i2c.c
index 68b844811566..67e4c9aa7d18 100644
--- a/drivers/mfd/mc13xxx-i2c.c
+++ b/drivers/mfd/mc13xxx-i2c.c
@@ -96,7 +96,6 @@ static int mc13xxx_i2c_remove(struct i2c_client *client)
 static struct i2c_driver mc13xxx_i2c_driver = {
        .id_table = mc13xxx_i2c_device_id,
        .driver = {
-                .owner = THIS_MODULE,
                .name = "mc13xxx",
                .of_match_table = mc13xxx_dt_ids,
        },
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 03929a6c6fc4..1749c1c9f405 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -60,14 +60,14 @@ static const struct mfd_cell mt6397_devs[] = {
 static void mt6397_irq_lock(struct irq_data *data)
 {
-        struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
        mutex_lock(&mt6397->irqlock);
 }
 static void mt6397_irq_sync_unlock(struct irq_data *data)
 {
-        struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
        regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]);
        regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]);
@@ -77,7 +77,7 @@ static void mt6397_irq_sync_unlock(struct irq_data *data)
 static void mt6397_irq_disable(struct irq_data *data)
 {
-        struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
        int shift = data->hwirq & 0xf;
        int reg = data->hwirq >> 4;
@@ -86,19 +86,38 @@ static void mt6397_irq_disable(struct irq_data *data)
 static void mt6397_irq_enable(struct irq_data *data)
 {
-        struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
        int shift = data->hwirq & 0xf;
        int reg = data->hwirq >> 4;
        mt6397->irq_masks_cur[reg] |= BIT(shift);
 }
+#ifdef CONFIG_PM_SLEEP
+static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
+        int shift = irq_data->hwirq & 0xf;
+        int reg = irq_data->hwirq >> 4;
+        if (on)
+                mt6397->wake_mask[reg] |= BIT(shift);
+        else
+                mt6397->wake_mask[reg] &= ~BIT(shift);
+        return 0;
+}
+#else
+#define mt6397_irq_set_wake NULL
+#endif
 static struct irq_chip mt6397_irq_chip = {
        .name = "mt6397-irq",
        .irq_bus_lock = mt6397_irq_lock,
        .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
        .irq_enable = mt6397_irq_enable,
        .irq_disable = mt6397_irq_disable,
+        .irq_set_wake = mt6397_irq_set_wake,
 };
 static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
@@ -142,11 +161,7 @@ static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_data(irq, mt6397);
        irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
        irq_set_nested_thread(irq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(irq, IRQF_VALID);
-#else
        irq_set_noprobe(irq);
-#endif
        return 0;
 }
@@ -183,6 +198,35 @@ static int mt6397_irq_init(struct mt6397_chip *mt6397)
        return 0;
 }
+#ifdef CONFIG_PM_SLEEP
+static int mt6397_irq_suspend(struct device *dev)
+{
+        struct mt6397_chip *chip = dev_get_drvdata(dev);
+        regmap_write(chip->regmap, MT6397_INT_CON0, chip->wake_mask[0]);
+        regmap_write(chip->regmap, MT6397_INT_CON1, chip->wake_mask[1]);
+        enable_irq_wake(chip->irq);
+        return 0;
+}
+static int mt6397_irq_resume(struct device *dev)
+{
+        struct mt6397_chip *chip = dev_get_drvdata(dev);
+        regmap_write(chip->regmap, MT6397_INT_CON0, chip->irq_masks_cur[0]);
+        regmap_write(chip->regmap, MT6397_INT_CON1, chip->irq_masks_cur[1]);
+        disable_irq_wake(chip->irq);
+        return 0;
+}
+#endif
+static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
+                        mt6397_irq_resume);
 static int mt6397_probe(struct platform_device *pdev)
 {
        int ret;
@@ -237,6 +281,7 @@ static struct platform_driver mt6397_driver = {
        .driver = {
                .name = "mt6397",
                .of_match_table = of_match_ptr(mt6397_of_match),
+                .pm = &mt6397_pm_ops,
        },
 };
diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index 28cb048f4760..8f8bacb67a15 100644
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -719,7 +719,6 @@ static struct i2c_driver palmas_i2c_driver = {
        .driver = {
                   .name = "palmas",
                   .of_match_table = of_palmas_match_tbl,
-                   .owner = THIS_MODULE,
        },
        .probe = palmas_i2c_probe,
        .remove = palmas_i2c_remove,
diff --git a/drivers/mfd/pm8921-core.c b/drivers/mfd/pm8921-core.c
index 5a92646a2ccb..59502d02cd15 100644
--- a/drivers/mfd/pm8921-core.c
+++ b/drivers/mfd/pm8921-core.c
@@ -236,11 +236,49 @@ static int pm8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
        return pm8xxx_config_irq(chip, block, config);
 }
+static int pm8xxx_irq_get_irqchip_state(struct irq_data *d,
+                                        enum irqchip_irq_state which,
+                                        bool *state)
+{
+        struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
+        unsigned int pmirq = irqd_to_hwirq(d);
+        unsigned int bits;
+        int irq_bit;
+        u8 block;
+        int rc;
+        if (which != IRQCHIP_STATE_LINE_LEVEL)
+                return -EINVAL;
+        block = pmirq / 8;
+        irq_bit = pmirq % 8;
+        spin_lock(&chip->pm_irq_lock);
+        rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, block);
+        if (rc) {
+                pr_err("Failed Selecting Block %d rc=%d\n", block, rc);
+                goto bail;
+        }
+        rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
+        if (rc) {
+                pr_err("Failed Reading Status rc=%d\n", rc);
+                goto bail;
+        }
+        *state = !!(bits & BIT(irq_bit));
+bail:
+        spin_unlock(&chip->pm_irq_lock);
+        return rc;
+}
 static struct irq_chip pm8xxx_irq_chip = {
        .name           = "pm8xxx",
        .irq_mask_ack   = pm8xxx_irq_mask_ack,
        .irq_unmask     = pm8xxx_irq_unmask,
        .irq_set_type   = pm8xxx_irq_set_type,
+        .irq_get_irqchip_state = pm8xxx_irq_get_irqchip_state,
        .flags          = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
 };
@@ -251,11 +289,8 @@ static int pm8xxx_irq_domain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_and_handler(irq, &pm8xxx_irq_chip, handle_level_irq);
        irq_set_chip_data(irq, chip);
-#ifdef CONFIG_ARM
-        set_irq_flags(irq, IRQF_VALID);
-#else
        irq_set_noprobe(irq);
-#endif
        return 0;
 }
@@ -336,14 +371,12 @@ static int pm8921_probe(struct platform_device *pdev)
        if (!chip->irqdomain)
                return -ENODEV;
-        irq_set_handler_data(irq, chip);
+        irq_set_chained_handler_and_data(irq, pm8xxx_irq_handler, chip);
-        irq_set_chained_handler(irq, pm8xxx_irq_handler);
        irq_set_irq_wake(irq, 1);
        rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
        if (rc) {
-                irq_set_chained_handler(irq, NULL);
+                irq_set_chained_handler_and_data(irq, NULL, NULL);
-                irq_set_handler_data(irq, NULL);
                irq_domain_remove(chip->irqdomain);
        }
@@ -362,8 +395,7 @@ static int pm8921_remove(struct platform_device *pdev)
        struct pm_irq_chip *chip = platform_get_drvdata(pdev);
        device_for_each_child(&pdev->dev, NULL, pm8921_remove_child);
-        irq_set_chained_handler(irq, NULL);
+        irq_set_chained_handler_and_data(irq, NULL, NULL);
-        irq_set_handler_data(irq, NULL);
        irq_domain_remove(chip->irqdomain);
        return 0;
diff --git a/drivers/mfd/qcom_rpm.c b/drivers/mfd/qcom_rpm.c
index 12e324319573..6afc9fabd94c 100644
--- a/drivers/mfd/qcom_rpm.c
+++ b/drivers/mfd/qcom_rpm.c
@@ -149,6 +149,7 @@ static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
        [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 125, 82, 1 },
        [QCOM_RPM_HDMI_SWITCH] =                { 211, 126, 83, 1 },
        [QCOM_RPM_DDR_DMM] =                    { 212, 127, 84, 2 },
+        [QCOM_RPM_QDSS_CLK] =                   { 214, ~0, 7, 1 },
        [QCOM_RPM_VDDMIN_GPIO] =                { 215, 131, 89, 1 },
 };
diff --git a/drivers/mfd/rc5t583-irq.c b/drivers/mfd/rc5t583-irq.c
index bb8502020274..3f8812daa304 100644
--- a/drivers/mfd/rc5t583-irq.c
+++ b/drivers/mfd/rc5t583-irq.c
@@ -386,9 +386,7 @@ int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base)
                irq_set_chip_and_handler(__irq, &rc5t583_irq_chip,
                                         handle_simple_irq);
                irq_set_nested_thread(__irq, 1);
-#ifdef CONFIG_ARM
+                irq_clear_status_flags(__irq, IRQ_NOREQUEST);
-                set_irq_flags(__irq, IRQF_VALID);
-#endif
        }
        ret = request_threaded_irq(irq, NULL, rc5t583_irq, IRQF_ONESHOT,
diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c
index df276ad9f40b..e10f02f5d551 100644
--- a/drivers/mfd/rc5t583.c
+++ b/drivers/mfd/rc5t583.c
@@ -322,7 +322,6 @@ MODULE_DEVICE_TABLE(i2c, rc5t583_i2c_id);
 static struct i2c_driver rc5t583_i2c_driver = {
        .driver = {
                   .name = "rc5t583",
-                   .owner = THIS_MODULE,
                   },
        .probe = rc5t583_i2c_probe,
        .remove = rc5t583_i2c_remove,
diff --git a/drivers/mfd/retu-mfd.c b/drivers/mfd/retu-mfd.c
index 2d64430c719b..d4c114abeb75 100644
--- a/drivers/mfd/retu-mfd.c
+++ b/drivers/mfd/retu-mfd.c
@@ -311,7 +311,6 @@ MODULE_DEVICE_TABLE(i2c, retu_id);
 static struct i2c_driver retu_driver = {
        .driver         = {
                .name = "retu-mfd",
-                .owner = THIS_MODULE,
        },
        .probe          = retu_probe,
        .remove         = retu_remove,
diff --git a/drivers/mfd/rt5033.c b/drivers/mfd/rt5033.c
index db395a6c52bc..d60f91619c4a 100644
--- a/drivers/mfd/rt5033.c
+++ b/drivers/mfd/rt5033.c
@@ -124,6 +124,7 @@ static const struct of_device_id rt5033_dt_match[] = {
        { .compatible = "richtek,rt5033", },
        { }
 };
+MODULE_DEVICE_TABLE(of, rt5033_dt_match);
 static struct i2c_driver rt5033_driver = {
        .driver = {
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 4a69afb425ad..d206a3e8fe87 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -486,7 +486,6 @@ MODULE_DEVICE_TABLE(i2c, sec_pmic_id);
 static struct i2c_driver sec_pmic_driver = {
        .driver = {
                   .name = "sec_pmic",
-                   .owner = THIS_MODULE,
                   .pm = &sec_pmic_pm_ops,
                   .of_match_table = of_match_ptr(sec_dt_match),
        },
diff --git a/drivers/mfd/si476x-i2c.c b/drivers/mfd/si476x-i2c.c
index e3deb466628b..fb4ce6d04c30 100644
--- a/drivers/mfd/si476x-i2c.c
+++ b/drivers/mfd/si476x-i2c.c
@@ -873,7 +873,6 @@ MODULE_DEVICE_TABLE(i2c, si476x_id);
 static struct i2c_driver si476x_core_driver = {
        .driver         = {
                .name   = "si476x-core",
-                .owner  = THIS_MODULE,
        },
        .probe          = si476x_core_probe,
        .remove         = si476x_core_remove,
diff --git a/drivers/mfd/smsc-ece1099.c b/drivers/mfd/smsc-ece1099.c
index 03246880d484..a4c0df71c8b3 100644
--- a/drivers/mfd/smsc-ece1099.c
+++ b/drivers/mfd/smsc-ece1099.c
@@ -98,7 +98,6 @@ MODULE_DEVICE_TABLE(i2c, smsc_i2c_id);
 static struct i2c_driver smsc_i2c_driver = {
        .driver = {
                   .name = "smsc",
-                   .owner = THIS_MODULE,
        },
        .probe = smsc_i2c_probe,
        .remove = smsc_i2c_remove,
diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c
index e14c8c9d189b..c3f4aab53b07 100644
--- a/drivers/mfd/stmpe-i2c.c
+++ b/drivers/mfd/stmpe-i2c.c
@@ -112,7 +112,6 @@ MODULE_DEVICE_TABLE(i2c, stmpe_id);
 static struct i2c_driver stmpe_i2c_driver = {
        .driver = {
                .name = "stmpe-i2c",
-                .owner = THIS_MODULE,
 #ifdef CONFIG_PM
                .pm = &stmpe_dev_pm_ops,
 #endif
diff --git a/drivers/mfd/stmpe-spi.c b/drivers/mfd/stmpe-spi.c
index 6fdb30e84a2b..618ba244d98a 100644
--- a/drivers/mfd/stmpe-spi.c
+++ b/drivers/mfd/stmpe-spi.c
@@ -11,6 +11,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/of.h>
 #include <linux/types.h>
 #include "stmpe.h"
@@ -108,6 +109,17 @@ static int stmpe_spi_remove(struct spi_device *spi)
        return stmpe_remove(stmpe);
 }
+static const struct of_device_id stmpe_spi_of_match[] = {
+        { .compatible = "st,stmpe610", },
+        { .compatible = "st,stmpe801", },
+        { .compatible = "st,stmpe811", },
+        { .compatible = "st,stmpe1601", },
+        { .compatible = "st,stmpe2401", },
+        { .compatible = "st,stmpe2403", },
+        { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, stmpe_spi_of_match);
 static const struct spi_device_id stmpe_spi_id[] = {
        { "stmpe610", STMPE610 },
        { "stmpe801", STMPE801 },
@@ -122,6 +134,7 @@ MODULE_DEVICE_TABLE(spi, stmpe_id);
 static struct spi_driver stmpe_spi_driver = {
        .driver = {
                .name   = "stmpe-spi",
+                .of_match_table = of_match_ptr(stmpe_spi_of_match),
                .owner  = THIS_MODULE,
 #ifdef CONFIG_PM
                .pm     = &stmpe_dev_pm_ops,
diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c
index 18c4d72d1d2a..e971af86ce1e 100644
--- a/drivers/mfd/stmpe.c
+++ b/drivers/mfd/stmpe.c
@@ -971,20 +971,13 @@ static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_data(virq, stmpe);
        irq_set_chip_and_handler(virq, chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
 {
-#ifdef CONFIG_ARM
-                set_irq_flags(virq, 0);
-#endif
                irq_set_chip_and_handler(virq, NULL, NULL);
                irq_set_chip_data(virq, NULL);
 }
diff --git a/drivers/mfd/stw481x.c b/drivers/mfd/stw481x.c
index 7ceb3df09e25..ca613df36143 100644
--- a/drivers/mfd/stw481x.c
+++ b/drivers/mfd/stw481x.c
@@ -231,6 +231,7 @@ static const struct i2c_device_id stw481x_id[] = {
        { "stw481x", 0 },
        { },
 };
+MODULE_DEVICE_TABLE(i2c, stw481x_id);
 static const struct of_device_id stw481x_match[] = {
        { .compatible = "st,stw4810", },
diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
index c09fb5dccd50..16fc1adc4fa3 100644
--- a/drivers/mfd/t7l66xb.c
+++ b/drivers/mfd/t7l66xb.c
@@ -187,7 +187,7 @@ static struct mfd_cell t7l66xb_cells[] = {
 /* Handle the T7L66XB interrupt mux */
 static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc)
 {
-        struct t7l66xb *t7l66xb = irq_get_handler_data(irq);
+        struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
        unsigned int isr;
        unsigned int i, irq_base;
@@ -246,14 +246,10 @@ static void t7l66xb_attach_irq(struct platform_device *dev)
        for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
                irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
                irq_set_chip_data(irq, t7l66xb);
-#ifdef CONFIG_ARM
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-#endif
        }
        irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
-        irq_set_handler_data(t7l66xb->irq, t7l66xb);
+        irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
-        irq_set_chained_handler(t7l66xb->irq, t7l66xb_irq);
 }
 static void t7l66xb_detach_irq(struct platform_device *dev)
@@ -263,13 +259,9 @@ static void t7l66xb_detach_irq(struct platform_device *dev)
        irq_base = t7l66xb->irq_base;
-        irq_set_chained_handler(t7l66xb->irq, NULL);
+        irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
-        irq_set_handler_data(t7l66xb->irq, NULL);
        for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
-#ifdef CONFIG_ARM
-                set_irq_flags(irq, 0);
-#endif
                irq_set_chip(irq, NULL);
                irq_set_chip_data(irq, NULL);
        }
@@ -318,7 +310,7 @@ static int t7l66xb_probe(struct platform_device *dev)
        struct resource *iomem, *rscr;
        int ret;
-        if (pdata == NULL)
+        if (!pdata)
                return -EINVAL;
        iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
@@ -371,7 +363,7 @@ static int t7l66xb_probe(struct platform_device *dev)
        clk_prepare_enable(t7l66xb->clk48m);
-        if (pdata && pdata->enable)
+        if (pdata->enable)
                pdata->enable(dev);
        /* Mask all interrupts */
diff --git a/drivers/mfd/tc3589x.c b/drivers/mfd/tc3589x.c
index 96d420dfc15d..274bf39968aa 100644
--- a/drivers/mfd/tc3589x.c
+++ b/drivers/mfd/tc3589x.c
@@ -215,20 +215,13 @@ static int tc3589x_irq_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_and_handler(virq, &dummy_irq_chip,
                                handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
 static void tc3589x_irq_unmap(struct irq_domain *d, unsigned int virq)
 {
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, 0);
-#endif
        irq_set_chip_and_handler(virq, NULL, NULL);
        irq_set_chip_data(virq, NULL);
 }
@@ -492,7 +485,6 @@ MODULE_DEVICE_TABLE(i2c, tc3589x_id);
 static struct i2c_driver tc3589x_driver = {
        .driver = {
                .name   = "tc3589x",
-                .owner  = THIS_MODULE,
                .pm     = &tc3589x_dev_pm_ops,
                .of_match_table = of_match_ptr(tc3589x_match),
        },
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index 63458b39a97d..775b9aca871a 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -525,7 +525,7 @@ static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
 static void
 tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
 {
-        struct tc6393xb *tc6393xb = irq_get_handler_data(irq);
+        struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc);
        unsigned int isr;
        unsigned int i, irq_base;
@@ -586,12 +586,12 @@ static void tc6393xb_attach_irq(struct platform_device *dev)
        for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
                irq_set_chip_and_handler(irq, &tc6393xb_chip, handle_edge_irq);
                irq_set_chip_data(irq, tc6393xb);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+                irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
        }
        irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
-        irq_set_handler_data(tc6393xb->irq, tc6393xb);
+        irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq,
-        irq_set_chained_handler(tc6393xb->irq, tc6393xb_irq);
+                                         tc6393xb);
 }
 static void tc6393xb_detach_irq(struct platform_device *dev)
@@ -599,13 +599,12 @@ static void tc6393xb_detach_irq(struct platform_device *dev)
        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
        unsigned int irq, irq_base;
-        irq_set_chained_handler(tc6393xb->irq, NULL);
+        irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL);
-        irq_set_handler_data(tc6393xb->irq, NULL);
        irq_base = tc6393xb->irq_base;
        for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
-                set_irq_flags(irq, 0);
+                irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
                irq_set_chip(irq, NULL);
                irq_set_chip_data(irq, NULL);
        }
diff --git a/drivers/mfd/tps6507x.c b/drivers/mfd/tps6507x.c
index a2e1990c9de7..1ab3dd6c8adf 100644
--- a/drivers/mfd/tps6507x.c
+++ b/drivers/mfd/tps6507x.c
@@ -129,7 +129,6 @@ MODULE_DEVICE_TABLE(of, tps6507x_of_match);
 static struct i2c_driver tps6507x_i2c_driver = {
        .driver = {
                   .name = "tps6507x",
-                   .owner = THIS_MODULE,
                   .of_match_table = of_match_ptr(tps6507x_of_match),
        },
        .probe = tps6507x_i2c_probe,
diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c
index 14b62e11aff4..f88085ad9772 100644
--- a/drivers/mfd/tps65090.c
+++ b/drivers/mfd/tps65090.c
@@ -259,7 +259,6 @@ MODULE_DEVICE_TABLE(i2c, tps65090_id_table);
 static struct i2c_driver tps65090_driver = {
        .driver = {
                .name   = "tps65090",
-                .owner  = THIS_MODULE,
                .of_match_table = of_match_ptr(tps65090_of_match),
        },
        .probe          = tps65090_i2c_probe,
diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c
index 7d1cfc1d3ce0..55add0453ae9 100644
--- a/drivers/mfd/tps65217.c
+++ b/drivers/mfd/tps65217.c
@@ -156,6 +156,7 @@ static const struct of_device_id tps65217_of_match[] = {
        { .compatible = "ti,tps65217", .data = (void *)TPS65217 },
        { /* sentinel */ },
 };
+MODULE_DEVICE_TABLE(of, tps65217_of_match);
 static int tps65217_probe(struct i2c_client *client,
                                const struct i2c_device_id *ids)
@@ -248,7 +249,6 @@ MODULE_DEVICE_TABLE(i2c, tps65217_id_table);
 static struct i2c_driver tps65217_driver = {
        .driver         = {
                .name   = "tps65217",
-                .owner  = THIS_MODULE,
                .of_match_table = tps65217_of_match,
        },
        .id_table       = tps65217_id_table,
diff --git a/drivers/mfd/tps65218.c b/drivers/mfd/tps65218.c
index 7af11a8b9753..80b9dc363cd8 100644
--- a/drivers/mfd/tps65218.c
+++ b/drivers/mfd/tps65218.c
@@ -211,6 +211,7 @@ static const struct of_device_id of_tps65218_match_table[] = {
        { .compatible = "ti,tps65218", },
        {}
 };
+MODULE_DEVICE_TABLE(of, of_tps65218_match_table);
 static int tps65218_probe(struct i2c_client *client,
                                const struct i2c_device_id *ids)
@@ -280,7 +281,6 @@ MODULE_DEVICE_TABLE(i2c, tps65218_id_table);
 static struct i2c_driver tps65218_driver = {
        .driver         = {
                .name   = "tps65218",
-                .owner  = THIS_MODULE,
                .of_match_table = of_tps65218_match_table,
        },
        .probe          = tps65218_probe,
diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c
index e0a2583916ce..5628a6b5b19b 100644
--- a/drivers/mfd/tps6586x.c
+++ b/drivers/mfd/tps6586x.c
@@ -52,7 +52,7 @@
 #define TPS6586X_VERSIONCRC     0xcd
 /* Maximum register */
-#define TPS6586X_MAX_REGISTER   (TPS6586X_VERSIONCRC + 1)
+#define TPS6586X_MAX_REGISTER   TPS6586X_VERSIONCRC
 struct tps6586x_irq_data {
        u8      mask_reg;
@@ -299,14 +299,7 @@ static int tps6586x_irq_map(struct irq_domain *h, unsigned int virq,
        irq_set_chip_data(virq, tps6586x);
        irq_set_chip_and_handler(virq, &tps6586x_irq_chip, handle_simple_irq);
        irq_set_nested_thread(virq, 1);
-        /* ARM needs us to explicitly flag the IRQ as valid
-         * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
@@ -467,7 +460,7 @@ static bool is_volatile_reg(struct device *dev, unsigned int reg)
 static const struct regmap_config tps6586x_regmap_config = {
        .reg_bits = 8,
        .val_bits = 8,
-        .max_register = TPS6586X_MAX_REGISTER - 1,
+        .max_register = TPS6586X_MAX_REGISTER,
        .volatile_reg = is_volatile_reg,
        .cache_type = REGCACHE_RBTREE,
 };
@@ -610,7 +603,6 @@ MODULE_DEVICE_TABLE(i2c, tps6586x_id_table);
 static struct i2c_driver tps6586x_driver = {
        .driver = {
                .name   = "tps6586x",
-                .owner  = THIS_MODULE,
                .of_match_table = of_match_ptr(tps6586x_of_match),
        },
        .probe          = tps6586x_i2c_probe,
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c
index 7612d89850dd..f7ab115483a9 100644
--- a/drivers/mfd/tps65910.c
+++ b/drivers/mfd/tps65910.c
@@ -544,7 +544,6 @@ MODULE_DEVICE_TABLE(i2c, tps65910_i2c_id);
 static struct i2c_driver tps65910_i2c_driver = {
        .driver = {
                   .name = "tps65910",
-                   .owner = THIS_MODULE,
                   .of_match_table = of_match_ptr(tps65910_of_match),
        },
        .probe = tps65910_i2c_probe,
diff --git a/drivers/mfd/tps65912-i2c.c b/drivers/mfd/tps65912-i2c.c
index 6a6343ee95fe..7e55640b3ed5 100644
--- a/drivers/mfd/tps65912-i2c.c
+++ b/drivers/mfd/tps65912-i2c.c
@@ -109,7 +109,6 @@ MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id);
 static struct i2c_driver tps65912_i2c_driver = {
        .driver = {
                   .name = "tps65912",
-                   .owner = THIS_MODULE,
        },
        .probe = tps65912_i2c_probe,
        .remove = tps65912_i2c_remove,
diff --git a/drivers/mfd/tps65912-irq.c b/drivers/mfd/tps65912-irq.c
index fbecec7f1e3d..db2c29cb709b 100644
--- a/drivers/mfd/tps65912-irq.c
+++ b/drivers/mfd/tps65912-irq.c
@@ -197,13 +197,7 @@ int tps65912_irq_init(struct tps65912 *tps65912, int irq,
                irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip,
                                         handle_edge_irq);
                irq_set_nested_thread(cur_irq, 1);
-                /* ARM needs us to explicitly flag the IRQ as valid
+                irq_clear_status_flags(cur_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
-                 * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-                set_irq_flags(cur_irq, IRQF_VALID);
-#else
-                irq_set_noprobe(cur_irq);
-#endif
        }
        ret = request_threaded_irq(irq, NULL, tps65912_irq, flags,
diff --git a/drivers/mfd/tps80031.c b/drivers/mfd/tps80031.c
index ed6c5b0956e2..0812df3b0d47 100644
--- a/drivers/mfd/tps80031.c
+++ b/drivers/mfd/tps80031.c
@@ -549,7 +549,6 @@ MODULE_DEVICE_TABLE(i2c, tps80031_id_table);
 static struct i2c_driver tps80031_driver = {
        .driver = {
                .name   = "tps80031",
-                .owner  = THIS_MODULE,
        },
        .probe          = tps80031_probe,
        .remove         = tps80031_remove,
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index a3fa7f4f1fb4..40e51b0baa46 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -419,16 +419,7 @@ static int twl4030_init_sih_modules(unsigned line)
 static inline void activate_irq(int irq)
 {
-#ifdef CONFIG_ARM
+        irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
-        /*
-         * ARM requires an extra step to clear IRQ_NOREQUEST, which it
-         * sets on behalf of every irq_chip.  Also sets IRQ_NOPROBE.
-         */
-        set_irq_flags(irq, IRQF_VALID);
-#else
-        /* same effect on other architectures */
-        irq_set_noprobe(irq);
-#endif
 }
 /*----------------------------------------------------------------------*/
diff --git a/drivers/mfd/twl6030-irq.c b/drivers/mfd/twl6030-irq.c
index 20fb58179ada..53574508a613 100644
--- a/drivers/mfd/twl6030-irq.c
+++ b/drivers/mfd/twl6030-irq.c
@@ -231,7 +231,7 @@ static irqreturn_t twl6030_irq_thread(int irq, void *data)
 static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-        struct twl6030_irq *pdata = irq_get_chip_data(d->irq);
+        struct twl6030_irq *pdata = irq_data_get_irq_chip_data(d);
        if (on)
                atomic_inc(&pdata->wakeirqs);
@@ -352,26 +352,13 @@ static int twl6030_irq_map(struct irq_domain *d, unsigned int virq,
        irq_set_chip_and_handler(virq,  &pdata->irq_chip, handle_simple_irq);
        irq_set_nested_thread(virq, true);
        irq_set_parent(virq, pdata->twl_irq);
-#ifdef CONFIG_ARM
-        /*
-         * ARM requires an extra step to clear IRQ_NOREQUEST, which it
-         * sets on behalf of every irq_chip.  Also sets IRQ_NOPROBE.
-         */
-        set_irq_flags(virq, IRQF_VALID);
-#else
-        /* same effect on other architectures */
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
 static void twl6030_irq_unmap(struct irq_domain *d, unsigned int virq)
 {
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, 0);
-#endif
        irq_set_chip_and_handler(virq, NULL, NULL);
        irq_set_chip_data(virq, NULL);
 }
diff --git a/drivers/mfd/twl6040.c b/drivers/mfd/twl6040.c
index c5265c1262c5..fbc9b6eb20a2 100644
--- a/drivers/mfd/twl6040.c
+++ b/drivers/mfd/twl6040.c
@@ -801,7 +801,6 @@ MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
 static struct i2c_driver twl6040_driver = {
        .driver = {
                .name = "twl6040",
-                .owner = THIS_MODULE,
        },
        .probe          = twl6040_probe,
        .remove         = twl6040_remove,
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
index 3591550598ad..9a2302129711 100644
--- a/drivers/mfd/ucb1x00-core.c
+++ b/drivers/mfd/ucb1x00-core.c
@@ -282,7 +282,7 @@ void ucb1x00_adc_disable(struct ucb1x00 *ucb)
 * SIBCLK to talk to the chip.  We leave the clock running until
 * we have finished processing all interrupts from the chip.
 */
-static void ucb1x00_irq(unsigned int irq, struct irq_desc *desc)
+static void ucb1x00_irq(unsigned int __irq, struct irq_desc *desc)
 {
        struct ucb1x00 *ucb = irq_desc_get_handler_data(desc);
        unsigned int isr, i;
@@ -292,7 +292,7 @@ static void ucb1x00_irq(unsigned int irq, struct irq_desc *desc)
        ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
        ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
-        for (i = 0; i < 16 && isr; i++, isr >>= 1, irq++)
+        for (i = 0; i < 16 && isr; i++, isr >>= 1)
                if (isr & 1)
                        generic_handle_irq(ucb->irq_base + i);
        ucb1x00_disable(ucb);
@@ -562,7 +562,7 @@ static int ucb1x00_probe(struct mcp *mcp)
                irq_set_chip_and_handler(irq, &ucb1x00_irqchip, handle_edge_irq);
                irq_set_chip_data(irq, ucb);
-                set_irq_flags(irq, IRQF_VALID | IRQ_NOREQUEST);
+                irq_clear_status_flags(irq, IRQ_NOREQUEST);
        }
        irq_set_irq_type(ucb->irq, IRQ_TYPE_EDGE_RISING);
diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index aeae6ec123b3..a4997a5c02ce 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -266,8 +266,6 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000069, 0x01FF },   /* R105   - Always On Triggers Sequence Select 4 */
        { 0x0000006A, 0x01FF },   /* R106   - Always On Triggers Sequence Select 5 */
        { 0x0000006B, 0x01FF },   /* R107   - Always On Triggers Sequence Select 6 */
-        { 0x0000006E, 0x01FF },   /* R110   - Trigger Sequence Select 32 */
-        { 0x0000006F, 0x01FF },   /* R111   - Trigger Sequence Select 33 */
        { 0x00000070, 0x0000 },   /* R112   - Comfort Noise Generator */ 
        { 0x00000090, 0x0000 },   /* R144   - Haptics Control 1 */ 
        { 0x00000091, 0x7FFF },   /* R145   - Haptics Control 2 */ 
@@ -300,7 +298,6 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000175, 0x0004 },   /* R373   - FLL1 Control 5 */ 
        { 0x00000176, 0x0000 },   /* R374   - FLL1 Control 6 */ 
        { 0x00000177, 0x0181 },   /* R375   - FLL1 Loop Filter Test 1 */ 
-        { 0x00000178, 0x0000 },   /* R376   - FLL1 NCO Test 0 */
        { 0x00000179, 0x0000 },   /* R377   - FLL1 Control 7 */
        { 0x00000181, 0x0000 },   /* R385   - FLL1 Synchroniser 1 */ 
        { 0x00000182, 0x0000 },   /* R386   - FLL1 Synchroniser 2 */ 
@@ -318,7 +315,6 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000195, 0x0004 },   /* R405   - FLL2 Control 5 */ 
        { 0x00000196, 0x0000 },   /* R406   - FLL2 Control 6 */ 
        { 0x00000197, 0x0000 },   /* R407   - FLL2 Loop Filter Test 1 */ 
-        { 0x00000198, 0x0000 },   /* R408   - FLL2 NCO Test 0 */
        { 0x00000199, 0x0000 },   /* R409   - FLL2 Control 7 */
        { 0x000001A1, 0x0000 },   /* R417   - FLL2 Synchroniser 1 */ 
        { 0x000001A2, 0x0000 },   /* R418   - FLL2 Synchroniser 2 */ 
@@ -338,12 +334,9 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x0000021A, 0x01A6 },   /* R538   - Mic Bias Ctrl 3 */ 
        { 0x00000293, 0x0000 },   /* R659   - Accessory Detect Mode 1 */ 
        { 0x0000029B, 0x0020 },   /* R667   - Headphone Detect 1 */ 
-        { 0x0000029C, 0x0000 },   /* R668   - Headphone Detect 2 */
-        { 0x0000029F, 0x0000 },   /* R671   - Headphone Detect Test */
        { 0x000002A2, 0x0000 },   /* R674   - Micd clamp control */
        { 0x000002A3, 0x1102 },   /* R675   - Mic Detect 1 */ 
        { 0x000002A4, 0x009F },   /* R676   - Mic Detect 2 */ 
-        { 0x000002A5, 0x0000 },   /* R677   - Mic Detect 3 */ 
        { 0x000002A6, 0x3737 },   /* R678   - Mic Detect Level 1 */
        { 0x000002A7, 0x372C },   /* R679   - Mic Detect Level 2 */
        { 0x000002A8, 0x1422 },   /* R680   - Mic Detect Level 3 */
@@ -887,11 +880,11 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000D1B, 0xFFFF },   /* R3355  - IRQ2 Status 4 Mask */ 
        { 0x00000D1C, 0xFFFF },   /* R3356  - IRQ2 Status 5 Mask */ 
        { 0x00000D1F, 0x0000 },   /* R3359  - IRQ2 Control */ 
+        { 0x00000D41, 0x0000 },   /* R3393  - ADSP2 IRQ0 */
        { 0x00000D53, 0xFFFF },   /* R3411  - AOD IRQ Mask IRQ1 */ 
        { 0x00000D54, 0xFFFF },   /* R3412  - AOD IRQ Mask IRQ2 */ 
        { 0x00000D56, 0x0000 },   /* R3414  - Jack detect debounce */ 
        { 0x00000E00, 0x0000 },   /* R3584  - FX_Ctrl1 */ 
-        { 0x00000E01, 0x0000 },   /* R3585  - FX_Ctrl2 */ 
        { 0x00000E10, 0x6318 },   /* R3600  - EQ1_1 */ 
        { 0x00000E11, 0x6300 },   /* R3601  - EQ1_2 */ 
        { 0x00000E12, 0x0FC8 },   /* R3602  - EQ1_3 */ 
@@ -991,6 +984,7 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000ECD, 0x0000 },   /* R3789  - HPLPF4_2 */ 
        { 0x00000EE0, 0x0000 },   /* R3808  - ASRC_ENABLE */ 
        { 0x00000EE2, 0x0000 },   /* R3810  - ASRC_RATE1 */ 
+        { 0x00000EE3, 0x0400 },   /* R3811  - ASRC_RATE2 */
        { 0x00000EF0, 0x0000 },   /* R3824  - ISRC 1 CTRL 1 */ 
        { 0x00000EF1, 0x0000 },   /* R3825  - ISRC 1 CTRL 2 */ 
        { 0x00000EF2, 0x0000 },   /* R3826  - ISRC 1 CTRL 3 */ 
@@ -998,7 +992,6 @@ static const struct reg_default wm5102_reg_default[] = {
        { 0x00000EF4, 0x0000 },   /* R3828  - ISRC 2 CTRL 2 */ 
        { 0x00000EF5, 0x0000 },   /* R3829  - ISRC 2 CTRL 3 */ 
        { 0x00001100, 0x0010 },   /* R4352  - DSP1 Control 1 */ 
-        { 0x00001101, 0x0000 },   /* R4353  - DSP1 Clocking 1 */ 
 };
 static bool wm5102_readable_register(struct device *dev, unsigned int reg)
@@ -1008,12 +1001,10 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_DEVICE_REVISION:
        case ARIZONA_CTRL_IF_SPI_CFG_1:
        case ARIZONA_CTRL_IF_I2C1_CFG_1:
-        case ARIZONA_CTRL_IF_STATUS_1:
        case ARIZONA_WRITE_SEQUENCER_CTRL_0:
        case ARIZONA_WRITE_SEQUENCER_CTRL_1:
        case ARIZONA_WRITE_SEQUENCER_CTRL_2:
        case ARIZONA_WRITE_SEQUENCER_CTRL_3:
-        case ARIZONA_WRITE_SEQUENCER_PROM:
        case ARIZONA_TONE_GENERATOR_1:
        case ARIZONA_TONE_GENERATOR_2:
        case ARIZONA_TONE_GENERATOR_3:
@@ -1034,8 +1025,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4:
        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5:
        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6:
-        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7:
-        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8:
        case ARIZONA_COMFORT_NOISE_GENERATOR:
        case ARIZONA_HAPTICS_CONTROL_1:
        case ARIZONA_HAPTICS_CONTROL_2:
@@ -1176,7 +1165,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_DAC_DIGITAL_VOLUME_4L:
        case ARIZONA_OUT_VOLUME_4L:
        case ARIZONA_NOISE_GATE_SELECT_4L:
-        case ARIZONA_OUTPUT_PATH_CONFIG_4R:
        case ARIZONA_DAC_DIGITAL_VOLUME_4R:
        case ARIZONA_OUT_VOLUME_4R:
        case ARIZONA_NOISE_GATE_SELECT_4R:
@@ -1184,7 +1172,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_DAC_DIGITAL_VOLUME_5L:
        case ARIZONA_DAC_VOLUME_LIMIT_5L:
        case ARIZONA_NOISE_GATE_SELECT_5L:
-        case ARIZONA_OUTPUT_PATH_CONFIG_5R:
        case ARIZONA_DAC_DIGITAL_VOLUME_5R:
        case ARIZONA_DAC_VOLUME_LIMIT_5R:
        case ARIZONA_NOISE_GATE_SELECT_5R:
@@ -1195,8 +1182,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_NOISE_GATE_CONTROL:
        case ARIZONA_PDM_SPK1_CTRL_1:
        case ARIZONA_PDM_SPK1_CTRL_2:
-        case ARIZONA_SPK_CTRL_2:
-        case ARIZONA_SPK_CTRL_3:
        case ARIZONA_DAC_COMP_1:
        case ARIZONA_DAC_COMP_2:
        case ARIZONA_DAC_COMP_3:
@@ -1228,7 +1213,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_AIF1_FRAME_CTRL_18:
        case ARIZONA_AIF1_TX_ENABLES:
        case ARIZONA_AIF1_RX_ENABLES:
-        case ARIZONA_AIF1_FORCE_WRITE:
        case ARIZONA_AIF2_BCLK_CTRL:
        case ARIZONA_AIF2_TX_PIN_CTRL:
        case ARIZONA_AIF2_RX_PIN_CTRL:
@@ -1244,7 +1228,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_AIF2_FRAME_CTRL_12:
        case ARIZONA_AIF2_TX_ENABLES:
        case ARIZONA_AIF2_RX_ENABLES:
-        case ARIZONA_AIF2_FORCE_WRITE:
        case ARIZONA_AIF3_BCLK_CTRL:
        case ARIZONA_AIF3_TX_PIN_CTRL:
        case ARIZONA_AIF3_RX_PIN_CTRL:
@@ -1260,7 +1243,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_AIF3_FRAME_CTRL_12:
        case ARIZONA_AIF3_TX_ENABLES:
        case ARIZONA_AIF3_RX_ENABLES:
-        case ARIZONA_AIF3_FORCE_WRITE:
        case ARIZONA_SLIMBUS_FRAMER_REF_GEAR:
        case ARIZONA_SLIMBUS_RATES_1:
        case ARIZONA_SLIMBUS_RATES_2:
@@ -1586,22 +1568,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_DRC1RMIX_INPUT_3_VOLUME:
        case ARIZONA_DRC1RMIX_INPUT_4_SOURCE:
        case ARIZONA_DRC1RMIX_INPUT_4_VOLUME:
-        case ARIZONA_DRC2LMIX_INPUT_1_SOURCE:
-        case ARIZONA_DRC2LMIX_INPUT_1_VOLUME:
-        case ARIZONA_DRC2LMIX_INPUT_2_SOURCE:
-        case ARIZONA_DRC2LMIX_INPUT_2_VOLUME:
-        case ARIZONA_DRC2LMIX_INPUT_3_SOURCE:
-        case ARIZONA_DRC2LMIX_INPUT_3_VOLUME:
-        case ARIZONA_DRC2LMIX_INPUT_4_SOURCE:
-        case ARIZONA_DRC2LMIX_INPUT_4_VOLUME:
-        case ARIZONA_DRC2RMIX_INPUT_1_SOURCE:
-        case ARIZONA_DRC2RMIX_INPUT_1_VOLUME:
-        case ARIZONA_DRC2RMIX_INPUT_2_SOURCE:
-        case ARIZONA_DRC2RMIX_INPUT_2_VOLUME:
-        case ARIZONA_DRC2RMIX_INPUT_3_SOURCE:
-        case ARIZONA_DRC2RMIX_INPUT_3_VOLUME:
-        case ARIZONA_DRC2RMIX_INPUT_4_SOURCE:
-        case ARIZONA_DRC2RMIX_INPUT_4_VOLUME:
        case ARIZONA_HPLP1MIX_INPUT_1_SOURCE:
        case ARIZONA_HPLP1MIX_INPUT_1_VOLUME:
        case ARIZONA_HPLP1MIX_INPUT_2_SOURCE:
@@ -1810,11 +1776,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_DRC1_CTRL3:
        case ARIZONA_DRC1_CTRL4:
        case ARIZONA_DRC1_CTRL5:
-        case ARIZONA_DRC2_CTRL1:
-        case ARIZONA_DRC2_CTRL2:
-        case ARIZONA_DRC2_CTRL3:
-        case ARIZONA_DRC2_CTRL4:
-        case ARIZONA_DRC2_CTRL5:
        case ARIZONA_HPLPF1_1:
        case ARIZONA_HPLPF1_2:
        case ARIZONA_HPLPF2_1:
@@ -1832,9 +1793,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
        case ARIZONA_ISRC_2_CTRL_1:
        case ARIZONA_ISRC_2_CTRL_2:
        case ARIZONA_ISRC_2_CTRL_3:
-        case ARIZONA_ISRC_3_CTRL_1:
-        case ARIZONA_ISRC_3_CTRL_2:
-        case ARIZONA_ISRC_3_CTRL_3:
        case ARIZONA_DSP1_CONTROL_1:
        case ARIZONA_DSP1_CLOCKING_1:
        case ARIZONA_DSP1_STATUS_1:
@@ -1883,7 +1841,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
        case ARIZONA_WRITE_SEQUENCER_CTRL_2:
        case ARIZONA_WRITE_SEQUENCER_CTRL_3:
        case ARIZONA_OUTPUT_STATUS_1:
-        case ARIZONA_RAW_OUTPUT_STATUS_1:
        case ARIZONA_SLIMBUS_RX_PORT_STATUS:
        case ARIZONA_SLIMBUS_TX_PORT_STATUS:
        case ARIZONA_SAMPLE_RATE_1_STATUS:
@@ -1969,6 +1926,8 @@ const struct regmap_config wm5102_spi_regmap = {
        .reg_bits = 32,
        .pad_bits = 16,
        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
        .max_register = WM5102_MAX_REGISTER,
        .readable_reg = wm5102_readable_register,
@@ -1983,6 +1942,8 @@ EXPORT_SYMBOL_GPL(wm5102_spi_regmap);
 const struct regmap_config wm5102_i2c_regmap = {
        .reg_bits = 32,
        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
        .max_register = WM5102_MAX_REGISTER,
        .readable_reg = wm5102_readable_register,
diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
index 12cad94b4035..19785a6bcac6 100644
--- a/drivers/mfd/wm5110-tables.c
+++ b/drivers/mfd/wm5110-tables.c
@@ -754,11 +754,9 @@ static const struct reg_default wm5110_reg_default[] = {
        { 0x0000021A, 0x01A6 },    /* R538   - Mic Bias Ctrl 3 */
        { 0x00000293, 0x0000 },    /* R659   - Accessory Detect Mode 1 */
        { 0x0000029B, 0x0028 },    /* R667   - Headphone Detect 1 */
-        { 0x0000029C, 0x0000 },    /* R668   - Headphone Detect 2 */
        { 0x000002A2, 0x0000 },    /* R674   - Micd clamp control */
        { 0x000002A3, 0x1102 },    /* R675   - Mic Detect 1 */
        { 0x000002A4, 0x009F },    /* R676   - Mic Detect 2 */
-        { 0x000002A5, 0x0000 },    /* R677   - Mic Detect 3 */
        { 0x000002A6, 0x3737 },    /* R678   - Mic Detect Level 1 */
        { 0x000002A7, 0x372C },    /* R679   - Mic Detect Level 2 */
        { 0x000002A8, 0x1422 },    /* R680   - Mic Detect Level 3 */
@@ -848,8 +846,6 @@ static const struct reg_default wm5110_reg_default[] = {
        { 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
        { 0x00000450, 0x0000 },    /* R1104  - DAC AEC Control 1 */
        { 0x00000458, 0x0000 },    /* R1112  - Noise Gate Control */
-        { 0x00000480, 0x0040 },    /* R1152  - Class W ANC Threshold 1 */
-        { 0x00000481, 0x0040 },    /* R1153  - Class W ANC Threshold 2 */
        { 0x00000490, 0x0069 },    /* R1168  - PDM SPK1 CTRL 1 */
        { 0x00000491, 0x0000 },    /* R1169  - PDM SPK1 CTRL 2 */
        { 0x00000492, 0x0069 },    /* R1170  - PDM SPK2 CTRL 1 */
@@ -1508,7 +1504,6 @@ static const struct reg_default wm5110_reg_default[] = {
        { 0x00000D54, 0xFFFF },    /* R3412  - AOD IRQ Mask IRQ2 */
        { 0x00000D56, 0x0000 },    /* R3414  - Jack detect debounce */
        { 0x00000E00, 0x0000 },    /* R3584  - FX_Ctrl1 */
-        { 0x00000E01, 0x0000 },    /* R3585  - FX_Ctrl2 */
        { 0x00000E10, 0x6318 },    /* R3600  - EQ1_1 */
        { 0x00000E11, 0x6300 },    /* R3601  - EQ1_2 */
        { 0x00000E12, 0x0FC8 },    /* R3602  - EQ1_3 */
@@ -1625,14 +1620,9 @@ static const struct reg_default wm5110_reg_default[] = {
        { 0x00000F00, 0x0000 },    /* R3840  - Clock Control */
        { 0x00000F01, 0x0000 },    /* R3841  - ANC_SRC */
        { 0x00001100, 0x0010 },    /* R4352  - DSP1 Control 1 */
-        { 0x00001101, 0x0000 },    /* R4353  - DSP1 Clocking 1 */
        { 0x00001200, 0x0010 },    /* R4608  - DSP2 Control 1 */
-        { 0x00001201, 0x0000 },    /* R4609  - DSP2 Clocking 1 */
        { 0x00001300, 0x0010 },    /* R4864  - DSP3 Control 1 */
-        { 0x00001301, 0x0000 },    /* R4865  - DSP3 Clocking 1 */
        { 0x00001400, 0x0010 },    /* R5120  - DSP4 Control 1 */
-        { 0x00001401, 0x0000 },    /* R5121  - DSP4 Clocking 1 */
-        { 0x00001404, 0x0000 },    /* R5124  - DSP4 Status 1 */
 };
 static bool wm5110_is_rev_b_adsp_memory(unsigned int reg)
@@ -3007,6 +2997,8 @@ const struct regmap_config wm5110_spi_regmap = {
        .reg_bits = 32,
        .pad_bits = 16,
        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
        .max_register = WM5110_MAX_REGISTER,
        .readable_reg = wm5110_readable_register,
@@ -3021,6 +3013,8 @@ EXPORT_SYMBOL_GPL(wm5110_spi_regmap);
 const struct regmap_config wm5110_i2c_regmap = {
        .reg_bits = 32,
        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
        .max_register = WM5110_MAX_REGISTER,
        .readable_reg = wm5110_readable_register,
diff --git a/drivers/mfd/wm831x-i2c.c b/drivers/mfd/wm831x-i2c.c
index a4cbefe5430f..824bcbaa9624 100644
--- a/drivers/mfd/wm831x-i2c.c
+++ b/drivers/mfd/wm831x-i2c.c
@@ -93,7 +93,6 @@ static const struct dev_pm_ops wm831x_pm_ops = {
 static struct i2c_driver wm831x_i2c_driver = {
        .driver = {
                .name = "wm831x",
-                .owner = THIS_MODULE,
                .pm = &wm831x_pm_ops,
        },
        .probe = wm831x_i2c_probe,
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c
index 3da81263c764..dfea8b9c2fe6 100644
--- a/drivers/mfd/wm831x-irq.c
+++ b/drivers/mfd/wm831x-irq.c
@@ -552,14 +552,7 @@ static int wm831x_irq_map(struct irq_domain *h, unsigned int virq,
        irq_set_chip_data(virq, h->host_data);
        irq_set_chip_and_handler(virq, &wm831x_irq_chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-        /* ARM needs us to explicitly flag the IRQ as valid
-         * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c
index 6a16a8a6f9fa..9358f03b7938 100644
--- a/drivers/mfd/wm8350-i2c.c
+++ b/drivers/mfd/wm8350-i2c.c
@@ -69,7 +69,6 @@ MODULE_DEVICE_TABLE(i2c, wm8350_i2c_id);
 static struct i2c_driver wm8350_i2c_driver = {
        .driver = {
                   .name = "wm8350",
-                   .owner = THIS_MODULE,
        },
        .probe = wm8350_i2c_probe,
        .remove = wm8350_i2c_remove,
diff --git a/drivers/mfd/wm8350-irq.c b/drivers/mfd/wm8350-irq.c
index 813ff50f95b6..27054f357b8e 100644
--- a/drivers/mfd/wm8350-irq.c
+++ b/drivers/mfd/wm8350-irq.c
@@ -526,13 +526,7 @@ int wm8350_irq_init(struct wm8350 *wm8350, int irq,
                                         handle_edge_irq);
                irq_set_nested_thread(cur_irq, 1);
-                /* ARM needs us to explicitly flag the IRQ as valid
+                irq_clear_status_flags(cur_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
-                 * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-                set_irq_flags(cur_irq, IRQF_VALID);
-#else
-                irq_set_noprobe(cur_irq);
-#endif
        }
        ret = request_threaded_irq(irq, NULL, wm8350_irq, flags,
diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c
index c6fb5d16ca09..3bd44a45c378 100644
--- a/drivers/mfd/wm8400-core.c
+++ b/drivers/mfd/wm8400-core.c
@@ -194,7 +194,6 @@ MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
 static struct i2c_driver wm8400_i2c_driver = {
        .driver = {
                .name = "WM8400",
-                .owner = THIS_MODULE,
        },
        .probe    = wm8400_i2c_probe,
        .remove   = wm8400_i2c_remove,
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index 53ae5af5d6e4..213da3416778 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -677,7 +677,6 @@ static const struct dev_pm_ops wm8994_pm_ops = {
 static struct i2c_driver wm8994_i2c_driver = {
        .driver = {
                .name = "wm8994",
-                .owner = THIS_MODULE,
                .pm = &wm8994_pm_ops,
                .of_match_table = of_match_ptr(wm8994_of_match),
        },
diff --git a/drivers/mfd/wm8994-irq.c b/drivers/mfd/wm8994-irq.c
index 55c380a67686..18710f3b5c53 100644
--- a/drivers/mfd/wm8994-irq.c
+++ b/drivers/mfd/wm8994-irq.c
@@ -172,14 +172,7 @@ static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
        irq_set_chip_data(virq, wm8994);
        irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
        irq_set_nested_thread(virq, 1);
-        /* ARM needs us to explicitly flag the IRQ as valid
-         * and will set them noprobe when we do so. */
-#ifdef CONFIG_ARM
-        set_irq_flags(virq, IRQF_VALID);
-#else
        irq_set_noprobe(virq);
-#endif
        return 0;
 }
@@ -193,7 +186,7 @@ int wm8994_irq_init(struct wm8994 *wm8994)
 {
        int ret;
        unsigned long irqflags;
-        struct wm8994_pdata *pdata = dev_get_platdata(wm8994->dev);
+        struct wm8994_pdata *pdata = &wm8994->pdata;
        if (!wm8994->irq) {
                dev_warn(wm8994->dev,
diff --git a/drivers/mfd/wm8994-regmap.c b/drivers/mfd/wm8994-regmap.c
index 300e9b6a2e96..c56b1600ef3e 100644
--- a/drivers/mfd/wm8994-regmap.c
+++ b/drivers/mfd/wm8994-regmap.c
@@ -19,7 +19,7 @@
 #include "wm8994.h"
-static struct reg_default wm1811_defaults[] = {
+static const struct reg_default wm1811_defaults[] = {
        { 0x0001, 0x0000 },    /* R1    - Power Management (1) */
        { 0x0002, 0x6000 },    /* R2    - Power Management (2) */
        { 0x0003, 0x0000 },    /* R3    - Power Management (3) */
@@ -251,7 +251,7 @@ static struct reg_default wm1811_defaults[] = {
        { 0x0748, 0x003F },    /* R1864 - IRQ Debounce */
 };
-static struct reg_default wm8994_defaults[] = {
+static const struct reg_default wm8994_defaults[] = {
        { 0x0001, 0x0000 },    /* R1     - Power Management (1) */ 
        { 0x0002, 0x6000 },    /* R2     - Power Management (2) */ 
        { 0x0003, 0x0000 },    /* R3     - Power Management (3) */ 
@@ -470,7 +470,7 @@ static struct reg_default wm8994_defaults[] = {
        { 0x0748, 0x003F },    /* R1864  - IRQ Debounce */ 
 };
-static struct reg_default wm8958_defaults[] = {
+static const struct reg_default wm8958_defaults[] = {
        { 0x0001, 0x0000 },    /* R1     - Power Management (1) */
        { 0x0002, 0x6000 },    /* R2     - Power Management (2) */
        { 0x0003, 0x0000 },    /* R3     - Power Management (3) */
diff --git a/drivers/mfd/wm8997-tables.c b/drivers/mfd/wm8997-tables.c
index c0c25d75aacc..2a91473dc1ee 100644
--- a/drivers/mfd/wm8997-tables.c
+++ b/drivers/mfd/wm8997-tables.c
@@ -243,7 +243,6 @@ static const struct reg_default wm8997_reg_default[] = {
        { 0x0000029B, 0x0020 },    /* R667   - Headphone Detect 1 */
        { 0x000002A3, 0x1102 },    /* R675   - Mic Detect 1 */
        { 0x000002A4, 0x009F },    /* R676   - Mic Detect 2 */
-        { 0x000002A5, 0x0000 },    /* R677   - Mic Detect 3 */
        { 0x000002C3, 0x0000 },    /* R707   - Mic noise mix control 1 */
        { 0x000002CB, 0x0000 },    /* R715   - Isolation control */
        { 0x000002D3, 0x0000 },    /* R723   - Jack detect analogue */
@@ -684,7 +683,6 @@ static const struct reg_default wm8997_reg_default[] = {
        { 0x00000D54, 0xFFFF },    /* R3412  - AOD IRQ Mask IRQ2 */
        { 0x00000D56, 0x0000 },    /* R3414  - Jack detect debounce */
        { 0x00000E00, 0x0000 },    /* R3584  - FX_Ctrl1 */
-        { 0x00000E01, 0x0000 },    /* R3585  - FX_Ctrl2 */
        { 0x00000E10, 0x6318 },    /* R3600  - EQ1_1 */
        { 0x00000E11, 0x6300 },    /* R3601  - EQ1_2 */
        { 0x00000E12, 0x0FC8 },    /* R3602  - EQ1_3 */
@@ -788,8 +786,6 @@ static const struct reg_default wm8997_reg_default[] = {
        { 0x00000EF3, 0x0000 },    /* R3827  - ISRC 2 CTRL 1 */
        { 0x00000EF4, 0x0000 },    /* R3828  - ISRC 2 CTRL 2 */
        { 0x00000EF5, 0x0000 },    /* R3829  - ISRC 2 CTRL 3 */
-        { 0x00001100, 0x0010 },    /* R4352  - DSP1 Control 1 */
-        { 0x00001101, 0x0000 },    /* R4353  - DSP1 Clocking 1 */
 };
 static bool wm8997_readable_register(struct device *dev, unsigned int reg)
@@ -1480,6 +1476,8 @@ static bool wm8997_volatile_register(struct device *dev, unsigned int reg)
        case ARIZONA_SAMPLE_RATE_2_STATUS:
        case ARIZONA_SAMPLE_RATE_3_STATUS:
        case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
+        case ARIZONA_FLL1_NCO_TEST_0:
+        case ARIZONA_FLL2_NCO_TEST_0:
        case ARIZONA_MIC_DETECT_3:
        case ARIZONA_HP_CTRL_1L:
        case ARIZONA_HP_CTRL_1R:
@@ -1521,6 +1519,8 @@ static bool wm8997_volatile_register(struct device *dev, unsigned int reg)
 const struct regmap_config wm8997_i2c_regmap = {
        .reg_bits = 32,
        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
        .max_register = WM8997_MAX_REGISTER,
        .readable_reg = wm8997_readable_register,
diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c
new file mode 100644
index 000000000000..e6de3cd8a9aa
--- /dev/null
+++ b/drivers/mfd/wm8998-tables.c
@@ -0,0 +1,1594 @@
+/*
+ * wm8998-tables.c  --  data tables for wm8998-class codecs
+ *
+ * Copyright 2014 Wolfson Microelectronics plc
+ *
+ * Author: Richard Fitzgerald <rf@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/mfd/arizona/core.h>
+#include <linux/mfd/arizona/registers.h>
+#include <linux/device.h>
+#include "arizona.h"
+#define WM8998_NUM_AOD_ISR 2
+#define WM8998_NUM_ISR 5
+static const struct reg_default wm8998_rev_a_patch[] = {
+        { 0x0212, 0x0000 },
+        { 0x0211, 0x0014 },
+        { 0x04E4, 0x0E0D },
+        { 0x04E5, 0x0E0D },
+        { 0x04E6, 0x0E0D },
+        { 0x04EB, 0x060E },
+        { 0x0441, 0xC759 },
+        { 0x0442, 0x2A08 },
+        { 0x0443, 0x5CFA },
+        { 0x026E, 0x0064 },
+        { 0x026F, 0x00EA },
+        { 0x0270, 0x1F16 },
+        { 0x0410, 0x2080 },
+        { 0x0418, 0x2080 },
+        { 0x0420, 0x2080 },
+        { 0x04B8, 0x1120 },
+        { 0x047E, 0x080E },
+        { 0x0448, 0x03EF },
+};
+/* We use a function so we can use ARRAY_SIZE() */
+int wm8998_patch(struct arizona *arizona)
+{
+        return regmap_register_patch(arizona->regmap,
+                                     wm8998_rev_a_patch,
+                                     ARRAY_SIZE(wm8998_rev_a_patch));
+}
+static const struct regmap_irq wm8998_aod_irqs[ARIZONA_NUM_IRQ] = {
+        [ARIZONA_IRQ_MICD_CLAMP_FALL] = {
+                .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
+        },
+        [ARIZONA_IRQ_MICD_CLAMP_RISE] = {
+                .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
+        },
+        [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
+        [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
+        [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
+        [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
+};
+struct regmap_irq_chip wm8998_aod = {
+        .name = "wm8998 AOD",
+        .status_base = ARIZONA_AOD_IRQ1,
+        .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
+        .ack_base = ARIZONA_AOD_IRQ1,
+        .wake_base = ARIZONA_WAKE_CONTROL,
+        .wake_invert = 1,
+        .num_regs = 1,
+        .irqs = wm8998_aod_irqs,
+        .num_irqs = ARRAY_SIZE(wm8998_aod_irqs),
+};
+static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = {
+        [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
+        [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
+        [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
+        [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
+        [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = {
+                .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1
+        },
+        [ARIZONA_IRQ_SPK_OVERHEAT] = {
+                .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1
+        },
+        [ARIZONA_IRQ_HPDET] = {
+                .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1
+        },
+        [ARIZONA_IRQ_MICDET] = {
+                .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1
+        },
+        [ARIZONA_IRQ_WSEQ_DONE] = {
+                .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1
+        },
+        [ARIZONA_IRQ_DRC1_SIG_DET] = {
+                .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1
+        },
+        [ARIZONA_IRQ_ASRC2_LOCK] = {
+                .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1
+        },
+        [ARIZONA_IRQ_ASRC1_LOCK] = {
+                .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1
+        },
+        [ARIZONA_IRQ_UNDERCLOCKED] = {
+                .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1
+        },
+        [ARIZONA_IRQ_OVERCLOCKED] = {
+                .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1
+        },
+        [ARIZONA_IRQ_FLL2_LOCK] = {
+                .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1
+        },
+        [ARIZONA_IRQ_FLL1_LOCK] = {
+                .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1
+        },
+        [ARIZONA_IRQ_CLKGEN_ERR] = {
+                .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1
+        },
+        [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = {
+                .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1
+        },
+        [ARIZONA_IRQ_ASRC_CFG_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_ASRC_CFG_ERR_EINT1
+        },
+        [ARIZONA_IRQ_AIF3_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_AIF3_ERR_EINT1
+        },
+        [ARIZONA_IRQ_AIF2_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_AIF2_ERR_EINT1
+        },
+        [ARIZONA_IRQ_AIF1_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_AIF1_ERR_EINT1
+        },
+        [ARIZONA_IRQ_CTRLIF_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_CTRLIF_ERR_EINT1
+        },
+        [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = {
+                .reg_offset = 3, .mask = ARIZONA_MIXER_DROPPED_SAMPLE_EINT1
+        },
+        [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = {
+                .reg_offset = 3, .mask = ARIZONA_ASYNC_CLK_ENA_LOW_EINT1
+        },
+        [ARIZONA_IRQ_SYSCLK_ENA_LOW] = {
+                .reg_offset = 3, .mask = ARIZONA_SYSCLK_ENA_LOW_EINT1
+        },
+        [ARIZONA_IRQ_ISRC1_CFG_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_ISRC1_CFG_ERR_EINT1
+        },
+        [ARIZONA_IRQ_ISRC2_CFG_ERR] = {
+                .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1
+        },
+        [ARIZONA_IRQ_BOOT_DONE] = {
+                .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1
+        },
+        [ARIZONA_IRQ_FLL2_CLOCK_OK] = {
+                .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1
+        },
+        [ARIZONA_IRQ_FLL1_CLOCK_OK] = {
+                .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1
+        },
+};
+struct regmap_irq_chip wm8998_irq = {
+        .name = "wm8998 IRQ",
+        .status_base = ARIZONA_INTERRUPT_STATUS_1,
+        .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
+        .ack_base = ARIZONA_INTERRUPT_STATUS_1,
+        .num_regs = 5,
+        .irqs = wm8998_irqs,
+        .num_irqs = ARRAY_SIZE(wm8998_irqs),
+};
+static const struct reg_default wm8998_reg_default[] = {
+        { 0x00000009, 0x0001 },    /* R9     - Ctrl IF I2C1 CFG 1 */
+        { 0x0000000B, 0x001A },    /* R11    - Ctrl IF I2C1 CFG 2 */
+        { 0x00000020, 0x0000 },    /* R32    - Tone Generator 1 */
+        { 0x00000021, 0x1000 },    /* R33    - Tone Generator 2 */
+        { 0x00000022, 0x0000 },    /* R34    - Tone Generator 3 */
+        { 0x00000023, 0x1000 },    /* R35    - Tone Generator 4 */
+        { 0x00000024, 0x0000 },    /* R36    - Tone Generator 5 */
+        { 0x00000030, 0x0000 },    /* R48    - PWM Drive 1 */
+        { 0x00000031, 0x0100 },    /* R49    - PWM Drive 2 */
+        { 0x00000032, 0x0100 },    /* R50    - PWM Drive 3 */
+        { 0x00000040, 0x0000 },    /* R64    - Wake control */
+        { 0x00000041, 0x0000 },    /* R65    - Sequence control */
+        { 0x00000061, 0x01FF },    /* R97    - Sample Rate Sequence Select 1 */
+        { 0x00000062, 0x01FF },    /* R98    - Sample Rate Sequence Select 2 */
+        { 0x00000063, 0x01FF },    /* R99    - Sample Rate Sequence Select 3 */
+        { 0x00000064, 0x01FF },    /* R100   - Sample Rate Sequence Select 4 */
+        { 0x00000066, 0x01FF },    /* R102   - Always On Triggers Sequence Select 1 */
+        { 0x00000067, 0x01FF },    /* R103   - Always On Triggers Sequence Select 2 */
+        { 0x00000068, 0x01FF },    /* R104   - Always On Triggers Sequence Select 3 */
+        { 0x00000069, 0x01FF },    /* R105   - Always On Triggers Sequence Select 4 */
+        { 0x0000006A, 0x01FF },    /* R106   - Always On Triggers Sequence Select 5 */
+        { 0x0000006B, 0x01FF },    /* R107   - Always On Triggers Sequence Select 6 */
+        { 0x0000006E, 0x01FF },    /* R110   - Trigger Sequence Select 32 */
+        { 0x0000006F, 0x01FF },    /* R111   - Trigger Sequence Select 33 */
+        { 0x00000090, 0x0000 },    /* R144   - Haptics Control 1 */
+        { 0x00000091, 0x7FFF },    /* R145   - Haptics Control 2 */
+        { 0x00000092, 0x0000 },    /* R146   - Haptics phase 1 intensity */
+        { 0x00000093, 0x0000 },    /* R147   - Haptics phase 1 duration */
+        { 0x00000094, 0x0000 },    /* R148   - Haptics phase 2 intensity */
+        { 0x00000095, 0x0000 },    /* R149   - Haptics phase 2 duration */
+        { 0x00000096, 0x0000 },    /* R150   - Haptics phase 3 intensity */
+        { 0x00000097, 0x0000 },    /* R151   - Haptics phase 3 duration */
+        { 0x00000100, 0x0002 },    /* R256   - Clock 32k 1 */
+        { 0x00000101, 0x0304 },    /* R257   - System Clock 1 */
+        { 0x00000102, 0x0011 },    /* R258   - Sample rate 1 */
+        { 0x00000103, 0x0011 },    /* R259   - Sample rate 2 */
+        { 0x00000104, 0x0011 },    /* R260   - Sample rate 3 */
+        { 0x00000112, 0x0305 },    /* R274   - Async clock 1 */
+        { 0x00000113, 0x0011 },    /* R275   - Async sample rate 1 */
+        { 0x00000114, 0x0011 },    /* R276   - Async sample rate 2 */
+        { 0x00000149, 0x0000 },    /* R329   - Output system clock */
+        { 0x0000014A, 0x0000 },    /* R330   - Output async clock */
+        { 0x00000152, 0x0000 },    /* R338   - Rate Estimator 1 */
+        { 0x00000153, 0x0000 },    /* R339   - Rate Estimator 2 */
+        { 0x00000154, 0x0000 },    /* R340   - Rate Estimator 3 */
+        { 0x00000155, 0x0000 },    /* R341   - Rate Estimator 4 */
+        { 0x00000156, 0x0000 },    /* R342   - Rate Estimator 5 */
+        { 0x00000161, 0x0000 },    /* R353   - Dynamic Frequency Scaling 1 */
+        { 0x00000171, 0x0002 },    /* R369   - FLL1 Control 1 */
+        { 0x00000172, 0x0008 },    /* R370   - FLL1 Control 2 */
+        { 0x00000173, 0x0018 },    /* R371   - FLL1 Control 3 */
+        { 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
+        { 0x00000175, 0x0004 },    /* R373   - FLL1 Control 5 */
+        { 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
+        { 0x00000177, 0x0181 },    /* R375   - FLL1 Loop Filter Test 1 */
+        { 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
+        { 0x00000179, 0x0000 },    /* R377   - FLL1 Control 7 */
+        { 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
+        { 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
+        { 0x00000183, 0x0000 },    /* R387   - FLL1 Synchroniser 3 */
+        { 0x00000184, 0x0000 },    /* R388   - FLL1 Synchroniser 4 */
+        { 0x00000185, 0x0000 },    /* R389   - FLL1 Synchroniser 5 */
+        { 0x00000186, 0x0000 },    /* R390   - FLL1 Synchroniser 6 */
+        { 0x00000187, 0x0001 },    /* R391   - FLL1 Synchroniser 7 */
+        { 0x00000189, 0x0000 },    /* R393   - FLL1 Spread Spectrum */
+        { 0x0000018A, 0x0004 },    /* R394   - FLL1 GPIO Clock */
+        { 0x00000191, 0x0000 },    /* R401   - FLL2 Control 1 */
+        { 0x00000192, 0x0008 },    /* R402   - FLL2 Control 2 */
+        { 0x00000193, 0x0018 },    /* R403   - FLL2 Control 3 */
+        { 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
+        { 0x00000195, 0x0004 },    /* R405   - FLL2 Control 5 */
+        { 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
+        { 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
+        { 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
+        { 0x00000199, 0x0000 },    /* R409   - FLL2 Control 7 */
+        { 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
+        { 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
+        { 0x000001A3, 0x0000 },    /* R419   - FLL2 Synchroniser 3 */
+        { 0x000001A4, 0x0000 },    /* R420   - FLL2 Synchroniser 4 */
+        { 0x000001A5, 0x0000 },    /* R421   - FLL2 Synchroniser 5 */
+        { 0x000001A6, 0x0000 },    /* R422   - FLL2 Synchroniser 6 */
+        { 0x000001A7, 0x0001 },    /* R423   - FLL2 Synchroniser 7 */
+        { 0x000001A9, 0x0000 },    /* R425   - FLL2 Spread Spectrum */
+        { 0x000001AA, 0x0004 },    /* R426   - FLL2 GPIO Clock */
+        { 0x00000200, 0x0006 },    /* R512   - Mic Charge Pump 1 */
+        { 0x00000210, 0x00D4 },    /* R528   - LDO1 Control 1 */
+        { 0x00000212, 0x0000 },    /* R530   - LDO1 Control 2 */
+        { 0x00000213, 0x0344 },    /* R531   - LDO2 Control 1 */
+        { 0x00000218, 0x01A6 },    /* R536   - Mic Bias Ctrl 1 */
+        { 0x00000219, 0x01A6 },    /* R537   - Mic Bias Ctrl 2 */
+        { 0x0000021A, 0x01A6 },    /* R538   - Mic Bias Ctrl 3 */
+        { 0x00000293, 0x0080 },    /* R659   - Accessory Detect Mode 1 */
+        { 0x0000029B, 0x0000 },    /* R667   - Headphone Detect 1 */
+        { 0x0000029C, 0x0000 },    /* R668   - Headphone Detect 2 */
+        { 0x000002A2, 0x0000 },    /* R674   - Micd Clamp control */
+        { 0x000002A3, 0x1102 },    /* R675   - Mic Detect 1 */
+        { 0x000002A4, 0x009F },    /* R676   - Mic Detect 2 */
+        { 0x000002A5, 0x0000 },    /* R677   - Mic Detect 3 */
+        { 0x000002A6, 0x3737 },    /* R678   - Mic Detect Level 1 */
+        { 0x000002A7, 0x2C37 },    /* R679   - Mic Detect Level 2 */
+        { 0x000002A8, 0x1422 },    /* R680   - Mic Detect Level 3 */
+        { 0x000002A9, 0x030A },    /* R681   - Mic Detect Level 4 */
+        { 0x000002AB, 0x0000 },    /* R683   - Mic Detect 4 */
+        { 0x000002CB, 0x0000 },    /* R715   - Isolation control */
+        { 0x000002D3, 0x0000 },    /* R723   - Jack detect analogue */
+        { 0x00000300, 0x0000 },    /* R768   - Input Enables */
+        { 0x00000308, 0x0000 },    /* R776   - Input Rate */
+        { 0x00000309, 0x0022 },    /* R777   - Input Volume Ramp */
+        { 0x0000030C, 0x0002 },    /* R780   - HPF Control */
+        { 0x00000310, 0x2080 },    /* R784   - IN1L Control */
+        { 0x00000311, 0x0180 },    /* R785   - ADC Digital Volume 1L */
+        { 0x00000312, 0x0000 },    /* R786   - DMIC1L Control */
+        { 0x00000314, 0x0080 },    /* R788   - IN1R Control */
+        { 0x00000315, 0x0180 },    /* R789   - ADC Digital Volume 1R */
+        { 0x00000316, 0x0000 },    /* R790   - DMIC1R Control */
+        { 0x00000318, 0x2080 },    /* R792   - IN2L Control */
+        { 0x00000319, 0x0180 },    /* R793   - ADC Digital Volume 2L */
+        { 0x0000031A, 0x0000 },    /* R794   - DMIC2L Control */
+        { 0x00000400, 0x0000 },    /* R1024  - Output Enables 1 */
+        { 0x00000408, 0x0000 },    /* R1032  - Output Rate 1 */
+        { 0x00000409, 0x0022 },    /* R1033  - Output Volume Ramp */
+        { 0x00000410, 0x2080 },    /* R1040  - Output Path Config 1L */
+        { 0x00000411, 0x0180 },    /* R1041  - DAC Digital Volume 1L */
+        { 0x00000413, 0x0001 },    /* R1043  - Noise Gate Select 1L */
+        { 0x00000414, 0x0080 },    /* R1044  - Output Path Config 1R */
+        { 0x00000415, 0x0180 },    /* R1045  - DAC Digital Volume 1R */
+        { 0x00000417, 0x0002 },    /* R1047  - Noise Gate Select 1R */
+        { 0x00000418, 0x2080 },    /* R1048  - Output Path Config 2L */
+        { 0x00000419, 0x0180 },    /* R1049  - DAC Digital Volume 2L */
+        { 0x0000041B, 0x0004 },    /* R1051  - Noise Gate Select 2L */
+        { 0x0000041C, 0x0080 },    /* R1052  - Output Path Config 2R */
+        { 0x0000041D, 0x0180 },    /* R1053  - DAC Digital Volume 2R */
+        { 0x0000041F, 0x0008 },    /* R1055  - Noise Gate Select 2R */
+        { 0x00000420, 0x2080 },    /* R1056  - Output Path Config 3L */
+        { 0x00000421, 0x0180 },    /* R1057  - DAC Digital Volume 3L */
+        { 0x00000423, 0x0010 },    /* R1059  - Noise Gate Select 3L */
+        { 0x00000428, 0x0000 },    /* R1064  - Output Path Config 4L */
+        { 0x00000429, 0x0180 },    /* R1065  - DAC Digital Volume 4L */
+        { 0x0000042B, 0x0040 },    /* R1067  - Noise Gate Select 4L */
+        { 0x0000042C, 0x0000 },    /* R1068  - Output Path Config 4R */
+        { 0x0000042D, 0x0180 },    /* R1069  - DAC Digital Volume 4R */
+        { 0x0000042F, 0x0080 },    /* R1071  - Noise Gate Select 4R */
+        { 0x00000430, 0x0000 },    /* R1072  - Output Path Config 5L */
+        { 0x00000431, 0x0180 },    /* R1073  - DAC Digital Volume 5L */
+        { 0x00000433, 0x0100 },    /* R1075  - Noise Gate Select 5L */
+        { 0x00000434, 0x0000 },    /* R1076  - Output Path Config 5R */
+        { 0x00000435, 0x0180 },    /* R1077  - DAC Digital Volume 5R */
+        { 0x00000437, 0x0200 },    /* R1079  - Noise Gate Select 5R */
+        { 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
+        { 0x00000441, 0xC759 },    /* R1089  - DRE Control 1 */
+        { 0x00000442, 0x2A08 },    /* R1089  - DRE Control 2 */
+        { 0x00000443, 0x5CFA },    /* R1089  - DRE Control 3 */
+        { 0x00000448, 0x03EF },    /* R1096  - EDRE Enable */
+        { 0x00000450, 0x0000 },    /* R1104  - DAC AEC Control 1 */
+        { 0x00000451, 0x0000 },    /* R1105  - DAC AEC Control 2 */
+        { 0x00000458, 0x0000 },    /* R1112  - Noise Gate Control */
+        { 0x00000490, 0x0069 },    /* R1168  - PDM SPK1 CTRL 1 */
+        { 0x00000491, 0x0000 },    /* R1169  - PDM SPK1 CTRL 2 */
+        { 0x0000049A, 0x0000 },    /* R1178  - HP_TEST_CTRL_13 */
+        { 0x00000500, 0x000C },    /* R1280  - AIF1 BCLK Ctrl */
+        { 0x00000501, 0x0008 },    /* R1281  - AIF1 Tx Pin Ctrl */
+        { 0x00000502, 0x0000 },    /* R1282  - AIF1 Rx Pin Ctrl */
+        { 0x00000503, 0x0000 },    /* R1283  - AIF1 Rate Ctrl */
+        { 0x00000504, 0x0000 },    /* R1284  - AIF1 Format */
+        { 0x00000506, 0x0040 },    /* R1286  - AIF1 Rx BCLK Rate */
+        { 0x00000507, 0x1818 },    /* R1287  - AIF1 Frame Ctrl 1 */
+        { 0x00000508, 0x1818 },    /* R1288  - AIF1 Frame Ctrl 2 */
+        { 0x00000509, 0x0000 },    /* R1289  - AIF1 Frame Ctrl 3 */
+        { 0x0000050A, 0x0001 },    /* R1290  - AIF1 Frame Ctrl 4 */
+        { 0x0000050B, 0x0002 },    /* R1291  - AIF1 Frame Ctrl 5 */
+        { 0x0000050C, 0x0003 },    /* R1292  - AIF1 Frame Ctrl 6 */
+        { 0x0000050D, 0x0004 },    /* R1293  - AIF1 Frame Ctrl 7 */
+        { 0x0000050E, 0x0005 },    /* R1294  - AIF1 Frame Ctrl 8 */
+        { 0x00000511, 0x0000 },    /* R1297  - AIF1 Frame Ctrl 11 */
+        { 0x00000512, 0x0001 },    /* R1298  - AIF1 Frame Ctrl 12 */
+        { 0x00000513, 0x0002 },    /* R1299  - AIF1 Frame Ctrl 13 */
+        { 0x00000514, 0x0003 },    /* R1300  - AIF1 Frame Ctrl 14 */
+        { 0x00000515, 0x0004 },    /* R1301  - AIF1 Frame Ctrl 15 */
+        { 0x00000516, 0x0005 },    /* R1302  - AIF1 Frame Ctrl 16 */
+        { 0x00000519, 0x0000 },    /* R1305  - AIF1 Tx Enables */
+        { 0x0000051A, 0x0000 },    /* R1306  - AIF1 Rx Enables */
+        { 0x00000540, 0x000C },    /* R1344  - AIF2 BCLK Ctrl */
+        { 0x00000541, 0x0008 },    /* R1345  - AIF2 Tx Pin Ctrl */
+        { 0x00000542, 0x0000 },    /* R1346  - AIF2 Rx Pin Ctrl */
+        { 0x00000543, 0x0000 },    /* R1347  - AIF2 Rate Ctrl */
+        { 0x00000544, 0x0000 },    /* R1348  - AIF2 Format */
+        { 0x00000546, 0x0040 },    /* R1350  - AIF2 Rx BCLK Rate */
+        { 0x00000547, 0x1818 },    /* R1351  - AIF2 Frame Ctrl 1 */
+        { 0x00000548, 0x1818 },    /* R1352  - AIF2 Frame Ctrl 2 */
+        { 0x00000549, 0x0000 },    /* R1353  - AIF2 Frame Ctrl 3 */
+        { 0x0000054A, 0x0001 },    /* R1354  - AIF2 Frame Ctrl 4 */
+        { 0x0000054B, 0x0002 },    /* R1355  - AIF2 Frame Ctrl 5 */
+        { 0x0000054C, 0x0003 },    /* R1356  - AIF2 Frame Ctrl 6 */
+        { 0x0000054D, 0x0004 },    /* R1357  - AIF2 Frame Ctrl 7 */
+        { 0x0000054E, 0x0005 },    /* R1358  - AIF2 Frame Ctrl 8 */
+        { 0x00000551, 0x0000 },    /* R1361  - AIF2 Frame Ctrl 11 */
+        { 0x00000552, 0x0001 },    /* R1362  - AIF2 Frame Ctrl 12 */
+        { 0x00000553, 0x0002 },    /* R1363  - AIF2 Frame Ctrl 13 */
+        { 0x00000554, 0x0003 },    /* R1364  - AIF2 Frame Ctrl 14 */
+        { 0x00000555, 0x0004 },    /* R1365  - AIF2 Frame Ctrl 15 */
+        { 0x00000556, 0x0005 },    /* R1366  - AIF2 Frame Ctrl 16 */
+        { 0x00000559, 0x0000 },    /* R1369  - AIF2 Tx Enables */
+        { 0x0000055A, 0x0000 },    /* R1370  - AIF2 Rx Enables */
+        { 0x00000580, 0x000C },    /* R1408  - AIF3 BCLK Ctrl */
+        { 0x00000581, 0x0008 },    /* R1409  - AIF3 Tx Pin Ctrl */
+        { 0x00000582, 0x0000 },    /* R1410  - AIF3 Rx Pin Ctrl */
+        { 0x00000583, 0x0000 },    /* R1411  - AIF3 Rate Ctrl */
+        { 0x00000584, 0x0000 },    /* R1412  - AIF3 Format */
+        { 0x00000586, 0x0040 },    /* R1414  - AIF3 Rx BCLK Rate */
+        { 0x00000587, 0x1818 },    /* R1415  - AIF3 Frame Ctrl 1 */
+        { 0x00000588, 0x1818 },    /* R1416  - AIF3 Frame Ctrl 2 */
+        { 0x00000589, 0x0000 },    /* R1417  - AIF3 Frame Ctrl 3 */
+        { 0x0000058A, 0x0001 },    /* R1418  - AIF3 Frame Ctrl 4 */
+        { 0x00000591, 0x0000 },    /* R1425  - AIF3 Frame Ctrl 11 */
+        { 0x00000592, 0x0001 },    /* R1426  - AIF3 Frame Ctrl 12 */
+        { 0x00000599, 0x0000 },    /* R1433  - AIF3 Tx Enables */
+        { 0x0000059A, 0x0000 },    /* R1434  - AIF3 Rx Enables */
+        { 0x000005C2, 0x0000 },    /* R1474  - SPD1 TX Control */
+        { 0x000005C3, 0x0000 },    /* R1475  - SPD1 TX Channel Status 1 */
+        { 0x000005C4, 0x0B01 },    /* R1476  - SPD1 TX Channel Status 2 */
+        { 0x000005C5, 0x0000 },    /* R1477  - SPD1 TX Channel Status 3 */
+        { 0x000005E3, 0x0004 },    /* R1507  - SLIMbus Framer Ref Gear */
+        { 0x000005E5, 0x0000 },    /* R1509  - SLIMbus Rates 1 */
+        { 0x000005E6, 0x0000 },    /* R1510  - SLIMbus Rates 2 */
+        { 0x000005E9, 0x0000 },    /* R1513  - SLIMbus Rates 5 */
+        { 0x000005EA, 0x0000 },    /* R1514  - SLIMbus Rates 6 */
+        { 0x000005EB, 0x0000 },    /* R1515  - SLIMbus Rates 7 */
+        { 0x000005F5, 0x0000 },    /* R1525  - SLIMbus RX Channel Enable */
+        { 0x000005F6, 0x0000 },    /* R1526  - SLIMbus TX Channel Enable */
+        { 0x00000640, 0x0000 },    /* R1600  - PWM1MIX Input 1 Source */
+        { 0x00000641, 0x0080 },    /* R1601  - PWM1MIX Input 1 Volume */
+        { 0x00000642, 0x0000 },    /* R1602  - PWM1MIX Input 2 Source */
+        { 0x00000643, 0x0080 },    /* R1603  - PWM1MIX Input 2 Volume */
+        { 0x00000644, 0x0000 },    /* R1604  - PWM1MIX Input 3 Source */
+        { 0x00000645, 0x0080 },    /* R1605  - PWM1MIX Input 3 Volume */
+        { 0x00000646, 0x0000 },    /* R1606  - PWM1MIX Input 4 Source */
+        { 0x00000647, 0x0080 },    /* R1607  - PWM1MIX Input 4 Volume */
+        { 0x00000648, 0x0000 },    /* R1608  - PWM2MIX Input 1 Source */
+        { 0x00000649, 0x0080 },    /* R1609  - PWM2MIX Input 1 Volume */
+        { 0x0000064A, 0x0000 },    /* R1610  - PWM2MIX Input 2 Source */
+        { 0x0000064B, 0x0080 },    /* R1611  - PWM2MIX Input 2 Volume */
+        { 0x0000064C, 0x0000 },    /* R1612  - PWM2MIX Input 3 Source */
+        { 0x0000064D, 0x0080 },    /* R1613  - PWM2MIX Input 3 Volume */
+        { 0x0000064E, 0x0000 },    /* R1614  - PWM2MIX Input 4 Source */
+        { 0x0000064F, 0x0080 },    /* R1615  - PWM2MIX Input 4 Volume */
+        { 0x00000680, 0x0000 },    /* R1664  - OUT1LMIX Input 1 Source */
+        { 0x00000681, 0x0080 },    /* R1665  - OUT1LMIX Input 1 Volume */
+        { 0x00000682, 0x0000 },    /* R1666  - OUT1LMIX Input 2 Source */
+        { 0x00000683, 0x0080 },    /* R1667  - OUT1LMIX Input 2 Volume */
+        { 0x00000684, 0x0000 },    /* R1668  - OUT1LMIX Input 3 Source */
+        { 0x00000685, 0x0080 },    /* R1669  - OUT1LMIX Input 3 Volume */
+        { 0x00000686, 0x0000 },    /* R1670  - OUT1LMIX Input 4 Source */
+        { 0x00000687, 0x0080 },    /* R1671  - OUT1LMIX Input 4 Volume */
+        { 0x00000688, 0x0000 },    /* R1672  - OUT1RMIX Input 1 Source */
+        { 0x00000689, 0x0080 },    /* R1673  - OUT1RMIX Input 1 Volume */
+        { 0x0000068A, 0x0000 },    /* R1674  - OUT1RMIX Input 2 Source */
+        { 0x0000068B, 0x0080 },    /* R1675  - OUT1RMIX Input 2 Volume */
+        { 0x0000068C, 0x0000 },    /* R1676  - OUT1RMIX Input 3 Source */
+        { 0x0000068D, 0x0080 },    /* R1677  - OUT1RMIX Input 3 Volume */
+        { 0x0000068E, 0x0000 },    /* R1678  - OUT1RMIX Input 4 Source */
+        { 0x0000068F, 0x0080 },    /* R1679  - OUT1RMIX Input 4 Volume */
+        { 0x00000690, 0x0000 },    /* R1680  - OUT2LMIX Input 1 Source */
+        { 0x00000691, 0x0080 },    /* R1681  - OUT2LMIX Input 1 Volume */
+        { 0x00000692, 0x0000 },    /* R1682  - OUT2LMIX Input 2 Source */
+        { 0x00000693, 0x0080 },    /* R1683  - OUT2LMIX Input 2 Volume */
+        { 0x00000694, 0x0000 },    /* R1684  - OUT2LMIX Input 3 Source */
+        { 0x00000695, 0x0080 },    /* R1685  - OUT2LMIX Input 3 Volume */
+        { 0x00000696, 0x0000 },    /* R1686  - OUT2LMIX Input 4 Source */
+        { 0x00000697, 0x0080 },    /* R1687  - OUT2LMIX Input 4 Volume */
+        { 0x00000698, 0x0000 },    /* R1688  - OUT2RMIX Input 1 Source */
+        { 0x00000699, 0x0080 },    /* R1689  - OUT2RMIX Input 1 Volume */
+        { 0x0000069A, 0x0000 },    /* R1690  - OUT2RMIX Input 2 Source */
+        { 0x0000069B, 0x0080 },    /* R1691  - OUT2RMIX Input 2 Volume */
+        { 0x0000069C, 0x0000 },    /* R1692  - OUT2RMIX Input 3 Source */
+        { 0x0000069D, 0x0080 },    /* R1693  - OUT2RMIX Input 3 Volume */
+        { 0x0000069E, 0x0000 },    /* R1694  - OUT2RMIX Input 4 Source */
+        { 0x0000069F, 0x0080 },    /* R1695  - OUT2RMIX Input 4 Volume */
+        { 0x000006A0, 0x0000 },    /* R1696  - OUT3LMIX Input 1 Source */
+        { 0x000006A1, 0x0080 },    /* R1697  - OUT3LMIX Input 1 Volume */
+        { 0x000006A2, 0x0000 },    /* R1698  - OUT3LMIX Input 2 Source */
+        { 0x000006A3, 0x0080 },    /* R1699  - OUT3LMIX Input 2 Volume */
+        { 0x000006A4, 0x0000 },    /* R1700  - OUT3LMIX Input 3 Source */
+        { 0x000006A5, 0x0080 },    /* R1701  - OUT3LMIX Input 3 Volume */
+        { 0x000006A6, 0x0000 },    /* R1702  - OUT3LMIX Input 4 Source */
+        { 0x000006A7, 0x0080 },    /* R1703  - OUT3LMIX Input 4 Volume */
+        { 0x000006B0, 0x0000 },    /* R1712  - OUT4LMIX Input 1 Source */
+        { 0x000006B1, 0x0080 },    /* R1713  - OUT4LMIX Input 1 Volume */
+        { 0x000006B2, 0x0000 },    /* R1714  - OUT4LMIX Input 2 Source */
+        { 0x000006B3, 0x0080 },    /* R1715  - OUT4LMIX Input 2 Volume */
+        { 0x000006B4, 0x0000 },    /* R1716  - OUT4LMIX Input 3 Source */
+        { 0x000006B5, 0x0080 },    /* R1717  - OUT4LMIX Input 3 Volume */
+        { 0x000006B6, 0x0000 },    /* R1718  - OUT4LMIX Input 4 Source */
+        { 0x000006B7, 0x0080 },    /* R1719  - OUT4LMIX Input 4 Volume */
+        { 0x000006B8, 0x0000 },    /* R1720  - OUT4RMIX Input 1 Source */
+        { 0x000006B9, 0x0080 },    /* R1721  - OUT4RMIX Input 1 Volume */
+        { 0x000006BA, 0x0000 },    /* R1722  - OUT4RMIX Input 2 Source */
+        { 0x000006BB, 0x0080 },    /* R1723  - OUT4RMIX Input 2 Volume */
+        { 0x000006BC, 0x0000 },    /* R1724  - OUT4RMIX Input 3 Source */
+        { 0x000006BD, 0x0080 },    /* R1725  - OUT4RMIX Input 3 Volume */
+        { 0x000006BE, 0x0000 },    /* R1726  - OUT4RMIX Input 4 Source */
+        { 0x000006BF, 0x0080 },    /* R1727  - OUT4RMIX Input 4 Volume */
+        { 0x000006C0, 0x0000 },    /* R1728  - OUT5LMIX Input 1 Source */
+        { 0x000006C1, 0x0080 },    /* R1729  - OUT5LMIX Input 1 Volume */
+        { 0x000006C2, 0x0000 },    /* R1730  - OUT5LMIX Input 2 Source */
+        { 0x000006C3, 0x0080 },    /* R1731  - OUT5LMIX Input 2 Volume */
+        { 0x000006C4, 0x0000 },    /* R1732  - OUT5LMIX Input 3 Source */
+        { 0x000006C5, 0x0080 },    /* R1733  - OUT5LMIX Input 3 Volume */
+        { 0x000006C6, 0x0000 },    /* R1734  - OUT5LMIX Input 4 Source */
+        { 0x000006C7, 0x0080 },    /* R1735  - OUT5LMIX Input 4 Volume */
+        { 0x000006C8, 0x0000 },    /* R1736  - OUT5RMIX Input 1 Source */
+        { 0x000006C9, 0x0080 },    /* R1737  - OUT5RMIX Input 1 Volume */
+        { 0x000006CA, 0x0000 },    /* R1738  - OUT5RMIX Input 2 Source */
+        { 0x000006CB, 0x0080 },    /* R1739  - OUT5RMIX Input 2 Volume */
+        { 0x000006CC, 0x0000 },    /* R1740  - OUT5RMIX Input 3 Source */
+        { 0x000006CD, 0x0080 },    /* R1741  - OUT5RMIX Input 3 Volume */
+        { 0x000006CE, 0x0000 },    /* R1742  - OUT5RMIX Input 4 Source */
+        { 0x000006CF, 0x0080 },    /* R1743  - OUT5RMIX Input 4 Volume */
+        { 0x00000700, 0x0000 },    /* R1792  - AIF1TX1MIX Input 1 Source */
+        { 0x00000701, 0x0080 },    /* R1793  - AIF1TX1MIX Input 1 Volume */
+        { 0x00000702, 0x0000 },    /* R1794  - AIF1TX1MIX Input 2 Source */
+        { 0x00000703, 0x0080 },    /* R1795  - AIF1TX1MIX Input 2 Volume */
+        { 0x00000704, 0x0000 },    /* R1796  - AIF1TX1MIX Input 3 Source */
+        { 0x00000705, 0x0080 },    /* R1797  - AIF1TX1MIX Input 3 Volume */
+        { 0x00000706, 0x0000 },    /* R1798  - AIF1TX1MIX Input 4 Source */
+        { 0x00000707, 0x0080 },    /* R1799  - AIF1TX1MIX Input 4 Volume */
+        { 0x00000708, 0x0000 },    /* R1800  - AIF1TX2MIX Input 1 Source */
+        { 0x00000709, 0x0080 },    /* R1801  - AIF1TX2MIX Input 1 Volume */
+        { 0x0000070A, 0x0000 },    /* R1802  - AIF1TX2MIX Input 2 Source */
+        { 0x0000070B, 0x0080 },    /* R1803  - AIF1TX2MIX Input 2 Volume */
+        { 0x0000070C, 0x0000 },    /* R1804  - AIF1TX2MIX Input 3 Source */
+        { 0x0000070D, 0x0080 },    /* R1805  - AIF1TX2MIX Input 3 Volume */
+        { 0x0000070E, 0x0000 },    /* R1806  - AIF1TX2MIX Input 4 Source */
+        { 0x0000070F, 0x0080 },    /* R1807  - AIF1TX2MIX Input 4 Volume */
+        { 0x00000710, 0x0000 },    /* R1808  - AIF1TX3MIX Input 1 Source */
+        { 0x00000711, 0x0080 },    /* R1809  - AIF1TX3MIX Input 1 Volume */
+        { 0x00000712, 0x0000 },    /* R1810  - AIF1TX3MIX Input 2 Source */
+        { 0x00000713, 0x0080 },    /* R1811  - AIF1TX3MIX Input 2 Volume */
+        { 0x00000714, 0x0000 },    /* R1812  - AIF1TX3MIX Input 3 Source */
+        { 0x00000715, 0x0080 },    /* R1813  - AIF1TX3MIX Input 3 Volume */
+        { 0x00000716, 0x0000 },    /* R1814  - AIF1TX3MIX Input 4 Source */
+        { 0x00000717, 0x0080 },    /* R1815  - AIF1TX3MIX Input 4 Volume */
+        { 0x00000718, 0x0000 },    /* R1816  - AIF1TX4MIX Input 1 Source */
+        { 0x00000719, 0x0080 },    /* R1817  - AIF1TX4MIX Input 1 Volume */
+        { 0x0000071A, 0x0000 },    /* R1818  - AIF1TX4MIX Input 2 Source */
+        { 0x0000071B, 0x0080 },    /* R1819  - AIF1TX4MIX Input 2 Volume */
+        { 0x0000071C, 0x0000 },    /* R1820  - AIF1TX4MIX Input 3 Source */
+        { 0x0000071D, 0x0080 },    /* R1821  - AIF1TX4MIX Input 3 Volume */
+        { 0x0000071E, 0x0000 },    /* R1822  - AIF1TX4MIX Input 4 Source */
+        { 0x0000071F, 0x0080 },    /* R1823  - AIF1TX4MIX Input 4 Volume */
+        { 0x00000720, 0x0000 },    /* R1824  - AIF1TX5MIX Input 1 Source */
+        { 0x00000721, 0x0080 },    /* R1825  - AIF1TX5MIX Input 1 Volume */
+        { 0x00000722, 0x0000 },    /* R1826  - AIF1TX5MIX Input 2 Source */
+        { 0x00000723, 0x0080 },    /* R1827  - AIF1TX5MIX Input 2 Volume */
+        { 0x00000724, 0x0000 },    /* R1828  - AIF1TX5MIX Input 3 Source */
+        { 0x00000725, 0x0080 },    /* R1829  - AIF1TX5MIX Input 3 Volume */
+        { 0x00000726, 0x0000 },    /* R1830  - AIF1TX5MIX Input 4 Source */
+        { 0x00000727, 0x0080 },    /* R1831  - AIF1TX5MIX Input 4 Volume */
+        { 0x00000728, 0x0000 },    /* R1832  - AIF1TX6MIX Input 1 Source */
+        { 0x00000729, 0x0080 },    /* R1833  - AIF1TX6MIX Input 1 Volume */
+        { 0x0000072A, 0x0000 },    /* R1834  - AIF1TX6MIX Input 2 Source */
+        { 0x0000072B, 0x0080 },    /* R1835  - AIF1TX6MIX Input 2 Volume */
+        { 0x0000072C, 0x0000 },    /* R1836  - AIF1TX6MIX Input 3 Source */
+        { 0x0000072D, 0x0080 },    /* R1837  - AIF1TX6MIX Input 3 Volume */
+        { 0x0000072E, 0x0000 },    /* R1838  - AIF1TX6MIX Input 4 Source */
+        { 0x0000072F, 0x0080 },    /* R1839  - AIF1TX6MIX Input 4 Volume */
+        { 0x00000740, 0x0000 },    /* R1856  - AIF2TX1MIX Input 1 Source */
+        { 0x00000741, 0x0080 },    /* R1857  - AIF2TX1MIX Input 1 Volume */
+        { 0x00000742, 0x0000 },    /* R1858  - AIF2TX1MIX Input 2 Source */
+        { 0x00000743, 0x0080 },    /* R1859  - AIF2TX1MIX Input 2 Volume */
+        { 0x00000744, 0x0000 },    /* R1860  - AIF2TX1MIX Input 3 Source */
+        { 0x00000745, 0x0080 },    /* R1861  - AIF2TX1MIX Input 3 Volume */
+        { 0x00000746, 0x0000 },    /* R1862  - AIF2TX1MIX Input 4 Source */
+        { 0x00000747, 0x0080 },    /* R1863  - AIF2TX1MIX Input 4 Volume */
+        { 0x00000748, 0x0000 },    /* R1864  - AIF2TX2MIX Input 1 Source */
+        { 0x00000749, 0x0080 },    /* R1865  - AIF2TX2MIX Input 1 Volume */
+        { 0x0000074A, 0x0000 },    /* R1866  - AIF2TX2MIX Input 2 Source */
+        { 0x0000074B, 0x0080 },    /* R1867  - AIF2TX2MIX Input 2 Volume */
+        { 0x0000074C, 0x0000 },    /* R1868  - AIF2TX2MIX Input 3 Source */
+        { 0x0000074D, 0x0080 },    /* R1869  - AIF2TX2MIX Input 3 Volume */
+        { 0x0000074E, 0x0000 },    /* R1870  - AIF2TX2MIX Input 4 Source */
+        { 0x0000074F, 0x0080 },    /* R1871  - AIF2TX2MIX Input 4 Volume */
+        { 0x00000750, 0x0000 },    /* R1872  - AIF2TX3MIX Input 1 Source */
+        { 0x00000751, 0x0080 },    /* R1873  - AIF2TX3MIX Input 1 Volume */
+        { 0x00000752, 0x0000 },    /* R1874  - AIF2TX3MIX Input 2 Source */
+        { 0x00000753, 0x0080 },    /* R1875  - AIF2TX3MIX Input 2 Volume */
+        { 0x00000754, 0x0000 },    /* R1876  - AIF2TX3MIX Input 3 Source */
+        { 0x00000755, 0x0080 },    /* R1877  - AIF2TX3MIX Input 3 Volume */
+        { 0x00000756, 0x0000 },    /* R1878  - AIF2TX3MIX Input 4 Source */
+        { 0x00000757, 0x0080 },    /* R1879  - AIF2TX3MIX Input 4 Volume */
+        { 0x00000758, 0x0000 },    /* R1880  - AIF2TX4MIX Input 1 Source */
+        { 0x00000759, 0x0080 },    /* R1881  - AIF2TX4MIX Input 1 Volume */
+        { 0x0000075A, 0x0000 },    /* R1882  - AIF2TX4MIX Input 2 Source */
+        { 0x0000075B, 0x0080 },    /* R1883  - AIF2TX4MIX Input 2 Volume */
+        { 0x0000075C, 0x0000 },    /* R1884  - AIF2TX4MIX Input 3 Source */
+        { 0x0000075D, 0x0080 },    /* R1885  - AIF2TX4MIX Input 3 Volume */
+        { 0x0000075E, 0x0000 },    /* R1886  - AIF2TX4MIX Input 4 Source */
+        { 0x0000075F, 0x0080 },    /* R1887  - AIF2TX4MIX Input 4 Volume */
+        { 0x00000760, 0x0000 },    /* R1888  - AIF2TX5MIX Input 1 Source */
+        { 0x00000761, 0x0080 },    /* R1889  - AIF2TX5MIX Input 1 Volume */
+        { 0x00000762, 0x0000 },    /* R1890  - AIF2TX5MIX Input 2 Source */
+        { 0x00000763, 0x0080 },    /* R1891  - AIF2TX5MIX Input 2 Volume */
+        { 0x00000764, 0x0000 },    /* R1892  - AIF2TX5MIX Input 3 Source */
+        { 0x00000765, 0x0080 },    /* R1893  - AIF2TX5MIX Input 3 Volume */
+        { 0x00000766, 0x0000 },    /* R1894  - AIF2TX5MIX Input 4 Source */
+        { 0x00000767, 0x0080 },    /* R1895  - AIF2TX5MIX Input 4 Volume */
+        { 0x00000768, 0x0000 },    /* R1896  - AIF2TX6MIX Input 1 Source */
+        { 0x00000769, 0x0080 },    /* R1897  - AIF2TX6MIX Input 1 Volume */
+        { 0x0000076A, 0x0000 },    /* R1898  - AIF2TX6MIX Input 2 Source */
+        { 0x0000076B, 0x0080 },    /* R1899  - AIF2TX6MIX Input 2 Volume */
+        { 0x0000076C, 0x0000 },    /* R1900  - AIF2TX6MIX Input 3 Source */
+        { 0x0000076D, 0x0080 },    /* R1901  - AIF2TX6MIX Input 3 Volume */
+        { 0x0000076E, 0x0000 },    /* R1902  - AIF2TX6MIX Input 4 Source */
+        { 0x0000076F, 0x0080 },    /* R1903  - AIF2TX6MIX Input 4 Volume */
+        { 0x00000780, 0x0000 },    /* R1920  - AIF3TX1MIX Input 1 Source */
+        { 0x00000781, 0x0080 },    /* R1921  - AIF3TX1MIX Input 1 Volume */
+        { 0x00000782, 0x0000 },    /* R1922  - AIF3TX1MIX Input 2 Source */
+        { 0x00000783, 0x0080 },    /* R1923  - AIF3TX1MIX Input 2 Volume */
+        { 0x00000784, 0x0000 },    /* R1924  - AIF3TX1MIX Input 3 Source */
+        { 0x00000785, 0x0080 },    /* R1925  - AIF3TX1MIX Input 3 Volume */
+        { 0x00000786, 0x0000 },    /* R1926  - AIF3TX1MIX Input 4 Source */
+        { 0x00000787, 0x0080 },    /* R1927  - AIF3TX1MIX Input 4 Volume */
+        { 0x00000788, 0x0000 },    /* R1928  - AIF3TX2MIX Input 1 Source */
+        { 0x00000789, 0x0080 },    /* R1929  - AIF3TX2MIX Input 1 Volume */
+        { 0x0000078A, 0x0000 },    /* R1930  - AIF3TX2MIX Input 2 Source */
+        { 0x0000078B, 0x0080 },    /* R1931  - AIF3TX2MIX Input 2 Volume */
+        { 0x0000078C, 0x0000 },    /* R1932  - AIF3TX2MIX Input 3 Source */
+        { 0x0000078D, 0x0080 },    /* R1933  - AIF3TX2MIX Input 3 Volume */
+        { 0x0000078E, 0x0000 },    /* R1934  - AIF3TX2MIX Input 4 Source */
+        { 0x0000078F, 0x0080 },    /* R1935  - AIF3TX2MIX Input 4 Volume */
+        { 0x000007C0, 0x0000 },    /* R1984  - SLIMTX1MIX Input 1 Source */
+        { 0x000007C1, 0x0080 },    /* R1985  - SLIMTX1MIX Input 1 Volume */
+        { 0x000007C8, 0x0000 },    /* R1992  - SLIMTX2MIX Input 1 Source */
+        { 0x000007C9, 0x0080 },    /* R1993  - SLIMTX2MIX Input 1 Volume */
+        { 0x000007D0, 0x0000 },    /* R2000  - SLIMTX3MIX Input 1 Source */
+        { 0x000007D1, 0x0080 },    /* R2001  - SLIMTX3MIX Input 1 Volume */
+        { 0x000007D8, 0x0000 },    /* R2008  - SLIMTX4MIX Input 1 Source */
+        { 0x000007D9, 0x0080 },    /* R2009  - SLIMTX4MIX Input 1 Volume */
+        { 0x000007E0, 0x0000 },    /* R2016  - SLIMTX5MIX Input 1 Source */
+        { 0x000007E1, 0x0080 },    /* R2017  - SLIMTX5MIX Input 1 Volume */
+        { 0x000007E8, 0x0000 },    /* R2024  - SLIMTX6MIX Input 1 Source */
+        { 0x000007E9, 0x0080 },    /* R2025  - SLIMTX6MIX Input 1 Volume */
+        { 0x00000800, 0x0000 },    /* R2048  - SPDIF1TX1MIX Input 1 Source */
+        { 0x00000801, 0x0080 },    /* R2049  - SPDIF1TX1MIX Input 1 Volume */
+        { 0x00000808, 0x0000 },    /* R2056  - SPDIF1TX2MIX Input 1 Source */
+        { 0x00000809, 0x0080 },    /* R2057  - SPDIF1TX2MIX Input 1 Volume */
+        { 0x00000880, 0x0000 },    /* R2176  - EQ1MIX Input 1 Source */
+        { 0x00000881, 0x0080 },    /* R2177  - EQ1MIX Input 1 Volume */
+        { 0x00000888, 0x0000 },    /* R2184  - EQ2MIX Input 1 Source */
+        { 0x00000889, 0x0080 },    /* R2185  - EQ2MIX Input 1 Volume */
+        { 0x00000890, 0x0000 },    /* R2192  - EQ3MIX Input 1 Source */
+        { 0x00000891, 0x0080 },    /* R2193  - EQ3MIX Input 1 Volume */
+        { 0x00000898, 0x0000 },    /* R2200  - EQ4MIX Input 1 Source */
+        { 0x00000899, 0x0080 },    /* R2201  - EQ4MIX Input 1 Volume */
+        { 0x000008C0, 0x0000 },    /* R2240  - DRC1LMIX Input 1 Source */
+        { 0x000008C1, 0x0080 },    /* R2241  - DRC1LMIX Input 1 Volume */
+        { 0x000008C8, 0x0000 },    /* R2248  - DRC1RMIX Input 1 Source */
+        { 0x000008C9, 0x0080 },    /* R2249  - DRC1RMIX Input 1 Volume */
+        { 0x00000900, 0x0000 },    /* R2304  - HPLP1MIX Input 1 Source */
+        { 0x00000901, 0x0080 },    /* R2305  - HPLP1MIX Input 1 Volume */
+        { 0x00000902, 0x0000 },    /* R2306  - HPLP1MIX Input 2 Source */
+        { 0x00000903, 0x0080 },    /* R2307  - HPLP1MIX Input 2 Volume */
+        { 0x00000904, 0x0000 },    /* R2308  - HPLP1MIX Input 3 Source */
+        { 0x00000905, 0x0080 },    /* R2309  - HPLP1MIX Input 3 Volume */
+        { 0x00000906, 0x0000 },    /* R2310  - HPLP1MIX Input 4 Source */
+        { 0x00000907, 0x0080 },    /* R2311  - HPLP1MIX Input 4 Volume */
+        { 0x00000908, 0x0000 },    /* R2312  - HPLP2MIX Input 1 Source */
+        { 0x00000909, 0x0080 },    /* R2313  - HPLP2MIX Input 1 Volume */
+        { 0x0000090A, 0x0000 },    /* R2314  - HPLP2MIX Input 2 Source */
+        { 0x0000090B, 0x0080 },    /* R2315  - HPLP2MIX Input 2 Volume */
+        { 0x0000090C, 0x0000 },    /* R2316  - HPLP2MIX Input 3 Source */
+        { 0x0000090D, 0x0080 },    /* R2317  - HPLP2MIX Input 3 Volume */
+        { 0x0000090E, 0x0000 },    /* R2318  - HPLP2MIX Input 4 Source */
+        { 0x0000090F, 0x0080 },    /* R2319  - HPLP2MIX Input 4 Volume */
+        { 0x00000910, 0x0000 },    /* R2320  - HPLP3MIX Input 1 Source */
+        { 0x00000911, 0x0080 },    /* R2321  - HPLP3MIX Input 1 Volume */
+        { 0x00000912, 0x0000 },    /* R2322  - HPLP3MIX Input 2 Source */
+        { 0x00000913, 0x0080 },    /* R2323  - HPLP3MIX Input 2 Volume */
+        { 0x00000914, 0x0000 },    /* R2324  - HPLP3MIX Input 3 Source */
+        { 0x00000915, 0x0080 },    /* R2325  - HPLP3MIX Input 3 Volume */
+        { 0x00000916, 0x0000 },    /* R2326  - HPLP3MIX Input 4 Source */
+        { 0x00000917, 0x0080 },    /* R2327  - HPLP3MIX Input 4 Volume */
+        { 0x00000918, 0x0000 },    /* R2328  - HPLP4MIX Input 1 Source */
+        { 0x00000919, 0x0080 },    /* R2329  - HPLP4MIX Input 1 Volume */
+        { 0x0000091A, 0x0000 },    /* R2330  - HPLP4MIX Input 2 Source */
+        { 0x0000091B, 0x0080 },    /* R2331  - HPLP4MIX Input 2 Volume */
+        { 0x0000091C, 0x0000 },    /* R2332  - HPLP4MIX Input 3 Source */
+        { 0x0000091D, 0x0080 },    /* R2333  - HPLP4MIX Input 3 Volume */
+        { 0x0000091E, 0x0000 },    /* R2334  - HPLP4MIX Input 4 Source */
+        { 0x0000091F, 0x0080 },    /* R2335  - HPLP4MIX Input 4 Volume */
+        { 0x00000A80, 0x0000 },    /* R2688  - ASRC1LMIX Input 1 Source */
+        { 0x00000A88, 0x0000 },    /* R2696  - ASRC1RMIX Input 1 Source */
+        { 0x00000A90, 0x0000 },    /* R2704  - ASRC2LMIX Input 1 Source */
+        { 0x00000A98, 0x0000 },    /* R2712  - ASRC2RMIX Input 1 Source */
+        { 0x00000B00, 0x0000 },    /* R2816  - ISRC1DEC1MIX Input 1 Source */
+        { 0x00000B08, 0x0000 },    /* R2824  - ISRC1DEC2MIX Input 1 Source */
+        { 0x00000B10, 0x0000 },    /* R2832  - ISRC1DEC3MIX Input 1 Source */
+        { 0x00000B18, 0x0000 },    /* R2840  - ISRC1DEC4MIX Input 1 Source */
+        { 0x00000B20, 0x0000 },    /* R2848  - ISRC1INT1MIX Input 1 Source */
+        { 0x00000B28, 0x0000 },    /* R2856  - ISRC1INT2MIX Input 1 Source */
+        { 0x00000B30, 0x0000 },    /* R2864  - ISRC1INT3MIX Input 1 Source */
+        { 0x00000B38, 0x0000 },    /* R2872  - ISRC1INT4MIX Input 1 Source */
+        { 0x00000B40, 0x0000 },    /* R2880  - ISRC2DEC1MIX Input 1 Source */
+        { 0x00000B48, 0x0000 },    /* R2888  - ISRC2DEC2MIX Input 1 Source */
+        { 0x00000B60, 0x0000 },    /* R2912  - ISRC2INT1MIX Input 1 Source */
+        { 0x00000B68, 0x0000 },    /* R2920  - ISRC2INT2MIX Input 1 Source */
+        { 0x00000C00, 0xA101 },    /* R3072  - GPIO1 CTRL */
+        { 0x00000C01, 0xA101 },    /* R3073  - GPIO2 CTRL */
+        { 0x00000C02, 0xA101 },    /* R3074  - GPIO3 CTRL */
+        { 0x00000C03, 0xA101 },    /* R3075  - GPIO4 CTRL */
+        { 0x00000C04, 0xA101 },    /* R3076  - GPIO5 CTRL */
+        { 0x00000C0F, 0x0400 },    /* R3087  - IRQ CTRL 1 */
+        { 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
+        { 0x00000C18, 0x0000 },    /* R3096  - GP Switch 1 */
+        { 0x00000C20, 0x8002 },    /* R3104  - Misc Pad Ctrl 1 */
+        { 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
+        { 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
+        { 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
+        { 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
+        { 0x00000C25, 0x0000 },    /* R3109  - Misc Pad Ctrl 6 */
+        { 0x00000D08, 0xFFFF },    /* R3336  - Interrupt Status 1 Mask */
+        { 0x00000D09, 0xFFFF },    /* R3337  - Interrupt Status 2 Mask */
+        { 0x00000D0A, 0xFFFF },    /* R3338  - Interrupt Status 3 Mask */
+        { 0x00000D0B, 0xFFFF },    /* R3339  - Interrupt Status 4 Mask */
+        { 0x00000D0C, 0xFEFF },    /* R3340  - Interrupt Status 5 Mask */
+        { 0x00000D0F, 0x0000 },    /* R3343  - Interrupt Control */
+        { 0x00000D18, 0xFFFF },    /* R3352  - IRQ2 Status 1 Mask */
+        { 0x00000D19, 0xFFFF },    /* R3353  - IRQ2 Status 2 Mask */
+        { 0x00000D1A, 0xFFFF },    /* R3354  - IRQ2 Status 3 Mask */
+        { 0x00000D1B, 0xFFFF },    /* R3355  - IRQ2 Status 4 Mask */
+        { 0x00000D1C, 0xFEFF },    /* R3356  - IRQ2 Status 5 Mask */
+        { 0x00000D1D, 0xFFFF },    /* R3357  - IRQ2 Status 6 Mask */
+        { 0x00000D1F, 0x0000 },    /* R3359  - IRQ2 Control */
+        { 0x00000D53, 0xFFFF },    /* R3411  - AOD IRQ Mask IRQ1 */
+        { 0x00000D54, 0xFFFF },    /* R3412  - AOD IRQ Mask IRQ2 */
+        { 0x00000D56, 0x0000 },    /* R3414  - Jack detect debounce */
+        { 0x00000E00, 0x0000 },    /* R3584  - FX_Ctrl1 */
+        { 0x00000E01, 0x0000 },    /* R3585  - FX_Ctrl2 */
+        { 0x00000E10, 0x6318 },    /* R3600  - EQ1_1 */
+        { 0x00000E11, 0x6300 },    /* R3601  - EQ1_2 */
+        { 0x00000E12, 0x0FC8 },    /* R3602  - EQ1_3 */
+        { 0x00000E13, 0x03FE },    /* R3603  - EQ1_4 */
+        { 0x00000E14, 0x00E0 },    /* R3604  - EQ1_5 */
+        { 0x00000E15, 0x1EC4 },    /* R3605  - EQ1_6 */
+        { 0x00000E16, 0xF136 },    /* R3606  - EQ1_7 */
+        { 0x00000E17, 0x0409 },    /* R3607  - EQ1_8 */
+        { 0x00000E18, 0x04CC },    /* R3608  - EQ1_9 */
+        { 0x00000E19, 0x1C9B },    /* R3609  - EQ1_10 */
+        { 0x00000E1A, 0xF337 },    /* R3610  - EQ1_11 */
+        { 0x00000E1B, 0x040B },    /* R3611  - EQ1_12 */
+        { 0x00000E1C, 0x0CBB },    /* R3612  - EQ1_13 */
+        { 0x00000E1D, 0x16F8 },    /* R3613  - EQ1_14 */
+        { 0x00000E1E, 0xF7D9 },    /* R3614  - EQ1_15 */
+        { 0x00000E1F, 0x040A },    /* R3615  - EQ1_16 */
+        { 0x00000E20, 0x1F14 },    /* R3616  - EQ1_17 */
+        { 0x00000E21, 0x058C },    /* R3617  - EQ1_18 */
+        { 0x00000E22, 0x0563 },    /* R3618  - EQ1_19 */
+        { 0x00000E23, 0x4000 },    /* R3619  - EQ1_20 */
+        { 0x00000E24, 0x0B75 },    /* R3620  - EQ1_21 */
+        { 0x00000E26, 0x6318 },    /* R3622  - EQ2_1 */
+        { 0x00000E27, 0x6300 },    /* R3623  - EQ2_2 */
+        { 0x00000E28, 0x0FC8 },    /* R3624  - EQ2_3 */
+        { 0x00000E29, 0x03FE },    /* R3625  - EQ2_4 */
+        { 0x00000E2A, 0x00E0 },    /* R3626  - EQ2_5 */
+        { 0x00000E2B, 0x1EC4 },    /* R3627  - EQ2_6 */
+        { 0x00000E2C, 0xF136 },    /* R3628  - EQ2_7 */
+        { 0x00000E2D, 0x0409 },    /* R3629  - EQ2_8 */
+        { 0x00000E2E, 0x04CC },    /* R3630  - EQ2_9 */
+        { 0x00000E2F, 0x1C9B },    /* R3631  - EQ2_10 */
+        { 0x00000E30, 0xF337 },    /* R3632  - EQ2_11 */
+        { 0x00000E31, 0x040B },    /* R3633  - EQ2_12 */
+        { 0x00000E32, 0x0CBB },    /* R3634  - EQ2_13 */
+        { 0x00000E33, 0x16F8 },    /* R3635  - EQ2_14 */
+        { 0x00000E34, 0xF7D9 },    /* R3636  - EQ2_15 */
+        { 0x00000E35, 0x040A },    /* R3637  - EQ2_16 */
+        { 0x00000E36, 0x1F14 },    /* R3638  - EQ2_17 */
+        { 0x00000E37, 0x058C },    /* R3639  - EQ2_18 */
+        { 0x00000E38, 0x0563 },    /* R3640  - EQ2_19 */
+        { 0x00000E39, 0x4000 },    /* R3641  - EQ2_20 */
+        { 0x00000E3A, 0x0B75 },    /* R3642  - EQ2_21 */
+        { 0x00000E3C, 0x6318 },    /* R3644  - EQ3_1 */
+        { 0x00000E3D, 0x6300 },    /* R3645  - EQ3_2 */
+        { 0x00000E3E, 0x0FC8 },    /* R3646  - EQ3_3 */
+        { 0x00000E3F, 0x03FE },    /* R3647  - EQ3_4 */
+        { 0x00000E40, 0x00E0 },    /* R3648  - EQ3_5 */
+        { 0x00000E41, 0x1EC4 },    /* R3649  - EQ3_6 */
+        { 0x00000E42, 0xF136 },    /* R3650  - EQ3_7 */
+        { 0x00000E43, 0x0409 },    /* R3651  - EQ3_8 */
+        { 0x00000E44, 0x04CC },    /* R3652  - EQ3_9 */
+        { 0x00000E45, 0x1C9B },    /* R3653  - EQ3_10 */
+        { 0x00000E46, 0xF337 },    /* R3654  - EQ3_11 */
+        { 0x00000E47, 0x040B },    /* R3655  - EQ3_12 */
+        { 0x00000E48, 0x0CBB },    /* R3656  - EQ3_13 */
+        { 0x00000E49, 0x16F8 },    /* R3657  - EQ3_14 */
+        { 0x00000E4A, 0xF7D9 },    /* R3658  - EQ3_15 */
+        { 0x00000E4B, 0x040A },    /* R3659  - EQ3_16 */
+        { 0x00000E4C, 0x1F14 },    /* R3660  - EQ3_17 */
+        { 0x00000E4D, 0x058C },    /* R3661  - EQ3_18 */
+        { 0x00000E4E, 0x0563 },    /* R3662  - EQ3_19 */
+        { 0x00000E4F, 0x4000 },    /* R3663  - EQ3_20 */
+        { 0x00000E50, 0x0B75 },    /* R3664  - EQ3_21 */
+        { 0x00000E52, 0x6318 },    /* R3666  - EQ4_1 */
+        { 0x00000E53, 0x6300 },    /* R3667  - EQ4_2 */
+        { 0x00000E54, 0x0FC8 },    /* R3668  - EQ4_3 */
+        { 0x00000E55, 0x03FE },    /* R3669  - EQ4_4 */
+        { 0x00000E56, 0x00E0 },    /* R3670  - EQ4_5 */
+        { 0x00000E57, 0x1EC4 },    /* R3671  - EQ4_6 */
+        { 0x00000E58, 0xF136 },    /* R3672  - EQ4_7 */
+        { 0x00000E59, 0x0409 },    /* R3673  - EQ4_8 */
+        { 0x00000E5A, 0x04CC },    /* R3674  - EQ4_9 */
+        { 0x00000E5B, 0x1C9B },    /* R3675  - EQ4_10 */
+        { 0x00000E5C, 0xF337 },    /* R3676  - EQ4_11 */
+        { 0x00000E5D, 0x040B },    /* R3677  - EQ4_12 */
+        { 0x00000E5E, 0x0CBB },    /* R3678  - EQ4_13 */
+        { 0x00000E5F, 0x16F8 },    /* R3679  - EQ4_14 */
+        { 0x00000E60, 0xF7D9 },    /* R3680  - EQ4_15 */
+        { 0x00000E61, 0x040A },    /* R3681  - EQ4_16 */
+        { 0x00000E62, 0x1F14 },    /* R3682  - EQ4_17 */
+        { 0x00000E63, 0x058C },    /* R3683  - EQ4_18 */
+        { 0x00000E64, 0x0563 },    /* R3684  - EQ4_19 */
+        { 0x00000E65, 0x4000 },    /* R3685  - EQ4_20 */
+        { 0x00000E66, 0x0B75 },    /* R3686  - EQ4_21 */
+        { 0x00000E80, 0x0018 },    /* R3712  - DRC1 ctrl1 */
+        { 0x00000E81, 0x0933 },    /* R3713  - DRC1 ctrl2 */
+        { 0x00000E82, 0x0018 },    /* R3714  - DRC1 ctrl3 */
+        { 0x00000E83, 0x0000 },    /* R3715  - DRC1 ctrl4 */
+        { 0x00000E84, 0x0000 },    /* R3716  - DRC1 ctrl5 */
+        { 0x00000EC0, 0x0000 },    /* R3776  - HPLPF1_1 */
+        { 0x00000EC1, 0x0000 },    /* R3777  - HPLPF1_2 */
+        { 0x00000EC4, 0x0000 },    /* R3780  - HPLPF2_1 */
+        { 0x00000EC5, 0x0000 },    /* R3781  - HPLPF2_2 */
+        { 0x00000EC8, 0x0000 },    /* R3784  - HPLPF3_1 */
+        { 0x00000EC9, 0x0000 },    /* R3785  - HPLPF3_2 */
+        { 0x00000ECC, 0x0000 },    /* R3788  - HPLPF4_1 */
+        { 0x00000ECD, 0x0000 },    /* R3789  - HPLPF4_2 */
+        { 0x00000EE0, 0x0000 },    /* R3808  - ASRC_ENABLE */
+        { 0x00000EE2, 0x0000 },    /* R3810  - ASRC_RATE1 */
+        { 0x00000EE3, 0x4000 },    /* R3811  - ASRC_RATE2 */
+        { 0x00000EF0, 0x0000 },    /* R3824  - ISRC 1 CTRL 1 */
+        { 0x00000EF1, 0x0001 },    /* R3825  - ISRC 1 CTRL 2 */
+        { 0x00000EF2, 0x0000 },    /* R3826  - ISRC 1 CTRL 3 */
+        { 0x00000EF3, 0x0000 },    /* R3827  - ISRC 2 CTRL 1 */
+        { 0x00000EF4, 0x0001 },    /* R3828  - ISRC 2 CTRL 2 */
+        { 0x00000EF5, 0x0000 },    /* R3829  - ISRC 2 CTRL 3 */
+        { 0x00001700, 0x0000 },    /* R5888  - FRF_COEFF_1 */
+        { 0x00001701, 0x0000 },    /* R5889  - FRF_COEFF_2 */
+        { 0x00001702, 0x0000 },    /* R5890  - FRF_COEFF_3 */
+        { 0x00001703, 0x0000 },    /* R5891  - FRF_COEFF_4 */
+        { 0x00001704, 0x0000 },    /* R5892  - DAC_COMP_1 */
+        { 0x00001705, 0x0000 },    /* R5893  - DAC_COMP_2 */
+};
+static bool wm8998_readable_register(struct device *dev, unsigned int reg)
+{
+        switch (reg) {
+        case ARIZONA_SOFTWARE_RESET:
+        case ARIZONA_DEVICE_REVISION:
+        case ARIZONA_CTRL_IF_SPI_CFG_1:
+        case ARIZONA_CTRL_IF_I2C1_CFG_1:
+        case ARIZONA_CTRL_IF_I2C1_CFG_2:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_0:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_1:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_2:
+        case ARIZONA_TONE_GENERATOR_1:
+        case ARIZONA_TONE_GENERATOR_2:
+        case ARIZONA_TONE_GENERATOR_3:
+        case ARIZONA_TONE_GENERATOR_4:
+        case ARIZONA_TONE_GENERATOR_5:
+        case ARIZONA_PWM_DRIVE_1:
+        case ARIZONA_PWM_DRIVE_2:
+        case ARIZONA_PWM_DRIVE_3:
+        case ARIZONA_WAKE_CONTROL:
+        case ARIZONA_SEQUENCE_CONTROL:
+        case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1:
+        case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2:
+        case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3:
+        case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5:
+        case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6:
+        case ARIZONA_HAPTICS_CONTROL_1:
+        case ARIZONA_HAPTICS_CONTROL_2:
+        case ARIZONA_HAPTICS_PHASE_1_INTENSITY:
+        case ARIZONA_HAPTICS_PHASE_1_DURATION:
+        case ARIZONA_HAPTICS_PHASE_2_INTENSITY:
+        case ARIZONA_HAPTICS_PHASE_2_DURATION:
+        case ARIZONA_HAPTICS_PHASE_3_INTENSITY:
+        case ARIZONA_HAPTICS_PHASE_3_DURATION:
+        case ARIZONA_HAPTICS_STATUS:
+        case ARIZONA_CLOCK_32K_1:
+        case ARIZONA_SYSTEM_CLOCK_1:
+        case ARIZONA_SAMPLE_RATE_1:
+        case ARIZONA_SAMPLE_RATE_2:
+        case ARIZONA_SAMPLE_RATE_3:
+        case ARIZONA_SAMPLE_RATE_1_STATUS:
+        case ARIZONA_SAMPLE_RATE_2_STATUS:
+        case ARIZONA_SAMPLE_RATE_3_STATUS:
+        case ARIZONA_ASYNC_CLOCK_1:
+        case ARIZONA_ASYNC_SAMPLE_RATE_1:
+        case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
+        case ARIZONA_ASYNC_SAMPLE_RATE_2:
+        case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS:
+        case ARIZONA_OUTPUT_SYSTEM_CLOCK:
+        case ARIZONA_OUTPUT_ASYNC_CLOCK:
+        case ARIZONA_RATE_ESTIMATOR_1:
+        case ARIZONA_RATE_ESTIMATOR_2:
+        case ARIZONA_RATE_ESTIMATOR_3:
+        case ARIZONA_RATE_ESTIMATOR_4:
+        case ARIZONA_RATE_ESTIMATOR_5:
+        case ARIZONA_DYNAMIC_FREQUENCY_SCALING_1:
+        case ARIZONA_FLL1_CONTROL_1:
+        case ARIZONA_FLL1_CONTROL_2:
+        case ARIZONA_FLL1_CONTROL_3:
+        case ARIZONA_FLL1_CONTROL_4:
+        case ARIZONA_FLL1_CONTROL_5:
+        case ARIZONA_FLL1_CONTROL_6:
+        case ARIZONA_FLL1_CONTROL_7:
+        case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
+        case ARIZONA_FLL1_NCO_TEST_0:
+        case ARIZONA_FLL1_SYNCHRONISER_1:
+        case ARIZONA_FLL1_SYNCHRONISER_2:
+        case ARIZONA_FLL1_SYNCHRONISER_3:
+        case ARIZONA_FLL1_SYNCHRONISER_4:
+        case ARIZONA_FLL1_SYNCHRONISER_5:
+        case ARIZONA_FLL1_SYNCHRONISER_6:
+        case ARIZONA_FLL1_SYNCHRONISER_7:
+        case ARIZONA_FLL1_SPREAD_SPECTRUM:
+        case ARIZONA_FLL1_GPIO_CLOCK:
+        case ARIZONA_FLL2_CONTROL_1:
+        case ARIZONA_FLL2_CONTROL_2:
+        case ARIZONA_FLL2_CONTROL_3:
+        case ARIZONA_FLL2_CONTROL_4:
+        case ARIZONA_FLL2_CONTROL_5:
+        case ARIZONA_FLL2_CONTROL_6:
+        case ARIZONA_FLL2_CONTROL_7:
+        case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
+        case ARIZONA_FLL2_NCO_TEST_0:
+        case ARIZONA_FLL2_SYNCHRONISER_1:
+        case ARIZONA_FLL2_SYNCHRONISER_2:
+        case ARIZONA_FLL2_SYNCHRONISER_3:
+        case ARIZONA_FLL2_SYNCHRONISER_4:
+        case ARIZONA_FLL2_SYNCHRONISER_5:
+        case ARIZONA_FLL2_SYNCHRONISER_6:
+        case ARIZONA_FLL2_SYNCHRONISER_7:
+        case ARIZONA_FLL2_SPREAD_SPECTRUM:
+        case ARIZONA_FLL2_GPIO_CLOCK:
+        case ARIZONA_MIC_CHARGE_PUMP_1:
+        case ARIZONA_LDO1_CONTROL_1:
+        case ARIZONA_LDO1_CONTROL_2:
+        case ARIZONA_LDO2_CONTROL_1:
+        case ARIZONA_MIC_BIAS_CTRL_1:
+        case ARIZONA_MIC_BIAS_CTRL_2:
+        case ARIZONA_MIC_BIAS_CTRL_3:
+        case ARIZONA_ACCESSORY_DETECT_MODE_1:
+        case ARIZONA_HEADPHONE_DETECT_1:
+        case ARIZONA_HEADPHONE_DETECT_2:
+        case ARIZONA_MICD_CLAMP_CONTROL:
+        case ARIZONA_MIC_DETECT_1:
+        case ARIZONA_MIC_DETECT_2:
+        case ARIZONA_MIC_DETECT_3:
+        case ARIZONA_MIC_DETECT_4:
+        case ARIZONA_MIC_DETECT_LEVEL_1:
+        case ARIZONA_MIC_DETECT_LEVEL_2:
+        case ARIZONA_MIC_DETECT_LEVEL_3:
+        case ARIZONA_MIC_DETECT_LEVEL_4:
+        case ARIZONA_ISOLATION_CONTROL:
+        case ARIZONA_JACK_DETECT_ANALOGUE:
+        case ARIZONA_INPUT_ENABLES:
+        case ARIZONA_INPUT_ENABLES_STATUS:
+        case ARIZONA_INPUT_RATE:
+        case ARIZONA_INPUT_VOLUME_RAMP:
+        case ARIZONA_HPF_CONTROL:
+        case ARIZONA_IN1L_CONTROL:
+        case ARIZONA_ADC_DIGITAL_VOLUME_1L:
+        case ARIZONA_DMIC1L_CONTROL:
+        case ARIZONA_IN1R_CONTROL:
+        case ARIZONA_ADC_DIGITAL_VOLUME_1R:
+        case ARIZONA_DMIC1R_CONTROL:
+        case ARIZONA_IN2L_CONTROL:
+        case ARIZONA_ADC_DIGITAL_VOLUME_2L:
+        case ARIZONA_DMIC2L_CONTROL:
+        case ARIZONA_OUTPUT_ENABLES_1:
+        case ARIZONA_OUTPUT_STATUS_1:
+        case ARIZONA_RAW_OUTPUT_STATUS_1:
+        case ARIZONA_OUTPUT_RATE_1:
+        case ARIZONA_OUTPUT_VOLUME_RAMP:
+        case ARIZONA_OUTPUT_PATH_CONFIG_1L:
+        case ARIZONA_DAC_DIGITAL_VOLUME_1L:
+        case ARIZONA_NOISE_GATE_SELECT_1L:
+        case ARIZONA_OUTPUT_PATH_CONFIG_1R:
+        case ARIZONA_DAC_DIGITAL_VOLUME_1R:
+        case ARIZONA_NOISE_GATE_SELECT_1R:
+        case ARIZONA_OUTPUT_PATH_CONFIG_2L:
+        case ARIZONA_DAC_DIGITAL_VOLUME_2L:
+        case ARIZONA_NOISE_GATE_SELECT_2L:
+        case ARIZONA_OUTPUT_PATH_CONFIG_2R:
+        case ARIZONA_DAC_DIGITAL_VOLUME_2R:
+        case ARIZONA_NOISE_GATE_SELECT_2R:
+        case ARIZONA_OUTPUT_PATH_CONFIG_3L:
+        case ARIZONA_DAC_DIGITAL_VOLUME_3L:
+        case ARIZONA_NOISE_GATE_SELECT_3L:
+        case ARIZONA_OUTPUT_PATH_CONFIG_4L:
+        case ARIZONA_DAC_DIGITAL_VOLUME_4L:
+        case ARIZONA_NOISE_GATE_SELECT_4L:
+        case ARIZONA_OUTPUT_PATH_CONFIG_4R:
+        case ARIZONA_DAC_DIGITAL_VOLUME_4R:
+        case ARIZONA_NOISE_GATE_SELECT_4R:
+        case ARIZONA_OUTPUT_PATH_CONFIG_5L:
+        case ARIZONA_DAC_DIGITAL_VOLUME_5L:
+        case ARIZONA_NOISE_GATE_SELECT_5L:
+        case ARIZONA_OUTPUT_PATH_CONFIG_5R:
+        case ARIZONA_DAC_DIGITAL_VOLUME_5R:
+        case ARIZONA_NOISE_GATE_SELECT_5R:
+        case ARIZONA_DRE_ENABLE:
+        case ARIZONA_DRE_CONTROL_1:
+        case ARIZONA_DRE_CONTROL_2:
+        case ARIZONA_DRE_CONTROL_3:
+        case ARIZONA_EDRE_ENABLE:
+        case ARIZONA_DAC_AEC_CONTROL_1:
+        case ARIZONA_DAC_AEC_CONTROL_2:
+        case ARIZONA_NOISE_GATE_CONTROL:
+        case ARIZONA_PDM_SPK1_CTRL_1:
+        case ARIZONA_PDM_SPK1_CTRL_2:
+        case ARIZONA_HP_TEST_CTRL_13:
+        case ARIZONA_AIF1_BCLK_CTRL:
+        case ARIZONA_AIF1_TX_PIN_CTRL:
+        case ARIZONA_AIF1_RX_PIN_CTRL:
+        case ARIZONA_AIF1_RATE_CTRL:
+        case ARIZONA_AIF1_FORMAT:
+        case ARIZONA_AIF1_RX_BCLK_RATE:
+        case ARIZONA_AIF1_FRAME_CTRL_1:
+        case ARIZONA_AIF1_FRAME_CTRL_2:
+        case ARIZONA_AIF1_FRAME_CTRL_3:
+        case ARIZONA_AIF1_FRAME_CTRL_4:
+        case ARIZONA_AIF1_FRAME_CTRL_5:
+        case ARIZONA_AIF1_FRAME_CTRL_6:
+        case ARIZONA_AIF1_FRAME_CTRL_7:
+        case ARIZONA_AIF1_FRAME_CTRL_8:
+        case ARIZONA_AIF1_FRAME_CTRL_11:
+        case ARIZONA_AIF1_FRAME_CTRL_12:
+        case ARIZONA_AIF1_FRAME_CTRL_13:
+        case ARIZONA_AIF1_FRAME_CTRL_14:
+        case ARIZONA_AIF1_FRAME_CTRL_15:
+        case ARIZONA_AIF1_FRAME_CTRL_16:
+        case ARIZONA_AIF1_TX_ENABLES:
+        case ARIZONA_AIF1_RX_ENABLES:
+        case ARIZONA_AIF2_BCLK_CTRL:
+        case ARIZONA_AIF2_TX_PIN_CTRL:
+        case ARIZONA_AIF2_RX_PIN_CTRL:
+        case ARIZONA_AIF2_RATE_CTRL:
+        case ARIZONA_AIF2_FORMAT:
+        case ARIZONA_AIF2_RX_BCLK_RATE:
+        case ARIZONA_AIF2_FRAME_CTRL_1:
+        case ARIZONA_AIF2_FRAME_CTRL_2:
+        case ARIZONA_AIF2_FRAME_CTRL_3:
+        case ARIZONA_AIF2_FRAME_CTRL_4:
+        case ARIZONA_AIF2_FRAME_CTRL_5:
+        case ARIZONA_AIF2_FRAME_CTRL_6:
+        case ARIZONA_AIF2_FRAME_CTRL_7:
+        case ARIZONA_AIF2_FRAME_CTRL_8:
+        case ARIZONA_AIF2_FRAME_CTRL_11:
+        case ARIZONA_AIF2_FRAME_CTRL_12:
+        case ARIZONA_AIF2_FRAME_CTRL_13:
+        case ARIZONA_AIF2_FRAME_CTRL_14:
+        case ARIZONA_AIF2_FRAME_CTRL_15:
+        case ARIZONA_AIF2_FRAME_CTRL_16:
+        case ARIZONA_AIF2_TX_ENABLES:
+        case ARIZONA_AIF2_RX_ENABLES:
+        case ARIZONA_AIF3_BCLK_CTRL:
+        case ARIZONA_AIF3_TX_PIN_CTRL:
+        case ARIZONA_AIF3_RX_PIN_CTRL:
+        case ARIZONA_AIF3_RATE_CTRL:
+        case ARIZONA_AIF3_FORMAT:
+        case ARIZONA_AIF3_RX_BCLK_RATE:
+        case ARIZONA_AIF3_FRAME_CTRL_1:
+        case ARIZONA_AIF3_FRAME_CTRL_2:
+        case ARIZONA_AIF3_FRAME_CTRL_3:
+        case ARIZONA_AIF3_FRAME_CTRL_4:
+        case ARIZONA_AIF3_FRAME_CTRL_11:
+        case ARIZONA_AIF3_FRAME_CTRL_12:
+        case ARIZONA_AIF3_TX_ENABLES:
+        case ARIZONA_AIF3_RX_ENABLES:
+        case ARIZONA_SPD1_TX_CONTROL:
+        case ARIZONA_SPD1_TX_CHANNEL_STATUS_1:
+        case ARIZONA_SPD1_TX_CHANNEL_STATUS_2:
+        case ARIZONA_SPD1_TX_CHANNEL_STATUS_3:
+        case ARIZONA_SLIMBUS_FRAMER_REF_GEAR:
+        case ARIZONA_SLIMBUS_RATES_1:
+        case ARIZONA_SLIMBUS_RATES_2:
+        case ARIZONA_SLIMBUS_RATES_5:
+        case ARIZONA_SLIMBUS_RATES_6:
+        case ARIZONA_SLIMBUS_RATES_7:
+        case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE:
+        case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE:
+        case ARIZONA_SLIMBUS_RX_PORT_STATUS:
+        case ARIZONA_SLIMBUS_TX_PORT_STATUS:
+        case ARIZONA_PWM1MIX_INPUT_1_SOURCE:
+        case ARIZONA_PWM1MIX_INPUT_1_VOLUME:
+        case ARIZONA_PWM1MIX_INPUT_2_SOURCE:
+        case ARIZONA_PWM1MIX_INPUT_2_VOLUME:
+        case ARIZONA_PWM1MIX_INPUT_3_SOURCE:
+        case ARIZONA_PWM1MIX_INPUT_3_VOLUME:
+        case ARIZONA_PWM1MIX_INPUT_4_SOURCE:
+        case ARIZONA_PWM1MIX_INPUT_4_VOLUME:
+        case ARIZONA_PWM2MIX_INPUT_1_SOURCE:
+        case ARIZONA_PWM2MIX_INPUT_1_VOLUME:
+        case ARIZONA_PWM2MIX_INPUT_2_SOURCE:
+        case ARIZONA_PWM2MIX_INPUT_2_VOLUME:
+        case ARIZONA_PWM2MIX_INPUT_3_SOURCE:
+        case ARIZONA_PWM2MIX_INPUT_3_VOLUME:
+        case ARIZONA_PWM2MIX_INPUT_4_SOURCE:
+        case ARIZONA_PWM2MIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT1LMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT1LMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT1LMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT1LMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT1LMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT1LMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT1LMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT1LMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT1RMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT1RMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT1RMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT1RMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT1RMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT1RMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT1RMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT1RMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT2LMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT2LMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT2LMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT2LMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT2LMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT2LMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT2LMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT2LMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT2RMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT2RMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT2RMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT2RMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT2RMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT2RMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT2RMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT2RMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT3LMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT3LMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT3LMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT3LMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT3LMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT3LMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT3LMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT3LMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT4LMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT4LMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT4LMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT4LMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT4LMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT4LMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT4LMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT4LMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT4RMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT4RMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT4RMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT4RMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT4RMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT4RMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT4RMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT4RMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT5LMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT5LMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT5LMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT5LMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT5LMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT5LMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT5LMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT5LMIX_INPUT_4_VOLUME:
+        case ARIZONA_OUT5RMIX_INPUT_1_SOURCE:
+        case ARIZONA_OUT5RMIX_INPUT_1_VOLUME:
+        case ARIZONA_OUT5RMIX_INPUT_2_SOURCE:
+        case ARIZONA_OUT5RMIX_INPUT_2_VOLUME:
+        case ARIZONA_OUT5RMIX_INPUT_3_SOURCE:
+        case ARIZONA_OUT5RMIX_INPUT_3_VOLUME:
+        case ARIZONA_OUT5RMIX_INPUT_4_SOURCE:
+        case ARIZONA_OUT5RMIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME:
+        case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE:
+        case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME:
+        case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE:
+        case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME:
+        case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE:
+        case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME:
+        case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE:
+        case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME:
+        case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME:
+        case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME:
+        case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME:
+        case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME:
+        case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME:
+        case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE:
+        case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME:
+        case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE:
+        case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME:
+        case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE:
+        case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME:
+        case ARIZONA_EQ1MIX_INPUT_1_SOURCE:
+        case ARIZONA_EQ1MIX_INPUT_1_VOLUME:
+        case ARIZONA_EQ2MIX_INPUT_1_SOURCE:
+        case ARIZONA_EQ2MIX_INPUT_1_VOLUME:
+        case ARIZONA_EQ3MIX_INPUT_1_SOURCE:
+        case ARIZONA_EQ3MIX_INPUT_1_VOLUME:
+        case ARIZONA_EQ4MIX_INPUT_1_SOURCE:
+        case ARIZONA_EQ4MIX_INPUT_1_VOLUME:
+        case ARIZONA_DRC1LMIX_INPUT_1_SOURCE:
+        case ARIZONA_DRC1LMIX_INPUT_1_VOLUME:
+        case ARIZONA_DRC1RMIX_INPUT_1_SOURCE:
+        case ARIZONA_DRC1RMIX_INPUT_1_VOLUME:
+        case ARIZONA_HPLP1MIX_INPUT_1_SOURCE:
+        case ARIZONA_HPLP1MIX_INPUT_1_VOLUME:
+        case ARIZONA_HPLP1MIX_INPUT_2_SOURCE:
+        case ARIZONA_HPLP1MIX_INPUT_2_VOLUME:
+        case ARIZONA_HPLP1MIX_INPUT_3_SOURCE:
+        case ARIZONA_HPLP1MIX_INPUT_3_VOLUME:
+        case ARIZONA_HPLP1MIX_INPUT_4_SOURCE:
+        case ARIZONA_HPLP1MIX_INPUT_4_VOLUME:
+        case ARIZONA_HPLP2MIX_INPUT_1_SOURCE:
+        case ARIZONA_HPLP2MIX_INPUT_1_VOLUME:
+        case ARIZONA_HPLP2MIX_INPUT_2_SOURCE:
+        case ARIZONA_HPLP2MIX_INPUT_2_VOLUME:
+        case ARIZONA_HPLP2MIX_INPUT_3_SOURCE:
+        case ARIZONA_HPLP2MIX_INPUT_3_VOLUME:
+        case ARIZONA_HPLP2MIX_INPUT_4_SOURCE:
+        case ARIZONA_HPLP2MIX_INPUT_4_VOLUME:
+        case ARIZONA_HPLP3MIX_INPUT_1_SOURCE:
+        case ARIZONA_HPLP3MIX_INPUT_1_VOLUME:
+        case ARIZONA_HPLP3MIX_INPUT_2_SOURCE:
+        case ARIZONA_HPLP3MIX_INPUT_2_VOLUME:
+        case ARIZONA_HPLP3MIX_INPUT_3_SOURCE:
+        case ARIZONA_HPLP3MIX_INPUT_3_VOLUME:
+        case ARIZONA_HPLP3MIX_INPUT_4_SOURCE:
+        case ARIZONA_HPLP3MIX_INPUT_4_VOLUME:
+        case ARIZONA_HPLP4MIX_INPUT_1_SOURCE:
+        case ARIZONA_HPLP4MIX_INPUT_1_VOLUME:
+        case ARIZONA_HPLP4MIX_INPUT_2_SOURCE:
+        case ARIZONA_HPLP4MIX_INPUT_2_VOLUME:
+        case ARIZONA_HPLP4MIX_INPUT_3_SOURCE:
+        case ARIZONA_HPLP4MIX_INPUT_3_VOLUME:
+        case ARIZONA_HPLP4MIX_INPUT_4_SOURCE:
+        case ARIZONA_HPLP4MIX_INPUT_4_VOLUME:
+        case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE:
+        case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE:
+        case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE:
+        case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE:
+        case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE:
+        case ARIZONA_GPIO1_CTRL:
+        case ARIZONA_GPIO2_CTRL:
+        case ARIZONA_GPIO3_CTRL:
+        case ARIZONA_GPIO4_CTRL:
+        case ARIZONA_GPIO5_CTRL:
+        case ARIZONA_IRQ_CTRL_1:
+        case ARIZONA_GPIO_DEBOUNCE_CONFIG:
+        case ARIZONA_GP_SWITCH_1:
+        case ARIZONA_MISC_PAD_CTRL_1:
+        case ARIZONA_MISC_PAD_CTRL_2:
+        case ARIZONA_MISC_PAD_CTRL_3:
+        case ARIZONA_MISC_PAD_CTRL_4:
+        case ARIZONA_MISC_PAD_CTRL_5:
+        case ARIZONA_MISC_PAD_CTRL_6:
+        case ARIZONA_INTERRUPT_STATUS_1:
+        case ARIZONA_INTERRUPT_STATUS_2:
+        case ARIZONA_INTERRUPT_STATUS_3:
+        case ARIZONA_INTERRUPT_STATUS_4:
+        case ARIZONA_INTERRUPT_STATUS_5:
+        case ARIZONA_INTERRUPT_STATUS_1_MASK:
+        case ARIZONA_INTERRUPT_STATUS_2_MASK:
+        case ARIZONA_INTERRUPT_STATUS_3_MASK:
+        case ARIZONA_INTERRUPT_STATUS_4_MASK:
+        case ARIZONA_INTERRUPT_STATUS_5_MASK:
+        case ARIZONA_INTERRUPT_CONTROL:
+        case ARIZONA_IRQ2_STATUS_1:
+        case ARIZONA_IRQ2_STATUS_2:
+        case ARIZONA_IRQ2_STATUS_3:
+        case ARIZONA_IRQ2_STATUS_4:
+        case ARIZONA_IRQ2_STATUS_5:
+        case ARIZONA_IRQ2_STATUS_1_MASK:
+        case ARIZONA_IRQ2_STATUS_2_MASK:
+        case ARIZONA_IRQ2_STATUS_3_MASK:
+        case ARIZONA_IRQ2_STATUS_4_MASK:
+        case ARIZONA_IRQ2_STATUS_5_MASK:
+        case ARIZONA_IRQ2_CONTROL:
+        case ARIZONA_INTERRUPT_RAW_STATUS_2:
+        case ARIZONA_INTERRUPT_RAW_STATUS_3:
+        case ARIZONA_INTERRUPT_RAW_STATUS_4:
+        case ARIZONA_INTERRUPT_RAW_STATUS_5:
+        case ARIZONA_INTERRUPT_RAW_STATUS_6:
+        case ARIZONA_INTERRUPT_RAW_STATUS_7:
+        case ARIZONA_INTERRUPT_RAW_STATUS_8:
+        case ARIZONA_IRQ_PIN_STATUS:
+        case ARIZONA_AOD_WKUP_AND_TRIG:
+        case ARIZONA_AOD_IRQ1:
+        case ARIZONA_AOD_IRQ2:
+        case ARIZONA_AOD_IRQ_MASK_IRQ1:
+        case ARIZONA_AOD_IRQ_MASK_IRQ2:
+        case ARIZONA_AOD_IRQ_RAW_STATUS:
+        case ARIZONA_JACK_DETECT_DEBOUNCE:
+        case ARIZONA_FX_CTRL1:
+        case ARIZONA_FX_CTRL2:
+        case ARIZONA_EQ1_1:
+        case ARIZONA_EQ1_2:
+        case ARIZONA_EQ1_3:
+        case ARIZONA_EQ1_4:
+        case ARIZONA_EQ1_5:
+        case ARIZONA_EQ1_6:
+        case ARIZONA_EQ1_7:
+        case ARIZONA_EQ1_8:
+        case ARIZONA_EQ1_9:
+        case ARIZONA_EQ1_10:
+        case ARIZONA_EQ1_11:
+        case ARIZONA_EQ1_12:
+        case ARIZONA_EQ1_13:
+        case ARIZONA_EQ1_14:
+        case ARIZONA_EQ1_15:
+        case ARIZONA_EQ1_16:
+        case ARIZONA_EQ1_17:
+        case ARIZONA_EQ1_18:
+        case ARIZONA_EQ1_19:
+        case ARIZONA_EQ1_20:
+        case ARIZONA_EQ1_21:
+        case ARIZONA_EQ2_1:
+        case ARIZONA_EQ2_2:
+        case ARIZONA_EQ2_3:
+        case ARIZONA_EQ2_4:
+        case ARIZONA_EQ2_5:
+        case ARIZONA_EQ2_6:
+        case ARIZONA_EQ2_7:
+        case ARIZONA_EQ2_8:
+        case ARIZONA_EQ2_9:
+        case ARIZONA_EQ2_10:
+        case ARIZONA_EQ2_11:
+        case ARIZONA_EQ2_12:
+        case ARIZONA_EQ2_13:
+        case ARIZONA_EQ2_14:
+        case ARIZONA_EQ2_15:
+        case ARIZONA_EQ2_16:
+        case ARIZONA_EQ2_17:
+        case ARIZONA_EQ2_18:
+        case ARIZONA_EQ2_19:
+        case ARIZONA_EQ2_20:
+        case ARIZONA_EQ2_21:
+        case ARIZONA_EQ3_1:
+        case ARIZONA_EQ3_2:
+        case ARIZONA_EQ3_3:
+        case ARIZONA_EQ3_4:
+        case ARIZONA_EQ3_5:
+        case ARIZONA_EQ3_6:
+        case ARIZONA_EQ3_7:
+        case ARIZONA_EQ3_8:
+        case ARIZONA_EQ3_9:
+        case ARIZONA_EQ3_10:
+        case ARIZONA_EQ3_11:
+        case ARIZONA_EQ3_12:
+        case ARIZONA_EQ3_13:
+        case ARIZONA_EQ3_14:
+        case ARIZONA_EQ3_15:
+        case ARIZONA_EQ3_16:
+        case ARIZONA_EQ3_17:
+        case ARIZONA_EQ3_18:
+        case ARIZONA_EQ3_19:
+        case ARIZONA_EQ3_20:
+        case ARIZONA_EQ3_21:
+        case ARIZONA_EQ4_1:
+        case ARIZONA_EQ4_2:
+        case ARIZONA_EQ4_3:
+        case ARIZONA_EQ4_4:
+        case ARIZONA_EQ4_5:
+        case ARIZONA_EQ4_6:
+        case ARIZONA_EQ4_7:
+        case ARIZONA_EQ4_8:
+        case ARIZONA_EQ4_9:
+        case ARIZONA_EQ4_10:
+        case ARIZONA_EQ4_11:
+        case ARIZONA_EQ4_12:
+        case ARIZONA_EQ4_13:
+        case ARIZONA_EQ4_14:
+        case ARIZONA_EQ4_15:
+        case ARIZONA_EQ4_16:
+        case ARIZONA_EQ4_17:
+        case ARIZONA_EQ4_18:
+        case ARIZONA_EQ4_19:
+        case ARIZONA_EQ4_20:
+        case ARIZONA_EQ4_21:
+        case ARIZONA_DRC1_CTRL1:
+        case ARIZONA_DRC1_CTRL2:
+        case ARIZONA_DRC1_CTRL3:
+        case ARIZONA_DRC1_CTRL4:
+        case ARIZONA_DRC1_CTRL5:
+        case ARIZONA_HPLPF1_1:
+        case ARIZONA_HPLPF1_2:
+        case ARIZONA_HPLPF2_1:
+        case ARIZONA_HPLPF2_2:
+        case ARIZONA_HPLPF3_1:
+        case ARIZONA_HPLPF3_2:
+        case ARIZONA_HPLPF4_1:
+        case ARIZONA_HPLPF4_2:
+        case ARIZONA_ASRC_ENABLE:
+        case ARIZONA_ASRC_STATUS:
+        case ARIZONA_ASRC_RATE1:
+        case ARIZONA_ASRC_RATE2:
+        case ARIZONA_ISRC_1_CTRL_1:
+        case ARIZONA_ISRC_1_CTRL_2:
+        case ARIZONA_ISRC_1_CTRL_3:
+        case ARIZONA_ISRC_2_CTRL_1:
+        case ARIZONA_ISRC_2_CTRL_2:
+        case ARIZONA_ISRC_2_CTRL_3:
+        case ARIZONA_FRF_COEFF_1:
+        case ARIZONA_FRF_COEFF_2:
+        case ARIZONA_FRF_COEFF_3:
+        case ARIZONA_FRF_COEFF_4:
+        case ARIZONA_V2_DAC_COMP_1:
+        case ARIZONA_V2_DAC_COMP_2:
+                return true;
+        default:
+                return false;
+        }
+}
+static bool wm8998_volatile_register(struct device *dev, unsigned int reg)
+{
+        switch (reg) {
+        case ARIZONA_SOFTWARE_RESET:
+        case ARIZONA_DEVICE_REVISION:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_0:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_1:
+        case ARIZONA_WRITE_SEQUENCER_CTRL_2:
+        case ARIZONA_HAPTICS_STATUS:
+        case ARIZONA_SAMPLE_RATE_1_STATUS:
+        case ARIZONA_SAMPLE_RATE_2_STATUS:
+        case ARIZONA_SAMPLE_RATE_3_STATUS:
+        case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
+        case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS:
+        case ARIZONA_MIC_DETECT_3:
+        case ARIZONA_MIC_DETECT_4:
+        case ARIZONA_HEADPHONE_DETECT_2:
+        case ARIZONA_INPUT_ENABLES_STATUS:
+        case ARIZONA_OUTPUT_STATUS_1:
+        case ARIZONA_RAW_OUTPUT_STATUS_1:
+        case ARIZONA_SLIMBUS_RX_PORT_STATUS:
+        case ARIZONA_SLIMBUS_TX_PORT_STATUS:
+        case ARIZONA_INTERRUPT_STATUS_1:
+        case ARIZONA_INTERRUPT_STATUS_2:
+        case ARIZONA_INTERRUPT_STATUS_3:
+        case ARIZONA_INTERRUPT_STATUS_4:
+        case ARIZONA_INTERRUPT_STATUS_5:
+        case ARIZONA_IRQ2_STATUS_1:
+        case ARIZONA_IRQ2_STATUS_2:
+        case ARIZONA_IRQ2_STATUS_3:
+        case ARIZONA_IRQ2_STATUS_4:
+        case ARIZONA_IRQ2_STATUS_5:
+        case ARIZONA_INTERRUPT_RAW_STATUS_2:
+        case ARIZONA_INTERRUPT_RAW_STATUS_3:
+        case ARIZONA_INTERRUPT_RAW_STATUS_4:
+        case ARIZONA_INTERRUPT_RAW_STATUS_5:
+        case ARIZONA_INTERRUPT_RAW_STATUS_6:
+        case ARIZONA_INTERRUPT_RAW_STATUS_7:
+        case ARIZONA_INTERRUPT_RAW_STATUS_8:
+        case ARIZONA_IRQ_PIN_STATUS:
+        case ARIZONA_AOD_WKUP_AND_TRIG:
+        case ARIZONA_AOD_IRQ1:
+        case ARIZONA_AOD_IRQ2:
+        case ARIZONA_AOD_IRQ_RAW_STATUS:
+        case ARIZONA_FX_CTRL2:
+        case ARIZONA_ASRC_STATUS:
+                return true;
+        default:
+                return false;
+        }
+}
+#define WM8998_MAX_REGISTER 0x31ff
+const struct regmap_config wm8998_i2c_regmap = {
+        .reg_bits = 32,
+        .val_bits = 16,
+        .reg_format_endian = REGMAP_ENDIAN_BIG,
+        .val_format_endian = REGMAP_ENDIAN_BIG,
+        .max_register = WM8998_MAX_REGISTER,
+        .readable_reg = wm8998_readable_register,
+        .volatile_reg = wm8998_volatile_register,
+        .cache_type = REGCACHE_RBTREE,
+        .reg_defaults = wm8998_reg_default,
+        .num_reg_defaults = ARRAY_SIZE(wm8998_reg_default),
+};
+EXPORT_SYMBOL_GPL(wm8998_i2c_regmap);
diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c
index 105cfffe82c6..28b2a12bb26d 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -33,7 +33,7 @@
 #include <linux/suspend.h>
 #include <linux/acpi.h>
 #include <asm/intel_pmc_ipc.h>
-#include <linux/mfd/lpc_ich.h>
+#include <linux/platform_data/itco_wdt.h>
 /*
 * IPC registers
@@ -473,9 +473,9 @@ static struct resource tco_res[] = {
        },
 };
-static struct lpc_ich_info tco_info = {
+static struct itco_wdt_platform_data tco_info = {
        .name = "Apollo Lake SoC",
-        .iTCO_version = 3,
+        .version = 3,
 };
 static int ipc_create_punit_device(void)
@@ -552,8 +552,7 @@ static int ipc_create_tco_device(void)
                goto err;
        }
-        ret = platform_device_add_data(pdev, &tco_info,
+        ret = platform_device_add_data(pdev, &tco_info, sizeof(tco_info));
-                                       sizeof(struct lpc_ich_info));
        if (ret) {
                dev_err(ipcdev.dev, "Failed to add tco platform data\n");
                goto err;
diff --git a/drivers/rtc/rtc-st-lpc.c b/drivers/rtc/rtc-st-lpc.c
index 3f9d0acb81c7..74c0a336ceea 100644
--- a/drivers/rtc/rtc-st-lpc.c
+++ b/drivers/rtc/rtc-st-lpc.c
@@ -208,7 +208,7 @@ static int st_rtc_probe(struct platform_device *pdev)
                return -EINVAL;
        }
-        /* LPC can either run in RTC or WDT mode */
+        /* LPC can either run as a Clocksource or in RTC or WDT mode */
        if (mode != ST_LPC_MODE_RTC)
                return -ENODEV;
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 241fafde42cb..55c4b5b0a317 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -797,7 +797,8 @@ config ITCO_WDT
        tristate "Intel TCO Timer/Watchdog"
        depends on (X86 || IA64) && PCI
        select WATCHDOG_CORE
-        select LPC_ICH
+        select LPC_ICH if !EXPERT
+        select I2C_I801 if !EXPERT
        ---help---
          Hardware driver for the intel TCO timer based watchdog devices.
          These drivers are included in the Intel 82801 I/O Controller
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index 3c3fd417ddeb..0acc6c5f729d 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -66,8 +66,7 @@
 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
 #include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
 #include <linux/io.h>                   /* For inb/outb/... */
-#include <linux/mfd/core.h>
+#include <linux/platform_data/itco_wdt.h>
-#include <linux/mfd/lpc_ich.h>
 #include "iTCO_vendor.h"
@@ -146,59 +145,67 @@ static inline unsigned int ticks_to_seconds(int ticks)
        return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10;
 }
+static inline u32 no_reboot_bit(void)
+{
+        u32 enable_bit;
+        switch (iTCO_wdt_private.iTCO_version) {
+        case 3:
+                enable_bit = 0x00000010;
+                break;
+        case 2:
+                enable_bit = 0x00000020;
+                break;
+        case 4:
+        case 1:
+        default:
+                enable_bit = 0x00000002;
+                break;
+        }
+        return enable_bit;
+}
 static void iTCO_wdt_set_NO_REBOOT_bit(void)
 {
        u32 val32;
        /* Set the NO_REBOOT bit: this disables reboots */
-        if (iTCO_wdt_private.iTCO_version == 3) {
+        if (iTCO_wdt_private.iTCO_version >= 2) {
-                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                val32 |= 0x00000010;
-                writel(val32, iTCO_wdt_private.gcs_pmc);
-        } else if (iTCO_wdt_private.iTCO_version == 2) {
                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                val32 |= 0x00000020;
+                val32 |= no_reboot_bit();
                writel(val32, iTCO_wdt_private.gcs_pmc);
        } else if (iTCO_wdt_private.iTCO_version == 1) {
                pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
-                val32 |= 0x00000002;
+                val32 |= no_reboot_bit();
                pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
        }
 }
 static int iTCO_wdt_unset_NO_REBOOT_bit(void)
 {
-        int ret = 0;
+        u32 enable_bit = no_reboot_bit();
-        u32 val32;
+        u32 val32 = 0;
        /* Unset the NO_REBOOT bit: this enables reboots */
-        if (iTCO_wdt_private.iTCO_version == 3) {
+        if (iTCO_wdt_private.iTCO_version >= 2) {
-                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                val32 &= 0xffffffef;
-                writel(val32, iTCO_wdt_private.gcs_pmc);
-                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                if (val32 & 0x00000010)
-                        ret = -EIO;
-        } else if (iTCO_wdt_private.iTCO_version == 2) {
                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                val32 &= 0xffffffdf;
+                val32 &= ~enable_bit;
                writel(val32, iTCO_wdt_private.gcs_pmc);
                val32 = readl(iTCO_wdt_private.gcs_pmc);
-                if (val32 & 0x00000020)
-                        ret = -EIO;
        } else if (iTCO_wdt_private.iTCO_version == 1) {
                pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
-                val32 &= 0xfffffffd;
+                val32 &= ~enable_bit;
                pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
                pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
-                if (val32 & 0x00000002)
-                        ret = -EIO;
        }
-        return ret; /* returns: 0 = OK, -EIO = Error */
+        if (val32 & enable_bit)
+                return -EIO;
+        return 0;
 }
 static int iTCO_wdt_start(struct watchdog_device *wd_dev)
@@ -418,9 +425,9 @@ static int iTCO_wdt_probe(struct platform_device *dev)
 {
        int ret = -ENODEV;
        unsigned long val32;
-        struct lpc_ich_info *ich_info = dev_get_platdata(&dev->dev);
+        struct itco_wdt_platform_data *pdata = dev_get_platdata(&dev->dev);
-        if (!ich_info)
+        if (!pdata)
                goto out;
        spin_lock_init(&iTCO_wdt_private.io_lock);
@@ -435,7 +442,7 @@ static int iTCO_wdt_probe(struct platform_device *dev)
        if (!iTCO_wdt_private.smi_res)
                goto out;
-        iTCO_wdt_private.iTCO_version = ich_info->iTCO_version;
+        iTCO_wdt_private.iTCO_version = pdata->version;
        iTCO_wdt_private.dev = dev;
        iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent);
@@ -501,15 +508,24 @@ static int iTCO_wdt_probe(struct platform_device *dev)
        }
        pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
-                ich_info->name, ich_info->iTCO_version, (u64)TCOBASE);
+                pdata->name, pdata->version, (u64)TCOBASE);
        /* Clear out the (probably old) status */
-        if (iTCO_wdt_private.iTCO_version == 3) {
+        switch (iTCO_wdt_private.iTCO_version) {
+        case 4:
+                outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
+                outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
+                break;
+        case 3:
                outl(0x20008, TCO1_STS);
-        } else {
+                break;
+        case 2:
+        case 1:
+        default:
                outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
                outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
                outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
+                break;
        }
        iTCO_wdt_watchdog_dev.bootstatus = 0;
diff --git a/include/dt-bindings/mfd/st-lpc.h b/include/dt-bindings/mfd/st-lpc.h
index e3e6c75d8822..d05894afa7e7 100644
--- a/include/dt-bindings/mfd/st-lpc.h
+++ b/include/dt-bindings/mfd/st-lpc.h
@@ -11,5 +11,6 @@
 #define ST_LPC_MODE_RTC         0
 #define ST_LPC_MODE_WDT         1
+#define ST_LPC_MODE_CLKSRC      2
 #endif /* __DT_BINDINGS_ST_LPC_H__ */
diff --git a/include/linux/mfd/88pm80x.h b/include/linux/mfd/88pm80x.h
index 97cb283cc8e1..8fcad63fab55 100644
--- a/include/linux/mfd/88pm80x.h
+++ b/include/linux/mfd/88pm80x.h
@@ -60,60 +60,60 @@ enum {
 /* page 0 basic: slave adder 0x60 */
 #define PM800_STATUS_1                  (0x01)
-#define PM800_ONKEY_STS1                (1 << 0)
+#define PM800_ONKEY_STS1                BIT(0)
-#define PM800_EXTON_STS1                (1 << 1)
+#define PM800_EXTON_STS1                BIT(1)
-#define PM800_CHG_STS1                  (1 << 2)
+#define PM800_CHG_STS1                  BIT(2)
-#define PM800_BAT_STS1                  (1 << 3)
+#define PM800_BAT_STS1                  BIT(3)
-#define PM800_VBUS_STS1                 (1 << 4)
+#define PM800_VBUS_STS1                 BIT(4)
-#define PM800_LDO_PGOOD_STS1    (1 << 5)
+#define PM800_LDO_PGOOD_STS1            BIT(5)
-#define PM800_BUCK_PGOOD_STS1   (1 << 6)
+#define PM800_BUCK_PGOOD_STS1           BIT(6)
 #define PM800_STATUS_2                  (0x02)
-#define PM800_RTC_ALARM_STS2    (1 << 0)
+#define PM800_RTC_ALARM_STS2            BIT(0)
 /* Wakeup Registers */
-#define PM800_WAKEUP1           (0x0D)
+#define PM800_WAKEUP1                   (0x0D)
-#define PM800_WAKEUP2           (0x0E)
+#define PM800_WAKEUP2                   (0x0E)
-#define PM800_WAKEUP2_INV_INT           (1 << 0)
+#define PM800_WAKEUP2_INV_INT           BIT(0)
-#define PM800_WAKEUP2_INT_CLEAR         (1 << 1)
+#define PM800_WAKEUP2_INT_CLEAR         BIT(1)
-#define PM800_WAKEUP2_INT_MASK          (1 << 2)
+#define PM800_WAKEUP2_INT_MASK          BIT(2)
-#define PM800_POWER_UP_LOG      (0x10)
+#define PM800_POWER_UP_LOG              (0x10)
 /* Referance and low power registers */
 #define PM800_LOW_POWER1                (0x20)
 #define PM800_LOW_POWER2                (0x21)
-#define PM800_LOW_POWER_CONFIG3 (0x22)
+#define PM800_LOW_POWER_CONFIG3         (0x22)
-#define PM800_LOW_POWER_CONFIG4 (0x23)
+#define PM800_LOW_POWER_CONFIG4         (0x23)
 /* GPIO register */
 #define PM800_GPIO_0_1_CNTRL            (0x30)
-#define PM800_GPIO0_VAL                         (1 << 0)
+#define PM800_GPIO0_VAL                 BIT(0)
 #define PM800_GPIO0_GPIO_MODE(x)        (x << 1)
-#define PM800_GPIO1_VAL                         (1 << 4)
+#define PM800_GPIO1_VAL                 BIT(4)
 #define PM800_GPIO1_GPIO_MODE(x)        (x << 5)
 #define PM800_GPIO_2_3_CNTRL            (0x31)
-#define PM800_GPIO2_VAL                         (1 << 0)
+#define PM800_GPIO2_VAL                 BIT(0)
 #define PM800_GPIO2_GPIO_MODE(x)        (x << 1)
-#define PM800_GPIO3_VAL                         (1 << 4)
+#define PM800_GPIO3_VAL                 BIT(4)
 #define PM800_GPIO3_GPIO_MODE(x)        (x << 5)
 #define PM800_GPIO3_MODE_MASK           0x1F
 #define PM800_GPIO3_HEADSET_MODE        PM800_GPIO3_GPIO_MODE(6)
-#define PM800_GPIO_4_CNTRL                      (0x32)
+#define PM800_GPIO_4_CNTRL              (0x32)
-#define PM800_GPIO4_VAL                         (1 << 0)
+#define PM800_GPIO4_VAL                 BIT(0)
 #define PM800_GPIO4_GPIO_MODE(x)        (x << 1)
 #define PM800_HEADSET_CNTRL             (0x38)
-#define PM800_HEADSET_DET_EN            (1 << 7)
+#define PM800_HEADSET_DET_EN            BIT(7)
-#define PM800_HSDET_SLP                 (1 << 1)
+#define PM800_HSDET_SLP                 BIT(1)
 /* PWM register */
-#define PM800_PWM1              (0x40)
+#define PM800_PWM1                      (0x40)
-#define PM800_PWM2              (0x41)
+#define PM800_PWM2                      (0x41)
-#define PM800_PWM3              (0x42)
+#define PM800_PWM3                      (0x42)
-#define PM800_PWM4              (0x43)
+#define PM800_PWM4                      (0x43)
 /* RTC Registers */
 #define PM800_RTC_CONTROL               (0xD0)
@@ -123,55 +123,55 @@ enum {
 #define PM800_RTC_MISC4                 (0xE4)
 #define PM800_RTC_MISC5                 (0xE7)
 /* bit definitions of RTC Register 1 (0xD0) */
-#define PM800_ALARM1_EN                 (1 << 0)
+#define PM800_ALARM1_EN                 BIT(0)
-#define PM800_ALARM_WAKEUP              (1 << 4)
+#define PM800_ALARM_WAKEUP              BIT(4)
-#define PM800_ALARM                     (1 << 5)
+#define PM800_ALARM                     BIT(5)
-#define PM800_RTC1_USE_XO               (1 << 7)
+#define PM800_RTC1_USE_XO               BIT(7)
 /* Regulator Control Registers: BUCK1,BUCK5,LDO1 have DVC */
 /* buck registers */
-#define PM800_SLEEP_BUCK1       (0x30)
+#define PM800_SLEEP_BUCK1               (0x30)
 /* BUCK Sleep Mode Register 1: BUCK[1..4] */
-#define PM800_BUCK_SLP1         (0x5A)
+#define PM800_BUCK_SLP1                 (0x5A)
-#define PM800_BUCK1_SLP1_SHIFT  0
+#define PM800_BUCK1_SLP1_SHIFT          0
-#define PM800_BUCK1_SLP1_MASK   (0x3 << PM800_BUCK1_SLP1_SHIFT)
+#define PM800_BUCK1_SLP1_MASK           (0x3 << PM800_BUCK1_SLP1_SHIFT)
 /* page 2 GPADC: slave adder 0x02 */
 #define PM800_GPADC_MEAS_EN1            (0x01)
-#define PM800_MEAS_EN1_VBAT         (1 << 2)
+#define PM800_MEAS_EN1_VBAT             BIT(2)
 #define PM800_GPADC_MEAS_EN2            (0x02)
-#define PM800_MEAS_EN2_RFTMP        (1 << 0)
+#define PM800_MEAS_EN2_RFTMP            BIT(0)
-#define PM800_MEAS_GP0_EN                       (1 << 2)
+#define PM800_MEAS_GP0_EN               BIT(2)
-#define PM800_MEAS_GP1_EN                       (1 << 3)
+#define PM800_MEAS_GP1_EN               BIT(3)
-#define PM800_MEAS_GP2_EN                       (1 << 4)
+#define PM800_MEAS_GP2_EN               BIT(4)
-#define PM800_MEAS_GP3_EN                       (1 << 5)
+#define PM800_MEAS_GP3_EN               BIT(5)
-#define PM800_MEAS_GP4_EN                       (1 << 6)
+#define PM800_MEAS_GP4_EN               BIT(6)
 #define PM800_GPADC_MISC_CONFIG1        (0x05)
 #define PM800_GPADC_MISC_CONFIG2        (0x06)
-#define PM800_GPADC_MISC_GPFSM_EN       (1 << 0)
+#define PM800_GPADC_MISC_GPFSM_EN       BIT(0)
 #define PM800_GPADC_SLOW_MODE(x)        (x << 3)
-#define PM800_GPADC_MISC_CONFIG3                (0x09)
+#define PM800_GPADC_MISC_CONFIG3        (0x09)
-#define PM800_GPADC_MISC_CONFIG4                (0x0A)
+#define PM800_GPADC_MISC_CONFIG4        (0x0A)
-#define PM800_GPADC_PREBIAS1                    (0x0F)
+#define PM800_GPADC_PREBIAS1            (0x0F)
 #define PM800_GPADC0_GP_PREBIAS_TIME(x) (x << 0)
-#define PM800_GPADC_PREBIAS2                    (0x10)
+#define PM800_GPADC_PREBIAS2            (0x10)
-#define PM800_GP_BIAS_ENA1                              (0x14)
+#define PM800_GP_BIAS_ENA1              (0x14)
-#define PM800_GPADC_GP_BIAS_EN0                 (1 << 0)
+#define PM800_GPADC_GP_BIAS_EN0         BIT(0)
-#define PM800_GPADC_GP_BIAS_EN1                 (1 << 1)
+#define PM800_GPADC_GP_BIAS_EN1         BIT(1)
-#define PM800_GPADC_GP_BIAS_EN2                 (1 << 2)
+#define PM800_GPADC_GP_BIAS_EN2         BIT(2)
-#define PM800_GPADC_GP_BIAS_EN3                 (1 << 3)
+#define PM800_GPADC_GP_BIAS_EN3         BIT(3)
 #define PM800_GP_BIAS_OUT1              (0x15)
-#define PM800_BIAS_OUT_GP0              (1 << 0)
+#define PM800_BIAS_OUT_GP0              BIT(0)
-#define PM800_BIAS_OUT_GP1              (1 << 1)
+#define PM800_BIAS_OUT_GP1              BIT(1)
-#define PM800_BIAS_OUT_GP2              (1 << 2)
+#define PM800_BIAS_OUT_GP2              BIT(2)
-#define PM800_BIAS_OUT_GP3              (1 << 3)
+#define PM800_BIAS_OUT_GP3              BIT(3)
 #define PM800_GPADC0_LOW_TH             0x20
 #define PM800_GPADC1_LOW_TH             0x21
@@ -222,37 +222,37 @@ enum {
 #define PM805_INT_STATUS1               (0x03)
-#define PM805_INT1_HP1_SHRT             (1 << 0)
+#define PM805_INT1_HP1_SHRT             BIT(0)
-#define PM805_INT1_HP2_SHRT             (1 << 1)
+#define PM805_INT1_HP2_SHRT             BIT(1)
-#define PM805_INT1_MIC_CONFLICT         (1 << 2)
+#define PM805_INT1_MIC_CONFLICT         BIT(2)
-#define PM805_INT1_CLIP_FAULT           (1 << 3)
+#define PM805_INT1_CLIP_FAULT           BIT(3)
-#define PM805_INT1_LDO_OFF                      (1 << 4)
+#define PM805_INT1_LDO_OFF              BIT(4)
-#define PM805_INT1_SRC_DPLL_LOCK        (1 << 5)
+#define PM805_INT1_SRC_DPLL_LOCK        BIT(5)
 #define PM805_INT_STATUS2               (0x04)
-#define PM805_INT2_MIC_DET                      (1 << 0)
+#define PM805_INT2_MIC_DET              BIT(0)
-#define PM805_INT2_SHRT_BTN_DET         (1 << 1)
+#define PM805_INT2_SHRT_BTN_DET         BIT(1)
-#define PM805_INT2_VOLM_BTN_DET         (1 << 2)
+#define PM805_INT2_VOLM_BTN_DET         BIT(2)
-#define PM805_INT2_VOLP_BTN_DET         (1 << 3)
+#define PM805_INT2_VOLP_BTN_DET         BIT(3)
-#define PM805_INT2_RAW_PLL_FAULT        (1 << 4)
+#define PM805_INT2_RAW_PLL_FAULT        BIT(4)
-#define PM805_INT2_FINE_PLL_FAULT       (1 << 5)
+#define PM805_INT2_FINE_PLL_FAULT       BIT(5)
 #define PM805_INT_MASK1                 (0x05)
 #define PM805_INT_MASK2                 (0x06)
-#define PM805_SHRT_BTN_DET              (1 << 1)
+#define PM805_SHRT_BTN_DET              BIT(1)
 /* number of status and int reg in a row */
 #define PM805_INT_REG_NUM               (2)
 #define PM805_MIC_DET1                  (0x07)
-#define PM805_MIC_DET_EN_MIC_DET (1 << 0)
+#define PM805_MIC_DET_EN_MIC_DET        BIT(0)
 #define PM805_MIC_DET2                  (0x08)
-#define PM805_MIC_DET_STATUS1   (0x09)
+#define PM805_MIC_DET_STATUS1           (0x09)
-#define PM805_MIC_DET_STATUS3   (0x0A)
+#define PM805_MIC_DET_STATUS3           (0x0A)
-#define PM805_AUTO_SEQ_STATUS1  (0x0B)
+#define PM805_AUTO_SEQ_STATUS1          (0x0B)
-#define PM805_AUTO_SEQ_STATUS2  (0x0C)
+#define PM805_AUTO_SEQ_STATUS2          (0x0C)
 #define PM805_ADC_SETTING1              (0x10)
 #define PM805_ADC_SETTING2              (0x11)
@@ -261,7 +261,7 @@ enum {
 #define PM805_ADC_GAIN2                 (0x13)
 #define PM805_DMIC_SETTING              (0x15)
 #define PM805_DWS_SETTING               (0x16)
-#define PM805_MIC_CONFLICT_STS  (0x17)
+#define PM805_MIC_CONFLICT_STS          (0x17)
 #define PM805_PDM_SETTING1              (0x20)
 #define PM805_PDM_SETTING2              (0x21)
@@ -270,11 +270,11 @@ enum {
 #define PM805_PDM_CONTROL2              (0x24)
 #define PM805_PDM_CONTROL3              (0x25)
-#define PM805_HEADPHONE_SETTING                 (0x26)
+#define PM805_HEADPHONE_SETTING         (0x26)
-#define PM805_HEADPHONE_GAIN_A2A                (0x27)
+#define PM805_HEADPHONE_GAIN_A2A        (0x27)
-#define PM805_HEADPHONE_SHORT_STATE             (0x28)
+#define PM805_HEADPHONE_SHORT_STATE     (0x28)
-#define PM805_EARPHONE_SETTING                  (0x29)
+#define PM805_EARPHONE_SETTING          (0x29)
-#define PM805_AUTO_SEQ_SETTING                  (0x2A)
+#define PM805_AUTO_SEQ_SETTING          (0x2A)
 struct pm80x_rtc_pdata {
        int             vrtc;
diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h
index 2f434f4f79a1..79e607e2f081 100644
--- a/include/linux/mfd/arizona/core.h
+++ b/include/linux/mfd/arizona/core.h
@@ -25,6 +25,8 @@ enum arizona_type {
        WM5110 = 2,
        WM8997 = 3,
        WM8280 = 4,
+        WM8998 = 5,
+        WM1814 = 6,
 };
 #define ARIZONA_IRQ_GP1                    0
@@ -165,6 +167,7 @@ static inline int wm5102_patch(struct arizona *arizona)
 int wm5110_patch(struct arizona *arizona);
 int wm8997_patch(struct arizona *arizona);
+int wm8998_patch(struct arizona *arizona);
 extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
                                     bool mandatory);
diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h
index 43db4faad143..1dc385850ba2 100644
--- a/include/linux/mfd/arizona/pdata.h
+++ b/include/linux/mfd/arizona/pdata.h
@@ -101,7 +101,7 @@ struct arizona_pdata {
         * useful for systems where and I2S bus with multiple data
         * lines is mastered.
         */
-        int max_channels_clocked[ARIZONA_MAX_AIF];
+        unsigned int max_channels_clocked[ARIZONA_MAX_AIF];
        /** GPIO5 is used for jack detection */
        bool jd_gpio5;
@@ -125,22 +125,22 @@ struct arizona_pdata {
        unsigned int hpdet_channel;
        /** Extra debounce timeout used during initial mic detection (ms) */
-        int micd_detect_debounce;
+        unsigned int micd_detect_debounce;
        /** GPIO for mic detection polarity */
        int micd_pol_gpio;
        /** Mic detect ramp rate */
-        int micd_bias_start_time;
+        unsigned int micd_bias_start_time;
        /** Mic detect sample rate */
-        int micd_rate;
+        unsigned int micd_rate;
        /** Mic detect debounce level */
-        int micd_dbtime;
+        unsigned int micd_dbtime;
        /** Mic detect timeout (ms) */
-        int micd_timeout;
+        unsigned int micd_timeout;
        /** Force MICBIAS on for mic detect */
        bool micd_force_micbias;
@@ -162,6 +162,8 @@ struct arizona_pdata {
        /**
         * Mode of input structures
         * One of the ARIZONA_INMODE_xxx values
+         * wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4
+         * wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B
         */
        int inmode[ARIZONA_MAX_INPUT];
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 3499d36e6067..5c39dc5d279e 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -139,6 +139,7 @@
 #define ARIZONA_MIC_DETECT_LEVEL_2               0x2A7
 #define ARIZONA_MIC_DETECT_LEVEL_3               0x2A8
 #define ARIZONA_MIC_DETECT_LEVEL_4               0x2A9
+#define ARIZONA_MIC_DETECT_4                     0x2AB
 #define ARIZONA_MIC_NOISE_MIX_CONTROL_1          0x2C3
 #define ARIZONA_ISOLATION_CONTROL                0x2CB
 #define ARIZONA_JACK_DETECT_ANALOGUE             0x2D3
@@ -225,14 +226,18 @@
 #define ARIZONA_DAC_VOLUME_LIMIT_6R              0x43E
 #define ARIZONA_NOISE_GATE_SELECT_6R             0x43F
 #define ARIZONA_DRE_ENABLE                       0x440
+#define ARIZONA_DRE_CONTROL_1                    0x441
 #define ARIZONA_DRE_CONTROL_2                    0x442
 #define ARIZONA_DRE_CONTROL_3                    0x443
+#define ARIZONA_EDRE_ENABLE                      0x448
 #define ARIZONA_DAC_AEC_CONTROL_1                0x450
+#define ARIZONA_DAC_AEC_CONTROL_2                0x451
 #define ARIZONA_NOISE_GATE_CONTROL               0x458
 #define ARIZONA_PDM_SPK1_CTRL_1                  0x490
 #define ARIZONA_PDM_SPK1_CTRL_2                  0x491
 #define ARIZONA_PDM_SPK2_CTRL_1                  0x492
 #define ARIZONA_PDM_SPK2_CTRL_2                  0x493
+#define ARIZONA_HP_TEST_CTRL_13                  0x49A
 #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL           0x4A0
 #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL           0x4A1
 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL           0x4A2
@@ -310,6 +315,10 @@
 #define ARIZONA_AIF3_TX_ENABLES                  0x599
 #define ARIZONA_AIF3_RX_ENABLES                  0x59A
 #define ARIZONA_AIF3_FORCE_WRITE                 0x59B
+#define ARIZONA_SPD1_TX_CONTROL                  0x5C2
+#define ARIZONA_SPD1_TX_CHANNEL_STATUS_1         0x5C3
+#define ARIZONA_SPD1_TX_CHANNEL_STATUS_2         0x5C4
+#define ARIZONA_SPD1_TX_CHANNEL_STATUS_3         0x5C5
 #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR          0x5E3
 #define ARIZONA_SLIMBUS_RATES_1                  0x5E5
 #define ARIZONA_SLIMBUS_RATES_2                  0x5E6
@@ -643,6 +652,10 @@
 #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME        0x7FD
 #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE        0x7FE
 #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME        0x7FF
+#define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE       0x800
+#define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME       0x801
+#define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE       0x808
+#define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME       0x809
 #define ARIZONA_EQ1MIX_INPUT_1_SOURCE            0x880
 #define ARIZONA_EQ1MIX_INPUT_1_VOLUME            0x881
 #define ARIZONA_EQ1MIX_INPUT_2_SOURCE            0x882
@@ -868,6 +881,7 @@
 #define ARIZONA_GPIO5_CTRL                       0xC04
 #define ARIZONA_IRQ_CTRL_1                       0xC0F
 #define ARIZONA_GPIO_DEBOUNCE_CONFIG             0xC10
+#define ARIZONA_GP_SWITCH_1                      0xC18
 #define ARIZONA_MISC_PAD_CTRL_1                  0xC20
 #define ARIZONA_MISC_PAD_CTRL_2                  0xC21
 #define ARIZONA_MISC_PAD_CTRL_3                  0xC22
@@ -1169,6 +1183,13 @@
 #define ARIZONA_DSP4_SCRATCH_1                   0x1441
 #define ARIZONA_DSP4_SCRATCH_2                   0x1442
 #define ARIZONA_DSP4_SCRATCH_3                   0x1443
+#define ARIZONA_FRF_COEFF_1                      0x1700
+#define ARIZONA_FRF_COEFF_2                      0x1701
+#define ARIZONA_FRF_COEFF_3                      0x1702
+#define ARIZONA_FRF_COEFF_4                      0x1703
+#define ARIZONA_V2_DAC_COMP_1                    0x1704
+#define ARIZONA_V2_DAC_COMP_2                    0x1705
 /*
 * Field Definitions.
@@ -2325,6 +2346,9 @@
 #define ARIZONA_HP_IDAC_STEER_MASK               0x0004  /* HP_IDAC_STEER */
 #define ARIZONA_HP_IDAC_STEER_SHIFT                   2  /* HP_IDAC_STEER */
 #define ARIZONA_HP_IDAC_STEER_WIDTH                   1  /* HP_IDAC_STEER */
+#define WM8998_HP_RATE_MASK                      0x0006  /* HP_RATE - [2:1] */
+#define WM8998_HP_RATE_SHIFT                          1  /* HP_RATE - [2:1] */
+#define WM8998_HP_RATE_WIDTH                          2  /* HP_RATE - [2:1] */
 #define ARIZONA_HP_RATE                          0x0002  /* HP_RATE */
 #define ARIZONA_HP_RATE_MASK                     0x0002  /* HP_RATE */
 #define ARIZONA_HP_RATE_SHIFT                         1  /* HP_RATE */
@@ -2413,6 +2437,16 @@
 #define ARIZONA_MICD_STS_WIDTH                        1  /* MICD_STS */
 /*
+ * R683 (0x2AB) - Mic Detect 4
+ */
+#define ARIZONA_MICDET_ADCVAL_DIFF_MASK          0xFF00  /* MICDET_ADCVAL_DIFF - [15:8] */
+#define ARIZONA_MICDET_ADCVAL_DIFF_SHIFT              8  /* MICDET_ADCVAL_DIFF - [15:8] */
+#define ARIZONA_MICDET_ADCVAL_DIFF_WIDTH              8  /* MICDET_ADCVAL_DIFF - [15:8] */
+#define ARIZONA_MICDET_ADCVAL_MASK               0x007F  /* MICDET_ADCVAL - [15:8] */
+#define ARIZONA_MICDET_ADCVAL_SHIFT                   0  /* MICDET_ADCVAL - [15:8] */
+#define ARIZONA_MICDET_ADCVAL_WIDTH                   7  /* MICDET_ADCVAL - [15:8] */
+/*
 * R707 (0x2C3) - Mic noise mix control 1
 */
 #define ARIZONA_MICMUTE_RATE_MASK                0x7800  /* MICMUTE_RATE - [14:11] */
@@ -2528,6 +2562,12 @@
 /*
 * R785 (0x311) - ADC Digital Volume 1L
 */
+#define ARIZONA_IN1L_SRC_MASK                    0x4000  /* IN1L_SRC - [14] */
+#define ARIZONA_IN1L_SRC_SHIFT                       14  /* IN1L_SRC - [14] */
+#define ARIZONA_IN1L_SRC_WIDTH                        1  /* IN1L_SRC - [14] */
+#define ARIZONA_IN1L_SRC_SE_MASK                 0x2000  /* IN1L_SRC - [13] */
+#define ARIZONA_IN1L_SRC_SE_SHIFT                    13  /* IN1L_SRC - [13] */
+#define ARIZONA_IN1L_SRC_SE_WIDTH                     1  /* IN1L_SRC - [13] */
 #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
@@ -2560,6 +2600,12 @@
 /*
 * R789 (0x315) - ADC Digital Volume 1R
 */
+#define ARIZONA_IN1R_SRC_MASK                    0x4000  /* IN1R_SRC - [14] */
+#define ARIZONA_IN1R_SRC_SHIFT                       14  /* IN1R_SRC - [14] */
+#define ARIZONA_IN1R_SRC_WIDTH                        1  /* IN1R_SRC - [14] */
+#define ARIZONA_IN1R_SRC_SE_MASK                 0x2000  /* IN1R_SRC - [13] */
+#define ARIZONA_IN1R_SRC_SE_SHIFT                    13  /* IN1R_SRC - [13] */
+#define ARIZONA_IN1R_SRC_SE_WIDTH                     1  /* IN1R_SRC - [13] */
 #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
@@ -2604,6 +2650,12 @@
 /*
 * R793 (0x319) - ADC Digital Volume 2L
 */
+#define ARIZONA_IN2L_SRC_MASK                    0x4000  /* IN2L_SRC - [14] */
+#define ARIZONA_IN2L_SRC_SHIFT                       14  /* IN2L_SRC - [14] */
+#define ARIZONA_IN2L_SRC_WIDTH                        1  /* IN2L_SRC - [14] */
+#define ARIZONA_IN2L_SRC_SE_MASK                 0x2000  /* IN2L_SRC - [13] */
+#define ARIZONA_IN2L_SRC_SE_SHIFT                    13  /* IN2L_SRC - [13] */
+#define ARIZONA_IN2L_SRC_SE_WIDTH                     1  /* IN2L_SRC - [13] */
 #define ARIZONA_IN_VU                            0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_MASK                       0x0200  /* IN_VU */
 #define ARIZONA_IN_VU_SHIFT                           9  /* IN_VU */
@@ -3412,11 +3464,45 @@
 #define ARIZONA_DRE1L_ENA_WIDTH                       1  /* DRE1L_ENA */
 /*
+ * R1088 (0x440) - DRE Enable (WM8998)
+ */
+#define WM8998_DRE3L_ENA                          0x0020  /* DRE3L_ENA */
+#define WM8998_DRE3L_ENA_MASK                     0x0020  /* DRE3L_ENA */
+#define WM8998_DRE3L_ENA_SHIFT                         5  /* DRE3L_ENA */
+#define WM8998_DRE3L_ENA_WIDTH                         1  /* DRE3L_ENA */
+#define WM8998_DRE2L_ENA                          0x0008  /* DRE2L_ENA */
+#define WM8998_DRE2L_ENA_MASK                     0x0008  /* DRE2L_ENA */
+#define WM8998_DRE2L_ENA_SHIFT                         3  /* DRE2L_ENA */
+#define WM8998_DRE2L_ENA_WIDTH                         1  /* DRE2L_ENA */
+#define WM8998_DRE2R_ENA                          0x0004  /* DRE2R_ENA */
+#define WM8998_DRE2R_ENA_MASK                     0x0004  /* DRE2R_ENA */
+#define WM8998_DRE2R_ENA_SHIFT                         2  /* DRE2R_ENA */
+#define WM8998_DRE2R_ENA_WIDTH                         1  /* DRE2R_ENA */
+#define WM8998_DRE1L_ENA                          0x0002  /* DRE1L_ENA */
+#define WM8998_DRE1L_ENA_MASK                     0x0002  /* DRE1L_ENA */
+#define WM8998_DRE1L_ENA_SHIFT                         1  /* DRE1L_ENA */
+#define WM8998_DRE1L_ENA_WIDTH                         1  /* DRE1L_ENA */
+#define WM8998_DRE1R_ENA                          0x0001  /* DRE1R_ENA */
+#define WM8998_DRE1R_ENA_MASK                     0x0001  /* DRE1R_ENA */
+#define WM8998_DRE1R_ENA_SHIFT                         0  /* DRE1R_ENA */
+#define WM8998_DRE1R_ENA_WIDTH                         1  /* DRE1R_ENA */
+/*
+ * R1089 (0x441) - DRE Control 1
+ */
+#define ARIZONA_DRE_ENV_TC_FAST_MASK             0x0F00  /* DRE_ENV_TC_FAST - [11:8] */
+#define ARIZONA_DRE_ENV_TC_FAST_SHIFT                 8  /* DRE_ENV_TC_FAST - [11:8] */
+#define ARIZONA_DRE_ENV_TC_FAST_WIDTH                 4  /* DRE_ENV_TC_FAST - [11:8] */
+/*
 * R1090 (0x442) - DRE Control 2
 */
 #define ARIZONA_DRE_T_LOW_MASK                   0x3F00  /* DRE_T_LOW - [13:8] */
 #define ARIZONA_DRE_T_LOW_SHIFT                       8  /* DRE_T_LOW - [13:8] */
 #define ARIZONA_DRE_T_LOW_WIDTH                       6  /* DRE_T_LOW - [13:8] */
+#define ARIZONA_DRE_ALOG_VOL_DELAY_MASK          0x000F  /* DRE_ALOG_VOL_DELAY - [3:0] */
+#define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT              0  /* DRE_ALOG_VOL_DELAY - [3:0] */
+#define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH              4  /* DRE_ALOG_VOL_DELAY - [3:0] */
 /*
 * R1091 (0x443) - DRE Control 3
@@ -3428,6 +3514,49 @@
 #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT               0  /* LOW_LEVEL_ABS - [3:0] */
 #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH               4  /* LOW_LEVEL_ABS - [3:0] */
+/* R486 (0x448) - EDRE_Enable
+ */
+#define ARIZONA_EDRE_OUT4L_THR2_ENA              0x0200  /* EDRE_OUT4L_THR2_ENA */
+#define ARIZONA_EDRE_OUT4L_THR2_ENA_MASK         0x0200  /* EDRE_OUT4L_THR2_ENA */
+#define ARIZONA_EDRE_OUT4L_THR2_ENA_SHIFT             9  /* EDRE_OUT4L_THR2_ENA */
+#define ARIZONA_EDRE_OUT4L_THR2_ENA_WIDTH             1  /* EDRE_OUT4L_THR2_ENA */
+#define ARIZONA_EDRE_OUT4R_THR2_ENA              0x0100  /* EDRE_OUT4R_THR2_ENA */
+#define ARIZONA_EDRE_OUT4R_THR2_ENA_MASK         0x0100  /* EDRE_OUT4R_THR2_ENA */
+#define ARIZONA_EDRE_OUT4R_THR2_ENA_SHIFT             8  /* EDRE_OUT4R_THR2_ENA */
+#define ARIZONA_EDRE_OUT4R_THR2_ENA_WIDTH             1  /* EDRE_OUT4R_THR2_ENA */
+#define ARIZONA_EDRE_OUT4L_THR1_ENA              0x0080  /* EDRE_OUT4L_THR1_ENA */
+#define ARIZONA_EDRE_OUT4L_THR1_ENA_MASK         0x0080  /* EDRE_OUT4L_THR1_ENA */
+#define ARIZONA_EDRE_OUT4L_THR1_ENA_SHIFT             7  /* EDRE_OUT4L_THR1_ENA */
+#define ARIZONA_EDRE_OUT4L_THR1_ENA_WIDTH             1  /* EDRE_OUT4L_THR1_ENA */
+#define ARIZONA_EDRE_OUT4R_THR1_ENA              0x0040  /* EDRE_OUT4R_THR1_ENA */
+#define ARIZONA_EDRE_OUT4R_THR1_ENA_MASK         0x0040  /* EDRE_OUT4R_THR1_ENA */
+#define ARIZONA_EDRE_OUT4R_THR1_ENA_SHIFT             6  /* EDRE_OUT4R_THR1_ENA */
+#define ARIZONA_EDRE_OUT4R_THR1_ENA_WIDTH             1  /* EDRE_OUT4R_THR1_ENA */
+#define ARIZONA_EDRE_OUT3L_THR1_ENA              0x0020  /* EDRE_OUT3L_THR1_ENA */
+#define ARIZONA_EDRE_OUT3L_THR1_ENA_MASK         0x0020  /* EDRE_OUT3L_THR1_ENA */
+#define ARIZONA_EDRE_OUT3L_THR1_ENA_SHIFT             5  /* EDRE_OUT3L_THR1_ENA */
+#define ARIZONA_EDRE_OUT3L_THR1_ENA_WIDTH             1  /* EDRE_OUT3L_THR1_ENA */
+#define ARIZONA_EDRE_OUT3R_THR1_ENA              0x0010  /* EDRE_OUT3R_THR1_ENA */
+#define ARIZONA_EDRE_OUT3R_THR1_ENA_MASK         0x0010  /* EDRE_OUT3R_THR1_ENA */
+#define ARIZONA_EDRE_OUT3R_THR1_ENA_SHIFT             4  /* EDRE_OUT3R_THR1_ENA */
+#define ARIZONA_EDRE_OUT3R_THR1_ENA_WIDTH             1  /* EDRE_OUT3R_THR1_ENA */
+#define ARIZONA_EDRE_OUT2L_THR1_ENA              0x0008  /* EDRE_OUT2L_THR1_ENA */
+#define ARIZONA_EDRE_OUT2L_THR1_ENA_MASK         0x0008  /* EDRE_OUT2L_THR1_ENA */
+#define ARIZONA_EDRE_OUT2L_THR1_ENA_SHIFT             3  /* EDRE_OUT2L_THR1_ENA */
+#define ARIZONA_EDRE_OUT2L_THR1_ENA_WIDTH             1  /* EDRE_OUT2L_THR1_ENA */
+#define ARIZONA_EDRE_OUT2R_THR1_ENA              0x0004  /* EDRE_OUT2R_THR1_ENA */
+#define ARIZONA_EDRE_OUT2R_THR1_ENA_MASK         0x0004  /* EDRE_OUT2R_THR1_ENA */
+#define ARIZONA_EDRE_OUT2R_THR1_ENA_SHIFT             2  /* EDRE_OUT2R_THR1_ENA */
+#define ARIZONA_EDRE_OUT2R_THR1_ENA_WIDTH             1  /* EDRE_OUT2R_THR1_ENA */
+#define ARIZONA_EDRE_OUT1L_THR1_ENA              0x0002  /* EDRE_OUT1L_THR1_ENA */
+#define ARIZONA_EDRE_OUT1L_THR1_ENA_MASK         0x0002  /* EDRE_OUT1L_THR1_ENA */
+#define ARIZONA_EDRE_OUT1L_THR1_ENA_SHIFT             1  /* EDRE_OUT1L_THR1_ENA */
+#define ARIZONA_EDRE_OUT1L_THR1_ENA_WIDTH             1  /* EDRE_OUT1L_THR1_ENA */
+#define ARIZONA_EDRE_OUT1R_THR1_ENA              0x0001  /* EDRE_OUT1R_THR1_ENA */
+#define ARIZONA_EDRE_OUT1R_THR1_ENA_MASK         0x0001  /* EDRE_OUT1R_THR1_ENA */
+#define ARIZONA_EDRE_OUT1R_THR1_ENA_SHIFT             0  /* EDRE_OUT1R_THR1_ENA */
+#define ARIZONA_EDRE_OUT1R_THR1_ENA_WIDTH             1  /* EDRE_OUT1R_THR1_ENA */
 /*
 * R1104 (0x450) - DAC AEC Control 1
 */
@@ -4308,6 +4437,86 @@
 #define ARIZONA_AIF3_FRC_WR_WIDTH                     1  /* AIF3_FRC_WR */
 /*
+ * R1474 (0x5C2) - SPD1 TX Control
+ */
+#define ARIZONA_SPD1_VAL2                        0x2000  /* SPD1_VAL2 */
+#define ARIZONA_SPD1_VAL2_MASK                   0x2000  /* SPD1_VAL2 */
+#define ARIZONA_SPD1_VAL2_SHIFT                      13  /* SPD1_VAL2 */
+#define ARIZONA_SPD1_VAL2_WIDTH                       1  /* SPD1_VAL2 */
+#define ARIZONA_SPD1_VAL1                        0x1000  /* SPD1_VAL1 */
+#define ARIZONA_SPD1_VAL1_MASK                   0x1000  /* SPD1_VAL1 */
+#define ARIZONA_SPD1_VAL1_SHIFT                      12  /* SPD1_VAL1 */
+#define ARIZONA_SPD1_VAL1_WIDTH                       1  /* SPD1_VAL1 */
+#define ARIZONA_SPD1_RATE_MASK                   0x00F0  /* SPD1_RATE */
+#define ARIZONA_SPD1_RATE_SHIFT                       4  /* SPD1_RATE */
+#define ARIZONA_SPD1_RATE_WIDTH                       4  /* SPD1_RATE */
+#define ARIZONA_SPD1_ENA                         0x0001  /* SPD1_ENA */
+#define ARIZONA_SPD1_ENA_MASK                    0x0001  /* SPD1_ENA */
+#define ARIZONA_SPD1_ENA_SHIFT                        0  /* SPD1_ENA */
+#define ARIZONA_SPD1_ENA_WIDTH                        1  /* SPD1_ENA */
+/*
+ * R1475 (0x5C3) - SPD1 TX Channel Status 1
+ */
+#define ARIZONA_SPD1_CATCODE_MASK                0xFF00  /* SPD1_CATCODE */
+#define ARIZONA_SPD1_CATCODE_SHIFT                    8  /* SPD1_CATCODE */
+#define ARIZONA_SPD1_CATCODE_WIDTH                    8  /* SPD1_CATCODE */
+#define ARIZONA_SPD1_CHSTMODE_MASK               0x00C0  /* SPD1_CHSTMODE */
+#define ARIZONA_SPD1_CHSTMODE_SHIFT                   6  /* SPD1_CHSTMODE */
+#define ARIZONA_SPD1_CHSTMODE_WIDTH                   2  /* SPD1_CHSTMODE */
+#define ARIZONA_SPD1_PREEMPH_MASK                0x0038  /* SPD1_PREEMPH */
+#define ARIZONA_SPD1_PREEMPH_SHIFT                    3  /* SPD1_PREEMPH */
+#define ARIZONA_SPD1_PREEMPH_WIDTH                    3  /* SPD1_PREEMPH */
+#define ARIZONA_SPD1_NOCOPY                      0x0004  /* SPD1_NOCOPY */
+#define ARIZONA_SPD1_NOCOPY_MASK                 0x0004  /* SPD1_NOCOPY */
+#define ARIZONA_SPD1_NOCOPY_SHIFT                     2  /* SPD1_NOCOPY */
+#define ARIZONA_SPD1_NOCOPY_WIDTH                     1  /* SPD1_NOCOPY */
+#define ARIZONA_SPD1_NOAUDIO                     0x0002  /* SPD1_NOAUDIO */
+#define ARIZONA_SPD1_NOAUDIO_MASK                0x0002  /* SPD1_NOAUDIO */
+#define ARIZONA_SPD1_NOAUDIO_SHIFT                    1  /* SPD1_NOAUDIO */
+#define ARIZONA_SPD1_NOAUDIO_WIDTH                    1  /* SPD1_NOAUDIO */
+#define ARIZONA_SPD1_PRO                         0x0001  /* SPD1_PRO */
+#define ARIZONA_SPD1_PRO_MASK                    0x0001  /* SPD1_PRO */
+#define ARIZONA_SPD1_PRO_SHIFT                        0  /* SPD1_PRO */
+#define ARIZONA_SPD1_PRO_WIDTH                        1  /* SPD1_PRO */
+/*
+ * R1475 (0x5C4) - SPD1 TX Channel Status 2
+ */
+#define ARIZONA_SPD1_FREQ_MASK                   0xF000  /* SPD1_FREQ */
+#define ARIZONA_SPD1_FREQ_SHIFT                      12  /* SPD1_FREQ */
+#define ARIZONA_SPD1_FREQ_WIDTH                       4  /* SPD1_FREQ */
+#define ARIZONA_SPD1_CHNUM2_MASK                 0x0F00  /* SPD1_CHNUM2 */
+#define ARIZONA_SPD1_CHNUM2_SHIFT                     8  /* SPD1_CHNUM2 */
+#define ARIZONA_SPD1_CHNUM2_WIDTH                     4  /* SPD1_CHNUM2 */
+#define ARIZONA_SPD1_CHNUM1_MASK                 0x00F0  /* SPD1_CHNUM1 */
+#define ARIZONA_SPD1_CHNUM1_SHIFT                     4  /* SPD1_CHNUM1 */
+#define ARIZONA_SPD1_CHNUM1_WIDTH                     4  /* SPD1_CHNUM1 */
+#define ARIZONA_SPD1_SRCNUM_MASK                 0x000F  /* SPD1_SRCNUM */
+#define ARIZONA_SPD1_SRCNUM_SHIFT                     0  /* SPD1_SRCNUM */
+#define ARIZONA_SPD1_SRCNUM_WIDTH                     4  /* SPD1_SRCNUM */
+/*
+ * R1475 (0x5C5) - SPD1 TX Channel Status 3
+ */
+#define ARIZONA_SPD1_ORGSAMP_MASK                 0x0F00  /* SPD1_ORGSAMP */
+#define ARIZONA_SPD1_ORGSAMP_SHIFT                     8  /* SPD1_ORGSAMP */
+#define ARIZONA_SPD1_ORGSAMP_WIDTH                     4  /* SPD1_ORGSAMP */
+#define ARIZONA_SPD1_TXWL_MASK                    0x00E0  /* SPD1_TXWL */
+#define ARIZONA_SPD1_TXWL_SHIFT                        5  /* SPD1_TXWL */
+#define ARIZONA_SPD1_TXWL_WIDTH                        3  /* SPD1_TXWL */
+#define ARIZONA_SPD1_MAXWL                        0x0010  /* SPD1_MAXWL */
+#define ARIZONA_SPD1_MAXWL_MASK                   0x0010  /* SPD1_MAXWL */
+#define ARIZONA_SPD1_MAXWL_SHIFT                       4  /* SPD1_MAXWL */
+#define ARIZONA_SPD1_MAXWL_WIDTH                       1  /* SPD1_MAXWL */
+#define ARIZONA_SPD1_CS31_30_MASK                 0x000C  /* SPD1_CS31_30 */
+#define ARIZONA_SPD1_CS31_30_SHIFT                     2  /* SPD1_CS31_30 */
+#define ARIZONA_SPD1_CS31_30_WIDTH                     2  /* SPD1_CS31_30 */
+#define ARIZONA_SPD1_CLKACU_MASK                  0x0003  /* SPD1_CLKACU */
+#define ARIZONA_SPD1_CLKACU_SHIFT                      2  /* SPD1_CLKACU */
+#define ARIZONA_SPD1_CLKACU_WIDTH                      0  /* SPD1_CLKACU */
+/*
 * R1507 (0x5E3) - SLIMbus Framer Ref Gear
 */
 #define ARIZONA_SLIMCLK_SRC                      0x0010  /* SLIMCLK_SRC */
@@ -4562,6 +4771,13 @@
 #define ARIZONA_GP_DBTIME_WIDTH                       4  /* GP_DBTIME - [15:12] */
 /*
+ * R3096 (0xC18) - GP Switch 1
+ */
+#define ARIZONA_SW1_MODE_MASK                    0x0003  /* SW1_MODE - [1:0] */
+#define ARIZONA_SW1_MODE_SHIFT                        0  /* SW1_MODE - [1:0] */
+#define ARIZONA_SW1_MODE_WIDTH                        2  /* SW1_MODE - [1:0] */
+/*
 * R3104 (0xC20) - Misc Pad Ctrl 1
 */
 #define ARIZONA_LDO1ENA_PD                       0x8000  /* LDO1ENA_PD */
@@ -6301,6 +6517,10 @@
 /*
 * R3366 (0xD26) - Interrupt Raw Status 8
 */
+#define ARIZONA_SPDIF_OVERCLOCKED_STS            0x8000  /* SPDIF_OVERCLOCKED_STS */
+#define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK       0x8000  /* SPDIF_OVERCLOCKED_STS */
+#define ARIZONA_SPDIF_OVERCLOCKED_STS_SHIFT          15  /* SPDIF_OVERCLOCKED_STS */
+#define ARIZONA_SPDIF_OVERCLOCKED_STS_WIDTH           1  /* SPDIF_OVERCLOCKED_STS */
 #define ARIZONA_AIF3_UNDERCLOCKED_STS            0x0400  /* AIF3_UNDERCLOCKED_STS */
 #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK       0x0400  /* AIF3_UNDERCLOCKED_STS */
 #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT          10  /* AIF3_UNDERCLOCKED_STS */
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index c2aa853fb412..cc8ad1e1a307 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -12,7 +12,8 @@
 #define __LINUX_MFD_AXP20X_H
 enum {
-        AXP202_ID = 0,
+        AXP152_ID = 0,
+        AXP202_ID,
        AXP209_ID,
        AXP221_ID,
        AXP288_ID,
@@ -22,6 +23,24 @@ enum {
 #define AXP20X_DATACACHE(m)             (0x04 + (m))
 /* Power supply */
+#define AXP152_PWR_OP_MODE              0x01
+#define AXP152_LDO3456_DC1234_CTRL      0x12
+#define AXP152_ALDO_OP_MODE             0x13
+#define AXP152_LDO0_CTRL                0x15
+#define AXP152_DCDC2_V_OUT              0x23
+#define AXP152_DCDC2_V_SCAL             0x25
+#define AXP152_DCDC1_V_OUT              0x26
+#define AXP152_DCDC3_V_OUT              0x27
+#define AXP152_ALDO12_V_OUT             0x28
+#define AXP152_DLDO1_V_OUT              0x29
+#define AXP152_DLDO2_V_OUT              0x2a
+#define AXP152_DCDC4_V_OUT              0x2b
+#define AXP152_V_OFF                    0x31
+#define AXP152_OFF_CTRL                 0x32
+#define AXP152_PEK_KEY                  0x36
+#define AXP152_DCDC_FREQ                0x37
+#define AXP152_DCDC_MODE                0x80
 #define AXP20X_PWR_INPUT_STATUS         0x00
 #define AXP20X_PWR_OP_MODE              0x01
 #define AXP20X_USB_OTG_STATUS           0x02
@@ -69,6 +88,13 @@ enum {
 #define AXP22X_CHRG_CTRL3               0x35
 /* Interrupt */
+#define AXP152_IRQ1_EN                  0x40
+#define AXP152_IRQ2_EN                  0x41
+#define AXP152_IRQ3_EN                  0x42
+#define AXP152_IRQ1_STATE               0x48
+#define AXP152_IRQ2_STATE               0x49
+#define AXP152_IRQ3_STATE               0x4a
 #define AXP20X_IRQ1_EN                  0x40
 #define AXP20X_IRQ2_EN                  0x41
 #define AXP20X_IRQ3_EN                  0x42
@@ -127,6 +153,19 @@ enum {
 #define AXP22X_PWREN_CTRL2              0x8d
 /* GPIO */
+#define AXP152_GPIO0_CTRL               0x90
+#define AXP152_GPIO1_CTRL               0x91
+#define AXP152_GPIO2_CTRL               0x92
+#define AXP152_GPIO3_CTRL               0x93
+#define AXP152_LDOGPIO2_V_OUT           0x96
+#define AXP152_GPIO_INPUT               0x97
+#define AXP152_PWM0_FREQ_X              0x98
+#define AXP152_PWM0_FREQ_Y              0x99
+#define AXP152_PWM0_DUTY_CYCLE          0x9a
+#define AXP152_PWM1_FREQ_X              0x9b
+#define AXP152_PWM1_FREQ_Y              0x9c
+#define AXP152_PWM1_DUTY_CYCLE          0x9d
 #define AXP20X_GPIO0_CTRL               0x90
 #define AXP20X_LDO5_V_OUT               0x91
 #define AXP20X_GPIO1_CTRL               0x92
@@ -151,6 +190,12 @@ enum {
 #define AXP20X_CC_CTRL                  0xb8
 #define AXP20X_FG_RES                   0xb9
+/* OCV */
+#define AXP20X_RDC_H                    0xba
+#define AXP20X_RDC_L                    0xbb
+#define AXP20X_OCV(m)                   (0xc0 + (m))
+#define AXP20X_OCV_MAX                  0xf
 /* AXP22X specific registers */
 #define AXP22X_BATLOW_THRES1            0xe6
@@ -218,6 +263,26 @@ enum {
 /* IRQs */
 enum {
+        AXP152_IRQ_LDO0IN_CONNECT = 1,
+        AXP152_IRQ_LDO0IN_REMOVAL,
+        AXP152_IRQ_ALDO0IN_CONNECT,
+        AXP152_IRQ_ALDO0IN_REMOVAL,
+        AXP152_IRQ_DCDC1_V_LOW,
+        AXP152_IRQ_DCDC2_V_LOW,
+        AXP152_IRQ_DCDC3_V_LOW,
+        AXP152_IRQ_DCDC4_V_LOW,
+        AXP152_IRQ_PEK_SHORT,
+        AXP152_IRQ_PEK_LONG,
+        AXP152_IRQ_TIMER,
+        AXP152_IRQ_PEK_RIS_EDGE,
+        AXP152_IRQ_PEK_FAL_EDGE,
+        AXP152_IRQ_GPIO3_INPUT,
+        AXP152_IRQ_GPIO2_INPUT,
+        AXP152_IRQ_GPIO1_INPUT,
+        AXP152_IRQ_GPIO0_INPUT,
+};
+enum {
        AXP20X_IRQ_ACIN_OVER_V = 1,
        AXP20X_IRQ_ACIN_PLUGIN,
        AXP20X_IRQ_ACIN_REMOVAL,
diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h
new file mode 100644
index 000000000000..376ba84366a0
--- /dev/null
+++ b/include/linux/mfd/da9062/core.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015  Dialog Semiconductor Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MFD_DA9062_CORE_H__
+#define __MFD_DA9062_CORE_H__
+#include <linux/interrupt.h>
+#include <linux/mfd/da9062/registers.h>
+/* Interrupts */
+enum da9062_irqs {
+        /* IRQ A */
+        DA9062_IRQ_ONKEY,
+        DA9062_IRQ_ALARM,
+        DA9062_IRQ_TICK,
+        DA9062_IRQ_WDG_WARN,
+        DA9062_IRQ_SEQ_RDY,
+        /* IRQ B*/
+        DA9062_IRQ_TEMP,
+        DA9062_IRQ_LDO_LIM,
+        DA9062_IRQ_DVC_RDY,
+        DA9062_IRQ_VDD_WARN,
+        /* IRQ C */
+        DA9062_IRQ_GPI0,
+        DA9062_IRQ_GPI1,
+        DA9062_IRQ_GPI2,
+        DA9062_IRQ_GPI3,
+        DA9062_IRQ_GPI4,
+        DA9062_NUM_IRQ,
+};
+struct da9062 {
+        struct device *dev;
+        struct regmap *regmap;
+        struct regmap_irq_chip_data *regmap_irq;
+};
+#endif /* __MFD_DA9062_CORE_H__ */
diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9062/registers.h
new file mode 100644
index 000000000000..97790d1b02c5
--- /dev/null
+++ b/include/linux/mfd/da9062/registers.h
@@ -0,0 +1,1108 @@
+/*
+ * registers.h - REGISTERS H for DA9062
+ * Copyright (C) 2015  Dialog Semiconductor Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DA9062_H__
+#define __DA9062_H__
+#define DA9062_PMIC_DEVICE_ID           0x62
+#define DA9062_PMIC_VARIANT_MRC_AA      0x01
+#define DA9062_I2C_PAGE_SEL_SHIFT       1
+/*
+ * Registers
+ */
+#define DA9062AA_PAGE_CON               0x000
+#define DA9062AA_STATUS_A               0x001
+#define DA9062AA_STATUS_B               0x002
+#define DA9062AA_STATUS_D               0x004
+#define DA9062AA_FAULT_LOG              0x005
+#define DA9062AA_EVENT_A                0x006
+#define DA9062AA_EVENT_B                0x007
+#define DA9062AA_EVENT_C                0x008
+#define DA9062AA_IRQ_MASK_A             0x00A
+#define DA9062AA_IRQ_MASK_B             0x00B
+#define DA9062AA_IRQ_MASK_C             0x00C
+#define DA9062AA_CONTROL_A              0x00E
+#define DA9062AA_CONTROL_B              0x00F
+#define DA9062AA_CONTROL_C              0x010
+#define DA9062AA_CONTROL_D              0x011
+#define DA9062AA_CONTROL_E              0x012
+#define DA9062AA_CONTROL_F              0x013
+#define DA9062AA_PD_DIS                 0x014
+#define DA9062AA_GPIO_0_1               0x015
+#define DA9062AA_GPIO_2_3               0x016
+#define DA9062AA_GPIO_4                 0x017
+#define DA9062AA_GPIO_WKUP_MODE         0x01C
+#define DA9062AA_GPIO_MODE0_4           0x01D
+#define DA9062AA_GPIO_OUT0_2            0x01E
+#define DA9062AA_GPIO_OUT3_4            0x01F
+#define DA9062AA_BUCK2_CONT             0x020
+#define DA9062AA_BUCK1_CONT             0x021
+#define DA9062AA_BUCK4_CONT             0x022
+#define DA9062AA_BUCK3_CONT             0x024
+#define DA9062AA_LDO1_CONT              0x026
+#define DA9062AA_LDO2_CONT              0x027
+#define DA9062AA_LDO3_CONT              0x028
+#define DA9062AA_LDO4_CONT              0x029
+#define DA9062AA_DVC_1                  0x032
+#define DA9062AA_COUNT_S                0x040
+#define DA9062AA_COUNT_MI               0x041
+#define DA9062AA_COUNT_H                0x042
+#define DA9062AA_COUNT_D                0x043
+#define DA9062AA_COUNT_MO               0x044
+#define DA9062AA_COUNT_Y                0x045
+#define DA9062AA_ALARM_S                0x046
+#define DA9062AA_ALARM_MI               0x047
+#define DA9062AA_ALARM_H                0x048
+#define DA9062AA_ALARM_D                0x049
+#define DA9062AA_ALARM_MO               0x04A
+#define DA9062AA_ALARM_Y                0x04B
+#define DA9062AA_SECOND_A               0x04C
+#define DA9062AA_SECOND_B               0x04D
+#define DA9062AA_SECOND_C               0x04E
+#define DA9062AA_SECOND_D               0x04F
+#define DA9062AA_SEQ                    0x081
+#define DA9062AA_SEQ_TIMER              0x082
+#define DA9062AA_ID_2_1                 0x083
+#define DA9062AA_ID_4_3                 0x084
+#define DA9062AA_ID_12_11               0x088
+#define DA9062AA_ID_14_13               0x089
+#define DA9062AA_ID_16_15               0x08A
+#define DA9062AA_ID_22_21               0x08D
+#define DA9062AA_ID_24_23               0x08E
+#define DA9062AA_ID_26_25               0x08F
+#define DA9062AA_ID_28_27               0x090
+#define DA9062AA_ID_30_29               0x091
+#define DA9062AA_ID_32_31               0x092
+#define DA9062AA_SEQ_A                  0x095
+#define DA9062AA_SEQ_B                  0x096
+#define DA9062AA_WAIT                   0x097
+#define DA9062AA_EN_32K                 0x098
+#define DA9062AA_RESET                  0x099
+#define DA9062AA_BUCK_ILIM_A            0x09A
+#define DA9062AA_BUCK_ILIM_B            0x09B
+#define DA9062AA_BUCK_ILIM_C            0x09C
+#define DA9062AA_BUCK2_CFG              0x09D
+#define DA9062AA_BUCK1_CFG              0x09E
+#define DA9062AA_BUCK4_CFG              0x09F
+#define DA9062AA_BUCK3_CFG              0x0A0
+#define DA9062AA_VBUCK2_A               0x0A3
+#define DA9062AA_VBUCK1_A               0x0A4
+#define DA9062AA_VBUCK4_A               0x0A5
+#define DA9062AA_VBUCK3_A               0x0A7
+#define DA9062AA_VLDO1_A                0x0A9
+#define DA9062AA_VLDO2_A                0x0AA
+#define DA9062AA_VLDO3_A                0x0AB
+#define DA9062AA_VLDO4_A                0x0AC
+#define DA9062AA_VBUCK2_B               0x0B4
+#define DA9062AA_VBUCK1_B               0x0B5
+#define DA9062AA_VBUCK4_B               0x0B6
+#define DA9062AA_VBUCK3_B               0x0B8
+#define DA9062AA_VLDO1_B                0x0BA
+#define DA9062AA_VLDO2_B                0x0BB
+#define DA9062AA_VLDO3_B                0x0BC
+#define DA9062AA_VLDO4_B                0x0BD
+#define DA9062AA_BBAT_CONT              0x0C5
+#define DA9062AA_INTERFACE              0x105
+#define DA9062AA_CONFIG_A               0x106
+#define DA9062AA_CONFIG_B               0x107
+#define DA9062AA_CONFIG_C               0x108
+#define DA9062AA_CONFIG_D               0x109
+#define DA9062AA_CONFIG_E               0x10A
+#define DA9062AA_CONFIG_G               0x10C
+#define DA9062AA_CONFIG_H               0x10D
+#define DA9062AA_CONFIG_I               0x10E
+#define DA9062AA_CONFIG_J               0x10F
+#define DA9062AA_CONFIG_K               0x110
+#define DA9062AA_CONFIG_M               0x112
+#define DA9062AA_TRIM_CLDR              0x120
+#define DA9062AA_GP_ID_0                0x121
+#define DA9062AA_GP_ID_1                0x122
+#define DA9062AA_GP_ID_2                0x123
+#define DA9062AA_GP_ID_3                0x124
+#define DA9062AA_GP_ID_4                0x125
+#define DA9062AA_GP_ID_5                0x126
+#define DA9062AA_GP_ID_6                0x127
+#define DA9062AA_GP_ID_7                0x128
+#define DA9062AA_GP_ID_8                0x129
+#define DA9062AA_GP_ID_9                0x12A
+#define DA9062AA_GP_ID_10               0x12B
+#define DA9062AA_GP_ID_11               0x12C
+#define DA9062AA_GP_ID_12               0x12D
+#define DA9062AA_GP_ID_13               0x12E
+#define DA9062AA_GP_ID_14               0x12F
+#define DA9062AA_GP_ID_15               0x130
+#define DA9062AA_GP_ID_16               0x131
+#define DA9062AA_GP_ID_17               0x132
+#define DA9062AA_GP_ID_18               0x133
+#define DA9062AA_GP_ID_19               0x134
+#define DA9062AA_DEVICE_ID              0x181
+#define DA9062AA_VARIANT_ID             0x182
+#define DA9062AA_CUSTOMER_ID            0x183
+#define DA9062AA_CONFIG_ID              0x184
+/*
+ * Bit fields
+ */
+/* DA9062AA_PAGE_CON = 0x000 */
+#define DA9062AA_PAGE_SHIFT             0
+#define DA9062AA_PAGE_MASK              0x3f
+#define DA9062AA_WRITE_MODE_SHIFT       6
+#define DA9062AA_WRITE_MODE_MASK        BIT(6)
+#define DA9062AA_REVERT_SHIFT           7
+#define DA9062AA_REVERT_MASK            BIT(7)
+/* DA9062AA_STATUS_A = 0x001 */
+#define DA9062AA_NONKEY_SHIFT           0
+#define DA9062AA_NONKEY_MASK            0x01
+#define DA9062AA_DVC_BUSY_SHIFT         2
+#define DA9062AA_DVC_BUSY_MASK          BIT(2)
+/* DA9062AA_STATUS_B = 0x002 */
+#define DA9062AA_GPI0_SHIFT             0
+#define DA9062AA_GPI0_MASK              0x01
+#define DA9062AA_GPI1_SHIFT             1
+#define DA9062AA_GPI1_MASK              BIT(1)
+#define DA9062AA_GPI2_SHIFT             2
+#define DA9062AA_GPI2_MASK              BIT(2)
+#define DA9062AA_GPI3_SHIFT             3
+#define DA9062AA_GPI3_MASK              BIT(3)
+#define DA9062AA_GPI4_SHIFT             4
+#define DA9062AA_GPI4_MASK              BIT(4)
+/* DA9062AA_STATUS_D = 0x004 */
+#define DA9062AA_LDO1_ILIM_SHIFT        0
+#define DA9062AA_LDO1_ILIM_MASK         0x01
+#define DA9062AA_LDO2_ILIM_SHIFT        1
+#define DA9062AA_LDO2_ILIM_MASK         BIT(1)
+#define DA9062AA_LDO3_ILIM_SHIFT        2
+#define DA9062AA_LDO3_ILIM_MASK         BIT(2)
+#define DA9062AA_LDO4_ILIM_SHIFT        3
+#define DA9062AA_LDO4_ILIM_MASK         BIT(3)
+/* DA9062AA_FAULT_LOG = 0x005 */
+#define DA9062AA_TWD_ERROR_SHIFT        0
+#define DA9062AA_TWD_ERROR_MASK         0x01
+#define DA9062AA_POR_SHIFT              1
+#define DA9062AA_POR_MASK               BIT(1)
+#define DA9062AA_VDD_FAULT_SHIFT        2
+#define DA9062AA_VDD_FAULT_MASK         BIT(2)
+#define DA9062AA_VDD_START_SHIFT        3
+#define DA9062AA_VDD_START_MASK         BIT(3)
+#define DA9062AA_TEMP_CRIT_SHIFT        4
+#define DA9062AA_TEMP_CRIT_MASK         BIT(4)
+#define DA9062AA_KEY_RESET_SHIFT        5
+#define DA9062AA_KEY_RESET_MASK         BIT(5)
+#define DA9062AA_NSHUTDOWN_SHIFT        6
+#define DA9062AA_NSHUTDOWN_MASK         BIT(6)
+#define DA9062AA_WAIT_SHUT_SHIFT        7
+#define DA9062AA_WAIT_SHUT_MASK         BIT(7)
+/* DA9062AA_EVENT_A = 0x006 */
+#define DA9062AA_E_NONKEY_SHIFT         0
+#define DA9062AA_E_NONKEY_MASK          0x01
+#define DA9062AA_E_ALARM_SHIFT          1
+#define DA9062AA_E_ALARM_MASK           BIT(1)
+#define DA9062AA_E_TICK_SHIFT           2
+#define DA9062AA_E_TICK_MASK            BIT(2)
+#define DA9062AA_E_WDG_WARN_SHIFT       3
+#define DA9062AA_E_WDG_WARN_MASK        BIT(3)
+#define DA9062AA_E_SEQ_RDY_SHIFT        4
+#define DA9062AA_E_SEQ_RDY_MASK         BIT(4)
+#define DA9062AA_EVENTS_B_SHIFT         5
+#define DA9062AA_EVENTS_B_MASK          BIT(5)
+#define DA9062AA_EVENTS_C_SHIFT         6
+#define DA9062AA_EVENTS_C_MASK          BIT(6)
+/* DA9062AA_EVENT_B = 0x007 */
+#define DA9062AA_E_TEMP_SHIFT           1
+#define DA9062AA_E_TEMP_MASK            BIT(1)
+#define DA9062AA_E_LDO_LIM_SHIFT        3
+#define DA9062AA_E_LDO_LIM_MASK         BIT(3)
+#define DA9062AA_E_DVC_RDY_SHIFT        5
+#define DA9062AA_E_DVC_RDY_MASK         BIT(5)
+#define DA9062AA_E_VDD_WARN_SHIFT       7
+#define DA9062AA_E_VDD_WARN_MASK        BIT(7)
+/* DA9062AA_EVENT_C = 0x008 */
+#define DA9062AA_E_GPI0_SHIFT           0
+#define DA9062AA_E_GPI0_MASK            0x01
+#define DA9062AA_E_GPI1_SHIFT           1
+#define DA9062AA_E_GPI1_MASK            BIT(1)
+#define DA9062AA_E_GPI2_SHIFT           2
+#define DA9062AA_E_GPI2_MASK            BIT(2)
+#define DA9062AA_E_GPI3_SHIFT           3
+#define DA9062AA_E_GPI3_MASK            BIT(3)
+#define DA9062AA_E_GPI4_SHIFT           4
+#define DA9062AA_E_GPI4_MASK            BIT(4)
+/* DA9062AA_IRQ_MASK_A = 0x00A */
+#define DA9062AA_M_NONKEY_SHIFT         0
+#define DA9062AA_M_NONKEY_MASK          0x01
+#define DA9062AA_M_ALARM_SHIFT          1
+#define DA9062AA_M_ALARM_MASK           BIT(1)
+#define DA9062AA_M_TICK_SHIFT           2
+#define DA9062AA_M_TICK_MASK            BIT(2)
+#define DA9062AA_M_WDG_WARN_SHIFT       3
+#define DA9062AA_M_WDG_WARN_MASK        BIT(3)
+#define DA9062AA_M_SEQ_RDY_SHIFT        4
+#define DA9062AA_M_SEQ_RDY_MASK         BIT(4)
+/* DA9062AA_IRQ_MASK_B = 0x00B */
+#define DA9062AA_M_TEMP_SHIFT           1
+#define DA9062AA_M_TEMP_MASK            BIT(1)
+#define DA9062AA_M_LDO_LIM_SHIFT        3
+#define DA9062AA_M_LDO_LIM_MASK         BIT(3)
+#define DA9062AA_M_DVC_RDY_SHIFT        5
+#define DA9062AA_M_DVC_RDY_MASK         BIT(5)
+#define DA9062AA_M_VDD_WARN_SHIFT       7
+#define DA9062AA_M_VDD_WARN_MASK        BIT(7)
+/* DA9062AA_IRQ_MASK_C = 0x00C */
+#define DA9062AA_M_GPI0_SHIFT           0
+#define DA9062AA_M_GPI0_MASK            0x01
+#define DA9062AA_M_GPI1_SHIFT           1
+#define DA9062AA_M_GPI1_MASK            BIT(1)
+#define DA9062AA_M_GPI2_SHIFT           2
+#define DA9062AA_M_GPI2_MASK            BIT(2)
+#define DA9062AA_M_GPI3_SHIFT           3
+#define DA9062AA_M_GPI3_MASK            BIT(3)
+#define DA9062AA_M_GPI4_SHIFT           4
+#define DA9062AA_M_GPI4_MASK            BIT(4)
+/* DA9062AA_CONTROL_A = 0x00E */
+#define DA9062AA_SYSTEM_EN_SHIFT        0
+#define DA9062AA_SYSTEM_EN_MASK         0x01
+#define DA9062AA_POWER_EN_SHIFT         1
+#define DA9062AA_POWER_EN_MASK          BIT(1)
+#define DA9062AA_POWER1_EN_SHIFT        2
+#define DA9062AA_POWER1_EN_MASK         BIT(2)
+#define DA9062AA_STANDBY_SHIFT          3
+#define DA9062AA_STANDBY_MASK           BIT(3)
+#define DA9062AA_M_SYSTEM_EN_SHIFT      4
+#define DA9062AA_M_SYSTEM_EN_MASK       BIT(4)
+#define DA9062AA_M_POWER_EN_SHIFT       5
+#define DA9062AA_M_POWER_EN_MASK        BIT(5)
+#define DA9062AA_M_POWER1_EN_SHIFT      6
+#define DA9062AA_M_POWER1_EN_MASK       BIT(6)
+/* DA9062AA_CONTROL_B = 0x00F */
+#define DA9062AA_WATCHDOG_PD_SHIFT      1
+#define DA9062AA_WATCHDOG_PD_MASK       BIT(1)
+#define DA9062AA_FREEZE_EN_SHIFT        2
+#define DA9062AA_FREEZE_EN_MASK         BIT(2)
+#define DA9062AA_NRES_MODE_SHIFT        3
+#define DA9062AA_NRES_MODE_MASK         BIT(3)
+#define DA9062AA_NONKEY_LOCK_SHIFT      4
+#define DA9062AA_NONKEY_LOCK_MASK       BIT(4)
+#define DA9062AA_NFREEZE_SHIFT          5
+#define DA9062AA_NFREEZE_MASK           (0x03 << 5)
+#define DA9062AA_BUCK_SLOWSTART_SHIFT   7
+#define DA9062AA_BUCK_SLOWSTART_MASK    BIT(7)
+/* DA9062AA_CONTROL_C = 0x010 */
+#define DA9062AA_DEBOUNCING_SHIFT       0
+#define DA9062AA_DEBOUNCING_MASK        0x07
+#define DA9062AA_AUTO_BOOT_SHIFT        3
+#define DA9062AA_AUTO_BOOT_MASK         BIT(3)
+#define DA9062AA_OTPREAD_EN_SHIFT       4
+#define DA9062AA_OTPREAD_EN_MASK        BIT(4)
+#define DA9062AA_SLEW_RATE_SHIFT        5
+#define DA9062AA_SLEW_RATE_MASK         (0x03 << 5)
+#define DA9062AA_DEF_SUPPLY_SHIFT       7
+#define DA9062AA_DEF_SUPPLY_MASK        BIT(7)
+/* DA9062AA_CONTROL_D = 0x011 */
+#define DA9062AA_TWDSCALE_SHIFT         0
+#define DA9062AA_TWDSCALE_MASK          0x07
+/* DA9062AA_CONTROL_E = 0x012 */
+#define DA9062AA_RTC_MODE_PD_SHIFT      0
+#define DA9062AA_RTC_MODE_PD_MASK       0x01
+#define DA9062AA_RTC_MODE_SD_SHIFT      1
+#define DA9062AA_RTC_MODE_SD_MASK       BIT(1)
+#define DA9062AA_RTC_EN_SHIFT           2
+#define DA9062AA_RTC_EN_MASK            BIT(2)
+#define DA9062AA_V_LOCK_SHIFT           7
+#define DA9062AA_V_LOCK_MASK            BIT(7)
+/* DA9062AA_CONTROL_F = 0x013 */
+#define DA9062AA_WATCHDOG_SHIFT         0
+#define DA9062AA_WATCHDOG_MASK          0x01
+#define DA9062AA_SHUTDOWN_SHIFT         1
+#define DA9062AA_SHUTDOWN_MASK          BIT(1)
+#define DA9062AA_WAKE_UP_SHIFT          2
+#define DA9062AA_WAKE_UP_MASK           BIT(2)
+/* DA9062AA_PD_DIS = 0x014 */
+#define DA9062AA_GPI_DIS_SHIFT          0
+#define DA9062AA_GPI_DIS_MASK           0x01
+#define DA9062AA_PMIF_DIS_SHIFT         2
+#define DA9062AA_PMIF_DIS_MASK          BIT(2)
+#define DA9062AA_CLDR_PAUSE_SHIFT       4
+#define DA9062AA_CLDR_PAUSE_MASK        BIT(4)
+#define DA9062AA_BBAT_DIS_SHIFT         5
+#define DA9062AA_BBAT_DIS_MASK          BIT(5)
+#define DA9062AA_OUT32K_PAUSE_SHIFT     6
+#define DA9062AA_OUT32K_PAUSE_MASK      BIT(6)
+#define DA9062AA_PMCONT_DIS_SHIFT       7
+#define DA9062AA_PMCONT_DIS_MASK        BIT(7)
+/* DA9062AA_GPIO_0_1 = 0x015 */
+#define DA9062AA_GPIO0_PIN_SHIFT        0
+#define DA9062AA_GPIO0_PIN_MASK         0x03
+#define DA9062AA_GPIO0_TYPE_SHIFT       2
+#define DA9062AA_GPIO0_TYPE_MASK        BIT(2)
+#define DA9062AA_GPIO0_WEN_SHIFT        3
+#define DA9062AA_GPIO0_WEN_MASK         BIT(3)
+#define DA9062AA_GPIO1_PIN_SHIFT        4
+#define DA9062AA_GPIO1_PIN_MASK         (0x03 << 4)
+#define DA9062AA_GPIO1_TYPE_SHIFT       6
+#define DA9062AA_GPIO1_TYPE_MASK        BIT(6)
+#define DA9062AA_GPIO1_WEN_SHIFT        7
+#define DA9062AA_GPIO1_WEN_MASK         BIT(7)
+/* DA9062AA_GPIO_2_3 = 0x016 */
+#define DA9062AA_GPIO2_PIN_SHIFT        0
+#define DA9062AA_GPIO2_PIN_MASK         0x03
+#define DA9062AA_GPIO2_TYPE_SHIFT       2
+#define DA9062AA_GPIO2_TYPE_MASK        BIT(2)
+#define DA9062AA_GPIO2_WEN_SHIFT        3
+#define DA9062AA_GPIO2_WEN_MASK         BIT(3)
+#define DA9062AA_GPIO3_PIN_SHIFT        4
+#define DA9062AA_GPIO3_PIN_MASK         (0x03 << 4)
+#define DA9062AA_GPIO3_TYPE_SHIFT       6
+#define DA9062AA_GPIO3_TYPE_MASK        BIT(6)
+#define DA9062AA_GPIO3_WEN_SHIFT        7
+#define DA9062AA_GPIO3_WEN_MASK         BIT(7)
+/* DA9062AA_GPIO_4 = 0x017 */
+#define DA9062AA_GPIO4_PIN_SHIFT        0
+#define DA9062AA_GPIO4_PIN_MASK         0x03
+#define DA9062AA_GPIO4_TYPE_SHIFT       2
+#define DA9062AA_GPIO4_TYPE_MASK        BIT(2)
+#define DA9062AA_GPIO4_WEN_SHIFT        3
+#define DA9062AA_GPIO4_WEN_MASK         BIT(3)
+/* DA9062AA_GPIO_WKUP_MODE = 0x01C */
+#define DA9062AA_GPIO0_WKUP_MODE_SHIFT  0
+#define DA9062AA_GPIO0_WKUP_MODE_MASK   0x01
+#define DA9062AA_GPIO1_WKUP_MODE_SHIFT  1
+#define DA9062AA_GPIO1_WKUP_MODE_MASK   BIT(1)
+#define DA9062AA_GPIO2_WKUP_MODE_SHIFT  2
+#define DA9062AA_GPIO2_WKUP_MODE_MASK   BIT(2)
+#define DA9062AA_GPIO3_WKUP_MODE_SHIFT  3
+#define DA9062AA_GPIO3_WKUP_MODE_MASK   BIT(3)
+#define DA9062AA_GPIO4_WKUP_MODE_SHIFT  4
+#define DA9062AA_GPIO4_WKUP_MODE_MASK   BIT(4)
+/* DA9062AA_GPIO_MODE0_4 = 0x01D */
+#define DA9062AA_GPIO0_MODE_SHIFT       0
+#define DA9062AA_GPIO0_MODE_MASK        0x01
+#define DA9062AA_GPIO1_MODE_SHIFT       1
+#define DA9062AA_GPIO1_MODE_MASK        BIT(1)
+#define DA9062AA_GPIO2_MODE_SHIFT       2
+#define DA9062AA_GPIO2_MODE_MASK        BIT(2)
+#define DA9062AA_GPIO3_MODE_SHIFT       3
+#define DA9062AA_GPIO3_MODE_MASK        BIT(3)
+#define DA9062AA_GPIO4_MODE_SHIFT       4
+#define DA9062AA_GPIO4_MODE_MASK        BIT(4)
+/* DA9062AA_GPIO_OUT0_2 = 0x01E */
+#define DA9062AA_GPIO0_OUT_SHIFT        0
+#define DA9062AA_GPIO0_OUT_MASK         0x07
+#define DA9062AA_GPIO1_OUT_SHIFT        3
+#define DA9062AA_GPIO1_OUT_MASK         (0x07 << 3)
+#define DA9062AA_GPIO2_OUT_SHIFT        6
+#define DA9062AA_GPIO2_OUT_MASK         (0x03 << 6)
+/* DA9062AA_GPIO_OUT3_4 = 0x01F */
+#define DA9062AA_GPIO3_OUT_SHIFT        0
+#define DA9062AA_GPIO3_OUT_MASK         0x07
+#define DA9062AA_GPIO4_OUT_SHIFT        3
+#define DA9062AA_GPIO4_OUT_MASK         (0x03 << 3)
+/* DA9062AA_BUCK2_CONT = 0x020 */
+#define DA9062AA_BUCK2_EN_SHIFT         0
+#define DA9062AA_BUCK2_EN_MASK          0x01
+#define DA9062AA_BUCK2_GPI_SHIFT        1
+#define DA9062AA_BUCK2_GPI_MASK         (0x03 << 1)
+#define DA9062AA_BUCK2_CONF_SHIFT       3
+#define DA9062AA_BUCK2_CONF_MASK        BIT(3)
+#define DA9062AA_VBUCK2_GPI_SHIFT       5
+#define DA9062AA_VBUCK2_GPI_MASK        (0x03 << 5)
+/* DA9062AA_BUCK1_CONT = 0x021 */
+#define DA9062AA_BUCK1_EN_SHIFT         0
+#define DA9062AA_BUCK1_EN_MASK          0x01
+#define DA9062AA_BUCK1_GPI_SHIFT        1
+#define DA9062AA_BUCK1_GPI_MASK         (0x03 << 1)
+#define DA9062AA_BUCK1_CONF_SHIFT       3
+#define DA9062AA_BUCK1_CONF_MASK        BIT(3)
+#define DA9062AA_VBUCK1_GPI_SHIFT       5
+#define DA9062AA_VBUCK1_GPI_MASK        (0x03 << 5)
+/* DA9062AA_BUCK4_CONT = 0x022 */
+#define DA9062AA_BUCK4_EN_SHIFT         0
+#define DA9062AA_BUCK4_EN_MASK          0x01
+#define DA9062AA_BUCK4_GPI_SHIFT        1
+#define DA9062AA_BUCK4_GPI_MASK         (0x03 << 1)
+#define DA9062AA_BUCK4_CONF_SHIFT       3
+#define DA9062AA_BUCK4_CONF_MASK        BIT(3)
+#define DA9062AA_VBUCK4_GPI_SHIFT       5
+#define DA9062AA_VBUCK4_GPI_MASK        (0x03 << 5)
+/* DA9062AA_BUCK3_CONT = 0x024 */
+#define DA9062AA_BUCK3_EN_SHIFT         0
+#define DA9062AA_BUCK3_EN_MASK          0x01
+#define DA9062AA_BUCK3_GPI_SHIFT        1
+#define DA9062AA_BUCK3_GPI_MASK         (0x03 << 1)
+#define DA9062AA_BUCK3_CONF_SHIFT       3
+#define DA9062AA_BUCK3_CONF_MASK        BIT(3)
+#define DA9062AA_VBUCK3_GPI_SHIFT       5
+#define DA9062AA_VBUCK3_GPI_MASK        (0x03 << 5)
+/* DA9062AA_LDO1_CONT = 0x026 */
+#define DA9062AA_LDO1_EN_SHIFT          0
+#define DA9062AA_LDO1_EN_MASK           0x01
+#define DA9062AA_LDO1_GPI_SHIFT         1
+#define DA9062AA_LDO1_GPI_MASK          (0x03 << 1)
+#define DA9062AA_LDO1_PD_DIS_SHIFT      3
+#define DA9062AA_LDO1_PD_DIS_MASK       BIT(3)
+#define DA9062AA_VLDO1_GPI_SHIFT        5
+#define DA9062AA_VLDO1_GPI_MASK         (0x03 << 5)
+#define DA9062AA_LDO1_CONF_SHIFT        7
+#define DA9062AA_LDO1_CONF_MASK         BIT(7)
+/* DA9062AA_LDO2_CONT = 0x027 */
+#define DA9062AA_LDO2_EN_SHIFT          0
+#define DA9062AA_LDO2_EN_MASK           0x01
+#define DA9062AA_LDO2_GPI_SHIFT         1
+#define DA9062AA_LDO2_GPI_MASK          (0x03 << 1)
+#define DA9062AA_LDO2_PD_DIS_SHIFT      3
+#define DA9062AA_LDO2_PD_DIS_MASK       BIT(3)
+#define DA9062AA_VLDO2_GPI_SHIFT        5
+#define DA9062AA_VLDO2_GPI_MASK         (0x03 << 5)
+#define DA9062AA_LDO2_CONF_SHIFT        7
+#define DA9062AA_LDO2_CONF_MASK         BIT(7)
+/* DA9062AA_LDO3_CONT = 0x028 */
+#define DA9062AA_LDO3_EN_SHIFT          0
+#define DA9062AA_LDO3_EN_MASK           0x01
+#define DA9062AA_LDO3_GPI_SHIFT         1
+#define DA9062AA_LDO3_GPI_MASK          (0x03 << 1)
+#define DA9062AA_LDO3_PD_DIS_SHIFT      3
+#define DA9062AA_LDO3_PD_DIS_MASK       BIT(3)
+#define DA9062AA_VLDO3_GPI_SHIFT        5
+#define DA9062AA_VLDO3_GPI_MASK         (0x03 << 5)
+#define DA9062AA_LDO3_CONF_SHIFT        7
+#define DA9062AA_LDO3_CONF_MASK         BIT(7)
+/* DA9062AA_LDO4_CONT = 0x029 */
+#define DA9062AA_LDO4_EN_SHIFT          0
+#define DA9062AA_LDO4_EN_MASK           0x01
+#define DA9062AA_LDO4_GPI_SHIFT         1
+#define DA9062AA_LDO4_GPI_MASK          (0x03 << 1)
+#define DA9062AA_LDO4_PD_DIS_SHIFT      3
+#define DA9062AA_LDO4_PD_DIS_MASK       BIT(3)
+#define DA9062AA_VLDO4_GPI_SHIFT        5
+#define DA9062AA_VLDO4_GPI_MASK         (0x03 << 5)
+#define DA9062AA_LDO4_CONF_SHIFT        7
+#define DA9062AA_LDO4_CONF_MASK         BIT(7)
+/* DA9062AA_DVC_1 = 0x032 */
+#define DA9062AA_VBUCK1_SEL_SHIFT       0
+#define DA9062AA_VBUCK1_SEL_MASK        0x01
+#define DA9062AA_VBUCK2_SEL_SHIFT       1
+#define DA9062AA_VBUCK2_SEL_MASK        BIT(1)
+#define DA9062AA_VBUCK4_SEL_SHIFT       2
+#define DA9062AA_VBUCK4_SEL_MASK        BIT(2)
+#define DA9062AA_VBUCK3_SEL_SHIFT       3
+#define DA9062AA_VBUCK3_SEL_MASK        BIT(3)
+#define DA9062AA_VLDO1_SEL_SHIFT        4
+#define DA9062AA_VLDO1_SEL_MASK         BIT(4)
+#define DA9062AA_VLDO2_SEL_SHIFT        5
+#define DA9062AA_VLDO2_SEL_MASK         BIT(5)
+#define DA9062AA_VLDO3_SEL_SHIFT        6
+#define DA9062AA_VLDO3_SEL_MASK         BIT(6)
+#define DA9062AA_VLDO4_SEL_SHIFT        7
+#define DA9062AA_VLDO4_SEL_MASK         BIT(7)
+/* DA9062AA_COUNT_S = 0x040 */
+#define DA9062AA_COUNT_SEC_SHIFT        0
+#define DA9062AA_COUNT_SEC_MASK         0x3f
+#define DA9062AA_RTC_READ_SHIFT         7
+#define DA9062AA_RTC_READ_MASK          BIT(7)
+/* DA9062AA_COUNT_MI = 0x041 */
+#define DA9062AA_COUNT_MIN_SHIFT        0
+#define DA9062AA_COUNT_MIN_MASK         0x3f
+/* DA9062AA_COUNT_H = 0x042 */
+#define DA9062AA_COUNT_HOUR_SHIFT       0
+#define DA9062AA_COUNT_HOUR_MASK        0x1f
+/* DA9062AA_COUNT_D = 0x043 */
+#define DA9062AA_COUNT_DAY_SHIFT        0
+#define DA9062AA_COUNT_DAY_MASK         0x1f
+/* DA9062AA_COUNT_MO = 0x044 */
+#define DA9062AA_COUNT_MONTH_SHIFT      0
+#define DA9062AA_COUNT_MONTH_MASK       0x0f
+/* DA9062AA_COUNT_Y = 0x045 */
+#define DA9062AA_COUNT_YEAR_SHIFT       0
+#define DA9062AA_COUNT_YEAR_MASK        0x3f
+#define DA9062AA_MONITOR_SHIFT          6
+#define DA9062AA_MONITOR_MASK           BIT(6)
+/* DA9062AA_ALARM_S = 0x046 */
+#define DA9062AA_ALARM_SEC_SHIFT        0
+#define DA9062AA_ALARM_SEC_MASK         0x3f
+#define DA9062AA_ALARM_STATUS_SHIFT     6
+#define DA9062AA_ALARM_STATUS_MASK      (0x03 << 6)
+/* DA9062AA_ALARM_MI = 0x047 */
+#define DA9062AA_ALARM_MIN_SHIFT        0
+#define DA9062AA_ALARM_MIN_MASK         0x3f
+/* DA9062AA_ALARM_H = 0x048 */
+#define DA9062AA_ALARM_HOUR_SHIFT       0
+#define DA9062AA_ALARM_HOUR_MASK        0x1f
+/* DA9062AA_ALARM_D = 0x049 */
+#define DA9062AA_ALARM_DAY_SHIFT        0
+#define DA9062AA_ALARM_DAY_MASK         0x1f
+/* DA9062AA_ALARM_MO = 0x04A */
+#define DA9062AA_ALARM_MONTH_SHIFT      0
+#define DA9062AA_ALARM_MONTH_MASK       0x0f
+#define DA9062AA_TICK_TYPE_SHIFT        4
+#define DA9062AA_TICK_TYPE_MASK         BIT(4)
+#define DA9062AA_TICK_WAKE_SHIFT        5
+#define DA9062AA_TICK_WAKE_MASK         BIT(5)
+/* DA9062AA_ALARM_Y = 0x04B */
+#define DA9062AA_ALARM_YEAR_SHIFT       0
+#define DA9062AA_ALARM_YEAR_MASK        0x3f
+#define DA9062AA_ALARM_ON_SHIFT         6
+#define DA9062AA_ALARM_ON_MASK          BIT(6)
+#define DA9062AA_TICK_ON_SHIFT          7
+#define DA9062AA_TICK_ON_MASK           BIT(7)
+/* DA9062AA_SECOND_A = 0x04C */
+#define DA9062AA_SECONDS_A_SHIFT        0
+#define DA9062AA_SECONDS_A_MASK         0xff
+/* DA9062AA_SECOND_B = 0x04D */
+#define DA9062AA_SECONDS_B_SHIFT        0
+#define DA9062AA_SECONDS_B_MASK         0xff
+/* DA9062AA_SECOND_C = 0x04E */
+#define DA9062AA_SECONDS_C_SHIFT        0
+#define DA9062AA_SECONDS_C_MASK         0xff
+/* DA9062AA_SECOND_D = 0x04F */
+#define DA9062AA_SECONDS_D_SHIFT        0
+#define DA9062AA_SECONDS_D_MASK         0xff
+/* DA9062AA_SEQ = 0x081 */
+#define DA9062AA_SEQ_POINTER_SHIFT      0
+#define DA9062AA_SEQ_POINTER_MASK       0x0f
+#define DA9062AA_NXT_SEQ_START_SHIFT    4
+#define DA9062AA_NXT_SEQ_START_MASK     (0x0f << 4)
+/* DA9062AA_SEQ_TIMER = 0x082 */
+#define DA9062AA_SEQ_TIME_SHIFT         0
+#define DA9062AA_SEQ_TIME_MASK          0x0f
+#define DA9062AA_SEQ_DUMMY_SHIFT        4
+#define DA9062AA_SEQ_DUMMY_MASK         (0x0f << 4)
+/* DA9062AA_ID_2_1 = 0x083 */
+#define DA9062AA_LDO1_STEP_SHIFT        0
+#define DA9062AA_LDO1_STEP_MASK         0x0f
+#define DA9062AA_LDO2_STEP_SHIFT        4
+#define DA9062AA_LDO2_STEP_MASK         (0x0f << 4)
+/* DA9062AA_ID_4_3 = 0x084 */
+#define DA9062AA_LDO3_STEP_SHIFT        0
+#define DA9062AA_LDO3_STEP_MASK         0x0f
+#define DA9062AA_LDO4_STEP_SHIFT        4
+#define DA9062AA_LDO4_STEP_MASK         (0x0f << 4)
+/* DA9062AA_ID_12_11 = 0x088 */
+#define DA9062AA_PD_DIS_STEP_SHIFT      4
+#define DA9062AA_PD_DIS_STEP_MASK       (0x0f << 4)
+/* DA9062AA_ID_14_13 = 0x089 */
+#define DA9062AA_BUCK1_STEP_SHIFT       0
+#define DA9062AA_BUCK1_STEP_MASK        0x0f
+#define DA9062AA_BUCK2_STEP_SHIFT       4
+#define DA9062AA_BUCK2_STEP_MASK        (0x0f << 4)
+/* DA9062AA_ID_16_15 = 0x08A */
+#define DA9062AA_BUCK4_STEP_SHIFT       0
+#define DA9062AA_BUCK4_STEP_MASK        0x0f
+#define DA9062AA_BUCK3_STEP_SHIFT       4
+#define DA9062AA_BUCK3_STEP_MASK        (0x0f << 4)
+/* DA9062AA_ID_22_21 = 0x08D */
+#define DA9062AA_GP_RISE1_STEP_SHIFT    0
+#define DA9062AA_GP_RISE1_STEP_MASK     0x0f
+#define DA9062AA_GP_FALL1_STEP_SHIFT    4
+#define DA9062AA_GP_FALL1_STEP_MASK     (0x0f << 4)
+/* DA9062AA_ID_24_23 = 0x08E */
+#define DA9062AA_GP_RISE2_STEP_SHIFT    0
+#define DA9062AA_GP_RISE2_STEP_MASK     0x0f
+#define DA9062AA_GP_FALL2_STEP_SHIFT    4
+#define DA9062AA_GP_FALL2_STEP_MASK     (0x0f << 4)
+/* DA9062AA_ID_26_25 = 0x08F */
+#define DA9062AA_GP_RISE3_STEP_SHIFT    0
+#define DA9062AA_GP_RISE3_STEP_MASK     0x0f
+#define DA9062AA_GP_FALL3_STEP_SHIFT    4
+#define DA9062AA_GP_FALL3_STEP_MASK     (0x0f << 4)
+/* DA9062AA_ID_28_27 = 0x090 */
+#define DA9062AA_GP_RISE4_STEP_SHIFT    0
+#define DA9062AA_GP_RISE4_STEP_MASK     0x0f
+#define DA9062AA_GP_FALL4_STEP_SHIFT    4
+#define DA9062AA_GP_FALL4_STEP_MASK     (0x0f << 4)
+/* DA9062AA_ID_30_29 = 0x091 */
+#define DA9062AA_GP_RISE5_STEP_SHIFT    0
+#define DA9062AA_GP_RISE5_STEP_MASK     0x0f
+#define DA9062AA_GP_FALL5_STEP_SHIFT    4
+#define DA9062AA_GP_FALL5_STEP_MASK     (0x0f << 4)
+/* DA9062AA_ID_32_31 = 0x092 */
+#define DA9062AA_WAIT_STEP_SHIFT        0
+#define DA9062AA_WAIT_STEP_MASK         0x0f
+#define DA9062AA_EN32K_STEP_SHIFT       4
+#define DA9062AA_EN32K_STEP_MASK        (0x0f << 4)
+/* DA9062AA_SEQ_A = 0x095 */
+#define DA9062AA_SYSTEM_END_SHIFT       0
+#define DA9062AA_SYSTEM_END_MASK        0x0f
+#define DA9062AA_POWER_END_SHIFT        4
+#define DA9062AA_POWER_END_MASK         (0x0f << 4)
+/* DA9062AA_SEQ_B = 0x096 */
+#define DA9062AA_MAX_COUNT_SHIFT        0
+#define DA9062AA_MAX_COUNT_MASK         0x0f
+#define DA9062AA_PART_DOWN_SHIFT        4
+#define DA9062AA_PART_DOWN_MASK         (0x0f << 4)
+/* DA9062AA_WAIT = 0x097 */
+#define DA9062AA_WAIT_TIME_SHIFT        0
+#define DA9062AA_WAIT_TIME_MASK         0x0f
+#define DA9062AA_WAIT_MODE_SHIFT        4
+#define DA9062AA_WAIT_MODE_MASK         BIT(4)
+#define DA9062AA_TIME_OUT_SHIFT         5
+#define DA9062AA_TIME_OUT_MASK          BIT(5)
+#define DA9062AA_WAIT_DIR_SHIFT         6
+#define DA9062AA_WAIT_DIR_MASK          (0x03 << 6)
+/* DA9062AA_EN_32K = 0x098 */
+#define DA9062AA_STABILISATION_TIME_SHIFT       0
+#define DA9062AA_STABILISATION_TIME_MASK        0x07
+#define DA9062AA_CRYSTAL_SHIFT                  3
+#define DA9062AA_CRYSTAL_MASK                   BIT(3)
+#define DA9062AA_DELAY_MODE_SHIFT               4
+#define DA9062AA_DELAY_MODE_MASK                BIT(4)
+#define DA9062AA_OUT_CLOCK_SHIFT                5
+#define DA9062AA_OUT_CLOCK_MASK                 BIT(5)
+#define DA9062AA_RTC_CLOCK_SHIFT                6
+#define DA9062AA_RTC_CLOCK_MASK                 BIT(6)
+#define DA9062AA_EN_32KOUT_SHIFT                7
+#define DA9062AA_EN_32KOUT_MASK                 BIT(7)
+/* DA9062AA_RESET = 0x099 */
+#define DA9062AA_RESET_TIMER_SHIFT      0
+#define DA9062AA_RESET_TIMER_MASK       0x3f
+#define DA9062AA_RESET_EVENT_SHIFT      6
+#define DA9062AA_RESET_EVENT_MASK       (0x03 << 6)
+/* DA9062AA_BUCK_ILIM_A = 0x09A */
+#define DA9062AA_BUCK3_ILIM_SHIFT       0
+#define DA9062AA_BUCK3_ILIM_MASK        0x0f
+/* DA9062AA_BUCK_ILIM_B = 0x09B */
+#define DA9062AA_BUCK4_ILIM_SHIFT       0
+#define DA9062AA_BUCK4_ILIM_MASK        0x0f
+/* DA9062AA_BUCK_ILIM_C = 0x09C */
+#define DA9062AA_BUCK1_ILIM_SHIFT       0
+#define DA9062AA_BUCK1_ILIM_MASK        0x0f
+#define DA9062AA_BUCK2_ILIM_SHIFT       4
+#define DA9062AA_BUCK2_ILIM_MASK        (0x0f << 4)
+/* DA9062AA_BUCK2_CFG = 0x09D */
+#define DA9062AA_BUCK2_PD_DIS_SHIFT     5
+#define DA9062AA_BUCK2_PD_DIS_MASK      BIT(5)
+#define DA9062AA_BUCK2_MODE_SHIFT       6
+#define DA9062AA_BUCK2_MODE_MASK        (0x03 << 6)
+/* DA9062AA_BUCK1_CFG = 0x09E */
+#define DA9062AA_BUCK1_PD_DIS_SHIFT     5
+#define DA9062AA_BUCK1_PD_DIS_MASK      BIT(5)
+#define DA9062AA_BUCK1_MODE_SHIFT       6
+#define DA9062AA_BUCK1_MODE_MASK        (0x03 << 6)
+/* DA9062AA_BUCK4_CFG = 0x09F */
+#define DA9062AA_BUCK4_VTTR_EN_SHIFT    3
+#define DA9062AA_BUCK4_VTTR_EN_MASK     BIT(3)
+#define DA9062AA_BUCK4_VTT_EN_SHIFT     4
+#define DA9062AA_BUCK4_VTT_EN_MASK      BIT(4)
+#define DA9062AA_BUCK4_PD_DIS_SHIFT     5
+#define DA9062AA_BUCK4_PD_DIS_MASK      BIT(5)
+#define DA9062AA_BUCK4_MODE_SHIFT       6
+#define DA9062AA_BUCK4_MODE_MASK        (0x03 << 6)
+/* DA9062AA_BUCK3_CFG = 0x0A0 */
+#define DA9062AA_BUCK3_PD_DIS_SHIFT     5
+#define DA9062AA_BUCK3_PD_DIS_MASK      BIT(5)
+#define DA9062AA_BUCK3_MODE_SHIFT       6
+#define DA9062AA_BUCK3_MODE_MASK        (0x03 << 6)
+/* DA9062AA_VBUCK2_A = 0x0A3 */
+#define DA9062AA_VBUCK2_A_SHIFT         0
+#define DA9062AA_VBUCK2_A_MASK          0x7f
+#define DA9062AA_BUCK2_SL_A_SHIFT       7
+#define DA9062AA_BUCK2_SL_A_MASK        BIT(7)
+/* DA9062AA_VBUCK1_A = 0x0A4 */
+#define DA9062AA_VBUCK1_A_SHIFT         0
+#define DA9062AA_VBUCK1_A_MASK          0x7f
+#define DA9062AA_BUCK1_SL_A_SHIFT       7
+#define DA9062AA_BUCK1_SL_A_MASK        BIT(7)
+/* DA9062AA_VBUCK4_A = 0x0A5 */
+#define DA9062AA_VBUCK4_A_SHIFT         0
+#define DA9062AA_VBUCK4_A_MASK          0x7f
+#define DA9062AA_BUCK4_SL_A_SHIFT       7
+#define DA9062AA_BUCK4_SL_A_MASK        BIT(7)
+/* DA9062AA_VBUCK3_A = 0x0A7 */
+#define DA9062AA_VBUCK3_A_SHIFT         0
+#define DA9062AA_VBUCK3_A_MASK          0x7f
+#define DA9062AA_BUCK3_SL_A_SHIFT       7
+#define DA9062AA_BUCK3_SL_A_MASK        BIT(7)
+/* DA9062AA_VLDO1_A = 0x0A9 */
+#define DA9062AA_VLDO1_A_SHIFT          0
+#define DA9062AA_VLDO1_A_MASK           0x3f
+#define DA9062AA_LDO1_SL_A_SHIFT        7
+#define DA9062AA_LDO1_SL_A_MASK         BIT(7)
+/* DA9062AA_VLDO2_A = 0x0AA */
+#define DA9062AA_VLDO2_A_SHIFT          0
+#define DA9062AA_VLDO2_A_MASK           0x3f
+#define DA9062AA_LDO2_SL_A_SHIFT        7
+#define DA9062AA_LDO2_SL_A_MASK         BIT(7)
+/* DA9062AA_VLDO3_A = 0x0AB */
+#define DA9062AA_VLDO3_A_SHIFT          0
+#define DA9062AA_VLDO3_A_MASK           0x3f
+#define DA9062AA_LDO3_SL_A_SHIFT        7
+#define DA9062AA_LDO3_SL_A_MASK         BIT(7)
+/* DA9062AA_VLDO4_A = 0x0AC */
+#define DA9062AA_VLDO4_A_SHIFT          0
+#define DA9062AA_VLDO4_A_MASK           0x3f
+#define DA9062AA_LDO4_SL_A_SHIFT        7
+#define DA9062AA_LDO4_SL_A_MASK         BIT(7)
+/* DA9062AA_VBUCK2_B = 0x0B4 */
+#define DA9062AA_VBUCK2_B_SHIFT         0
+#define DA9062AA_VBUCK2_B_MASK          0x7f
+#define DA9062AA_BUCK2_SL_B_SHIFT       7
+#define DA9062AA_BUCK2_SL_B_MASK        BIT(7)
+/* DA9062AA_VBUCK1_B = 0x0B5 */
+#define DA9062AA_VBUCK1_B_SHIFT         0
+#define DA9062AA_VBUCK1_B_MASK          0x7f
+#define DA9062AA_BUCK1_SL_B_SHIFT       7
+#define DA9062AA_BUCK1_SL_B_MASK        BIT(7)
+/* DA9062AA_VBUCK4_B = 0x0B6 */
+#define DA9062AA_VBUCK4_B_SHIFT         0
+#define DA9062AA_VBUCK4_B_MASK          0x7f
+#define DA9062AA_BUCK4_SL_B_SHIFT       7
+#define DA9062AA_BUCK4_SL_B_MASK        BIT(7)
+/* DA9062AA_VBUCK3_B = 0x0B8 */
+#define DA9062AA_VBUCK3_B_SHIFT         0
+#define DA9062AA_VBUCK3_B_MASK          0x7f
+#define DA9062AA_BUCK3_SL_B_SHIFT       7
+#define DA9062AA_BUCK3_SL_B_MASK        BIT(7)
+/* DA9062AA_VLDO1_B = 0x0BA */
+#define DA9062AA_VLDO1_B_SHIFT          0
+#define DA9062AA_VLDO1_B_MASK           0x3f
+#define DA9062AA_LDO1_SL_B_SHIFT        7
+#define DA9062AA_LDO1_SL_B_MASK         BIT(7)
+/* DA9062AA_VLDO2_B = 0x0BB */
+#define DA9062AA_VLDO2_B_SHIFT          0
+#define DA9062AA_VLDO2_B_MASK           0x3f
+#define DA9062AA_LDO2_SL_B_SHIFT        7
+#define DA9062AA_LDO2_SL_B_MASK         BIT(7)
+/* DA9062AA_VLDO3_B = 0x0BC */
+#define DA9062AA_VLDO3_B_SHIFT          0
+#define DA9062AA_VLDO3_B_MASK           0x3f
+#define DA9062AA_LDO3_SL_B_SHIFT        7
+#define DA9062AA_LDO3_SL_B_MASK         BIT(7)
+/* DA9062AA_VLDO4_B = 0x0BD */
+#define DA9062AA_VLDO4_B_SHIFT          0
+#define DA9062AA_VLDO4_B_MASK           0x3f
+#define DA9062AA_LDO4_SL_B_SHIFT        7
+#define DA9062AA_LDO4_SL_B_MASK         BIT(7)
+/* DA9062AA_BBAT_CONT = 0x0C5 */
+#define DA9062AA_BCHG_VSET_SHIFT        0
+#define DA9062AA_BCHG_VSET_MASK         0x0f
+#define DA9062AA_BCHG_ISET_SHIFT        4
+#define DA9062AA_BCHG_ISET_MASK         (0x0f << 4)
+/* DA9062AA_INTERFACE = 0x105 */
+#define DA9062AA_IF_BASE_ADDR_SHIFT     4
+#define DA9062AA_IF_BASE_ADDR_MASK      (0x0f << 4)
+/* DA9062AA_CONFIG_A = 0x106 */
+#define DA9062AA_PM_I_V_SHIFT           0
+#define DA9062AA_PM_I_V_MASK            0x01
+#define DA9062AA_PM_O_TYPE_SHIFT        2
+#define DA9062AA_PM_O_TYPE_MASK         BIT(2)
+#define DA9062AA_IRQ_TYPE_SHIFT         3
+#define DA9062AA_IRQ_TYPE_MASK          BIT(3)
+#define DA9062AA_PM_IF_V_SHIFT          4
+#define DA9062AA_PM_IF_V_MASK           BIT(4)
+#define DA9062AA_PM_IF_FMP_SHIFT        5
+#define DA9062AA_PM_IF_FMP_MASK         BIT(5)
+#define DA9062AA_PM_IF_HSM_SHIFT        6
+#define DA9062AA_PM_IF_HSM_MASK         BIT(6)
+/* DA9062AA_CONFIG_B = 0x107 */
+#define DA9062AA_VDD_FAULT_ADJ_SHIFT    0
+#define DA9062AA_VDD_FAULT_ADJ_MASK     0x0f
+#define DA9062AA_VDD_HYST_ADJ_SHIFT     4
+#define DA9062AA_VDD_HYST_ADJ_MASK      (0x07 << 4)
+/* DA9062AA_CONFIG_C = 0x108 */
+#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT        2
+#define DA9062AA_BUCK_ACTV_DISCHRG_MASK         BIT(2)
+#define DA9062AA_BUCK1_CLK_INV_SHIFT            3
+#define DA9062AA_BUCK1_CLK_INV_MASK             BIT(3)
+#define DA9062AA_BUCK4_CLK_INV_SHIFT            4
+#define DA9062AA_BUCK4_CLK_INV_MASK             BIT(4)
+#define DA9062AA_BUCK3_CLK_INV_SHIFT            6
+#define DA9062AA_BUCK3_CLK_INV_MASK             BIT(6)
+/* DA9062AA_CONFIG_D = 0x109 */
+#define DA9062AA_GPI_V_SHIFT            0
+#define DA9062AA_GPI_V_MASK             0x01
+#define DA9062AA_NIRQ_MODE_SHIFT        1
+#define DA9062AA_NIRQ_MODE_MASK         BIT(1)
+#define DA9062AA_SYSTEM_EN_RD_SHIFT     2
+#define DA9062AA_SYSTEM_EN_RD_MASK      BIT(2)
+#define DA9062AA_FORCE_RESET_SHIFT      5
+#define DA9062AA_FORCE_RESET_MASK       BIT(5)
+/* DA9062AA_CONFIG_E = 0x10A */
+#define DA9062AA_BUCK1_AUTO_SHIFT       0
+#define DA9062AA_BUCK1_AUTO_MASK        0x01
+#define DA9062AA_BUCK2_AUTO_SHIFT       1
+#define DA9062AA_BUCK2_AUTO_MASK        BIT(1)
+#define DA9062AA_BUCK4_AUTO_SHIFT       2
+#define DA9062AA_BUCK4_AUTO_MASK        BIT(2)
+#define DA9062AA_BUCK3_AUTO_SHIFT       4
+#define DA9062AA_BUCK3_AUTO_MASK        BIT(4)
+/* DA9062AA_CONFIG_G = 0x10C */
+#define DA9062AA_LDO1_AUTO_SHIFT        0
+#define DA9062AA_LDO1_AUTO_MASK         0x01
+#define DA9062AA_LDO2_AUTO_SHIFT        1
+#define DA9062AA_LDO2_AUTO_MASK         BIT(1)
+#define DA9062AA_LDO3_AUTO_SHIFT        2
+#define DA9062AA_LDO3_AUTO_MASK         BIT(2)
+#define DA9062AA_LDO4_AUTO_SHIFT        3
+#define DA9062AA_LDO4_AUTO_MASK         BIT(3)
+/* DA9062AA_CONFIG_H = 0x10D */
+#define DA9062AA_BUCK1_2_MERGE_SHIFT    3
+#define DA9062AA_BUCK1_2_MERGE_MASK     BIT(3)
+#define DA9062AA_BUCK2_OD_SHIFT         5
+#define DA9062AA_BUCK2_OD_MASK          BIT(5)
+#define DA9062AA_BUCK1_OD_SHIFT         6
+#define DA9062AA_BUCK1_OD_MASK          BIT(6)
+/* DA9062AA_CONFIG_I = 0x10E */
+#define DA9062AA_NONKEY_PIN_SHIFT       0
+#define DA9062AA_NONKEY_PIN_MASK        0x03
+#define DA9062AA_nONKEY_SD_SHIFT        2
+#define DA9062AA_nONKEY_SD_MASK         BIT(2)
+#define DA9062AA_WATCHDOG_SD_SHIFT      3
+#define DA9062AA_WATCHDOG_SD_MASK       BIT(3)
+#define DA9062AA_KEY_SD_MODE_SHIFT      4
+#define DA9062AA_KEY_SD_MODE_MASK       BIT(4)
+#define DA9062AA_HOST_SD_MODE_SHIFT     5
+#define DA9062AA_HOST_SD_MODE_MASK      BIT(5)
+#define DA9062AA_INT_SD_MODE_SHIFT      6
+#define DA9062AA_INT_SD_MODE_MASK       BIT(6)
+#define DA9062AA_LDO_SD_SHIFT           7
+#define DA9062AA_LDO_SD_MASK            BIT(7)
+/* DA9062AA_CONFIG_J = 0x10F */
+#define DA9062AA_KEY_DELAY_SHIFT        0
+#define DA9062AA_KEY_DELAY_MASK         0x03
+#define DA9062AA_SHUT_DELAY_SHIFT       2
+#define DA9062AA_SHUT_DELAY_MASK        (0x03 << 2)
+#define DA9062AA_RESET_DURATION_SHIFT   4
+#define DA9062AA_RESET_DURATION_MASK    (0x03 << 4)
+#define DA9062AA_TWOWIRE_TO_SHIFT       6
+#define DA9062AA_TWOWIRE_TO_MASK        BIT(6)
+#define DA9062AA_IF_RESET_SHIFT         7
+#define DA9062AA_IF_RESET_MASK          BIT(7)
+/* DA9062AA_CONFIG_K = 0x110 */
+#define DA9062AA_GPIO0_PUPD_SHIFT       0
+#define DA9062AA_GPIO0_PUPD_MASK        0x01
+#define DA9062AA_GPIO1_PUPD_SHIFT       1
+#define DA9062AA_GPIO1_PUPD_MASK        BIT(1)
+#define DA9062AA_GPIO2_PUPD_SHIFT       2
+#define DA9062AA_GPIO2_PUPD_MASK        BIT(2)
+#define DA9062AA_GPIO3_PUPD_SHIFT       3
+#define DA9062AA_GPIO3_PUPD_MASK        BIT(3)
+#define DA9062AA_GPIO4_PUPD_SHIFT       4
+#define DA9062AA_GPIO4_PUPD_MASK        BIT(4)
+/* DA9062AA_CONFIG_M = 0x112 */
+#define DA9062AA_NSHUTDOWN_PU_SHIFT     1
+#define DA9062AA_NSHUTDOWN_PU_MASK      BIT(1)
+#define DA9062AA_WDG_MODE_SHIFT         3
+#define DA9062AA_WDG_MODE_MASK          BIT(3)
+#define DA9062AA_OSC_FRQ_SHIFT          4
+#define DA9062AA_OSC_FRQ_MASK           (0x0f << 4)
+/* DA9062AA_TRIM_CLDR = 0x120 */
+#define DA9062AA_TRIM_CLDR_SHIFT        0
+#define DA9062AA_TRIM_CLDR_MASK         0xff
+/* DA9062AA_GP_ID_0 = 0x121 */
+#define DA9062AA_GP_0_SHIFT             0
+#define DA9062AA_GP_0_MASK              0xff
+/* DA9062AA_GP_ID_1 = 0x122 */
+#define DA9062AA_GP_1_SHIFT             0
+#define DA9062AA_GP_1_MASK              0xff
+/* DA9062AA_GP_ID_2 = 0x123 */
+#define DA9062AA_GP_2_SHIFT             0
+#define DA9062AA_GP_2_MASK              0xff
+/* DA9062AA_GP_ID_3 = 0x124 */
+#define DA9062AA_GP_3_SHIFT             0
+#define DA9062AA_GP_3_MASK              0xff
+/* DA9062AA_GP_ID_4 = 0x125 */
+#define DA9062AA_GP_4_SHIFT             0
+#define DA9062AA_GP_4_MASK              0xff
+/* DA9062AA_GP_ID_5 = 0x126 */
+#define DA9062AA_GP_5_SHIFT             0
+#define DA9062AA_GP_5_MASK              0xff
+/* DA9062AA_GP_ID_6 = 0x127 */
+#define DA9062AA_GP_6_SHIFT             0
+#define DA9062AA_GP_6_MASK              0xff
+/* DA9062AA_GP_ID_7 = 0x128 */
+#define DA9062AA_GP_7_SHIFT             0
+#define DA9062AA_GP_7_MASK              0xff
+/* DA9062AA_GP_ID_8 = 0x129 */
+#define DA9062AA_GP_8_SHIFT             0
+#define DA9062AA_GP_8_MASK              0xff
+/* DA9062AA_GP_ID_9 = 0x12A */
+#define DA9062AA_GP_9_SHIFT             0
+#define DA9062AA_GP_9_MASK              0xff
+/* DA9062AA_GP_ID_10 = 0x12B */
+#define DA9062AA_GP_10_SHIFT            0
+#define DA9062AA_GP_10_MASK             0xff
+/* DA9062AA_GP_ID_11 = 0x12C */
+#define DA9062AA_GP_11_SHIFT            0
+#define DA9062AA_GP_11_MASK             0xff
+/* DA9062AA_GP_ID_12 = 0x12D */
+#define DA9062AA_GP_12_SHIFT            0
+#define DA9062AA_GP_12_MASK             0xff
+/* DA9062AA_GP_ID_13 = 0x12E */
+#define DA9062AA_GP_13_SHIFT            0
+#define DA9062AA_GP_13_MASK             0xff
+/* DA9062AA_GP_ID_14 = 0x12F */
+#define DA9062AA_GP_14_SHIFT            0
+#define DA9062AA_GP_14_MASK             0xff
+/* DA9062AA_GP_ID_15 = 0x130 */
+#define DA9062AA_GP_15_SHIFT            0
+#define DA9062AA_GP_15_MASK             0xff
+/* DA9062AA_GP_ID_16 = 0x131 */
+#define DA9062AA_GP_16_SHIFT            0
+#define DA9062AA_GP_16_MASK             0xff
+/* DA9062AA_GP_ID_17 = 0x132 */
+#define DA9062AA_GP_17_SHIFT            0
+#define DA9062AA_GP_17_MASK             0xff
+/* DA9062AA_GP_ID_18 = 0x133 */
+#define DA9062AA_GP_18_SHIFT            0
+#define DA9062AA_GP_18_MASK             0xff
+/* DA9062AA_GP_ID_19 = 0x134 */
+#define DA9062AA_GP_19_SHIFT            0
+#define DA9062AA_GP_19_MASK             0xff
+/* DA9062AA_DEVICE_ID = 0x181 */
+#define DA9062AA_DEV_ID_SHIFT           0
+#define DA9062AA_DEV_ID_MASK            0xff
+/* DA9062AA_VARIANT_ID = 0x182 */
+#define DA9062AA_VRC_SHIFT              0
+#define DA9062AA_VRC_MASK               0x0f
+#define DA9062AA_MRC_SHIFT              4
+#define DA9062AA_MRC_MASK               (0x0f << 4)
+/* DA9062AA_CUSTOMER_ID = 0x183 */
+#define DA9062AA_CUST_ID_SHIFT          0
+#define DA9062AA_CUST_ID_MASK           0xff
+/* DA9062AA_CONFIG_ID = 0x184 */
+#define DA9062AA_CONFIG_REV_SHIFT       0
+#define DA9062AA_CONFIG_REV_MASK        0xff
+#endif /* __DA9062_H__ */
diff --git a/include/linux/mfd/da9063/core.h b/include/linux/mfd/da9063/core.h
index 79f4d822ba13..621af82123c6 100644
--- a/include/linux/mfd/da9063/core.h
+++ b/include/linux/mfd/da9063/core.h
@@ -51,6 +51,7 @@ enum da9063_irqs {
        DA9063_IRQ_COMP_1V2,
        DA9063_IRQ_LDO_LIM,
        DA9063_IRQ_REG_UVOV,
+        DA9063_IRQ_DVC_RDY,
        DA9063_IRQ_VDD_MON,
        DA9063_IRQ_WARN,
        DA9063_IRQ_GPI0,
diff --git a/include/linux/mfd/lpc_ich.h b/include/linux/mfd/lpc_ich.h
index 8feac782fa83..2b300b44f994 100644
--- a/include/linux/mfd/lpc_ich.h
+++ b/include/linux/mfd/lpc_ich.h
@@ -20,12 +20,6 @@
 #ifndef LPC_ICH_H
 #define LPC_ICH_H
-/* Watchdog resources */
-#define ICH_RES_IO_TCO          0
-#define ICH_RES_IO_SMI          1
-#define ICH_RES_MEM_OFF         2
-#define ICH_RES_MEM_GCS_PMC     0
 /* GPIO resources */
 #define ICH_RES_GPIO    0
 #define ICH_RES_GPE0    1
diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
index cf5265b0d1c1..45b8e8aa1fbf 100644
--- a/include/linux/mfd/mt6397/core.h
+++ b/include/linux/mfd/mt6397/core.h
@@ -57,6 +57,7 @@ struct mt6397_chip {
        int irq;
        struct irq_domain *irq_domain;
        struct mutex irqlock;
+        u16 wake_mask[2];
        u16 irq_masks_cur[2];
        u16 irq_masks_cache[2];
 };
diff --git a/include/linux/platform_data/itco_wdt.h b/include/linux/platform_data/itco_wdt.h
new file mode 100644
index 000000000000..f16542c77ff7
--- /dev/null
+++ b/include/linux/platform_data/itco_wdt.h
@@ -0,0 +1,19 @@
+/*
+ * Platform data for the Intel TCO Watchdog
+ */
+#ifndef _ITCO_WDT_H_
+#define _ITCO_WDT_H_
+/* Watchdog resources */
+#define ICH_RES_IO_TCO          0
+#define ICH_RES_IO_SMI          1
+#define ICH_RES_MEM_OFF         2
+#define ICH_RES_MEM_GCS_PMC     0
+struct itco_wdt_platform_data {
+        char name[32];
+        unsigned int version;
+};
+#endif /* _ITCO_WDT_H_ */
author	Linus Torvalds <torvalds@linux-foundation.org>	2015-09-04 14:35:03 -0400
committer	Linus Torvalds <torvalds@linux-foundation.org>	2015-09-04 14:35:03 -0400
commit	8bd8fd0a29bfd5ad8e1976edd8c4c40cdb39aa4f (patch)
tree	1d7b2e30083194cc4223d9b150583fc2924bd032
parent	352712274507645b6f82b8763977ad87321919a3 (diff)
parent	5a688c455066c21c133bc8ffa7b11f8c66b7fe0b (diff)