diff options
author | YueHaibing <yuehaibing@huawei.com> | 2019-08-16 09:55:23 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2019-09-06 13:26:58 -0400 |
commit | 8863a5bf689adbf676702cd291f53a86f5a4e1ad (patch) | |
tree | 3cdaeafdebe5cf316718c709ffad25e2e0608146 | |
parent | e03a47deaff424976fe9f6e1f1550f321a6dda75 (diff) |
clk: st: clkgen-pll: remove unused variable 'st_pll3200c32_407_a0'
drivers/clk/st/clkgen-pll.c:64:37: warning:
st_pll3200c32_407_a0 defined but not used [-Wunused-const-variable=]
It is never used, so can be removed.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lkml.kernel.org/r/20190816135523.73520-1-yuehaibing@huawei.com
Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | drivers/clk/st/clkgen-pll.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index d8a688bd45ec..c3952f2c42ba 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c | |||
@@ -61,19 +61,6 @@ static const struct clk_ops stm_pll3200c32_ops; | |||
61 | static const struct clk_ops stm_pll3200c32_a9_ops; | 61 | static const struct clk_ops stm_pll3200c32_a9_ops; |
62 | static const struct clk_ops stm_pll4600c28_ops; | 62 | static const struct clk_ops stm_pll4600c28_ops; |
63 | 63 | ||
64 | static const struct clkgen_pll_data st_pll3200c32_407_a0 = { | ||
65 | /* 407 A0 */ | ||
66 | .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8), | ||
67 | .pdn_ctrl = CLKGEN_FIELD(0x2a0, 0x1, 8), | ||
68 | .locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24), | ||
69 | .ndiv = CLKGEN_FIELD(0x2a4, C32_NDIV_MASK, 16), | ||
70 | .idf = CLKGEN_FIELD(0x2a4, C32_IDF_MASK, 0x0), | ||
71 | .num_odfs = 1, | ||
72 | .odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) }, | ||
73 | .odf_gate = { CLKGEN_FIELD(0x2b4, 0x1, 6) }, | ||
74 | .ops = &stm_pll3200c32_ops, | ||
75 | }; | ||
76 | |||
77 | static const struct clkgen_pll_data st_pll3200c32_cx_0 = { | 64 | static const struct clkgen_pll_data st_pll3200c32_cx_0 = { |
78 | /* 407 C0 PLL0 */ | 65 | /* 407 C0 PLL0 */ |
79 | .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8), | 66 | .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8), |