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authorFinn Thain <fthain@telegraphics.com.au>2016-03-23 06:10:19 -0400
committerMartin K. Petersen <martin.petersen@oracle.com>2016-04-11 16:57:09 -0400
commit8053b0ee79c0129e827ce8f222398ff4b332dfd7 (patch)
tree31133745a821dfe3d6060cc2a8c27294d51fff89
parent438af51c642926f1c1844846bee1c3fb568dcd64 (diff)
ncr5380: Merge DMA implementation from atari_NCR5380 core driver
Adopt the DMA implementation from atari_NCR5380.c. This means that atari_scsi and sun3_scsi can make use of the NCR5380.c core driver and the atari_NCR5380.c driver fork can be made redundant. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Tested-by: Michael Schmitz <schmitzmic@gmail.com> Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/NCR5380.c170
-rw-r--r--drivers/scsi/arm/cumana_1.c3
-rw-r--r--drivers/scsi/arm/oak.c3
-rw-r--r--drivers/scsi/dmx3191d.c1
-rw-r--r--drivers/scsi/dtc.c2
-rw-r--r--drivers/scsi/dtc.h1
-rw-r--r--drivers/scsi/g_NCR5380.c2
-rw-r--r--drivers/scsi/g_NCR5380.h1
-rw-r--r--drivers/scsi/mac_scsi.c3
-rw-r--r--drivers/scsi/pas16.c2
-rw-r--r--drivers/scsi/pas16.h1
-rw-r--r--drivers/scsi/t128.c2
-rw-r--r--drivers/scsi/t128.h1
13 files changed, 152 insertions, 40 deletions
diff --git a/drivers/scsi/NCR5380.c b/drivers/scsi/NCR5380.c
index e05cf505f0d4..fbd8a98af881 100644
--- a/drivers/scsi/NCR5380.c
+++ b/drivers/scsi/NCR5380.c
@@ -31,9 +31,6 @@
31 31
32/* 32/*
33 * Further development / testing that should be done : 33 * Further development / testing that should be done :
34 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
35 * code so that everything does the same thing that's done at the
36 * end of a pseudo-DMA read operation.
37 * 34 *
38 * 4. Test SCSI-II tagged queueing (I have no devices which support 35 * 4. Test SCSI-II tagged queueing (I have no devices which support
39 * tagged queueing) 36 * tagged queueing)
@@ -117,6 +114,8 @@
117 * 114 *
118 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. 115 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
119 * 116 *
117 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
118 *
120 * These macros MUST be defined : 119 * These macros MUST be defined :
121 * 120 *
122 * NCR5380_read(register) - read from the specified register 121 * NCR5380_read(register) - read from the specified register
@@ -801,6 +800,72 @@ static void NCR5380_main(struct work_struct *work)
801 } while (!done); 800 } while (!done);
802} 801}
803 802
803/*
804 * NCR5380_dma_complete - finish DMA transfer
805 * @instance: the scsi host instance
806 *
807 * Called by the interrupt handler when DMA finishes or a phase
808 * mismatch occurs (which would end the DMA transfer).
809 */
810
811static void NCR5380_dma_complete(struct Scsi_Host *instance)
812{
813 struct NCR5380_hostdata *hostdata = shost_priv(instance);
814 int transferred;
815 unsigned char **data;
816 int *count;
817 int saved_data = 0, overrun = 0;
818 unsigned char p;
819
820 if (hostdata->read_overruns) {
821 p = hostdata->connected->SCp.phase;
822 if (p & SR_IO) {
823 udelay(10);
824 if ((NCR5380_read(BUS_AND_STATUS_REG) &
825 (BASR_PHASE_MATCH | BASR_ACK)) ==
826 (BASR_PHASE_MATCH | BASR_ACK)) {
827 saved_data = NCR5380_read(INPUT_DATA_REG);
828 overrun = 1;
829 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
830 }
831 }
832 }
833
834 NCR5380_write(MODE_REG, MR_BASE);
835 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
836 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
837
838 transferred = hostdata->dma_len - NCR5380_dma_residual(instance);
839 hostdata->dma_len = 0;
840
841 data = (unsigned char **)&hostdata->connected->SCp.ptr;
842 count = &hostdata->connected->SCp.this_residual;
843 *data += transferred;
844 *count -= transferred;
845
846 if (hostdata->read_overruns) {
847 int cnt, toPIO;
848
849 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
850 cnt = toPIO = hostdata->read_overruns;
851 if (overrun) {
852 dsprintk(NDEBUG_DMA, instance,
853 "Got an input overrun, using saved byte\n");
854 *(*data)++ = saved_data;
855 (*count)--;
856 cnt--;
857 toPIO--;
858 }
859 if (toPIO > 0) {
860 dsprintk(NDEBUG_DMA, instance,
861 "Doing %d byte PIO to 0x%p\n", cnt, *data);
862 NCR5380_transfer_pio(instance, &p, &cnt, data);
863 *count -= toPIO - cnt;
864 }
865 }
866 }
867}
868
804#ifndef DONT_USE_INTR 869#ifndef DONT_USE_INTR
805 870
806/** 871/**
@@ -855,7 +920,22 @@ static irqreturn_t NCR5380_intr(int irq, void *dev_id)
855 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", 920 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
856 irq, basr, sr, mr); 921 irq, basr, sr, mr);
857 922
858 if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && 923 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
924 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
925 * We ack IRQ after clearing Mode Register. Workarounds
926 * for End of DMA errata need to happen in DMA Mode.
927 */
928
929 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
930
931 if (hostdata->connected) {
932 NCR5380_dma_complete(instance);
933 queue_work(hostdata->work_q, &hostdata->main_task);
934 } else {
935 NCR5380_write(MODE_REG, MR_BASE);
936 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
937 }
938 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
859 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { 939 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
860 /* Probably reselected */ 940 /* Probably reselected */
861 NCR5380_write(SELECT_ENABLE_REG, 0); 941 NCR5380_write(SELECT_ENABLE_REG, 0);
@@ -1431,28 +1511,38 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1431 register unsigned char p = *phase; 1511 register unsigned char p = *phase;
1432 register unsigned char *d = *data; 1512 register unsigned char *d = *data;
1433 unsigned char tmp; 1513 unsigned char tmp;
1434 int result; 1514 int result = 0;
1435 1515
1436 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { 1516 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1437 *phase = tmp; 1517 *phase = tmp;
1438 return -1; 1518 return -1;
1439 } 1519 }
1440 1520
1441 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1521 hostdata->connected->SCp.phase = p;
1442 1522
1443 /* 1523 if (p & SR_IO) {
1444 * Note : on my sample board, watch-dog timeouts occurred when interrupts 1524 if (hostdata->read_overruns)
1445 * were not disabled for the duration of a single DMA transfer, from 1525 c -= hostdata->read_overruns;
1446 * before the setting of DMA mode to after transfer of the last byte. 1526 else if (hostdata->flags & FLAG_DMA_FIXUP)
1447 */ 1527 --c;
1528 }
1448 1529
1449 if (hostdata->flags & FLAG_DMA_FIXUP) 1530 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1450 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY); 1531 (p & SR_IO) ? "receive" : "send", c, d);
1451 else
1452 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1453 MR_ENABLE_EOP_INTR);
1454 1532
1455 dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG)); 1533 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1534 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1535 MR_ENABLE_EOP_INTR);
1536
1537 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1538 /* On the Medusa, it is a must to initialize the DMA before
1539 * starting the NCR. This is also the cleaner way for the TT.
1540 */
1541 if (p & SR_IO)
1542 result = NCR5380_dma_recv_setup(instance, d, c);
1543 else
1544 result = NCR5380_dma_send_setup(instance, d, c);
1545 }
1456 1546
1457 /* 1547 /*
1458 * On the PAS16 at least I/O recovery delays are not needed here. 1548 * On the PAS16 at least I/O recovery delays are not needed here.
@@ -1470,6 +1560,29 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1470 NCR5380_io_delay(1); 1560 NCR5380_io_delay(1);
1471 } 1561 }
1472 1562
1563 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1564 /* On the Falcon, the DMA setup must be done after the last
1565 * NCR access, else the DMA setup gets trashed!
1566 */
1567 if (p & SR_IO)
1568 result = NCR5380_dma_recv_setup(instance, d, c);
1569 else
1570 result = NCR5380_dma_send_setup(instance, d, c);
1571 }
1572
1573 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1574 if (result < 0)
1575 return result;
1576
1577 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1578 if (result > 0) {
1579 hostdata->dma_len = result;
1580 return 0;
1581 }
1582
1583 /* The result is zero iff pseudo DMA send/receive was completed. */
1584 hostdata->dma_len = c;
1585
1473/* 1586/*
1474 * A note regarding the DMA errata workarounds for early NMOS silicon. 1587 * A note regarding the DMA errata workarounds for early NMOS silicon.
1475 * 1588 *
@@ -1504,10 +1617,8 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1504 * request. 1617 * request.
1505 */ 1618 */
1506 1619
1507 if (p & SR_IO) { 1620 if (hostdata->flags & FLAG_DMA_FIXUP) {
1508 result = NCR5380_dma_recv_setup(instance, d, 1621 if (p & SR_IO) {
1509 hostdata->flags & FLAG_DMA_FIXUP ? c - 1 : c);
1510 if (!result && (hostdata->flags & FLAG_DMA_FIXUP)) {
1511 /* 1622 /*
1512 * The workaround was to transfer fewer bytes than we 1623 * The workaround was to transfer fewer bytes than we
1513 * intended to with the pseudo-DMA read function, wait for 1624 * intended to with the pseudo-DMA read function, wait for
@@ -1533,11 +1644,8 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1533 result = -1; 1644 result = -1;
1534 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); 1645 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1535 } 1646 }
1536 d[c - 1] = NCR5380_read(INPUT_DATA_REG); 1647 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1537 } 1648 } else {
1538 } else {
1539 result = NCR5380_dma_send_setup(instance, d, c);
1540 if (!result && (hostdata->flags & FLAG_DMA_FIXUP)) {
1541 /* 1649 /*
1542 * Wait for the last byte to be sent. If REQ is being asserted for 1650 * Wait for the last byte to be sent. If REQ is being asserted for
1543 * the byte we're interested, we'll ACK it and it will go false. 1651 * the byte we're interested, we'll ACK it and it will go false.
@@ -1550,11 +1658,8 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1550 } 1658 }
1551 } 1659 }
1552 } 1660 }
1553 NCR5380_write(MODE_REG, MR_BASE); 1661
1554 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1662 NCR5380_dma_complete(instance);
1555 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1556 *data = d + c;
1557 *count = 0;
1558 return result; 1663 return result;
1559} 1664}
1560 1665
@@ -1667,8 +1772,7 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
1667 do_abort(instance); 1772 do_abort(instance);
1668 cmd->result = DID_ERROR << 16; 1773 cmd->result = DID_ERROR << 16;
1669 /* XXX - need to source or sink data here, as appropriate */ 1774 /* XXX - need to source or sink data here, as appropriate */
1670 } else 1775 }
1671 cmd->SCp.this_residual -= transfersize - len;
1672 } else { 1776 } else {
1673 /* Break up transfer into 3 ms chunks, 1777 /* Break up transfer into 3 ms chunks,
1674 * presuming 6 accesses per handshake. 1778 * presuming 6 accesses per handshake.
diff --git a/drivers/scsi/arm/cumana_1.c b/drivers/scsi/arm/cumana_1.c
index 402d984aa088..8e9cfe8f22f5 100644
--- a/drivers/scsi/arm/cumana_1.c
+++ b/drivers/scsi/arm/cumana_1.c
@@ -20,6 +20,7 @@
20#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize) 20#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize)
21#define NCR5380_dma_recv_setup cumanascsi_pread 21#define NCR5380_dma_recv_setup cumanascsi_pread
22#define NCR5380_dma_send_setup cumanascsi_pwrite 22#define NCR5380_dma_send_setup cumanascsi_pwrite
23#define NCR5380_dma_residual(instance) (0)
23 24
24#define NCR5380_intr cumanascsi_intr 25#define NCR5380_intr cumanascsi_intr
25#define NCR5380_queue_command cumanascsi_queue_command 26#define NCR5380_queue_command cumanascsi_queue_command
@@ -245,7 +246,7 @@ static int cumanascsi1_probe(struct expansion_card *ec,
245 246
246 host->irq = ec->irq; 247 host->irq = ec->irq;
247 248
248 ret = NCR5380_init(host, FLAG_DMA_FIXUP); 249 ret = NCR5380_init(host, FLAG_DMA_FIXUP | FLAG_LATE_DMA_SETUP);
249 if (ret) 250 if (ret)
250 goto out_unmap; 251 goto out_unmap;
251 252
diff --git a/drivers/scsi/arm/oak.c b/drivers/scsi/arm/oak.c
index 05cf874fc739..3aac99c21267 100644
--- a/drivers/scsi/arm/oak.c
+++ b/drivers/scsi/arm/oak.c
@@ -26,6 +26,7 @@
26#define NCR5380_dma_xfer_len(instance, cmd, phase) (0) 26#define NCR5380_dma_xfer_len(instance, cmd, phase) (0)
27#define NCR5380_dma_recv_setup oakscsi_pread 27#define NCR5380_dma_recv_setup oakscsi_pread
28#define NCR5380_dma_send_setup oakscsi_pwrite 28#define NCR5380_dma_send_setup oakscsi_pwrite
29#define NCR5380_dma_residual(instance) (0)
29 30
30#define NCR5380_queue_command oakscsi_queue_command 31#define NCR5380_queue_command oakscsi_queue_command
31#define NCR5380_info oakscsi_info 32#define NCR5380_info oakscsi_info
@@ -144,7 +145,7 @@ static int oakscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
144 host->irq = NO_IRQ; 145 host->irq = NO_IRQ;
145 host->n_io_port = 255; 146 host->n_io_port = 255;
146 147
147 ret = NCR5380_init(host, FLAG_DMA_FIXUP); 148 ret = NCR5380_init(host, FLAG_DMA_FIXUP | FLAG_LATE_DMA_SETUP);
148 if (ret) 149 if (ret)
149 goto out_unmap; 150 goto out_unmap;
150 151
diff --git a/drivers/scsi/dmx3191d.c b/drivers/scsi/dmx3191d.c
index 4b58fa0c16fe..cc46d67b9f6f 100644
--- a/drivers/scsi/dmx3191d.c
+++ b/drivers/scsi/dmx3191d.c
@@ -42,6 +42,7 @@
42#define NCR5380_dma_xfer_len(instance, cmd, phase) (0) 42#define NCR5380_dma_xfer_len(instance, cmd, phase) (0)
43#define NCR5380_dma_recv_setup(instance, dst, len) (0) 43#define NCR5380_dma_recv_setup(instance, dst, len) (0)
44#define NCR5380_dma_send_setup(instance, src, len) (0) 44#define NCR5380_dma_send_setup(instance, src, len) (0)
45#define NCR5380_dma_residual(instance) (0)
45 46
46#define NCR5380_implementation_fields /* none */ 47#define NCR5380_implementation_fields /* none */
47 48
diff --git a/drivers/scsi/dtc.c b/drivers/scsi/dtc.c
index df17904bbe12..e87c632234f3 100644
--- a/drivers/scsi/dtc.c
+++ b/drivers/scsi/dtc.c
@@ -228,7 +228,7 @@ found:
228 instance->base = addr; 228 instance->base = addr;
229 ((struct NCR5380_hostdata *)(instance)->hostdata)->base = base; 229 ((struct NCR5380_hostdata *)(instance)->hostdata)->base = base;
230 230
231 if (NCR5380_init(instance, 0)) 231 if (NCR5380_init(instance, FLAG_LATE_DMA_SETUP))
232 goto out_unregister; 232 goto out_unregister;
233 233
234 NCR5380_maybe_reset_bus(instance); 234 NCR5380_maybe_reset_bus(instance);
diff --git a/drivers/scsi/dtc.h b/drivers/scsi/dtc.h
index 65af89e4340c..fcb0a8ea7bda 100644
--- a/drivers/scsi/dtc.h
+++ b/drivers/scsi/dtc.h
@@ -23,6 +23,7 @@
23 dtc_dma_xfer_len(cmd) 23 dtc_dma_xfer_len(cmd)
24#define NCR5380_dma_recv_setup dtc_pread 24#define NCR5380_dma_recv_setup dtc_pread
25#define NCR5380_dma_send_setup dtc_pwrite 25#define NCR5380_dma_send_setup dtc_pwrite
26#define NCR5380_dma_residual(instance) (0)
26 27
27#define NCR5380_intr dtc_intr 28#define NCR5380_intr dtc_intr
28#define NCR5380_queue_command dtc_queue_command 29#define NCR5380_queue_command dtc_queue_command
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c
index f8c00c96a837..09e1cf938ecf 100644
--- a/drivers/scsi/g_NCR5380.c
+++ b/drivers/scsi/g_NCR5380.c
@@ -466,7 +466,7 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
466 } 466 }
467#endif 467#endif
468 468
469 if (NCR5380_init(instance, flags)) 469 if (NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP))
470 goto out_unregister; 470 goto out_unregister;
471 471
472 switch (overrides[current_override].board) { 472 switch (overrides[current_override].board) {
diff --git a/drivers/scsi/g_NCR5380.h b/drivers/scsi/g_NCR5380.h
index 7f4308705532..595177428d76 100644
--- a/drivers/scsi/g_NCR5380.h
+++ b/drivers/scsi/g_NCR5380.h
@@ -64,6 +64,7 @@
64 generic_NCR5380_dma_xfer_len(instance, cmd) 64 generic_NCR5380_dma_xfer_len(instance, cmd)
65#define NCR5380_dma_recv_setup generic_NCR5380_pread 65#define NCR5380_dma_recv_setup generic_NCR5380_pread
66#define NCR5380_dma_send_setup generic_NCR5380_pwrite 66#define NCR5380_dma_send_setup generic_NCR5380_pwrite
67#define NCR5380_dma_residual(instance) (0)
67 68
68#define NCR5380_intr generic_NCR5380_intr 69#define NCR5380_intr generic_NCR5380_intr
69#define NCR5380_queue_command generic_NCR5380_queue_command 70#define NCR5380_queue_command generic_NCR5380_queue_command
diff --git a/drivers/scsi/mac_scsi.c b/drivers/scsi/mac_scsi.c
index 99b7bbc3dd94..4de6589fdbfb 100644
--- a/drivers/scsi/mac_scsi.c
+++ b/drivers/scsi/mac_scsi.c
@@ -37,6 +37,7 @@
37 macscsi_dma_xfer_len(instance, cmd) 37 macscsi_dma_xfer_len(instance, cmd)
38#define NCR5380_dma_recv_setup macscsi_pread 38#define NCR5380_dma_recv_setup macscsi_pread
39#define NCR5380_dma_send_setup macscsi_pwrite 39#define NCR5380_dma_send_setup macscsi_pwrite
40#define NCR5380_dma_residual(instance) (0)
40 41
41#define NCR5380_intr macscsi_intr 42#define NCR5380_intr macscsi_intr
42#define NCR5380_queue_command macscsi_queue_command 43#define NCR5380_queue_command macscsi_queue_command
@@ -386,7 +387,7 @@ static int __init mac_scsi_probe(struct platform_device *pdev)
386#endif 387#endif
387 host_flags |= setup_toshiba_delay > 0 ? FLAG_TOSHIBA_DELAY : 0; 388 host_flags |= setup_toshiba_delay > 0 ? FLAG_TOSHIBA_DELAY : 0;
388 389
389 error = NCR5380_init(instance, host_flags); 390 error = NCR5380_init(instance, host_flags | FLAG_LATE_DMA_SETUP);
390 if (error) 391 if (error)
391 goto fail_init; 392 goto fail_init;
392 393
diff --git a/drivers/scsi/pas16.c b/drivers/scsi/pas16.c
index c8fd2230c792..62eef3f6d140 100644
--- a/drivers/scsi/pas16.c
+++ b/drivers/scsi/pas16.c
@@ -375,7 +375,7 @@ static int __init pas16_detect(struct scsi_host_template *tpnt)
375 375
376 instance->io_port = io_port; 376 instance->io_port = io_port;
377 377
378 if (NCR5380_init(instance, FLAG_DMA_FIXUP)) 378 if (NCR5380_init(instance, FLAG_DMA_FIXUP | FLAG_LATE_DMA_SETUP))
379 goto out_unregister; 379 goto out_unregister;
380 380
381 NCR5380_maybe_reset_bus(instance); 381 NCR5380_maybe_reset_bus(instance);
diff --git a/drivers/scsi/pas16.h b/drivers/scsi/pas16.h
index f56f38796bcd..9fe7f33660b4 100644
--- a/drivers/scsi/pas16.h
+++ b/drivers/scsi/pas16.h
@@ -105,6 +105,7 @@
105#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize) 105#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize)
106#define NCR5380_dma_recv_setup pas16_pread 106#define NCR5380_dma_recv_setup pas16_pread
107#define NCR5380_dma_send_setup pas16_pwrite 107#define NCR5380_dma_send_setup pas16_pwrite
108#define NCR5380_dma_residual(instance) (0)
108 109
109#define NCR5380_intr pas16_intr 110#define NCR5380_intr pas16_intr
110#define NCR5380_queue_command pas16_queue_command 111#define NCR5380_queue_command pas16_queue_command
diff --git a/drivers/scsi/t128.c b/drivers/scsi/t128.c
index 6cc3da8d1d69..b5beecfaa3d5 100644
--- a/drivers/scsi/t128.c
+++ b/drivers/scsi/t128.c
@@ -208,7 +208,7 @@ found:
208 instance->base = base; 208 instance->base = base;
209 ((struct NCR5380_hostdata *)instance->hostdata)->base = p; 209 ((struct NCR5380_hostdata *)instance->hostdata)->base = p;
210 210
211 if (NCR5380_init(instance, FLAG_DMA_FIXUP)) 211 if (NCR5380_init(instance, FLAG_DMA_FIXUP | FLAG_LATE_DMA_SETUP))
212 goto out_unregister; 212 goto out_unregister;
213 213
214 NCR5380_maybe_reset_bus(instance); 214 NCR5380_maybe_reset_bus(instance);
diff --git a/drivers/scsi/t128.h b/drivers/scsi/t128.h
index b6fe70f0aa4b..c95bcd839109 100644
--- a/drivers/scsi/t128.h
+++ b/drivers/scsi/t128.h
@@ -79,6 +79,7 @@
79#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize) 79#define NCR5380_dma_xfer_len(instance, cmd, phase) (cmd->transfersize)
80#define NCR5380_dma_recv_setup t128_pread 80#define NCR5380_dma_recv_setup t128_pread
81#define NCR5380_dma_send_setup t128_pwrite 81#define NCR5380_dma_send_setup t128_pwrite
82#define NCR5380_dma_residual(instance) (0)
82 83
83#define NCR5380_intr t128_intr 84#define NCR5380_intr t128_intr
84#define NCR5380_queue_command t128_queue_command 85#define NCR5380_queue_command t128_queue_command