MIPS: Loongson: Add Loongson-3A R3.1 basic support

Loongson-3A R3.1 is the bugfix revision of Loongson-3A R3.

All Loongson-3 CPU family:

Code-name         Brand-name       PRId
Loongson-3A R1    Loongson-3A1000  0x6305
Loongson-3A R2    Loongson-3A2000  0x6308
Loongson-3A R3    Loongson-3A3000  0x6309
Loongson-3A R3.1  Loongson-3A3000  0x630d
Loongson-3B R1    Loongson-3B1000  0x6306
Loongson-3B R2    Loongson-3B1500  0x6307

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19263/
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <james.hogan@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>

5 files changed, 34 insertions, 29 deletions

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 5b9d02ef4f60..dacbdb84516a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -225,31 +225,32 @@
  * Definitions for 7:0 on legacy processors
  */
 
-#define PRID_REV_TX4927         0x0022
-#define PRID_REV_TX4937         0x0030
-#define PRID_REV_R4400          0x0040
-#define PRID_REV_R3000A         0x0030
-#define PRID_REV_R3000          0x0020
-#define PRID_REV_R2000A         0x0010
-#define PRID_REV_TX3912         0x0010
-#define PRID_REV_TX3922         0x0030
-#define PRID_REV_TX3927         0x0040
-#define PRID_REV_VR4111         0x0050
-#define PRID_REV_VR4181         0x0050  /* Same as VR4111 */
-#define PRID_REV_VR4121         0x0060
-#define PRID_REV_VR4122         0x0070
-#define PRID_REV_VR4181A        0x0070  /* Same as VR4122 */
-#define PRID_REV_VR4130         0x0080
-#define PRID_REV_34K_V1_0_2     0x0022
-#define PRID_REV_LOONGSON1B     0x0020
-#define PRID_REV_LOONGSON1C     0x0020  /* Same as Loongson-1B */
-#define PRID_REV_LOONGSON2E     0x0002
-#define PRID_REV_LOONGSON2F     0x0003
-#define PRID_REV_LOONGSON3A_R1  0x0005
-#define PRID_REV_LOONGSON3B_R1  0x0006
-#define PRID_REV_LOONGSON3B_R2  0x0007
-#define PRID_REV_LOONGSON3A_R2  0x0008
-#define PRID_REV_LOONGSON3A_R3  0x0009
+#define PRID_REV_TX4927                 0x0022
+#define PRID_REV_TX4937                 0x0030
+#define PRID_REV_R4400                  0x0040
+#define PRID_REV_R3000A                 0x0030
+#define PRID_REV_R3000                  0x0020
+#define PRID_REV_R2000A                 0x0010
+#define PRID_REV_TX3912                 0x0010
+#define PRID_REV_TX3922                 0x0030
+#define PRID_REV_TX3927                 0x0040
+#define PRID_REV_VR4111                 0x0050
+#define PRID_REV_VR4181                 0x0050  /* Same as VR4111 */
+#define PRID_REV_VR4121                 0x0060
+#define PRID_REV_VR4122                 0x0070
+#define PRID_REV_VR4181A                0x0070  /* Same as VR4122 */
+#define PRID_REV_VR4130                 0x0080
+#define PRID_REV_34K_V1_0_2             0x0022
+#define PRID_REV_LOONGSON1B             0x0020
+#define PRID_REV_LOONGSON1C             0x0020  /* Same as Loongson-1B */
+#define PRID_REV_LOONGSON2E             0x0002
+#define PRID_REV_LOONGSON2F             0x0003
+#define PRID_REV_LOONGSON3A_R1          0x0005
+#define PRID_REV_LOONGSON3B_R1          0x0006
+#define PRID_REV_LOONGSON3B_R2          0x0007
+#define PRID_REV_LOONGSON3A_R2          0x0008
+#define PRID_REV_LOONGSON3A_R3_0        0x0009
+#define PRID_REV_LOONGSON3A_R3_1        0x000d
 
 /*
  * Older processors used to encode processor version and revision in two
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b2509c19cfb5..d535fc706a8b 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1849,7 +1849,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
                         set_elf_platform(cpu, "loongson3a");
                         set_isa(c, MIPS_CPU_ISA_M64R2);
                         break;
-                case PRID_REV_LOONGSON3A_R3:
+                case PRID_REV_LOONGSON3A_R3_0:
+                case PRID_REV_LOONGSON3A_R3_1:
                         c->cputype = CPU_LOONGSON3;
                         __cpu_name[cpu] = "ICT Loongson-3";
                         set_elf_platform(cpu, "loongson3a");
diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c
index 1e8a955ae5a8..8f68ee02a8c2 100644
--- a/arch/mips/loongson64/common/env.c
+++ b/arch/mips/loongson64/common/env.c
@@ -198,7 +198,8 @@ void __init prom_init_env(void)
                         break;
                 case PRID_REV_LOONGSON3A_R1:
                 case PRID_REV_LOONGSON3A_R2:
-                case PRID_REV_LOONGSON3A_R3:
+                case PRID_REV_LOONGSON3A_R3_0:
+                case PRID_REV_LOONGSON3A_R3_1:
                         cpu_clock_freq = 900000000;
                         break;
                 case PRID_REV_LOONGSON3B_R1:
diff --git a/arch/mips/loongson64/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c
index 8501109bb0f0..fea95d003269 100644
--- a/arch/mips/loongson64/loongson-3/smp.c
+++ b/arch/mips/loongson64/loongson-3/smp.c
@@ -682,7 +682,8 @@ void play_dead(void)
                         (void *)CKSEG1ADDR((unsigned long)loongson3a_r1_play_dead);
                 break;
         case PRID_REV_LOONGSON3A_R2:
-        case PRID_REV_LOONGSON3A_R3:
+        case PRID_REV_LOONGSON3A_R3_0:
+        case PRID_REV_LOONGSON3A_R3_1:
                 play_dead_at_ckseg1 =
                         (void *)CKSEG1ADDR((unsigned long)loongson3a_r2r3_play_dead);
                 break;
diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c
index 322de58eebaf..f66521c7f846 100644
--- a/drivers/platform/mips/cpu_hwmon.c
+++ b/drivers/platform/mips/cpu_hwmon.c
@@ -30,7 +30,8 @@ int loongson3_cpu_temp(int cpu)
         case PRID_REV_LOONGSON3B_R2:
                 reg = ((reg >> 8) & 0xff) - 100;
                 break;
-        case PRID_REV_LOONGSON3A_R3:
+        case PRID_REV_LOONGSON3A_R3_0:
+        case PRID_REV_LOONGSON3A_R3_1:
                 reg = (reg & 0xffff)*731/0x4000 - 273;
                 break;
         }