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authorLinus Walleij <linus.walleij@linaro.org>2018-03-06 02:56:06 -0500
committerLinus Walleij <linus.walleij@linaro.org>2018-03-18 20:50:29 -0400
commit7a8fd1f5cc3fd0a8fd06634b9dc6750f8c5b2354 (patch)
tree5943f76dd8c02afffa4f32fb4a50b6641325794e
parent3f4290d4dcf1cfdc242fc4d0874995c3aead72e9 (diff)
gpio: ich: Use BIT() macro
Using BIT() makes (1 << foo) constructions easier to read, and also account for common mistakes where bit 31 is not working because of numbers being interpreted as negative unless specified as unsigned. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/gpio/gpio-ich.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c
index 7a54165d7276..dba392221042 100644
--- a/drivers/gpio/gpio-ich.c
+++ b/drivers/gpio/gpio-ich.c
@@ -26,6 +26,7 @@
26#include <linux/gpio/driver.h> 26#include <linux/gpio/driver.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/mfd/lpc_ich.h> 28#include <linux/mfd/lpc_ich.h>
29#include <linux/bitops.h>
29 30
30#define DRV_NAME "gpio_ich" 31#define DRV_NAME "gpio_ich"
31 32
@@ -131,9 +132,9 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify)
131 ichx_priv.gpio_base); 132 ichx_priv.gpio_base);
132 133
133 if (val) 134 if (val)
134 data |= 1 << bit; 135 data |= BIT(bit);
135 else 136 else
136 data &= ~(1 << bit); 137 data &= ~BIT(bit);
137 ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr], 138 ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr],
138 ichx_priv.gpio_base); 139 ichx_priv.gpio_base);
139 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) 140 if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache)
@@ -166,12 +167,12 @@ static int ichx_read_bit(int reg, unsigned nr)
166 167
167 spin_unlock_irqrestore(&ichx_priv.lock, flags); 168 spin_unlock_irqrestore(&ichx_priv.lock, flags);
168 169
169 return data & (1 << bit) ? 1 : 0; 170 return !!(data & BIT(bit));
170} 171}
171 172
172static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) 173static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr)
173{ 174{
174 return !!(ichx_priv.use_gpio & (1 << (nr / 32))); 175 return !!(ichx_priv.use_gpio & BIT(nr / 32));
175} 176}
176 177
177static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr) 178static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr)
@@ -232,12 +233,12 @@ static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
232 spin_lock_irqsave(&ichx_priv.lock, flags); 233 spin_lock_irqsave(&ichx_priv.lock, flags);
233 234
234 /* GPI 0 - 15 are latched, write 1 to clear*/ 235 /* GPI 0 - 15 are latched, write 1 to clear*/
235 ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); 236 ICHX_WRITE(BIT(16 + nr), 0, ichx_priv.pm_base);
236 data = ICHX_READ(0, ichx_priv.pm_base); 237 data = ICHX_READ(0, ichx_priv.pm_base);
237 238
238 spin_unlock_irqrestore(&ichx_priv.lock, flags); 239 spin_unlock_irqrestore(&ichx_priv.lock, flags);
239 240
240 return (data >> 16) & (1 << nr) ? 1 : 0; 241 return !!((data >> 16) & BIT(nr));
241 } else { 242 } else {
242 return ichx_gpio_get(chip, nr); 243 return ichx_gpio_get(chip, nr);
243 } 244 }
@@ -254,7 +255,7 @@ static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)
254 * the chipset's USE value can be trusted for this specific bit. 255 * the chipset's USE value can be trusted for this specific bit.
255 * If it can't be trusted, assume that the pin can be used as a GPIO. 256 * If it can't be trusted, assume that the pin can be used as a GPIO.
256 */ 257 */
257 if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) 258 if (ichx_priv.desc->use_sel_ignore[nr / 32] & BIT(nr & 0x1f))
258 return 0; 259 return 0;
259 260
260 return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; 261 return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;
@@ -394,7 +395,7 @@ static int ichx_gpio_request_regions(struct device *dev,
394 return -ENODEV; 395 return -ENODEV;
395 396
396 for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { 397 for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) {
397 if (!(use_gpio & (1 << i))) 398 if (!(use_gpio & BIT(i)))
398 continue; 399 continue;
399 if (!devm_request_region(dev, 400 if (!devm_request_region(dev,
400 res_base->start + ichx_priv.desc->regs[0][i], 401 res_base->start + ichx_priv.desc->regs[0][i],