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authorBin Liu <b-liu@ti.com>2018-05-21 09:42:09 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-05-22 06:03:24 -0400
commit78fba982db768fd2cd3f05b03ea2b2b13af1cfbb (patch)
tree9d21f07ff1b18da6ac97838caeffb37ac477f724
parentc049ffb35ac4a393919a001f8f468c43cb185a34 (diff)
usb: musb: merge musbhsdma.h into musbhsdma.c
Now Blackfin support is removed, header musbhsdma.h is only included in musbhsdma.c. So let's merge the content in musbhsdma.h to musbhsdma.c and delete musbhsdma.h. Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat
-rw-r--r--drivers/usb/musb/musbhsdma.c66
-rw-r--r--drivers/usb/musb/musbhsdma.h72
2 files changed, 65 insertions, 73 deletions
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
index 4389fc3422bd..57d416a110a5 100644
--- a/drivers/usb/musb/musbhsdma.c
+++ b/drivers/usb/musb/musbhsdma.c
@@ -10,7 +10,71 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include "musb_core.h" 12#include "musb_core.h"
13#include "musbhsdma.h" 13
14#define MUSB_HSDMA_BASE 0x200
15#define MUSB_HSDMA_INTR (MUSB_HSDMA_BASE + 0)
16#define MUSB_HSDMA_CONTROL 0x4
17#define MUSB_HSDMA_ADDRESS 0x8
18#define MUSB_HSDMA_COUNT 0xc
19
20#define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \
21 (MUSB_HSDMA_BASE + (_bchannel << 4) + _offset)
22
23#define musb_read_hsdma_addr(mbase, bchannel) \
24 musb_readl(mbase, \
25 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS))
26
27#define musb_write_hsdma_addr(mbase, bchannel, addr) \
28 musb_writel(mbase, \
29 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS), \
30 addr)
31
32#define musb_read_hsdma_count(mbase, bchannel) \
33 musb_readl(mbase, \
34 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT))
35
36#define musb_write_hsdma_count(mbase, bchannel, len) \
37 musb_writel(mbase, \
38 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT), \
39 len)
40/* control register (16-bit): */
41#define MUSB_HSDMA_ENABLE_SHIFT 0
42#define MUSB_HSDMA_TRANSMIT_SHIFT 1
43#define MUSB_HSDMA_MODE1_SHIFT 2
44#define MUSB_HSDMA_IRQENABLE_SHIFT 3
45#define MUSB_HSDMA_ENDPOINT_SHIFT 4
46#define MUSB_HSDMA_BUSERROR_SHIFT 8
47#define MUSB_HSDMA_BURSTMODE_SHIFT 9
48#define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
49#define MUSB_HSDMA_BURSTMODE_UNSPEC 0
50#define MUSB_HSDMA_BURSTMODE_INCR4 1
51#define MUSB_HSDMA_BURSTMODE_INCR8 2
52#define MUSB_HSDMA_BURSTMODE_INCR16 3
53
54#define MUSB_HSDMA_CHANNELS 8
55
56struct musb_dma_controller;
57
58struct musb_dma_channel {
59 struct dma_channel channel;
60 struct musb_dma_controller *controller;
61 u32 start_addr;
62 u32 len;
63 u16 max_packet_sz;
64 u8 idx;
65 u8 epnum;
66 u8 transmit;
67};
68
69struct musb_dma_controller {
70 struct dma_controller controller;
71 struct musb_dma_channel channel[MUSB_HSDMA_CHANNELS];
72 void *private_data;
73 void __iomem *base;
74 u8 channel_count;
75 u8 used_channels;
76 int irq;
77};
14 78
15static void dma_channel_release(struct dma_channel *channel); 79static void dma_channel_release(struct dma_channel *channel);
16 80
diff --git a/drivers/usb/musb/musbhsdma.h b/drivers/usb/musb/musbhsdma.h
deleted file mode 100644
index 93665135aff1..000000000000
--- a/drivers/usb/musb/musbhsdma.h
+++ /dev/null
@@ -1,72 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * MUSB OTG driver - support for Mentor's DMA controller
4 *
5 * Copyright 2005 Mentor Graphics Corporation
6 * Copyright (C) 2005-2007 by Texas Instruments
7 */
8
9#define MUSB_HSDMA_BASE 0x200
10#define MUSB_HSDMA_INTR (MUSB_HSDMA_BASE + 0)
11#define MUSB_HSDMA_CONTROL 0x4
12#define MUSB_HSDMA_ADDRESS 0x8
13#define MUSB_HSDMA_COUNT 0xc
14
15#define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \
16 (MUSB_HSDMA_BASE + (_bchannel << 4) + _offset)
17
18#define musb_read_hsdma_addr(mbase, bchannel) \
19 musb_readl(mbase, \
20 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS))
21
22#define musb_write_hsdma_addr(mbase, bchannel, addr) \
23 musb_writel(mbase, \
24 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS), \
25 addr)
26
27#define musb_read_hsdma_count(mbase, bchannel) \
28 musb_readl(mbase, \
29 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT))
30
31#define musb_write_hsdma_count(mbase, bchannel, len) \
32 musb_writel(mbase, \
33 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT), \
34 len)
35/* control register (16-bit): */
36#define MUSB_HSDMA_ENABLE_SHIFT 0
37#define MUSB_HSDMA_TRANSMIT_SHIFT 1
38#define MUSB_HSDMA_MODE1_SHIFT 2
39#define MUSB_HSDMA_IRQENABLE_SHIFT 3
40#define MUSB_HSDMA_ENDPOINT_SHIFT 4
41#define MUSB_HSDMA_BUSERROR_SHIFT 8
42#define MUSB_HSDMA_BURSTMODE_SHIFT 9
43#define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
44#define MUSB_HSDMA_BURSTMODE_UNSPEC 0
45#define MUSB_HSDMA_BURSTMODE_INCR4 1
46#define MUSB_HSDMA_BURSTMODE_INCR8 2
47#define MUSB_HSDMA_BURSTMODE_INCR16 3
48
49#define MUSB_HSDMA_CHANNELS 8
50
51struct musb_dma_controller;
52
53struct musb_dma_channel {
54 struct dma_channel channel;
55 struct musb_dma_controller *controller;
56 u32 start_addr;
57 u32 len;
58 u16 max_packet_sz;
59 u8 idx;
60 u8 epnum;
61 u8 transmit;
62};
63
64struct musb_dma_controller {
65 struct dma_controller controller;
66 struct musb_dma_channel channel[MUSB_HSDMA_CHANNELS];
67 void *private_data;
68 void __iomem *base;
69 u8 channel_count;
70 u8 used_channels;
71 int irq;
72};
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 00:41:37 -0400