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authorLinus Torvalds <torvalds@linux-foundation.org>2019-08-06 17:01:08 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2019-08-06 17:01:08 -0400
commit76d7961ff4ee02cc70365600a52fb59ca544dc7c (patch)
tree4fc4b1ff1628616a665b025ac1aa07c0b555a22d
parentf4eb1423e43376bec578c5696635b074c8bd2035 (diff)
parent74034a09267c1f48d5ce7ae4c4a317fac7d43418 (diff)
Merge tag 'mips_fixes_5.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fixes from Paul Burton: "A few MIPS fixes for 5.3: - Various switch fall through annotations to fixup warnings & errors resulting from -Wimplicit-fallthrough. - A fix for systems (at least jazz) using an i8253 PIT as clocksource when it's not suitably configured. - Set struct cacheinfo's cpu_map_populated field to true, indicating that we filled in cache info detected from cop0 registers & avoiding complaints about that info being (intentionally) missing in devicetree" * tag 'mips_fixes_5.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: BCM63XX: Mark expected switch fall-through MIPS: OProfile: Mark expected switch fall-throughs MIPS: Annotate fall-through in Cavium Octeon code MIPS: Annotate fall-through in kvm/emulate.c mips: fix cacheinfo MIPS: kernel: only use i8253 clocksource with periodic clockevent
-rw-r--r--arch/mips/cavium-octeon/octeon-usb.c1
-rw-r--r--arch/mips/kernel/cacheinfo.c2
-rw-r--r--arch/mips/kernel/i8253.c3
-rw-r--r--arch/mips/kvm/emulate.c1
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c13
-rw-r--r--arch/mips/pci/ops-bcm63xx.c1
6 files changed, 20 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/arch/mips/cavium-octeon/octeon-usb.c
index 1f730ded5224..cc88a08bc1f7 100644
--- a/arch/mips/cavium-octeon/octeon-usb.c
+++ b/arch/mips/cavium-octeon/octeon-usb.c
@@ -398,6 +398,7 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base)
398 default: 398 default:
399 dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n", 399 dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n",
400 clock_rate); 400 clock_rate);
401 /* fall through */
401 case 100000000: 402 case 100000000:
402 mpll_mul = 0x19; 403 mpll_mul = 0x19;
403 if (ref_clk_sel < 2) 404 if (ref_clk_sel < 2)
diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c
index e0dd66881da6..f777e44653d5 100644
--- a/arch/mips/kernel/cacheinfo.c
+++ b/arch/mips/kernel/cacheinfo.c
@@ -69,6 +69,8 @@ static int __populate_cache_leaves(unsigned int cpu)
69 if (c->tcache.waysize) 69 if (c->tcache.waysize)
70 populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED); 70 populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);
71 71
72 this_cpu_ci->cpu_map_populated = true;
73
72 return 0; 74 return 0;
73} 75}
74 76
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index 5f209f111e59..df7ddd246eaa 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -32,7 +32,8 @@ void __init setup_pit_timer(void)
32 32
33static int __init init_pit_clocksource(void) 33static int __init init_pit_clocksource(void)
34{ 34{
35 if (num_possible_cpus() > 1) /* PIT does not scale! */ 35 if (num_possible_cpus() > 1 || /* PIT does not scale! */
36 !clockevent_state_periodic(&i8253_clockevent))
36 return 0; 37 return 0;
37 38
38 return clocksource_i8253_init(); 39 return clocksource_i8253_init();
diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index e5de6bac8197..754094b40a75 100644
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -140,6 +140,7 @@ static int kvm_compute_return_epc(struct kvm_vcpu *vcpu, unsigned long instpc,
140 /* These are unconditional and in j_format. */ 140 /* These are unconditional and in j_format. */
141 case jal_op: 141 case jal_op:
142 arch->gprs[31] = instpc + 8; 142 arch->gprs[31] = instpc + 8;
143 /* fall through */
143 case j_op: 144 case j_op:
144 epc += 4; 145 epc += 4;
145 epc >>= 28; 146 epc >>= 28;
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 7c04b17f4a48..96c13a0ab078 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -172,12 +172,15 @@ static void mipsxx_cpu_setup(void *args)
172 case 4: 172 case 4:
173 w_c0_perfctrl3(0); 173 w_c0_perfctrl3(0);
174 w_c0_perfcntr3(reg.counter[3]); 174 w_c0_perfcntr3(reg.counter[3]);
175 /* fall through */
175 case 3: 176 case 3:
176 w_c0_perfctrl2(0); 177 w_c0_perfctrl2(0);
177 w_c0_perfcntr2(reg.counter[2]); 178 w_c0_perfcntr2(reg.counter[2]);
179 /* fall through */
178 case 2: 180 case 2:
179 w_c0_perfctrl1(0); 181 w_c0_perfctrl1(0);
180 w_c0_perfcntr1(reg.counter[1]); 182 w_c0_perfcntr1(reg.counter[1]);
183 /* fall through */
181 case 1: 184 case 1:
182 w_c0_perfctrl0(0); 185 w_c0_perfctrl0(0);
183 w_c0_perfcntr0(reg.counter[0]); 186 w_c0_perfcntr0(reg.counter[0]);
@@ -195,10 +198,13 @@ static void mipsxx_cpu_start(void *args)
195 switch (counters) { 198 switch (counters) {
196 case 4: 199 case 4:
197 w_c0_perfctrl3(WHAT | reg.control[3]); 200 w_c0_perfctrl3(WHAT | reg.control[3]);
201 /* fall through */
198 case 3: 202 case 3:
199 w_c0_perfctrl2(WHAT | reg.control[2]); 203 w_c0_perfctrl2(WHAT | reg.control[2]);
204 /* fall through */
200 case 2: 205 case 2:
201 w_c0_perfctrl1(WHAT | reg.control[1]); 206 w_c0_perfctrl1(WHAT | reg.control[1]);
207 /* fall through */
202 case 1: 208 case 1:
203 w_c0_perfctrl0(WHAT | reg.control[0]); 209 w_c0_perfctrl0(WHAT | reg.control[0]);
204 } 210 }
@@ -215,10 +221,13 @@ static void mipsxx_cpu_stop(void *args)
215 switch (counters) { 221 switch (counters) {
216 case 4: 222 case 4:
217 w_c0_perfctrl3(0); 223 w_c0_perfctrl3(0);
224 /* fall through */
218 case 3: 225 case 3:
219 w_c0_perfctrl2(0); 226 w_c0_perfctrl2(0);
227 /* fall through */
220 case 2: 228 case 2:
221 w_c0_perfctrl1(0); 229 w_c0_perfctrl1(0);
230 /* fall through */
222 case 1: 231 case 1:
223 w_c0_perfctrl0(0); 232 w_c0_perfctrl0(0);
224 } 233 }
@@ -236,6 +245,7 @@ static int mipsxx_perfcount_handler(void)
236 245
237 switch (counters) { 246 switch (counters) {
238#define HANDLE_COUNTER(n) \ 247#define HANDLE_COUNTER(n) \
248 /* fall through */ \
239 case n + 1: \ 249 case n + 1: \
240 control = r_c0_perfctrl ## n(); \ 250 control = r_c0_perfctrl ## n(); \
241 counter = r_c0_perfcntr ## n(); \ 251 counter = r_c0_perfcntr ## n(); \
@@ -297,12 +307,15 @@ static void reset_counters(void *arg)
297 case 4: 307 case 4:
298 w_c0_perfctrl3(0); 308 w_c0_perfctrl3(0);
299 w_c0_perfcntr3(0); 309 w_c0_perfcntr3(0);
310 /* fall through */
300 case 3: 311 case 3:
301 w_c0_perfctrl2(0); 312 w_c0_perfctrl2(0);
302 w_c0_perfcntr2(0); 313 w_c0_perfcntr2(0);
314 /* fall through */
303 case 2: 315 case 2:
304 w_c0_perfctrl1(0); 316 w_c0_perfctrl1(0);
305 w_c0_perfcntr1(0); 317 w_c0_perfcntr1(0);
318 /* fall through */
306 case 1: 319 case 1:
307 w_c0_perfctrl0(0); 320 w_c0_perfctrl0(0);
308 w_c0_perfcntr0(0); 321 w_c0_perfcntr0(0);
diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index d02eb9d16b55..925c72348fb6 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -474,6 +474,7 @@ static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn)
474 if (PCI_SLOT(devfn) == 0) 474 if (PCI_SLOT(devfn) == 0)
475 return bcm_pcie_readl(PCIE_DLSTATUS_REG) 475 return bcm_pcie_readl(PCIE_DLSTATUS_REG)
476 & DLSTATUS_PHYLINKUP; 476 & DLSTATUS_PHYLINKUP;
477 /* else, fall through */
477 default: 478 default:
478 return false; 479 return false;
479 } 480 }