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authorDavid Howells <dhowells@redhat.com>2018-03-08 04:48:46 -0500
committerArnd Bergmann <arnd@arndb.de>2018-03-09 17:19:56 -0500
commit739d875dd6982618020d30f58f8acf10f6076e6d (patch)
tree13deb11d5b2078e49d4e5b6175e5846a22a04b95
parentb67aea2bbab780e412b8af3386cc9f78f61a4cac (diff)
mn10300: Remove the architecture
Remove the MN10300 arch as the hardware is defunct. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David Howells <dhowells@redhat.com> cc: Masahiro Yamada <yamada.masahiro@socionext.com> cc: linux-am33-list@redhat.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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-rw-r--r--arch/mn10300/unit-asb2364/Makefile12
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/clock.h29
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/fpga-regs.h53
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/irq.h35
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/leds.h54
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/serial.h151
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/smsc911x.h171
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/timex.h155
-rw-r--r--arch/mn10300/unit-asb2364/irq-fpga.c108
-rw-r--r--arch/mn10300/unit-asb2364/leds.c98
-rw-r--r--arch/mn10300/unit-asb2364/smsc911x.c58
-rw-r--r--arch/mn10300/unit-asb2364/unit-init.c132
-rw-r--r--crypto/sha3_generic.c2
-rw-r--r--drivers/input/joystick/analog.c2
-rw-r--r--drivers/net/ethernet/smsc/Kconfig6
-rw-r--r--drivers/net/ethernet/smsc/smc91x.h8
-rw-r--r--drivers/rtc/Kconfig2
-rw-r--r--drivers/rtc/rtc-cmos.c2
-rw-r--r--drivers/staging/speakup/Kconfig2
-rw-r--r--drivers/video/console/Kconfig2
-rw-r--r--include/asm-generic/atomic.h2
-rw-r--r--include/asm-generic/barrier.h2
-rw-r--r--include/asm-generic/exec.h2
-rw-r--r--include/asm-generic/io.h2
-rw-r--r--include/asm-generic/pci_iomap.h2
-rw-r--r--include/asm-generic/switch_to.h2
-rw-r--r--include/linux/ide.h2
-rw-r--r--init/Kconfig2
-rw-r--r--lib/Kconfig.debug2
-rw-r--r--lib/test_user_copy.c1
-rw-r--r--scripts/mod/modpost.c7
-rw-r--r--tools/arch/mn10300/include/uapi/asm/bitsperlong.h1
-rw-r--r--tools/arch/mn10300/include/uapi/asm/mman.h7
-rw-r--r--tools/include/asm-generic/barrier.h2
343 files changed, 21 insertions, 34163 deletions
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index eae1e7193f50..bd7e2d08d790 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -284,8 +284,6 @@ misc-devices/
284 - directory with info about devices using the misc dev subsystem 284 - directory with info about devices using the misc dev subsystem
285mmc/ 285mmc/
286 - directory with info about the MMC subsystem 286 - directory with info about the MMC subsystem
287mn10300/
288 - directory with info about the mn10300 architecture port
289mtd/ 287mtd/
290 - directory with info about memory technology devices (flash) 288 - directory with info about memory technology devices (flash)
291namespaces/ 289namespaces/
diff --git a/Documentation/features/core/BPF-JIT/arch-support.txt b/Documentation/features/core/BPF-JIT/arch-support.txt
index b0634ec01881..544eb1dd5fe1 100644
--- a/Documentation/features/core/BPF-JIT/arch-support.txt
+++ b/Documentation/features/core/BPF-JIT/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/core/generic-idle-thread/arch-support.txt b/Documentation/features/core/generic-idle-thread/arch-support.txt
index e2a1a385efd3..c7f8626faca2 100644
--- a/Documentation/features/core/generic-idle-thread/arch-support.txt
+++ b/Documentation/features/core/generic-idle-thread/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | ok | 26 | parisc: | ok |
diff --git a/Documentation/features/core/jump-labels/arch-support.txt b/Documentation/features/core/jump-labels/arch-support.txt
index dafcea38fe5e..647b0ab5a78d 100644
--- a/Documentation/features/core/jump-labels/arch-support.txt
+++ b/Documentation/features/core/jump-labels/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/core/tracehook/arch-support.txt b/Documentation/features/core/tracehook/arch-support.txt
index 3d7886fcb6a9..c95ba6d79cee 100644
--- a/Documentation/features/core/tracehook/arch-support.txt
+++ b/Documentation/features/core/tracehook/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | ok |
25 | nios2: | ok | 24 | nios2: | ok |
26 | openrisc: | ok | 25 | openrisc: | ok |
27 | parisc: | ok | 26 | parisc: | ok |
diff --git a/Documentation/features/debug/KASAN/arch-support.txt b/Documentation/features/debug/KASAN/arch-support.txt
index 63598b0e8ea6..fbb5afe45848 100644
--- a/Documentation/features/debug/KASAN/arch-support.txt
+++ b/Documentation/features/debug/KASAN/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/gcov-profile-all/arch-support.txt b/Documentation/features/debug/gcov-profile-all/arch-support.txt
index 13b3b3dfe7f2..a35c5057585b 100644
--- a/Documentation/features/debug/gcov-profile-all/arch-support.txt
+++ b/Documentation/features/debug/gcov-profile-all/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/kgdb/arch-support.txt b/Documentation/features/debug/kgdb/arch-support.txt
index cb4792cf0f98..afb31a2505cb 100644
--- a/Documentation/features/debug/kgdb/arch-support.txt
+++ b/Documentation/features/debug/kgdb/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | ok |
25 | nios2: | ok | 24 | nios2: | ok |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
index 2046539489fe..4144979bc022 100644
--- a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
+++ b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/kprobes/arch-support.txt b/Documentation/features/debug/kprobes/arch-support.txt
index bfb3546a70d0..7ec1a185e713 100644
--- a/Documentation/features/debug/kprobes/arch-support.txt
+++ b/Documentation/features/debug/kprobes/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/kretprobes/arch-support.txt b/Documentation/features/debug/kretprobes/arch-support.txt
index cb2213bfadc5..fa9009c08b1f 100644
--- a/Documentation/features/debug/kretprobes/arch-support.txt
+++ b/Documentation/features/debug/kretprobes/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/optprobes/arch-support.txt b/Documentation/features/debug/optprobes/arch-support.txt
index 219aa64ca3f5..38adefbe2edf 100644
--- a/Documentation/features/debug/optprobes/arch-support.txt
+++ b/Documentation/features/debug/optprobes/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/stackprotector/arch-support.txt b/Documentation/features/debug/stackprotector/arch-support.txt
index 904864c3f18c..2965ae0ca139 100644
--- a/Documentation/features/debug/stackprotector/arch-support.txt
+++ b/Documentation/features/debug/stackprotector/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/uprobes/arch-support.txt b/Documentation/features/debug/uprobes/arch-support.txt
index d092f000e6bb..5da0bc2e7e1e 100644
--- a/Documentation/features/debug/uprobes/arch-support.txt
+++ b/Documentation/features/debug/uprobes/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/debug/user-ret-profiler/arch-support.txt b/Documentation/features/debug/user-ret-profiler/arch-support.txt
index 9e9e195b6d30..a45ced203f32 100644
--- a/Documentation/features/debug/user-ret-profiler/arch-support.txt
+++ b/Documentation/features/debug/user-ret-profiler/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/io/dma-api-debug/arch-support.txt b/Documentation/features/io/dma-api-debug/arch-support.txt
index ba9e169859c4..411ec941e46c 100644
--- a/Documentation/features/io/dma-api-debug/arch-support.txt
+++ b/Documentation/features/io/dma-api-debug/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/io/dma-contiguous/arch-support.txt b/Documentation/features/io/dma-contiguous/arch-support.txt
index 35b501f2c117..3b65953a96a9 100644
--- a/Documentation/features/io/dma-contiguous/arch-support.txt
+++ b/Documentation/features/io/dma-contiguous/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/io/sg-chain/arch-support.txt b/Documentation/features/io/sg-chain/arch-support.txt
index 42c078dff18b..65e9368c69a7 100644
--- a/Documentation/features/io/sg-chain/arch-support.txt
+++ b/Documentation/features/io/sg-chain/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/lib/strncasecmp/arch-support.txt b/Documentation/features/lib/strncasecmp/arch-support.txt
index b10c21f14739..cee48bd07b08 100644
--- a/Documentation/features/lib/strncasecmp/arch-support.txt
+++ b/Documentation/features/lib/strncasecmp/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/locking/cmpxchg-local/arch-support.txt b/Documentation/features/locking/cmpxchg-local/arch-support.txt
index 3b87fd37bae8..a83465dc0db5 100644
--- a/Documentation/features/locking/cmpxchg-local/arch-support.txt
+++ b/Documentation/features/locking/cmpxchg-local/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/locking/lockdep/arch-support.txt b/Documentation/features/locking/lockdep/arch-support.txt
index cefcd720f04e..e5d51c585a90 100644
--- a/Documentation/features/locking/lockdep/arch-support.txt
+++ b/Documentation/features/locking/lockdep/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/locking/queued-rwlocks/arch-support.txt b/Documentation/features/locking/queued-rwlocks/arch-support.txt
index da6c7e37141c..5cae3a63a44e 100644
--- a/Documentation/features/locking/queued-rwlocks/arch-support.txt
+++ b/Documentation/features/locking/queued-rwlocks/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/locking/queued-spinlocks/arch-support.txt b/Documentation/features/locking/queued-spinlocks/arch-support.txt
index 1e5dbcdd1c76..cb227de0bbf9 100644
--- a/Documentation/features/locking/queued-spinlocks/arch-support.txt
+++ b/Documentation/features/locking/queued-spinlocks/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/locking/rwsem-optimized/arch-support.txt b/Documentation/features/locking/rwsem-optimized/arch-support.txt
index b79e92288112..ee70c9c52627 100644
--- a/Documentation/features/locking/rwsem-optimized/arch-support.txt
+++ b/Documentation/features/locking/rwsem-optimized/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/perf/kprobes-event/arch-support.txt b/Documentation/features/perf/kprobes-event/arch-support.txt
index 6418ccc6fc34..52f54e64e993 100644
--- a/Documentation/features/perf/kprobes-event/arch-support.txt
+++ b/Documentation/features/perf/kprobes-event/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/perf/perf-regs/arch-support.txt b/Documentation/features/perf/perf-regs/arch-support.txt
index 3b3392ac6466..e4294aed38bf 100644
--- a/Documentation/features/perf/perf-regs/arch-support.txt
+++ b/Documentation/features/perf/perf-regs/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/perf/perf-stackdump/arch-support.txt b/Documentation/features/perf/perf-stackdump/arch-support.txt
index 4594cb28fbc8..b12117a9aa4d 100644
--- a/Documentation/features/perf/perf-stackdump/arch-support.txt
+++ b/Documentation/features/perf/perf-stackdump/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/sched/membarrier-sync-core/arch-support.txt b/Documentation/features/sched/membarrier-sync-core/arch-support.txt
index 42eaab4d439d..0f419ecfbce6 100644
--- a/Documentation/features/sched/membarrier-sync-core/arch-support.txt
+++ b/Documentation/features/sched/membarrier-sync-core/arch-support.txt
@@ -44,7 +44,6 @@
44 | m68k: | TODO | 44 | m68k: | TODO |
45 | microblaze: | TODO | 45 | microblaze: | TODO |
46 | mips: | TODO | 46 | mips: | TODO |
47 | mn10300: | TODO |
48 | nios2: | TODO | 47 | nios2: | TODO |
49 | openrisc: | TODO | 48 | openrisc: | TODO |
50 | parisc: | TODO | 49 | parisc: | TODO |
diff --git a/Documentation/features/sched/numa-balancing/arch-support.txt b/Documentation/features/sched/numa-balancing/arch-support.txt
index 4e67833aae66..045418673368 100644
--- a/Documentation/features/sched/numa-balancing/arch-support.txt
+++ b/Documentation/features/sched/numa-balancing/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | .. | 21 | m68k: | .. |
22 | microblaze: | .. | 22 | microblaze: | .. |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | .. |
25 | nios2: | .. | 24 | nios2: | .. |
26 | openrisc: | .. | 25 | openrisc: | .. |
27 | parisc: | .. | 26 | parisc: | .. |
diff --git a/Documentation/features/seccomp/seccomp-filter/arch-support.txt b/Documentation/features/seccomp/seccomp-filter/arch-support.txt
index c5d8b397a693..c08a330e51d2 100644
--- a/Documentation/features/seccomp/seccomp-filter/arch-support.txt
+++ b/Documentation/features/seccomp/seccomp-filter/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/time/arch-tick-broadcast/arch-support.txt b/Documentation/features/time/arch-tick-broadcast/arch-support.txt
index 9e4999136881..da91b576ede8 100644
--- a/Documentation/features/time/arch-tick-broadcast/arch-support.txt
+++ b/Documentation/features/time/arch-tick-broadcast/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/time/clockevents/arch-support.txt b/Documentation/features/time/clockevents/arch-support.txt
index f90cb64c640b..d76322a76668 100644
--- a/Documentation/features/time/clockevents/arch-support.txt
+++ b/Documentation/features/time/clockevents/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | ok | 21 | m68k: | ok |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | ok |
25 | nios2: | ok | 24 | nios2: | ok |
26 | openrisc: | ok | 25 | openrisc: | ok |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/time/context-tracking/arch-support.txt b/Documentation/features/time/context-tracking/arch-support.txt
index eb4e5d32a2e9..09582d171c84 100644
--- a/Documentation/features/time/context-tracking/arch-support.txt
+++ b/Documentation/features/time/context-tracking/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt
index 02b7441f360f..5df0285b6fc4 100644
--- a/Documentation/features/time/irq-time-acct/arch-support.txt
+++ b/Documentation/features/time/irq-time-acct/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | .. | 26 | parisc: | .. |
diff --git a/Documentation/features/time/modern-timekeeping/arch-support.txt b/Documentation/features/time/modern-timekeeping/arch-support.txt
index b3eb6fe6bc27..0f8c7e4084b0 100644
--- a/Documentation/features/time/modern-timekeeping/arch-support.txt
+++ b/Documentation/features/time/modern-timekeeping/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | ok |
25 | nios2: | ok | 24 | nios2: | ok |
26 | openrisc: | ok | 25 | openrisc: | ok |
27 | parisc: | ok | 26 | parisc: | ok |
diff --git a/Documentation/features/time/virt-cpuacct/arch-support.txt b/Documentation/features/time/virt-cpuacct/arch-support.txt
index a1bd77fd723a..c0af0a37444d 100644
--- a/Documentation/features/time/virt-cpuacct/arch-support.txt
+++ b/Documentation/features/time/virt-cpuacct/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | ok | 26 | parisc: | ok |
diff --git a/Documentation/features/vm/ELF-ASLR/arch-support.txt b/Documentation/features/vm/ELF-ASLR/arch-support.txt
index 3f926177833c..72c3124ffd1f 100644
--- a/Documentation/features/vm/ELF-ASLR/arch-support.txt
+++ b/Documentation/features/vm/ELF-ASLR/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/PG_uncached/arch-support.txt b/Documentation/features/vm/PG_uncached/arch-support.txt
index 4c8f65d525d7..46c62a1d7dda 100644
--- a/Documentation/features/vm/PG_uncached/arch-support.txt
+++ b/Documentation/features/vm/PG_uncached/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/THP/arch-support.txt b/Documentation/features/vm/THP/arch-support.txt
index d121dc2e3e5e..eaace2054bb4 100644
--- a/Documentation/features/vm/THP/arch-support.txt
+++ b/Documentation/features/vm/THP/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | .. | 21 | m68k: | .. |
22 | microblaze: | .. | 22 | microblaze: | .. |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | .. |
25 | nios2: | .. | 24 | nios2: | .. |
26 | openrisc: | .. | 25 | openrisc: | .. |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/TLB/arch-support.txt b/Documentation/features/vm/TLB/arch-support.txt
index af233d2d82cf..b1088eaaff3f 100644
--- a/Documentation/features/vm/TLB/arch-support.txt
+++ b/Documentation/features/vm/TLB/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | .. | 21 | m68k: | .. |
22 | microblaze: | .. | 22 | microblaze: | .. |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | .. | 24 | nios2: | .. |
26 | openrisc: | .. | 25 | openrisc: | .. |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/huge-vmap/arch-support.txt b/Documentation/features/vm/huge-vmap/arch-support.txt
index 45c74fbe6805..6e4e5295ee2a 100644
--- a/Documentation/features/vm/huge-vmap/arch-support.txt
+++ b/Documentation/features/vm/huge-vmap/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/ioremap_prot/arch-support.txt b/Documentation/features/vm/ioremap_prot/arch-support.txt
index 6cd436af0cc8..185e0654389f 100644
--- a/Documentation/features/vm/ioremap_prot/arch-support.txt
+++ b/Documentation/features/vm/ioremap_prot/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/features/vm/numa-memblock/arch-support.txt b/Documentation/features/vm/numa-memblock/arch-support.txt
index 2db895856da6..de7f891fb2a8 100644
--- a/Documentation/features/vm/numa-memblock/arch-support.txt
+++ b/Documentation/features/vm/numa-memblock/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | .. | 21 | m68k: | .. |
22 | microblaze: | ok | 22 | microblaze: | ok |
23 | mips: | ok | 23 | mips: | ok |
24 | mn10300: | TODO |
25 | nios2: | .. | 24 | nios2: | .. |
26 | openrisc: | .. | 25 | openrisc: | .. |
27 | parisc: | .. | 26 | parisc: | .. |
diff --git a/Documentation/features/vm/pte_special/arch-support.txt b/Documentation/features/vm/pte_special/arch-support.txt
index ccb15b6da42f..8587fe975fea 100644
--- a/Documentation/features/vm/pte_special/arch-support.txt
+++ b/Documentation/features/vm/pte_special/arch-support.txt
@@ -21,7 +21,6 @@
21 | m68k: | TODO | 21 | m68k: | TODO |
22 | microblaze: | TODO | 22 | microblaze: | TODO |
23 | mips: | TODO | 23 | mips: | TODO |
24 | mn10300: | TODO |
25 | nios2: | TODO | 24 | nios2: | TODO |
26 | openrisc: | TODO | 25 | openrisc: | TODO |
27 | parisc: | TODO | 26 | parisc: | TODO |
diff --git a/Documentation/mn10300/ABI.txt b/Documentation/mn10300/ABI.txt
deleted file mode 100644
index d3507bad428d..000000000000
--- a/Documentation/mn10300/ABI.txt
+++ /dev/null
@@ -1,149 +0,0 @@
1 =========================
2 MN10300 FUNCTION CALL ABI
3 =========================
4
5=======
6GENERAL
7=======
8
9The MN10300/AM33 kernel runs in little-endian mode; big-endian mode is not
10supported.
11
12The stack grows downwards, and should always be 32-bit aligned. There are
13separate stack pointer registers for userspace and the kernel.
14
15
16================
17ARGUMENT PASSING
18================
19
20The first two arguments (assuming up to 32-bits per argument) to a function are
21passed in the D0 and D1 registers respectively; all other arguments are passed
22on the stack.
23
24If 64-bit arguments are being passed, then they are never split between
25registers and the stack. If the first argument is a 64-bit value, it will be
26passed in D0:D1. If the first argument is not a 64-bit value, but the second
27is, the second will be passed entirely on the stack and D1 will be unused.
28
29Arguments smaller than 32-bits are not coalesced within a register or a stack
30word. For example, two byte-sized arguments will always be passed in separate
31registers or word-sized stack slots.
32
33
34=================
35CALLING FUNCTIONS
36=================
37
38The caller must allocate twelve bytes on the stack for the callee's use before
39it inserts a CALL instruction. The CALL instruction will write into the TOS
40word, but won't actually modify the stack pointer; similarly, the RET
41instruction reads from the TOS word of the stack, but doesn't move the stack
42pointer beyond it.
43
44
45 Stack:
46 | |
47 | |
48 |---------------| SP+20
49 | 4th Arg |
50 |---------------| SP+16
51 | 3rd Arg |
52 |---------------| SP+12
53 | D1 Save Slot |
54 |---------------| SP+8
55 | D0 Save Slot |
56 |---------------| SP+4
57 | Return Addr |
58 |---------------| SP
59 | |
60 | |
61
62
63The caller must leave space on the stack (hence an allocation of twelve bytes)
64in which the callee may store the first two arguments.
65
66
67============
68RETURN VALUE
69============
70
71The return value is passed in D0 for an integer (or D0:D1 for a 64-bit value),
72or A0 for a pointer.
73
74If the return value is a value larger than 64-bits, or is a structure or an
75array, then a hidden first argument will be passed to the callee by the caller:
76this will point to a piece of memory large enough to hold the result of the
77function. In this case, the callee will return the value in that piece of
78memory, and no value will be returned in D0 or A0.
79
80
81===================
82REGISTER CLOBBERING
83===================
84
85The values in certain registers may be clobbered by the callee, and other
86values must be saved:
87
88 Clobber: D0-D1, A0-A1, E0-E3
89 Save: D2-D3, A2-A3, E4-E7, SP
90
91All other non-supervisor-only registers are clobberable (such as MDR, MCRL,
92MCRH).
93
94
95=================
96SPECIAL REGISTERS
97=================
98
99Certain ordinary registers may carry special usage for the compiler:
100
101 A3: Frame pointer
102 E2: TLS pointer
103
104
105==========
106KERNEL ABI
107==========
108
109The kernel may use a slightly different ABI internally.
110
111 (*) E2
112
113 If CONFIG_MN10300_CURRENT_IN_E2 is defined, then the current task pointer
114 will be kept in the E2 register, and that register will be marked
115 unavailable for the compiler to use as a scratch register.
116
117 Normally the kernel uses something like:
118
119 MOV SP,An
120 AND 0xFFFFE000,An
121 MOV (An),Rm // Rm holds current
122 MOV (yyy,Rm) // Access current->yyy
123
124 To find the address of current; but since this option permits current to
125 be carried globally in an register, it can use:
126
127 MOV (yyy,E2) // Access current->yyy
128
129 instead.
130
131
132===============
133SYSTEM CALL ABI
134===============
135
136System calls are called with the following convention:
137
138 REGISTER ENTRY EXIT
139 =============== ======================= =======================
140 D0 Syscall number Return value
141 A0 1st syscall argument Saved
142 D1 2nd syscall argument Saved
143 A3 3rd syscall argument Saved
144 A2 4th syscall argument Saved
145 D3 5th syscall argument Saved
146 D2 6th syscall argument Saved
147
148All other registers are saved. The layout is a consequence of the way the MOVM
149instruction stores registers onto the stack.
diff --git a/Documentation/mn10300/compartmentalisation.txt b/Documentation/mn10300/compartmentalisation.txt
deleted file mode 100644
index 8958b51dac4b..000000000000
--- a/Documentation/mn10300/compartmentalisation.txt
+++ /dev/null
@@ -1,60 +0,0 @@
1 =========================================
2 PART-SPECIFIC SOURCE COMPARTMENTALISATION
3 =========================================
4
5The sources for various parts are compartmentalised at two different levels:
6
7 (1) Processor level
8
9 The "processor level" is a CPU core plus the other on-silicon
10 peripherals.
11
12 Processor-specific header files are divided among directories in a similar
13 way to the CPU level:
14
15 (*) include/asm-mn10300/proc-mn103e010/
16
17 Support for the AM33v2 CPU core.
18
19 The appropriate processor is selected by a CONFIG_MN10300_PROC_YYYY option
20 from the "Processor support" choice menu in the arch/mn10300/Kconfig file.
21
22
23 (2) Unit level
24
25 The "unit level" is a processor plus all the external peripherals
26 controlled by that processor.
27
28 Unit-specific header files are divided among directories in a similar way
29 to the CPU level; not only that, but specific sources may also be
30 segregated into separate directories under the arch directory:
31
32 (*) include/asm-mn10300/unit-asb2303/
33 (*) arch/mn10300/unit-asb2303/
34
35 Support for the ASB2303 board with an ASB2308 daughter board.
36
37 (*) include/asm-mn10300/unit-asb2305/
38 (*) arch/mn10300/unit-asb2305/
39
40 Support for the ASB2305 board.
41
42 The appropriate processor is selected by a CONFIG_MN10300_UNIT_ZZZZ option
43 from the "Unit type" choice menu in the arch/mn10300/Kconfig file.
44
45
46============
47COMPILE TIME
48============
49
50When the kernel is compiled, symbolic links will be made in the asm header file
51directory for this arch:
52
53 include/asm-mn10300/proc => include/asm-mn10300/proc-YYYY/
54 include/asm-mn10300/unit => include/asm-mn10300/unit-ZZZZ/
55
56So that the header files contained in those directories can be accessed without
57lots of #ifdef-age.
58
59The appropriate arch/mn10300/unit-ZZZZ directory will also be entered by the
60compilation process; all other unit-specific directories will be ignored.
diff --git a/MAINTAINERS b/MAINTAINERS
index 313754bf39e1..69123be5bb64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10394,14 +10394,6 @@ L: platform-driver-x86@vger.kernel.org
10394S: Maintained 10394S: Maintained
10395F: drivers/platform/x86/panasonic-laptop.c 10395F: drivers/platform/x86/panasonic-laptop.c
10396 10396
10397PANASONIC MN10300/AM33/AM34 PORT
10398M: David Howells <dhowells@redhat.com>
10399L: linux-am33-list@redhat.com (moderated for non-subscribers)
10400W: ftp://ftp.redhat.com/pub/redhat/gnupro/AM33/
10401S: Maintained
10402F: Documentation/mn10300/
10403F: arch/mn10300/
10404
10405PARALLEL LCD/KEYPAD PANEL DRIVER 10397PARALLEL LCD/KEYPAD PANEL DRIVER
10406M: Willy Tarreau <willy@haproxy.com> 10398M: Willy Tarreau <willy@haproxy.com>
10407M: Ksenija Stanojevic <ksenija.stanojevic@gmail.com> 10399M: Ksenija Stanojevic <ksenija.stanojevic@gmail.com>
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
deleted file mode 100644
index e9d8d60bd28b..000000000000
--- a/arch/mn10300/Kconfig
+++ /dev/null
@@ -1,499 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2config MN10300
3 def_bool y
4 select HAVE_EXIT_THREAD
5 select HAVE_OPROFILE
6 select HAVE_UID16
7 select GENERIC_IRQ_SHOW
8 select ARCH_WANT_IPC_PARSE_VERSION
9 select HAVE_ARCH_TRACEHOOK
10 select HAVE_ARCH_KGDB
11 select GENERIC_ATOMIC64
12 select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER
13 select VIRT_TO_BUS
14 select GENERIC_CLOCKEVENTS
15 select MODULES_USE_ELF_RELA
16 select OLD_SIGSUSPEND3
17 select OLD_SIGACTION
18 select HAVE_DEBUG_STACKOVERFLOW
19 select ARCH_NO_COHERENT_DMA_MMAP
20
21config AM33_2
22 def_bool n
23
24config AM33_3
25 def_bool n
26
27config AM34_2
28 def_bool n
29 select MN10300_HAS_ATOMIC_OPS_UNIT
30 select MN10300_HAS_CACHE_SNOOP
31
32config ERRATUM_NEED_TO_RELOAD_MMUCTR
33 def_bool y if AM33_3 || AM34_2
34
35config MMU
36 def_bool y
37
38config HIGHMEM
39 def_bool n
40
41config NUMA
42 def_bool n
43
44config RWSEM_GENERIC_SPINLOCK
45 def_bool y
46
47config RWSEM_XCHGADD_ALGORITHM
48 bool
49
50config GENERIC_CALIBRATE_DELAY
51 def_bool y
52
53config GENERIC_HWEIGHT
54 def_bool y
55
56config GENERIC_BUG
57 def_bool y
58 depends on BUG
59
60config QUICKLIST
61 def_bool y
62
63config ARCH_HAS_ILOG2_U32
64 def_bool y
65
66config HOTPLUG_CPU
67 def_bool n
68
69source "init/Kconfig"
70
71source "kernel/Kconfig.freezer"
72
73
74menu "Panasonic MN10300 system setup"
75
76choice
77 prompt "Unit type"
78 default MN10300_UNIT_ASB2303
79 help
80 This option specifies board for which the kernel will be
81 compiled. It affects the external peripherals catered for.
82
83config MN10300_UNIT_ASB2303
84 bool "ASB2303"
85
86config MN10300_UNIT_ASB2305
87 bool "ASB2305"
88
89config MN10300_UNIT_ASB2364
90 bool "ASB2364"
91 select SMSC911X_ARCH_HOOKS if SMSC911X
92
93endchoice
94
95choice
96 prompt "Processor support"
97 default MN10300_PROC_MN103E010
98 help
99 This option specifies the processor for which the kernel will be
100 compiled. It affects the on-chip peripherals catered for.
101
102config MN10300_PROC_MN103E010
103 bool "MN103E010"
104 depends on MN10300_UNIT_ASB2303 || MN10300_UNIT_ASB2305
105 select AM33_2
106 select MN10300_PROC_HAS_TTYSM0
107 select MN10300_PROC_HAS_TTYSM1
108 select MN10300_PROC_HAS_TTYSM2
109
110config MN10300_PROC_MN2WS0050
111 bool "MN2WS0050"
112 depends on MN10300_UNIT_ASB2364
113 select AM34_2
114 select MN10300_PROC_HAS_TTYSM0
115 select MN10300_PROC_HAS_TTYSM1
116 select MN10300_PROC_HAS_TTYSM2
117
118endchoice
119
120config MN10300_HAS_ATOMIC_OPS_UNIT
121 def_bool n
122 help
123 This should be enabled if the processor has an atomic ops unit
124 capable of doing LL/SC equivalent operations.
125
126config FPU
127 bool "FPU present"
128 default y
129 depends on MN10300_PROC_MN103E010 || MN10300_PROC_MN2WS0050
130
131config LAZY_SAVE_FPU
132 bool "Save FPU state lazily"
133 default y
134 depends on FPU && !SMP
135 help
136 Enable this to be lazy in the saving of the FPU state to the owning
137 task's thread struct. This is useful if most tasks on the system
138 don't use the FPU as only those tasks that use it will pass it
139 between them, and the state needn't be saved for a task that isn't
140 using it.
141
142 This can't be so easily used on SMP as the process that owns the FPU
143 state on a CPU may be currently running on another CPU, so for the
144 moment, it is disabled.
145
146source "arch/mn10300/mm/Kconfig.cache"
147
148config MN10300_TLB_USE_PIDR
149 def_bool y
150
151menu "Memory layout options"
152
153config KERNEL_RAM_BASE_ADDRESS
154 hex "Base address of kernel RAM"
155 default "0x90000000"
156
157config INTERRUPT_VECTOR_BASE
158 hex "Base address of vector table"
159 default "0x90000000"
160 help
161 The base address of the vector table will be programmed into
162 the TBR register. It must be on 16MiB address boundary.
163
164config KERNEL_TEXT_ADDRESS
165 hex "Base address of kernel"
166 default "0x90001000"
167
168config KERNEL_ZIMAGE_BASE_ADDRESS
169 hex "Base address of compressed vmlinux image"
170 default "0x50700000"
171
172config BOOT_STACK_OFFSET
173 hex
174 default "0xF00" if SMP
175 default "0xFF0" if !SMP
176
177config BOOT_STACK_SIZE
178 hex
179 depends on SMP
180 default "0x100"
181endmenu
182
183config SMP
184 bool "Symmetric multi-processing support"
185 default y
186 depends on MN10300_PROC_MN2WS0050
187 ---help---
188 This enables support for systems with more than one CPU. If you have
189 a system with only one CPU, say N. If you have a system with more
190 than one CPU, say Y.
191
192 If you say N here, the kernel will run on uni- and multiprocessor
193 machines, but will use only one CPU of a multiprocessor machine. If
194 you say Y here, the kernel will run on many, but not all,
195 uniprocessor machines. On a uniprocessor machine, the kernel
196 will run faster if you say N here.
197
198 See also <file:Documentation/x86/i386/IO-APIC.txt>,
199 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
200 <http://www.tldp.org/docs.html#howto>.
201
202 If you don't know what to do here, say N.
203
204config NR_CPUS
205 int
206 depends on SMP
207 default "2"
208
209source "kernel/Kconfig.preempt"
210
211config MN10300_CURRENT_IN_E2
212 bool "Hold current task address in E2 register"
213 depends on !SMP
214 default y
215 help
216 This option removes the E2/R2 register from the set available to gcc
217 for normal use and instead uses it to store the address of the
218 current process's task_struct whilst in the kernel.
219
220 This means the kernel doesn't need to calculate the address each time
221 "current" is used (take SP, AND with mask and dereference pointer
222 just to get the address), and instead can just use E2+offset
223 addressing each time.
224
225 This has no effect on userspace.
226
227config MN10300_USING_JTAG
228 bool "Using JTAG to debug kernel"
229 default y
230 help
231 This options indicates that JTAG will be used to debug the kernel. It
232 suppresses the use of certain hardware debugging features, such as
233 single-stepping, which are taken over completely by the JTAG unit.
234
235source "kernel/Kconfig.hz"
236
237config MN10300_RTC
238 bool "Using MN10300 RTC"
239 depends on MN10300_PROC_MN103E010 || MN10300_PROC_MN2WS0050
240 select RTC_CLASS
241 select RTC_DRV_CMOS
242 select RTC_SYSTOHC
243 default n
244 help
245 This option enables support for the RTC, thus enabling time to be
246 tracked, even when system is powered down. This is available on-chip
247 on the MN103E010.
248
249config MN10300_WD_TIMER
250 bool "Using MN10300 watchdog timer"
251 default y
252 help
253 This options indicates that the watchdog timer will be used.
254
255config PCI
256 bool "Use PCI"
257 depends on MN10300_UNIT_ASB2305
258 default y
259 select GENERIC_PCI_IOMAP
260 help
261 Some systems (such as the ASB2305) have PCI onboard. If you have one
262 of these boards and you wish to use the PCI facilities, say Y here.
263
264 The PCI-HOWTO, available from
265 <http://www.tldp.org/docs.html#howto>, contains valuable
266 information about which PCI hardware does work under Linux and which
267 doesn't.
268
269source "drivers/pci/Kconfig"
270
271source "drivers/pcmcia/Kconfig"
272
273menu "MN10300 internal serial options"
274
275config MN10300_PROC_HAS_TTYSM0
276 bool
277 default n
278
279config MN10300_PROC_HAS_TTYSM1
280 bool
281 default n
282
283config MN10300_PROC_HAS_TTYSM2
284 bool
285 default n
286
287config MN10300_TTYSM
288 bool "Support for ttySM serial ports"
289 depends on MN10300
290 default y
291 select SERIAL_CORE
292 help
293 This option enables support for the on-chip serial ports that the
294 MN10300 has available.
295
296config MN10300_TTYSM_CONSOLE
297 bool "Support for console on ttySM serial ports"
298 depends on MN10300_TTYSM
299 select SERIAL_CORE_CONSOLE
300 help
301 This option enables support for a console on the on-chip serial ports
302 that the MN10300 has available.
303
304#
305# /dev/ttySM0
306#
307config MN10300_TTYSM0
308 bool "Enable SIF0 (/dev/ttySM0)"
309 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM0
310 help
311 Enable access to SIF0 through /dev/ttySM0 or gdb-stub
312
313choice
314 prompt "Select the timer to supply the clock for SIF0"
315 default MN10300_TTYSM0_TIMER8
316 depends on MN10300_TTYSM0
317
318config MN10300_TTYSM0_TIMER8
319 bool "Use timer 8 (16-bit)"
320
321config MN10300_TTYSM0_TIMER2
322 bool "Use timer 2 (8-bit)"
323
324endchoice
325
326#
327# /dev/ttySM1
328#
329config MN10300_TTYSM1
330 bool "Enable SIF1 (/dev/ttySM1)"
331 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM1
332 help
333 Enable access to SIF1 through /dev/ttySM1 or gdb-stub
334
335choice
336 prompt "Select the timer to supply the clock for SIF1"
337 default MN10300_TTYSM1_TIMER12 \
338 if !(AM33_2 || AM33_3)
339 default MN10300_TTYSM1_TIMER9 \
340 if AM33_2 || AM33_3
341 depends on MN10300_TTYSM1
342
343config MN10300_TTYSM1_TIMER12
344 bool "Use timer 12 (16-bit)"
345 depends on !(AM33_2 || AM33_3)
346
347config MN10300_TTYSM1_TIMER9
348 bool "Use timer 9 (16-bit)"
349 depends on AM33_2 || AM33_3
350
351config MN10300_TTYSM1_TIMER3
352 bool "Use timer 3 (8-bit)"
353 depends on AM33_2 || AM33_3
354
355endchoice
356
357#
358# /dev/ttySM2
359#
360config MN10300_TTYSM2
361 bool "Enable SIF2 (/dev/ttySM2)"
362 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM2
363 help
364 Enable access to SIF2 through /dev/ttySM2 or gdb-stub
365
366choice
367 prompt "Select the timer to supply the clock for SIF2"
368 default MN10300_TTYSM2_TIMER3 \
369 if !(AM33_2 || AM33_3)
370 default MN10300_TTYSM2_TIMER10 \
371 if AM33_2 || AM33_3
372 depends on MN10300_TTYSM2
373
374config MN10300_TTYSM2_TIMER9
375 bool "Use timer 9 (16-bit)"
376 depends on !(AM33_2 || AM33_3)
377
378config MN10300_TTYSM2_TIMER1
379 bool "Use timer 1 (8-bit)"
380 depends on !(AM33_2 || AM33_3)
381
382config MN10300_TTYSM2_TIMER3
383 bool "Use timer 3 (8-bit)"
384 depends on !(AM33_2 || AM33_3)
385
386config MN10300_TTYSM2_TIMER10
387 bool "Use timer 10 (16-bit)"
388 depends on AM33_2 || AM33_3
389
390endchoice
391
392config MN10300_TTYSM2_CTS
393 bool "Enable the use of the CTS line /dev/ttySM2"
394 depends on MN10300_TTYSM2 && AM33_2
395
396endmenu
397
398menu "Interrupt request priority options"
399
400comment "[!] NOTE: A lower number/level indicates a higher priority (0 is highest, 6 is lowest)"
401
402comment "____Non-maskable interrupt levels____"
403comment "The following must be set to a higher priority than local_irq_disable() and on-chip serial"
404
405config DEBUGGER_IRQ_LEVEL
406 int "DEBUGGER interrupt priority"
407 depends on KERNEL_DEBUGGER
408 range 0 1 if LINUX_CLI_LEVEL = 2
409 range 0 2 if LINUX_CLI_LEVEL = 3
410 range 0 3 if LINUX_CLI_LEVEL = 4
411 range 0 4 if LINUX_CLI_LEVEL = 5
412 range 0 5 if LINUX_CLI_LEVEL = 6
413 default 0
414
415comment "The following must be set to a higher priority than local_irq_disable()"
416
417config MN10300_SERIAL_IRQ_LEVEL
418 int "MN10300 on-chip serial interrupt priority"
419 depends on MN10300_TTYSM
420 range 1 1 if LINUX_CLI_LEVEL = 2
421 range 1 2 if LINUX_CLI_LEVEL = 3
422 range 1 3 if LINUX_CLI_LEVEL = 4
423 range 1 4 if LINUX_CLI_LEVEL = 5
424 range 1 5 if LINUX_CLI_LEVEL = 6
425 default 1
426
427comment "-"
428comment "____Maskable interrupt levels____"
429
430config LINUX_CLI_LEVEL
431 int "The highest interrupt priority excluded by local_irq_disable() (2-6)"
432 range 2 6
433 default 2
434 help
435 local_irq_disable() doesn't actually disable maskable interrupts -
436 what it does is restrict the levels of interrupt which are permitted
437 (a lower level indicates a higher priority) by lowering the value in
438 EPSW.IM from 7. Any interrupt is permitted for which the level is
439 lower than EPSW.IM.
440
441 Certain interrupts, such as DEBUGGER and virtual MN10300 on-chip
442 serial DMA interrupts are allowed to interrupt normal disabled
443 sections.
444
445comment "The following must be set to a equal to or lower priority than LINUX_CLI_LEVEL"
446
447config TIMER_IRQ_LEVEL
448 int "Kernel timer interrupt priority"
449 range LINUX_CLI_LEVEL 6
450 default 4
451
452config PCI_IRQ_LEVEL
453 int "PCI interrupt priority"
454 depends on PCI
455 range LINUX_CLI_LEVEL 6
456 default 5
457
458config ETHERNET_IRQ_LEVEL
459 int "Ethernet interrupt priority"
460 depends on SMC91X || SMC911X || SMSC911X
461 range LINUX_CLI_LEVEL 6
462 default 6
463
464config EXT_SERIAL_IRQ_LEVEL
465 int "External serial port interrupt priority"
466 depends on SERIAL_8250
467 range LINUX_CLI_LEVEL 6
468 default 6
469
470endmenu
471
472source "mm/Kconfig"
473
474menu "Power management options"
475source kernel/power/Kconfig
476endmenu
477
478endmenu
479
480
481menu "Executable formats"
482
483source "fs/Kconfig.binfmt"
484
485endmenu
486
487source "net/Kconfig"
488
489source "drivers/Kconfig"
490
491source "fs/Kconfig"
492
493source "arch/mn10300/Kconfig.debug"
494
495source "security/Kconfig"
496
497source "crypto/Kconfig"
498
499source "lib/Kconfig"
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
deleted file mode 100644
index 37ada651f756..000000000000
--- a/arch/mn10300/Kconfig.debug
+++ /dev/null
@@ -1,156 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2menu "Kernel hacking"
3
4source "lib/Kconfig.debug"
5
6config DEBUG_DECOMPRESS_KERNEL
7 bool "Using serial port during decompressing kernel"
8 depends on DEBUG_KERNEL
9 default n
10 help
11 If you say Y here you will confirm the start and the end of
12 decompressing Linux seeing "Uncompressing Linux... " and
13 "Ok, booting the kernel.\n" on console.
14
15config TEST_MISALIGNMENT_HANDLER
16 bool "Run tests on the misalignment handler"
17 depends on DEBUG_KERNEL
18 default n
19 help
20 If you say Y here the kernel will execute a list of misaligned memory
21 accesses to make sure the misalignment handler deals them with
22 correctly. If it does not, the kernel will throw a BUG.
23
24config KPROBES
25 bool "Kprobes"
26 depends on DEBUG_KERNEL
27 help
28 Kprobes allows you to trap at almost any kernel address and
29 execute a callback function. register_kprobe() establishes
30 a probepoint and specifies the callback. Kprobes is useful
31 for kernel debugging, non-intrusive instrumentation and testing.
32 If in doubt, say "N".
33
34config GDBSTUB
35 bool "Remote GDB kernel debugging"
36 depends on DEBUG_KERNEL && DEPRECATED
37 select DEBUG_INFO
38 select FRAME_POINTER
39 help
40 If you say Y here, it will be possible to remotely debug the kernel
41 using gdb. This enlarges your kernel ELF image disk size by several
42 megabytes and requires a machine with more than 16 MB, better 32 MB
43 RAM to avoid excessive linking time. This is only useful for kernel
44 hackers. If unsure, say N.
45
46 This is deprecated in favour of KGDB and will be removed in a later
47 version.
48
49config GDBSTUB_IMMEDIATE
50 bool "Break into GDB stub immediately"
51 depends on GDBSTUB
52 help
53 If you say Y here, GDB stub will break into the program as soon as
54 possible, leaving the program counter at the beginning of
55 start_kernel() in init/main.c.
56
57config GDBSTUB_ALLOW_SINGLE_STEP
58 bool "Allow software single-stepping in GDB stub"
59 depends on GDBSTUB && !SMP && !PREEMPT
60 help
61 Allow GDB stub to perform software single-stepping through the
62 kernel. This doesn't work very well on SMP or preemptible kernels as
63 it uses temporary breakpoints to emulate single-stepping.
64
65config GDB_CONSOLE
66 bool "Console output to GDB"
67 depends on GDBSTUB
68 help
69 If you are using GDB for remote debugging over a serial port and
70 would like kernel messages to be formatted into GDB $O packets so
71 that GDB prints them as program output, say 'Y'.
72
73config GDBSTUB_DEBUGGING
74 bool "Debug GDB stub by messages to serial port"
75 depends on GDBSTUB
76 help
77 This causes debugging messages to be displayed at various points
78 during execution of the GDB stub routines. Such messages will be
79 displayed on ttyS0 if that isn't the GDB stub's port, or ttySM0
80 otherwise.
81
82config GDBSTUB_DEBUG_ENTRY
83 bool "Debug GDB stub entry"
84 depends on GDBSTUB_DEBUGGING
85 help
86 This option causes information to be displayed about entry to or exit
87 from the main GDB stub routine.
88
89config GDBSTUB_DEBUG_PROTOCOL
90 bool "Debug GDB stub protocol"
91 depends on GDBSTUB_DEBUGGING
92 help
93 This option causes information to be displayed about the GDB remote
94 protocol messages generated exchanged with GDB.
95
96config GDBSTUB_DEBUG_IO
97 bool "Debug GDB stub I/O"
98 depends on GDBSTUB_DEBUGGING
99 help
100 This option causes information to be displayed about GDB stub's
101 low-level I/O.
102
103config GDBSTUB_DEBUG_BREAKPOINT
104 bool "Debug GDB stub breakpoint management"
105 depends on GDBSTUB_DEBUGGING
106 help
107 This option causes information to be displayed about GDB stub's
108 breakpoint management.
109
110choice
111 prompt "GDB stub port"
112 default GDBSTUB_ON_TTYSM0
113 depends on GDBSTUB
114 help
115 Select the serial port used for GDB-stub.
116
117config GDBSTUB_ON_TTYSM0
118 bool "/dev/ttySM0 [SIF0]"
119 depends on MN10300_TTYSM0
120 select GDBSTUB_ON_TTYSMx
121
122config GDBSTUB_ON_TTYSM1
123 bool "/dev/ttySM1 [SIF1]"
124 depends on MN10300_TTYSM1
125 select GDBSTUB_ON_TTYSMx
126
127config GDBSTUB_ON_TTYSM2
128 bool "/dev/ttySM2 [SIF2]"
129 depends on MN10300_TTYSM2
130 select GDBSTUB_ON_TTYSMx
131
132config GDBSTUB_ON_TTYS0
133 bool "/dev/ttyS0"
134 select GDBSTUB_ON_TTYSx
135
136config GDBSTUB_ON_TTYS1
137 bool "/dev/ttyS1"
138 select GDBSTUB_ON_TTYSx
139
140endchoice
141
142config GDBSTUB_ON_TTYSMx
143 bool
144 depends on GDBSTUB_ON_TTYSM0 || GDBSTUB_ON_TTYSM1 || GDBSTUB_ON_TTYSM2
145 default y
146
147config GDBSTUB_ON_TTYSx
148 bool
149 depends on GDBSTUB_ON_TTYS0 || GDBSTUB_ON_TTYS1
150 default y
151
152endmenu
153
154config KERNEL_DEBUGGER
155 def_bool y
156 depends on GDBSTUB || KGDB
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile
deleted file mode 100644
index 3f1ea5ddc402..000000000000
--- a/arch/mn10300/Makefile
+++ /dev/null
@@ -1,99 +0,0 @@
1###############################################################################
2#
3# MN10300 Kernel makefile system specifications
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Modified by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14
15KBUILD_DEFCONFIG := asb2303_defconfig
16
17CCSPECS := $(shell $(CC) -v 2>&1 | grep "^Reading specs from " | head -1 | cut -c20-)
18CCDIR := $(strip $(patsubst %/specs,%,$(CCSPECS)))
19KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include
20
21LDFLAGS :=
22OBJCOPYFLAGS := -O binary -R .note -R .comment -R .GCC-command-line -R .note.gnu.build-id -S
23#LDFLAGS_vmlinux := -Map linkmap.txt
24CHECKFLAGS +=
25
26PROCESSOR := unset
27UNIT := unset
28
29KBUILD_CFLAGS += -mam33 -DCPU=AM33 $(call cc-option,-mmem-funcs,)
30KBUILD_AFLAGS += -mam33 -DCPU=AM33
31
32ifeq ($(CONFIG_MN10300_CURRENT_IN_E2),y)
33KBUILD_CFLAGS += -ffixed-e2 -fcall-saved-e5
34endif
35
36ifeq ($(CONFIG_MN10300_PROC_MN103E010),y)
37PROCESSOR := mn103e010
38endif
39ifeq ($(CONFIG_MN10300_PROC_MN2WS0050),y)
40PROCESSOR := mn2ws0050
41endif
42
43ifeq ($(CONFIG_MN10300_UNIT_ASB2303),y)
44UNIT := asb2303
45endif
46ifeq ($(CONFIG_MN10300_UNIT_ASB2305),y)
47UNIT := asb2305
48endif
49ifeq ($(CONFIG_MN10300_UNIT_ASB2364),y)
50UNIT := asb2364
51endif
52
53
54head-y := arch/mn10300/kernel/head.o
55
56core-y += arch/mn10300/kernel/ arch/mn10300/mm/
57
58ifneq ($(PROCESSOR),unset)
59core-y += arch/mn10300/proc-$(PROCESSOR)/
60endif
61ifneq ($(UNIT),unset)
62core-y += arch/mn10300/unit-$(UNIT)/
63endif
64libs-y += arch/mn10300/lib/
65
66drivers-$(CONFIG_OPROFILE) += arch/mn10300/oprofile/
67
68boot := arch/mn10300/boot
69
70.PHONY: zImage
71
72KBUILD_IMAGE := $(boot)/zImage
73CLEAN_FILES += $(boot)/zImage
74CLEAN_FILES += $(boot)/compressed/vmlinux
75CLEAN_FILES += $(boot)/compressed/vmlinux.bin
76CLEAN_FILES += $(boot)/compressed/vmlinux.bin.gz
77
78zImage: vmlinux
79 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
80
81all: zImage
82
83bootstrap:
84 $(Q)$(MAKEBOOT) bootstrap
85
86archclean:
87 $(Q)$(MAKE) $(clean)=arch/mn10300/proc-mn103e010
88 $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2303
89 $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2305
90
91define archhelp
92 echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
93endef
94
95#
96# include the appropriate processor- and unit-specific headers
97#
98KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/proc-$(PROCESSOR)/include
99KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/unit-$(UNIT)/include
diff --git a/arch/mn10300/boot/.gitignore b/arch/mn10300/boot/.gitignore
deleted file mode 100644
index b6718de23693..000000000000
--- a/arch/mn10300/boot/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
1zImage
diff --git a/arch/mn10300/boot/Makefile b/arch/mn10300/boot/Makefile
deleted file mode 100644
index 36c9caf8ea0a..000000000000
--- a/arch/mn10300/boot/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
1# MN10300 kernel compressor and wrapper
2#
3# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5# Written by David Howells (dhowells@redhat.com)
6#
7# This program is free software; you can redistribute it and/or
8# modify it under the terms of the GNU General Public Licence
9# as published by the Free Software Foundation; either version
10# 2 of the Licence, or (at your option) any later version.
11#
12
13targets := vmlinux.bin zImage
14
15subdir- := compressed
16
17# ---------------------------------------------------------------------------
18
19
20$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
21 $(call if_changed,objcopy)
22 @echo 'Kernel: $@ is ready'
23
24$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
25 $(call if_changed,objcopy)
26
27$(obj)/compressed/vmlinux: FORCE
28 $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
diff --git a/arch/mn10300/boot/compressed/Makefile b/arch/mn10300/boot/compressed/Makefile
deleted file mode 100644
index 9b9a48fc8e53..000000000000
--- a/arch/mn10300/boot/compressed/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2#
3# Create a compressed vmlinux image from the original vmlinux
4#
5
6targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
7
8LDFLAGS_vmlinux := -Ttext $(CONFIG_KERNEL_ZIMAGE_BASE_ADDRESS) -e startup_32
9
10$(obj)/vmlinux: $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
11 $(call if_changed,ld)
12
13$(obj)/vmlinux.bin: vmlinux FORCE
14 $(call if_changed,objcopy)
15
16$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
17 $(call if_changed,gzip)
18
19LDFLAGS_piggy.o := -r --format binary --oformat elf32-am33lin -T
20
21$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE
22 $(call if_changed,ld)
diff --git a/arch/mn10300/boot/compressed/head.S b/arch/mn10300/boot/compressed/head.S
deleted file mode 100644
index 7b50345b9e84..000000000000
--- a/arch/mn10300/boot/compressed/head.S
+++ /dev/null
@@ -1,151 +0,0 @@
1/* Boot entry point for a compressed MN10300 kernel
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11 .section .text
12
13#define DEBUG
14
15#include <linux/linkage.h>
16#include <asm/cpu-regs.h>
17#include <asm/cache.h>
18#ifdef CONFIG_SMP
19#include <proc/smp-regs.h>
20#endif
21
22 .globl startup_32
23startup_32:
24#ifdef CONFIG_SMP
25 #
26 # Secondary CPUs jump directly to the kernel entry point
27 #
28 # Must save primary CPU's D0-D2 registers as they hold boot parameters
29 #
30 mov (CPUID), d3
31 and CPUID_MASK,d3
32 beq startup_primary
33 mov CONFIG_KERNEL_TEXT_ADDRESS,a0
34 jmp (a0)
35
36startup_primary:
37#endif /* CONFIG_SMP */
38
39 # first save parameters from bootloader
40 mov param_save_area,a0
41 mov d0,(a0)
42 mov d1,(4,a0)
43 mov d2,(8,a0)
44
45 mov sp,a3
46 mov decomp_stack+0x2000-4,a0
47 mov a0,sp
48
49 # invalidate and enable both of the caches
50 mov CHCTR,a0
51 clr d0
52 movhu d0,(a0) # turn off first
53 mov CHCTR_ICINV|CHCTR_DCINV,d0
54 movhu d0,(a0)
55 setlb
56 mov (a0),d0
57 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
58 lne
59
60#ifdef CONFIG_MN10300_CACHE_ENABLED
61#ifdef CONFIG_MN10300_CACHE_WBACK
62 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
63#else
64 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
65#endif /* WBACK */
66 movhu d0,(a0) # enable
67#endif /* !ENABLED */
68
69 # clear the BSS area
70 mov __bss_start,a0
71 mov _end,a1
72 clr d0
73bssclear:
74 cmp a1,a0
75 bge bssclear_end
76 movbu d0,(a0)
77 inc a0
78 bra bssclear
79bssclear_end:
80
81 # decompress the kernel
82 call decompress_kernel[],0
83#ifdef CONFIG_MN10300_CACHE_WBACK
84 call mn10300_dcache_flush_inv[],0
85#endif
86
87 # disable caches again
88 mov CHCTR,a0
89 clr d0
90 movhu d0,(a0)
91 setlb
92 mov (a0),d0
93 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
94 lne
95
96 mov param_save_area,a0
97 mov (a0),d0
98 mov (4,a0),d1
99 mov (8,a0),d2
100
101 # jump to the kernel proper entry point
102 mov a3,sp
103 mov CONFIG_KERNEL_TEXT_ADDRESS,a0
104 jmp (a0)
105
106
107###############################################################################
108#
109# Cache flush routines
110#
111###############################################################################
112#ifdef CONFIG_MN10300_CACHE_WBACK
113mn10300_dcache_flush_inv:
114 movhu (CHCTR),d0
115 btst CHCTR_DCEN,d0
116 beq mn10300_dcache_flush_inv_end
117
118 mov L1_CACHE_NENTRIES,d1
119 clr a1
120
121mn10300_dcache_flush_inv_loop:
122 mov (DCACHE_PURGE_WAY0(0),a1),d0 # unconditional purge
123 mov (DCACHE_PURGE_WAY1(0),a1),d0 # unconditional purge
124 mov (DCACHE_PURGE_WAY2(0),a1),d0 # unconditional purge
125 mov (DCACHE_PURGE_WAY3(0),a1),d0 # unconditional purge
126
127 add L1_CACHE_BYTES,a1
128 add -1,d1
129 bne mn10300_dcache_flush_inv_loop
130
131mn10300_dcache_flush_inv_end:
132 ret [],0
133#endif /* CONFIG_MN10300_CACHE_WBACK */
134
135
136###############################################################################
137#
138# Data areas
139#
140###############################################################################
141 .data
142 .align 4
143param_save_area:
144 .rept 3
145 .word 0
146 .endr
147
148 .section .bss
149 .align 4
150decomp_stack:
151 .space 0x2000
diff --git a/arch/mn10300/boot/compressed/misc.c b/arch/mn10300/boot/compressed/misc.c
deleted file mode 100644
index 42cbd77bd439..000000000000
--- a/arch/mn10300/boot/compressed/misc.c
+++ /dev/null
@@ -1,393 +0,0 @@
1/* MN10300 Miscellaneous helper routines for kernel decompressor
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from arch/x86/boot/compressed/misc_32.c
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/compiler.h>
14#include <asm/serial-regs.h>
15#include "misc.h"
16
17#ifndef CONFIG_GDBSTUB_ON_TTYSx
18/* display 'Uncompressing Linux... ' messages on ttyS0 or ttyS1 */
19#if 1 /* ttyS0 */
20#define CYG_DEV_BASE 0xA6FB0000
21#else /* ttyS1 */
22#define CYG_DEV_BASE 0xA6FC0000
23#endif
24
25#define CYG_DEV_THR (*((volatile __u8*)(CYG_DEV_BASE + 0x00)))
26#define CYG_DEV_MCR (*((volatile __u8*)(CYG_DEV_BASE + 0x10)))
27#define SIO_MCR_DTR 0x01
28#define SIO_MCR_RTS 0x02
29#define CYG_DEV_LSR (*((volatile __u8*)(CYG_DEV_BASE + 0x14)))
30#define SIO_LSR_THRE 0x20 /* transmitter holding register empty */
31#define SIO_LSR_TEMT 0x40 /* transmitter register empty */
32#define CYG_DEV_MSR (*((volatile __u8*)(CYG_DEV_BASE + 0x18)))
33#define SIO_MSR_CTS 0x10 /* clear to send */
34#define SIO_MSR_DSR 0x20 /* data set ready */
35
36#define LSR_WAIT_FOR(STATE) \
37 do { while (!(CYG_DEV_LSR & SIO_LSR_##STATE)) {} } while (0)
38#define FLOWCTL_QUERY(LINE) \
39 ({ CYG_DEV_MSR & SIO_MSR_##LINE; })
40#define FLOWCTL_WAIT_FOR(LINE) \
41 do { while (!(CYG_DEV_MSR & SIO_MSR_##LINE)) {} } while (0)
42#define FLOWCTL_CLEAR(LINE) \
43 do { CYG_DEV_MCR &= ~SIO_MCR_##LINE; } while (0)
44#define FLOWCTL_SET(LINE) \
45 do { CYG_DEV_MCR |= SIO_MCR_##LINE; } while (0)
46#endif
47
48/*
49 * gzip declarations
50 */
51
52#define OF(args) args
53#define STATIC static
54
55#undef memset
56#undef memcpy
57
58static inline void *memset(const void *s, int c, size_t n)
59{
60 int i;
61 char *ss = (char *) s;
62
63 for (i = 0; i < n; i++)
64 ss[i] = c;
65 return (void *)s;
66}
67
68#define memzero(s, n) memset((s), 0, (n))
69
70static inline void *memcpy(void *__dest, const void *__src, size_t __n)
71{
72 int i;
73 const char *s = __src;
74 char *d = __dest;
75
76 for (i = 0; i < __n; i++)
77 d[i] = s[i];
78 return __dest;
79}
80
81typedef unsigned char uch;
82typedef unsigned short ush;
83typedef unsigned long ulg;
84
85#define WSIZE 0x8000 /* Window size must be at least 32k, and a power of
86 * two */
87
88static uch *inbuf; /* input buffer */
89static uch window[WSIZE]; /* sliding window buffer */
90
91static unsigned insize; /* valid bytes in inbuf */
92static unsigned inptr; /* index of next byte to be processed in inbuf */
93static unsigned outcnt; /* bytes in output buffer */
94
95/* gzip flag byte */
96#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
97#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
98#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
99#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
100#define COMMENT 0x10 /* bit 4 set: file comment present */
101#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
102#define RESERVED 0xC0 /* bit 6,7: reserved */
103
104/* Diagnostic functions */
105#ifdef DEBUG
106# define Assert(cond, msg) { if (!(cond)) error(msg); }
107# define Trace(x) fprintf x
108# define Tracev(x) { if (verbose) fprintf x ; }
109# define Tracevv(x) { if (verbose > 1) fprintf x ; }
110# define Tracec(c, x) { if (verbose && (c)) fprintf x ; }
111# define Tracecv(c, x) { if (verbose > 1 && (c)) fprintf x ; }
112#else
113# define Assert(cond, msg)
114# define Trace(x)
115# define Tracev(x)
116# define Tracevv(x)
117# define Tracec(c, x)
118# define Tracecv(c, x)
119#endif
120
121static int fill_inbuf(void);
122static void flush_window(void);
123static void error(const char *) __attribute__((noreturn));
124static void kputs(const char *);
125
126static inline unsigned char get_byte(void)
127{
128 unsigned char ch = inptr < insize ? inbuf[inptr++] : fill_inbuf();
129
130#if 0
131 char hex[3];
132 hex[0] = ((ch & 0x0f) > 9) ?
133 ((ch & 0x0f) + 'A' - 0xa) : ((ch & 0x0f) + '0');
134 hex[1] = ((ch >> 4) > 9) ?
135 ((ch >> 4) + 'A' - 0xa) : ((ch >> 4) + '0');
136 hex[2] = 0;
137 kputs(hex);
138#endif
139 return ch;
140}
141
142/*
143 * This is set up by the setup-routine at boot-time
144 */
145#define EXT_MEM_K (*(unsigned short *)0x90002)
146#ifndef STANDARD_MEMORY_BIOS_CALL
147#define ALT_MEM_K (*(unsigned long *) 0x901e0)
148#endif
149#define SCREEN_INFO (*(struct screen_info *)0x90000)
150
151static long bytes_out;
152static uch *output_data;
153static unsigned long output_ptr;
154
155
156static unsigned long free_mem_ptr = (unsigned long) &end;
157static unsigned long free_mem_end_ptr = (unsigned long) &end + 0x90000;
158
159#define INPLACE_MOVE_ROUTINE 0x1000
160#define LOW_BUFFER_START 0x2000
161#define LOW_BUFFER_END 0x90000
162#define LOW_BUFFER_SIZE (LOW_BUFFER_END - LOW_BUFFER_START)
163#define HEAP_SIZE 0x3000
164static int high_loaded;
165static uch *high_buffer_start /* = (uch *)(((ulg)&end) + HEAP_SIZE)*/;
166
167static char *vidmem = (char *)0xb8000;
168static int lines, cols;
169
170#define BOOTLOADER_INFLATE
171#include "../../../../lib/inflate.c"
172
173static inline void scroll(void)
174{
175 int i;
176
177 memcpy(vidmem, vidmem + cols * 2, (lines - 1) * cols * 2);
178 for (i = (lines - 1) * cols * 2; i < lines * cols * 2; i += 2)
179 vidmem[i] = ' ';
180}
181
182static inline void kputchar(unsigned char ch)
183{
184#ifdef CONFIG_MN10300_UNIT_ASB2305
185 while (SC0STR & SC01STR_TBF)
186 continue;
187
188 if (ch == 0x0a) {
189 SC0TXB = 0x0d;
190 while (SC0STR & SC01STR_TBF)
191 continue;
192 }
193
194 SC0TXB = ch;
195
196#else
197 while (SC1STR & SC01STR_TBF)
198 continue;
199
200 if (ch == 0x0a) {
201 SC1TXB = 0x0d;
202 while (SC1STR & SC01STR_TBF)
203 continue;
204 }
205
206 SC1TXB = ch;
207
208#endif
209}
210
211static void kputs(const char *s)
212{
213#ifdef CONFIG_DEBUG_DECOMPRESS_KERNEL
214#ifndef CONFIG_GDBSTUB_ON_TTYSx
215 char ch;
216
217 FLOWCTL_SET(DTR);
218
219 while (*s) {
220 LSR_WAIT_FOR(THRE);
221
222 ch = *s++;
223 if (ch == 0x0a) {
224 CYG_DEV_THR = 0x0d;
225 LSR_WAIT_FOR(THRE);
226 }
227 CYG_DEV_THR = ch;
228 }
229
230 FLOWCTL_CLEAR(DTR);
231#else
232
233 for (; *s; s++)
234 kputchar(*s);
235
236#endif
237#endif /* CONFIG_DEBUG_DECOMPRESS_KERNEL */
238}
239
240/* ===========================================================================
241 * Fill the input buffer. This is called only when the buffer is empty
242 * and at least one byte is really needed.
243 */
244static int fill_inbuf()
245{
246 if (insize != 0)
247 error("ran out of input data\n");
248
249 inbuf = input_data;
250 insize = input_len;
251 inptr = 1;
252 return inbuf[0];
253}
254
255/* ===========================================================================
256 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
257 * (Used for the decompressed data only.)
258 */
259static void flush_window_low(void)
260{
261 ulg c = crc; /* temporary variable */
262 unsigned n;
263 uch *in, *out, ch;
264
265 in = window;
266 out = &output_data[output_ptr];
267 for (n = 0; n < outcnt; n++) {
268 ch = *out++ = *in++;
269 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
270 }
271 crc = c;
272 bytes_out += (ulg)outcnt;
273 output_ptr += (ulg)outcnt;
274 outcnt = 0;
275}
276
277static void flush_window_high(void)
278{
279 ulg c = crc; /* temporary variable */
280 unsigned n;
281 uch *in, ch;
282 in = window;
283 for (n = 0; n < outcnt; n++) {
284 ch = *output_data++ = *in++;
285 if ((ulg) output_data == LOW_BUFFER_END)
286 output_data = high_buffer_start;
287 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
288 }
289 crc = c;
290 bytes_out += (ulg)outcnt;
291 outcnt = 0;
292}
293
294static void flush_window(void)
295{
296 if (high_loaded)
297 flush_window_high();
298 else
299 flush_window_low();
300}
301
302static void error(const char *x)
303{
304 kputs("\n\n");
305 kputs(x);
306 kputs("\n\n -- System halted");
307
308 while (1)
309 /* Halt */;
310}
311
312#define STACK_SIZE (4096)
313
314long user_stack[STACK_SIZE];
315
316struct {
317 long *a;
318 short b;
319} stack_start = { &user_stack[STACK_SIZE], 0 };
320
321void setup_normal_output_buffer(void)
322{
323#ifdef STANDARD_MEMORY_BIOS_CALL
324 if (EXT_MEM_K < 1024)
325 error("Less than 2MB of memory.\n");
326#else
327 if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024)
328 error("Less than 2MB of memory.\n");
329#endif
330 output_data = (char *) 0x100000; /* Points to 1M */
331}
332
333struct moveparams {
334 uch *low_buffer_start;
335 int lcount;
336 uch *high_buffer_start;
337 int hcount;
338};
339
340void setup_output_buffer_if_we_run_high(struct moveparams *mv)
341{
342 high_buffer_start = (uch *)(((ulg) &end) + HEAP_SIZE);
343#ifdef STANDARD_MEMORY_BIOS_CALL
344 if (EXT_MEM_K < (3 * 1024))
345 error("Less than 4MB of memory.\n");
346#else
347 if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < (3 * 1024))
348 error("Less than 4MB of memory.\n");
349#endif
350 mv->low_buffer_start = output_data = (char *) LOW_BUFFER_START;
351 high_loaded = 1;
352 free_mem_end_ptr = (long) high_buffer_start;
353 if (0x100000 + LOW_BUFFER_SIZE > (ulg) high_buffer_start) {
354 high_buffer_start = (uch *)(0x100000 + LOW_BUFFER_SIZE);
355 mv->hcount = 0; /* say: we need not to move high_buffer */
356 } else {
357 mv->hcount = -1;
358 }
359 mv->high_buffer_start = high_buffer_start;
360}
361
362void close_output_buffer_if_we_run_high(struct moveparams *mv)
363{
364 mv->lcount = bytes_out;
365 if (bytes_out > LOW_BUFFER_SIZE) {
366 mv->lcount = LOW_BUFFER_SIZE;
367 if (mv->hcount)
368 mv->hcount = bytes_out - LOW_BUFFER_SIZE;
369 } else {
370 mv->hcount = 0;
371 }
372}
373
374#undef DEBUGFLAG
375#ifdef DEBUGFLAG
376int debugflag;
377#endif
378
379int decompress_kernel(struct moveparams *mv)
380{
381#ifdef DEBUGFLAG
382 while (!debugflag)
383 barrier();
384#endif
385
386 output_data = (char *) CONFIG_KERNEL_TEXT_ADDRESS;
387
388 makecrc();
389 kputs("Uncompressing Linux... ");
390 gunzip();
391 kputs("Ok, booting the kernel.\n");
392 return 0;
393}
diff --git a/arch/mn10300/boot/compressed/misc.h b/arch/mn10300/boot/compressed/misc.h
deleted file mode 100644
index da921cd172fb..000000000000
--- a/arch/mn10300/boot/compressed/misc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* Internal definitions for the MN10300 kernel decompressor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12extern int end;
13
14/*
15 * vmlinux.lds
16 */
17extern char input_data[];
18extern int input_len;
diff --git a/arch/mn10300/boot/compressed/vmlinux.lds b/arch/mn10300/boot/compressed/vmlinux.lds
deleted file mode 100644
index a084903603fe..000000000000
--- a/arch/mn10300/boot/compressed/vmlinux.lds
+++ /dev/null
@@ -1,9 +0,0 @@
1SECTIONS
2{
3 .data : {
4 input_len = .;
5 LONG(input_data_end - input_data) input_data = .;
6 *(.data)
7 input_data_end = .;
8 }
9}
diff --git a/arch/mn10300/boot/install.sh b/arch/mn10300/boot/install.sh
deleted file mode 100644
index abba30971191..000000000000
--- a/arch/mn10300/boot/install.sh
+++ /dev/null
@@ -1,67 +0,0 @@
1#!/bin/sh
2#
3# arch/mn10300/boot/install -c.sh
4#
5# This file is subject to the terms and conditions of the GNU General Public
6# Licence. See the file "COPYING" in the main directory of this archive
7# for more details.
8#
9# Copyright (C) 1995 by Linus Torvalds
10#
11# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
12#
13# "make install -c" script for i386 architecture
14#
15# Arguments:
16# $1 - kernel version
17# $2 - kernel image file
18# $3 - kernel map file
19# $4 - default install -c path (blank if root directory)
20# $5 - boot rom file
21#
22
23# User may have a custom install -c script
24
25rm -fr $4/../usr/include/linux $4/../usr/include/asm
26install -c -m 0755 $2 $4/vmlinuz
27install -c -m 0755 $5 $4/boot.rom
28install -c -m 0755 -d $4/../usr/include/linux
29cd ${srctree}/include/linux
30for i in `find . -maxdepth 1 -name '*.h' -print`; do
31 install -c -m 0644 $i $4/../usr/include/linux
32done
33install -c -m 0755 -d $4/../usr/include/linux/byteorder
34cd ${srctree}/include/linux/byteorder
35for i in `find . -name '*.h' -print`; do
36 install -c -m 0644 $i $4/../usr/include/linux/byteorder
37done
38install -c -m 0755 -d $4/../usr/include/linux/lockd
39cd ${srctree}/include/linux/lockd
40for i in `find . -name '*.h' -print`; do
41 install -c -m 0644 $i $4/../usr/include/linux/lockd
42done
43install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4
44cd ${srctree}/include/linux/netfilter_ipv4
45for i in `find . -name '*.h' -print`; do
46 install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4
47done
48install -c -m 0755 -d $4/../usr/include/linux/nfsd
49cd ${srctree}/include/linux/nfsd
50for i in `find . -name '*.h' -print`; do
51 install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i
52done
53install -c -m 0755 -d $4/../usr/include/linux/raid
54cd ${srctree}/include/linux/raid
55for i in `find . -name '*.h' -print`; do
56 install -c -m 0644 $i $4/../usr/include/linux/raid
57done
58install -c -m 0755 -d $4/../usr/include/linux/sunrpc
59cd ${srctree}/include/linux/sunrpc
60for i in `find . -name '*.h' -print`; do
61 install -c -m 0644 $i $4/../usr/include/linux/sunrpc
62done
63install -c -m 0755 -d $4/../usr/include/asm
64cd ${srctree}/include/asm
65for i in `find . -name '*.h' -print`; do
66 install -c -m 0644 $i $4/../usr/include/asm
67done
diff --git a/arch/mn10300/boot/tools/build.c b/arch/mn10300/boot/tools/build.c
deleted file mode 100644
index 3ce158fe07b0..000000000000
--- a/arch/mn10300/boot/tools/build.c
+++ /dev/null
@@ -1,191 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright (C) 1997 Martin Mares
5 */
6
7/*
8 * This file builds a disk-image from three different files:
9 *
10 * - bootsect: exactly 512 bytes of 8086 machine code, loads the rest
11 * - setup: 8086 machine code, sets up system parm
12 * - system: 80386 code for actual system
13 *
14 * It does some checking that all files are of the correct type, and
15 * just writes the result to stdout, removing headers and padding to
16 * the right amount. It also writes some system data to stderr.
17 */
18
19/*
20 * Changes by tytso to allow root device specification
21 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
22 * Cross compiling fixes by Gertjan van Wingerde, July 1996
23 * Rewritten by Martin Mares, April 1997
24 */
25
26#include <stdio.h>
27#include <string.h>
28#include <stdlib.h>
29#include <stdarg.h>
30#include <sys/types.h>
31#include <sys/stat.h>
32#include <sys/sysmacros.h>
33#include <unistd.h>
34#include <fcntl.h>
35#include <asm/boot.h>
36
37#define DEFAULT_MAJOR_ROOT 0
38#define DEFAULT_MINOR_ROOT 0
39
40/* Minimal number of setup sectors (see also bootsect.S) */
41#define SETUP_SECTS 4
42
43uint8_t buf[1024];
44int fd;
45int is_big_kernel;
46
47__attribute__((noreturn))
48void die(const char *str, ...)
49{
50 va_list args;
51 va_start(args, str);
52 vfprintf(stderr, str, args);
53 fputc('\n', stderr);
54 exit(1);
55}
56
57void file_open(const char *name)
58{
59 fd = open(name, O_RDONLY, 0);
60 if (fd < 0)
61 die("Unable to open `%s': %m", name);
62}
63
64__attribute__((noreturn))
65void usage(void)
66{
67 die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
68}
69
70int main(int argc, char **argv)
71{
72 unsigned int i, c, sz, setup_sectors;
73 uint32_t sys_size;
74 uint8_t major_root, minor_root;
75 struct stat sb;
76
77 if (argc > 2 && !strcmp(argv[1], "-b")) {
78 is_big_kernel = 1;
79 argc--, argv++;
80 }
81 if ((argc < 4) || (argc > 5))
82 usage();
83 if (argc > 4) {
84 if (!strcmp(argv[4], "CURRENT")) {
85 if (stat("/", &sb)) {
86 perror("/");
87 die("Couldn't stat /");
88 }
89 major_root = major(sb.st_dev);
90 minor_root = minor(sb.st_dev);
91 } else if (strcmp(argv[4], "FLOPPY")) {
92 if (stat(argv[4], &sb)) {
93 perror(argv[4]);
94 die("Couldn't stat root device.");
95 }
96 major_root = major(sb.st_rdev);
97 minor_root = minor(sb.st_rdev);
98 } else {
99 major_root = 0;
100 minor_root = 0;
101 }
102 } else {
103 major_root = DEFAULT_MAJOR_ROOT;
104 minor_root = DEFAULT_MINOR_ROOT;
105 }
106 fprintf(stderr, "Root device is (%d, %d)\n", major_root, minor_root);
107
108 file_open(argv[1]);
109 i = read(fd, buf, sizeof(buf));
110 fprintf(stderr, "Boot sector %d bytes.\n", i);
111 if (i != 512)
112 die("Boot block must be exactly 512 bytes");
113 if (buf[510] != 0x55 || buf[511] != 0xaa)
114 die("Boot block hasn't got boot flag (0xAA55)");
115 buf[508] = minor_root;
116 buf[509] = major_root;
117 if (write(1, buf, 512) != 512)
118 die("Write call failed");
119 close(fd);
120
121 /* Copy the setup code */
122 file_open(argv[2]);
123 for (i = 0; (c = read(fd, buf, sizeof(buf))) > 0; i += c)
124 if (write(1, buf, c) != c)
125 die("Write call failed");
126 if (c != 0)
127 die("read-error on `setup'");
128 close(fd);
129
130 /* Pad unused space with zeros */
131 setup_sectors = (i + 511) / 512;
132 /* for compatibility with ancient versions of LILO. */
133 if (setup_sectors < SETUP_SECTS)
134 setup_sectors = SETUP_SECTS;
135 fprintf(stderr, "Setup is %d bytes.\n", i);
136 memset(buf, 0, sizeof(buf));
137 while (i < setup_sectors * 512) {
138 c = setup_sectors * 512 - i;
139 if (c > sizeof(buf))
140 c = sizeof(buf);
141 if (write(1, buf, c) != c)
142 die("Write call failed");
143 i += c;
144 }
145
146 file_open(argv[3]);
147 if (fstat(fd, &sb))
148 die("Unable to stat `%s': %m", argv[3]);
149 sz = sb.st_size;
150 fprintf(stderr, "System is %d kB\n", sz / 1024);
151 sys_size = (sz + 15) / 16;
152 /* 0x28000*16 = 2.5 MB, conservative estimate for the current maximum */
153 if (sys_size > (is_big_kernel ? 0x28000 : DEF_SYSSIZE))
154 die("System is too big. Try using %smodules.",
155 is_big_kernel ? "" : "bzImage or ");
156 if (sys_size > 0xffff)
157 fprintf(stderr,
158 "warning: kernel is too big for standalone boot "
159 "from floppy\n");
160 while (sz > 0) {
161 int l, n;
162
163 l = (sz > sizeof(buf)) ? sizeof(buf) : sz;
164 n = read(fd, buf, l);
165 if (n != l) {
166 if (n < 0)
167 die("Error reading %s: %m", argv[3]);
168 else
169 die("%s: Unexpected EOF", argv[3]);
170 }
171 if (write(1, buf, l) != l)
172 die("Write failed");
173 sz -= l;
174 }
175 close(fd);
176
177 /* Write sizes to the bootsector */
178 if (lseek(1, 497, SEEK_SET) != 497)
179 die("Output: seek failed");
180 buf[0] = setup_sectors;
181 if (write(1, buf, 1) != 1)
182 die("Write of setup sector count failed");
183 if (lseek(1, 500, SEEK_SET) != 500)
184 die("Output: seek failed");
185 buf[0] = (sys_size & 0xff);
186 buf[1] = ((sys_size >> 8) & 0xff);
187 if (write(1, buf, 2) != 2)
188 die("Write of image length failed");
189
190 return 0;
191}
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig
deleted file mode 100644
index d06dae131139..000000000000
--- a/arch/mn10300/configs/asb2303_defconfig
+++ /dev/null
@@ -1,67 +0,0 @@
1CONFIG_SYSVIPC=y
2CONFIG_BSD_PROCESS_ACCT=y
3CONFIG_TINY_RCU=y
4CONFIG_LOG_BUF_SHIFT=14
5# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
6CONFIG_EXPERT=y
7# CONFIG_KALLSYMS is not set
8# CONFIG_HOTPLUG is not set
9# CONFIG_VM_EVENT_COUNTERS is not set
10CONFIG_SLAB=y
11CONFIG_PROFILING=y
12# CONFIG_BLOCK is not set
13CONFIG_PREEMPT=y
14CONFIG_NO_HZ=y
15CONFIG_HIGH_RES_TIMERS=y
16CONFIG_MN10300_RTC=y
17CONFIG_MN10300_TTYSM_CONSOLE=y
18CONFIG_MN10300_TTYSM0=y
19CONFIG_MN10300_TTYSM1=y
20CONFIG_NET=y
21CONFIG_PACKET=y
22CONFIG_UNIX=y
23CONFIG_INET=y
24CONFIG_IP_MULTICAST=y
25CONFIG_IP_PNP=y
26CONFIG_IP_PNP_BOOTP=y
27# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
28# CONFIG_INET_XFRM_MODE_TUNNEL is not set
29# CONFIG_INET_XFRM_MODE_BEET is not set
30# CONFIG_INET_DIAG is not set
31# CONFIG_IPV6 is not set
32# CONFIG_WIRELESS is not set
33CONFIG_MTD=y
34CONFIG_MTD_DEBUG=y
35CONFIG_MTD_REDBOOT_PARTS=y
36CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
37CONFIG_MTD_CFI=y
38CONFIG_MTD_JEDECPROBE=y
39CONFIG_MTD_CFI_ADV_OPTIONS=y
40CONFIG_MTD_CFI_GEOMETRY=y
41CONFIG_MTD_CFI_I4=y
42CONFIG_MTD_CFI_AMDSTD=y
43CONFIG_MTD_PHYSMAP=y
44CONFIG_NETDEVICES=y
45CONFIG_NET_ETHERNET=y
46CONFIG_SMC91X=y
47# CONFIG_WLAN is not set
48# CONFIG_INPUT is not set
49# CONFIG_SERIO is not set
50# CONFIG_VT is not set
51CONFIG_SERIAL_8250=y
52CONFIG_SERIAL_8250_CONSOLE=y
53CONFIG_SERIAL_8250_EXTENDED=y
54CONFIG_SERIAL_8250_SHARE_IRQ=y
55# CONFIG_HW_RANDOM is not set
56CONFIG_RTC=y
57# CONFIG_HWMON is not set
58# CONFIG_USB_SUPPORT is not set
59CONFIG_PROC_KCORE=y
60# CONFIG_PROC_PAGE_MONITOR is not set
61CONFIG_TMPFS=y
62CONFIG_JFFS2_FS=y
63CONFIG_NFS_FS=y
64CONFIG_NFS_V3=y
65CONFIG_ROOT_NFS=y
66CONFIG_MAGIC_SYSRQ=y
67CONFIG_STRIP_ASM_SYMS=y
diff --git a/arch/mn10300/configs/asb2364_defconfig b/arch/mn10300/configs/asb2364_defconfig
deleted file mode 100644
index a84c3153f22a..000000000000
--- a/arch/mn10300/configs/asb2364_defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
1CONFIG_SYSVIPC=y
2CONFIG_POSIX_MQUEUE=y
3CONFIG_BSD_PROCESS_ACCT=y
4CONFIG_TASKSTATS=y
5CONFIG_TASK_DELAY_ACCT=y
6CONFIG_TASK_XACCT=y
7CONFIG_TASK_IO_ACCOUNTING=y
8CONFIG_LOG_BUF_SHIFT=14
9CONFIG_CGROUPS=y
10CONFIG_CGROUP_FREEZER=y
11CONFIG_CGROUP_DEVICE=y
12CONFIG_CGROUP_CPUACCT=y
13CONFIG_RELAY=y
14# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
15CONFIG_EXPERT=y
16# CONFIG_KALLSYMS is not set
17# CONFIG_VM_EVENT_COUNTERS is not set
18CONFIG_SLAB=y
19CONFIG_PROFILING=y
20CONFIG_MODULES=y
21CONFIG_MODULE_UNLOAD=y
22# CONFIG_BLOCK is not set
23CONFIG_MN10300_UNIT_ASB2364=y
24CONFIG_PREEMPT=y
25# CONFIG_MN10300_USING_JTAG is not set
26CONFIG_NO_HZ=y
27CONFIG_HIGH_RES_TIMERS=y
28CONFIG_MN10300_TTYSM_CONSOLE=y
29CONFIG_MN10300_TTYSM0=y
30CONFIG_MN10300_TTYSM0_TIMER2=y
31CONFIG_MN10300_TTYSM1=y
32CONFIG_NET=y
33CONFIG_PACKET=y
34CONFIG_UNIX=y
35CONFIG_INET=y
36CONFIG_IP_MULTICAST=y
37CONFIG_IP_PNP=y
38CONFIG_IP_PNP_BOOTP=y
39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
40# CONFIG_INET_XFRM_MODE_TUNNEL is not set
41# CONFIG_INET_XFRM_MODE_BEET is not set
42# CONFIG_INET_DIAG is not set
43CONFIG_IPV6=y
44# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
45# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
46# CONFIG_INET6_XFRM_MODE_BEET is not set
47CONFIG_CONNECTOR=y
48CONFIG_MTD=y
49CONFIG_MTD_DEBUG=y
50CONFIG_MTD_REDBOOT_PARTS=y
51CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
52CONFIG_MTD_CFI=y
53CONFIG_MTD_JEDECPROBE=y
54CONFIG_MTD_CFI_ADV_OPTIONS=y
55CONFIG_MTD_CFI_GEOMETRY=y
56CONFIG_MTD_CFI_I4=y
57CONFIG_MTD_CFI_AMDSTD=y
58CONFIG_MTD_PHYSMAP=y
59CONFIG_NETDEVICES=y
60CONFIG_NET_ETHERNET=y
61CONFIG_SMSC911X=y
62# CONFIG_INPUT_MOUSEDEV is not set
63# CONFIG_INPUT_KEYBOARD is not set
64# CONFIG_INPUT_MOUSE is not set
65# CONFIG_SERIO is not set
66# CONFIG_VT is not set
67CONFIG_SERIAL_8250=y
68CONFIG_SERIAL_8250_CONSOLE=y
69CONFIG_SERIAL_8250_EXTENDED=y
70CONFIG_SERIAL_8250_SHARE_IRQ=y
71# CONFIG_HW_RANDOM is not set
72# CONFIG_HWMON is not set
73# CONFIG_USB_SUPPORT is not set
74CONFIG_PROC_KCORE=y
75# CONFIG_PROC_PAGE_MONITOR is not set
76CONFIG_TMPFS=y
77CONFIG_TMPFS_POSIX_ACL=y
78CONFIG_JFFS2_FS=y
79CONFIG_NFS_FS=y
80CONFIG_NFS_V3=y
81CONFIG_ROOT_NFS=y
82CONFIG_MAGIC_SYSRQ=y
83CONFIG_STRIP_ASM_SYMS=y
84CONFIG_DEBUG_KERNEL=y
85CONFIG_DETECT_HUNG_TASK=y
86# CONFIG_DEBUG_BUGVERBOSE is not set
87CONFIG_DEBUG_INFO=y
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
deleted file mode 100644
index 509c45a75d1f..000000000000
--- a/arch/mn10300/include/asm/Kbuild
+++ /dev/null
@@ -1,13 +0,0 @@
1
2generic-y += barrier.h
3generic-y += device.h
4generic-y += exec.h
5generic-y += extable.h
6generic-y += fb.h
7generic-y += irq_work.h
8generic-y += mcs_spinlock.h
9generic-y += mm-arch-hooks.h
10generic-y += preempt.h
11generic-y += sections.h
12generic-y += trace_clock.h
13generic-y += word-at-a-time.h
diff --git a/arch/mn10300/include/asm/asm-offsets.h b/arch/mn10300/include/asm/asm-offsets.h
deleted file mode 100644
index d370ee36a182..000000000000
--- a/arch/mn10300/include/asm/asm-offsets.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <generated/asm-offsets.h>
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
deleted file mode 100644
index 36389efd45e8..000000000000
--- a/arch/mn10300/include/asm/atomic.h
+++ /dev/null
@@ -1,161 +0,0 @@
1/* MN10300 Atomic counter operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_ATOMIC_H
12#define _ASM_ATOMIC_H
13
14#include <asm/irqflags.h>
15#include <asm/cmpxchg.h>
16#include <asm/barrier.h>
17
18#ifndef CONFIG_SMP
19#include <asm-generic/atomic.h>
20#else
21
22/*
23 * Atomic operations that C can't guarantee us. Useful for
24 * resource counting etc..
25 */
26
27#define ATOMIC_INIT(i) { (i) }
28
29#ifdef __KERNEL__
30
31/**
32 * atomic_read - read atomic variable
33 * @v: pointer of type atomic_t
34 *
35 * Atomically reads the value of @v. Note that the guaranteed
36 */
37#define atomic_read(v) READ_ONCE((v)->counter)
38
39/**
40 * atomic_set - set atomic variable
41 * @v: pointer of type atomic_t
42 * @i: required value
43 *
44 * Atomically sets the value of @v to @i. Note that the guaranteed
45 */
46#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
47
48#define ATOMIC_OP(op) \
49static inline void atomic_##op(int i, atomic_t *v) \
50{ \
51 int retval, status; \
52 \
53 asm volatile( \
54 "1: mov %4,(_AAR,%3) \n" \
55 " mov (_ADR,%3),%1 \n" \
56 " " #op " %5,%1 \n" \
57 " mov %1,(_ADR,%3) \n" \
58 " mov (_ADR,%3),%0 \n" /* flush */ \
59 " mov (_ASR,%3),%0 \n" \
60 " or %0,%0 \n" \
61 " bne 1b \n" \
62 : "=&r"(status), "=&r"(retval), "=m"(v->counter) \
63 : "a"(ATOMIC_OPS_BASE_ADDR), "r"(&v->counter), "r"(i) \
64 : "memory", "cc"); \
65}
66
67#define ATOMIC_OP_RETURN(op) \
68static inline int atomic_##op##_return(int i, atomic_t *v) \
69{ \
70 int retval, status; \
71 \
72 asm volatile( \
73 "1: mov %4,(_AAR,%3) \n" \
74 " mov (_ADR,%3),%1 \n" \
75 " " #op " %5,%1 \n" \
76 " mov %1,(_ADR,%3) \n" \
77 " mov (_ADR,%3),%0 \n" /* flush */ \
78 " mov (_ASR,%3),%0 \n" \
79 " or %0,%0 \n" \
80 " bne 1b \n" \
81 : "=&r"(status), "=&r"(retval), "=m"(v->counter) \
82 : "a"(ATOMIC_OPS_BASE_ADDR), "r"(&v->counter), "r"(i) \
83 : "memory", "cc"); \
84 return retval; \
85}
86
87#define ATOMIC_FETCH_OP(op) \
88static inline int atomic_fetch_##op(int i, atomic_t *v) \
89{ \
90 int retval, status; \
91 \
92 asm volatile( \
93 "1: mov %4,(_AAR,%3) \n" \
94 " mov (_ADR,%3),%1 \n" \
95 " mov %1,%0 \n" \
96 " " #op " %5,%0 \n" \
97 " mov %0,(_ADR,%3) \n" \
98 " mov (_ADR,%3),%0 \n" /* flush */ \
99 " mov (_ASR,%3),%0 \n" \
100 " or %0,%0 \n" \
101 " bne 1b \n" \
102 : "=&r"(status), "=&r"(retval), "=m"(v->counter) \
103 : "a"(ATOMIC_OPS_BASE_ADDR), "r"(&v->counter), "r"(i) \
104 : "memory", "cc"); \
105 return retval; \
106}
107
108#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
109
110ATOMIC_OPS(add)
111ATOMIC_OPS(sub)
112
113#undef ATOMIC_OPS
114#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
115
116ATOMIC_OPS(and)
117ATOMIC_OPS(or)
118ATOMIC_OPS(xor)
119
120#undef ATOMIC_OPS
121#undef ATOMIC_FETCH_OP
122#undef ATOMIC_OP_RETURN
123#undef ATOMIC_OP
124
125static inline int atomic_add_negative(int i, atomic_t *v)
126{
127 return atomic_add_return(i, v) < 0;
128}
129
130static inline void atomic_inc(atomic_t *v)
131{
132 atomic_add_return(1, v);
133}
134
135static inline void atomic_dec(atomic_t *v)
136{
137 atomic_sub_return(1, v);
138}
139
140#define atomic_dec_return(v) atomic_sub_return(1, (v))
141#define atomic_inc_return(v) atomic_add_return(1, (v))
142
143#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
144#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
145#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
146
147#define __atomic_add_unless(v, a, u) \
148({ \
149 int c, old; \
150 c = atomic_read(v); \
151 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
152 c = old; \
153 c; \
154})
155
156#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
157#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
158
159#endif /* __KERNEL__ */
160#endif /* CONFIG_SMP */
161#endif /* _ASM_ATOMIC_H */
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
deleted file mode 100644
index fe6f8e2c3617..000000000000
--- a/arch/mn10300/include/asm/bitops.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/* MN10300 bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not.
14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21#include <asm/barrier.h>
22
23/*
24 * set bit
25 */
26#define __set_bit(nr, addr) \
27({ \
28 volatile unsigned char *_a = (unsigned char *)(addr); \
29 const unsigned shift = (nr) & 7; \
30 _a += (nr) >> 3; \
31 \
32 asm volatile("bset %2,(%1) # set_bit reg" \
33 : "=m"(*_a) \
34 : "a"(_a), "d"(1 << shift), "m"(*_a) \
35 : "memory", "cc"); \
36})
37
38#define set_bit(nr, addr) __set_bit((nr), (addr))
39
40/*
41 * clear bit
42 */
43#define ___clear_bit(nr, addr) \
44({ \
45 volatile unsigned char *_a = (unsigned char *)(addr); \
46 const unsigned shift = (nr) & 7; \
47 _a += (nr) >> 3; \
48 \
49 asm volatile("bclr %2,(%1) # clear_bit reg" \
50 : "=m"(*_a) \
51 : "a"(_a), "d"(1 << shift), "m"(*_a) \
52 : "memory", "cc"); \
53})
54
55#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
56
57
58static inline void __clear_bit(unsigned long nr, volatile void *addr)
59{
60 unsigned int *a = (unsigned int *) addr;
61 int mask;
62
63 a += nr >> 5;
64 mask = 1 << (nr & 0x1f);
65 *a &= ~mask;
66}
67
68/*
69 * test bit
70 */
71static inline int test_bit(unsigned long nr, const volatile void *addr)
72{
73 return 1UL & (((const volatile unsigned int *) addr)[nr >> 5] >> (nr & 31));
74}
75
76/*
77 * change bit
78 */
79static inline void __change_bit(unsigned long nr, volatile void *addr)
80{
81 int mask;
82 unsigned int *a = (unsigned int *) addr;
83
84 a += nr >> 5;
85 mask = 1 << (nr & 0x1f);
86 *a ^= mask;
87}
88
89extern void change_bit(unsigned long nr, volatile void *addr);
90
91/*
92 * test and set bit
93 */
94#define __test_and_set_bit(nr,addr) \
95({ \
96 volatile unsigned char *_a = (unsigned char *)(addr); \
97 const unsigned shift = (nr) & 7; \
98 unsigned epsw; \
99 _a += (nr) >> 3; \
100 \
101 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
102 "mov epsw,%1" \
103 : "=m"(*_a), "=d"(epsw) \
104 : "a"(_a), "d"(1 << shift), "m"(*_a) \
105 : "memory", "cc"); \
106 \
107 !(epsw & EPSW_FLAG_Z); \
108})
109
110#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
111
112/*
113 * test and clear bit
114 */
115#define __test_and_clear_bit(nr, addr) \
116({ \
117 volatile unsigned char *_a = (unsigned char *)(addr); \
118 const unsigned shift = (nr) & 7; \
119 unsigned epsw; \
120 _a += (nr) >> 3; \
121 \
122 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
123 "mov epsw,%1" \
124 : "=m"(*_a), "=d"(epsw) \
125 : "a"(_a), "d"(1 << shift), "m"(*_a) \
126 : "memory", "cc"); \
127 \
128 !(epsw & EPSW_FLAG_Z); \
129})
130
131#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
132
133/*
134 * test and change bit
135 */
136static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
137{
138 int mask, retval;
139 unsigned int *a = (unsigned int *)addr;
140
141 a += nr >> 5;
142 mask = 1 << (nr & 0x1f);
143 retval = (mask & *a) != 0;
144 *a ^= mask;
145
146 return retval;
147}
148
149extern int test_and_change_bit(unsigned long nr, volatile void *addr);
150
151#include <asm-generic/bitops/lock.h>
152
153#ifdef __KERNEL__
154
155/**
156 * __ffs - find first bit set
157 * @x: the word to search
158 *
159 * - return 31..0 to indicate bit 31..0 most least significant bit set
160 * - if no bits are set in x, the result is undefined
161 */
162static inline __attribute__((const))
163unsigned long __ffs(unsigned long x)
164{
165 int bit;
166 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
167 return bit;
168}
169
170/*
171 * special slimline version of fls() for calculating ilog2_u32()
172 * - note: no protection against n == 0
173 */
174static inline __attribute__((const))
175int __ilog2_u32(u32 n)
176{
177 int bit;
178 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
179 return bit;
180}
181
182/**
183 * fls - find last bit set
184 * @x: the word to search
185 *
186 * This is defined the same way as ffs:
187 * - return 32..1 to indicate bit 31..0 most significant bit set
188 * - return 0 to indicate no bits set
189 */
190static inline __attribute__((const))
191int fls(int x)
192{
193 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
194}
195
196/**
197 * __fls - find last (most-significant) set bit in a long word
198 * @word: the word to search
199 *
200 * Undefined if no set bit exists, so code should check against 0 first.
201 */
202static inline unsigned long __fls(unsigned long word)
203{
204 return __ilog2_u32(word);
205}
206
207/**
208 * ffs - find first bit set
209 * @x: the word to search
210 *
211 * - return 32..1 to indicate bit 31..0 most least significant bit set
212 * - return 0 to indicate no bits set
213 */
214static inline __attribute__((const))
215int ffs(int x)
216{
217 /* Note: (x & -x) gives us a mask that is the least significant
218 * (rightmost) 1-bit of the value in x.
219 */
220 return fls(x & -x);
221}
222
223#include <asm-generic/bitops/ffz.h>
224#include <asm-generic/bitops/fls64.h>
225#include <asm-generic/bitops/find.h>
226#include <asm-generic/bitops/sched.h>
227#include <asm-generic/bitops/hweight.h>
228#include <asm-generic/bitops/ext2-atomic-setbit.h>
229#include <asm-generic/bitops/le.h>
230
231#endif /* __KERNEL__ */
232#endif /* __ASM_BITOPS_H */
diff --git a/arch/mn10300/include/asm/bug.h b/arch/mn10300/include/asm/bug.h
deleted file mode 100644
index 811414fb002d..000000000000
--- a/arch/mn10300/include/asm/bug.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* MN10300 Kernel bug reporting
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#ifdef CONFIG_BUG
15
16/*
17 * Tell the user there is some problem.
18 */
19#define BUG() \
20do { \
21 asm volatile( \
22 " syscall 15 \n" \
23 "0: \n" \
24 " .section __bug_table,\"aw\" \n" \
25 " .long 0b,%0,%1 \n" \
26 " .previous \n" \
27 : \
28 : "i"(__FILE__), "i"(__LINE__) \
29 ); \
30} while (1)
31
32#define HAVE_ARCH_BUG
33#endif /* CONFIG_BUG */
34
35#include <asm-generic/bug.h>
36
37#endif /* _ASM_BUG_H */
diff --git a/arch/mn10300/include/asm/bugs.h b/arch/mn10300/include/asm/bugs.h
deleted file mode 100644
index 31c8bc592b47..000000000000
--- a/arch/mn10300/include/asm/bugs.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Checks for architecture-dependent bugs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUGS_H
12#define _ASM_BUGS_H
13
14#include <asm/processor.h>
15
16static inline void __init check_bugs(void)
17{
18}
19
20#endif /* _ASM_BUGS_H */
diff --git a/arch/mn10300/include/asm/busctl-regs.h b/arch/mn10300/include/asm/busctl-regs.h
deleted file mode 100644
index 1632aef73401..000000000000
--- a/arch/mn10300/include/asm/busctl-regs.h
+++ /dev/null
@@ -1,151 +0,0 @@
1/* AM33v2 on-board bus controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* bus controller registers */
20#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
21#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
22#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
23#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
24#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
25#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
26#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
27#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
28#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
29#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
30#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
31#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
32#define BCCR_API 0x00070000 /* bus arbitration priority */
33#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
34#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
35#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
36#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
37#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
38#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
39#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
40#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
41#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
42#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
43#define BCCR_TMON 0x03000000 /* timeout value settings */
44#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
45#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
46#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
47#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
48#define BCCR_TMOE 0x10000000 /* timeout detection enable */
49
50#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
51#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
52#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
53#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
54#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
55#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
56#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
57#define BCBERR_BERW 0x00000100 /* type of access */
58#define BCBERR_BERW_WRITE 0x00000000 /* - write */
59#define BCBERR_BERW_READ 0x00000100 /* - read */
60#define BCBERR_BESD 0x00000200 /* error detector */
61#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
62#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
63#define BCBERR_BEBST 0x00000400 /* type of access */
64#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
65#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
66#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
67#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
68#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
69#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
70#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
71#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
72
73#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
74
75/* system bus controller registers */
76#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
77#define SBBASE_BE 0x00000001 /* bank enable */
78#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
79#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
80
81#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
82#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
83#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
84#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
85#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
86#define SBCNTRL0_DAH 0x0f000000 /* data hold */
87#define SBCNTRL0_ADH 0xf0000000 /* address hold */
88
89#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
90#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
91#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
92#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
93#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
94#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
95#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
96
97#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
98#define SBCNTRL2_WC 0x000000ff /* wait count */
99#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
100#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
101#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
102#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
103#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
104#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
105#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
106#define SBCNTRL2_BW 0x04000000 /* bus width */
107#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
108#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
109#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
110#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
111#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
112#define SBCNTRL2_BT 0x70000000 /* bus type setting */
113#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
114#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
115#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
116#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
117
118/* memory bus controller */
119#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
120#define SDBASE_CE 0x00000001 /* chip enable */
121#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
122#define SDBASE_CBAM_SHIFT 16
123#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
124
125#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
126#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
127#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
128#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
129#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
130#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
131#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
132#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
133#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
134#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
135#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
136#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
137#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
138#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
139#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
140#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
141#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
142#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
143
144#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
145#define SDREFCNT_PERI 0x00000fff /* refresh period */
146
147#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
148
149#endif /* __KERNEL__ */
150
151#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
deleted file mode 100644
index f29cde2cfc91..000000000000
--- a/arch/mn10300/include/asm/cache.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/* MN10300 cache management registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHE_H
13#define _ASM_CACHE_H
14
15#include <asm/cpu-regs.h>
16#include <proc/cache.h>
17
18#ifndef __ASSEMBLY__
19#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
20#else
21#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
22#endif
23
24#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
25
26/* data cache purge registers
27 * - read from the register to unconditionally purge that cache line
28 * - write address & 0xffffff00 to conditionally purge that cache line
29 * - clear LSB to request invalidation as well
30 */
31#define DCACHE_PURGE(WAY, ENTRY) \
32 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
33 (ENTRY) * L1_CACHE_BYTES, u32)
34
35#define DCACHE_PURGE_WAY0(ENTRY) \
36 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
37#define DCACHE_PURGE_WAY1(ENTRY) \
38 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
39#define DCACHE_PURGE_WAY2(ENTRY) \
40 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
41#define DCACHE_PURGE_WAY3(ENTRY) \
42 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
43
44/* instruction cache access registers */
45#define ICACHE_DATA(WAY, ENTRY, OFF) \
46 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + \
47 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
48#define ICACHE_TAG(WAY, ENTRY) \
49 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + \
50 (ENTRY) * L1_CACHE_BYTES, u32)
51
52/* data cache access registers */
53#define DCACHE_DATA(WAY, ENTRY, OFF) \
54 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + \
55 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
56#define DCACHE_TAG(WAY, ENTRY) \
57 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + \
58 (ENTRY) * L1_CACHE_BYTES, u32)
59
60#endif /* _ASM_CACHE_H */
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h
deleted file mode 100644
index 6d6df839948f..000000000000
--- a/arch/mn10300/include/asm/cacheflush.h
+++ /dev/null
@@ -1,164 +0,0 @@
1/* MN10300 Cache flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CACHEFLUSH_H
12#define _ASM_CACHEFLUSH_H
13
14#ifndef __ASSEMBLY__
15
16/* Keep includes the same across arches. */
17#include <linux/mm.h>
18
19/*
20 * Primitive routines
21 */
22#ifdef CONFIG_MN10300_CACHE_ENABLED
23extern void mn10300_local_icache_inv(void);
24extern void mn10300_local_icache_inv_page(unsigned long start);
25extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end);
26extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size);
27extern void mn10300_local_dcache_inv(void);
28extern void mn10300_local_dcache_inv_page(unsigned long start);
29extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end);
30extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size);
31extern void mn10300_icache_inv(void);
32extern void mn10300_icache_inv_page(unsigned long start);
33extern void mn10300_icache_inv_range(unsigned long start, unsigned long end);
34extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size);
35extern void mn10300_dcache_inv(void);
36extern void mn10300_dcache_inv_page(unsigned long start);
37extern void mn10300_dcache_inv_range(unsigned long start, unsigned long end);
38extern void mn10300_dcache_inv_range2(unsigned long start, unsigned long size);
39#ifdef CONFIG_MN10300_CACHE_WBACK
40extern void mn10300_local_dcache_flush(void);
41extern void mn10300_local_dcache_flush_page(unsigned long start);
42extern void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end);
43extern void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size);
44extern void mn10300_local_dcache_flush_inv(void);
45extern void mn10300_local_dcache_flush_inv_page(unsigned long start);
46extern void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end);
47extern void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size);
48extern void mn10300_dcache_flush(void);
49extern void mn10300_dcache_flush_page(unsigned long start);
50extern void mn10300_dcache_flush_range(unsigned long start, unsigned long end);
51extern void mn10300_dcache_flush_range2(unsigned long start, unsigned long size);
52extern void mn10300_dcache_flush_inv(void);
53extern void mn10300_dcache_flush_inv_page(unsigned long start);
54extern void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end);
55extern void mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size);
56#else
57#define mn10300_local_dcache_flush() do {} while (0)
58#define mn10300_local_dcache_flush_page(start) do {} while (0)
59#define mn10300_local_dcache_flush_range(start, end) do {} while (0)
60#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)
61#define mn10300_local_dcache_flush_inv() \
62 mn10300_local_dcache_inv()
63#define mn10300_local_dcache_flush_inv_page(start) \
64 mn10300_local_dcache_inv_page(start)
65#define mn10300_local_dcache_flush_inv_range(start, end) \
66 mn10300_local_dcache_inv_range(start, end)
67#define mn10300_local_dcache_flush_inv_range2(start, size) \
68 mn10300_local_dcache_inv_range2(start, size)
69#define mn10300_dcache_flush() do {} while (0)
70#define mn10300_dcache_flush_page(start) do {} while (0)
71#define mn10300_dcache_flush_range(start, end) do {} while (0)
72#define mn10300_dcache_flush_range2(start, size) do {} while (0)
73#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
74#define mn10300_dcache_flush_inv_page(start) \
75 mn10300_dcache_inv_page((start))
76#define mn10300_dcache_flush_inv_range(start, end) \
77 mn10300_dcache_inv_range((start), (end))
78#define mn10300_dcache_flush_inv_range2(start, size) \
79 mn10300_dcache_inv_range2((start), (size))
80#endif /* CONFIG_MN10300_CACHE_WBACK */
81#else
82#define mn10300_local_icache_inv() do {} while (0)
83#define mn10300_local_icache_inv_page(start) do {} while (0)
84#define mn10300_local_icache_inv_range(start, end) do {} while (0)
85#define mn10300_local_icache_inv_range2(start, size) do {} while (0)
86#define mn10300_local_dcache_inv() do {} while (0)
87#define mn10300_local_dcache_inv_page(start) do {} while (0)
88#define mn10300_local_dcache_inv_range(start, end) do {} while (0)
89#define mn10300_local_dcache_inv_range2(start, size) do {} while (0)
90#define mn10300_local_dcache_flush() do {} while (0)
91#define mn10300_local_dcache_flush_inv_page(start) do {} while (0)
92#define mn10300_local_dcache_flush_inv() do {} while (0)
93#define mn10300_local_dcache_flush_inv_range(start, end)do {} while (0)
94#define mn10300_local_dcache_flush_inv_range2(start, size) do {} while (0)
95#define mn10300_local_dcache_flush_page(start) do {} while (0)
96#define mn10300_local_dcache_flush_range(start, end) do {} while (0)
97#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)
98#define mn10300_icache_inv() do {} while (0)
99#define mn10300_icache_inv_page(start) do {} while (0)
100#define mn10300_icache_inv_range(start, end) do {} while (0)
101#define mn10300_icache_inv_range2(start, size) do {} while (0)
102#define mn10300_dcache_inv() do {} while (0)
103#define mn10300_dcache_inv_page(start) do {} while (0)
104#define mn10300_dcache_inv_range(start, end) do {} while (0)
105#define mn10300_dcache_inv_range2(start, size) do {} while (0)
106#define mn10300_dcache_flush() do {} while (0)
107#define mn10300_dcache_flush_inv_page(start) do {} while (0)
108#define mn10300_dcache_flush_inv() do {} while (0)
109#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
110#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
111#define mn10300_dcache_flush_page(start) do {} while (0)
112#define mn10300_dcache_flush_range(start, end) do {} while (0)
113#define mn10300_dcache_flush_range2(start, size) do {} while (0)
114#endif /* CONFIG_MN10300_CACHE_ENABLED */
115
116/*
117 * Virtually-indexed cache management (our cache is physically indexed)
118 */
119#define flush_cache_all() do {} while (0)
120#define flush_cache_mm(mm) do {} while (0)
121#define flush_cache_dup_mm(mm) do {} while (0)
122#define flush_cache_range(mm, start, end) do {} while (0)
123#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
124#define flush_cache_vmap(start, end) do {} while (0)
125#define flush_cache_vunmap(start, end) do {} while (0)
126#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
127#define flush_dcache_page(page) do {} while (0)
128#define flush_dcache_mmap_lock(mapping) do {} while (0)
129#define flush_dcache_mmap_unlock(mapping) do {} while (0)
130
131/*
132 * Physically-indexed cache management
133 */
134#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE)
135extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
136extern void flush_icache_range(unsigned long start, unsigned long end);
137#elif defined(CONFIG_MN10300_CACHE_INV_ICACHE)
138static inline void flush_icache_page(struct vm_area_struct *vma,
139 struct page *page)
140{
141 mn10300_icache_inv_page(page_to_phys(page));
142}
143extern void flush_icache_range(unsigned long start, unsigned long end);
144#else
145#define flush_icache_range(start, end) do {} while (0)
146#define flush_icache_page(vma, pg) do {} while (0)
147#endif
148
149
150#define flush_icache_user_range(vma, pg, adr, len) \
151 flush_icache_range(adr, adr + len)
152
153#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
154 do { \
155 memcpy(dst, src, len); \
156 flush_icache_page(vma, page); \
157 } while (0)
158
159#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
160 memcpy(dst, src, len)
161
162#endif /* __ASSEMBLY__ */
163
164#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/mn10300/include/asm/checksum.h b/arch/mn10300/include/asm/checksum.h
deleted file mode 100644
index c80df5b504ac..000000000000
--- a/arch/mn10300/include/asm/checksum.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/* MN10300 Optimised checksumming code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CHECKSUM_H
12#define _ASM_CHECKSUM_H
13
14extern __wsum csum_partial(const void *buff, int len, __wsum sum);
15extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
16 int len, __wsum sum);
17extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
18 int len, __wsum sum,
19 int *err_ptr);
20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
21extern __wsum csum_partial(const void *buff, int len, __wsum sum);
22extern __sum16 ip_compute_csum(const void *buff, int len);
23
24#define csum_partial_copy_fromuser csum_partial_copy
25extern __wsum csum_partial_copy(const void *src, void *dst, int len,
26 __wsum sum);
27
28static inline __sum16 csum_fold(__wsum sum)
29{
30 asm(
31 " add %1,%0 \n"
32 " addc 0xffff,%0 \n"
33 : "=r" (sum)
34 : "r" (sum << 16), "0" (sum & 0xffff0000)
35 : "cc"
36 );
37 return (~sum) >> 16;
38}
39
40static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
41 __u32 len, __u8 proto,
42 __wsum sum)
43{
44 __wsum tmp = (__wsum)((len + proto) << 8);
45
46 asm(
47 " add %1,%0 \n"
48 " addc %2,%0 \n"
49 " addc %3,%0 \n"
50 " addc 0,%0 \n"
51 : "=r" (sum)
52 : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
53 : "cc"
54 );
55 return sum;
56}
57
58/*
59 * computes the checksum of the TCP/UDP pseudo-header
60 * returns a 16-bit checksum, already complemented
61 */
62static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
63 __u32 len, __u8 proto,
64 __wsum sum)
65{
66 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
67}
68
69#undef _HAVE_ARCH_IPV6_CSUM
70
71/*
72 * Copy and checksum to user
73 */
74#define HAVE_CSUM_COPY_USER
75extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
76 __wsum sum, int *err_ptr);
77
78
79#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/mn10300/include/asm/cmpxchg.h b/arch/mn10300/include/asm/cmpxchg.h
deleted file mode 100644
index 97a4aaf387a6..000000000000
--- a/arch/mn10300/include/asm/cmpxchg.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/* MN10300 Atomic xchg/cmpxchg operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CMPXCHG_H
12#define _ASM_CMPXCHG_H
13
14#include <asm/irqflags.h>
15
16#ifdef CONFIG_SMP
17#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
18static inline
19unsigned long __xchg(volatile unsigned long *m, unsigned long val)
20{
21 unsigned long status;
22 unsigned long oldval;
23
24 asm volatile(
25 "1: mov %4,(_AAR,%3) \n"
26 " mov (_ADR,%3),%1 \n"
27 " mov %5,(_ADR,%3) \n"
28 " mov (_ADR,%3),%0 \n" /* flush */
29 " mov (_ASR,%3),%0 \n"
30 " or %0,%0 \n"
31 " bne 1b \n"
32 : "=&r"(status), "=&r"(oldval), "=m"(*m)
33 : "a"(ATOMIC_OPS_BASE_ADDR), "r"(m), "r"(val)
34 : "memory", "cc");
35
36 return oldval;
37}
38
39static inline unsigned long __cmpxchg(volatile unsigned long *m,
40 unsigned long old, unsigned long new)
41{
42 unsigned long status;
43 unsigned long oldval;
44
45 asm volatile(
46 "1: mov %4,(_AAR,%3) \n"
47 " mov (_ADR,%3),%1 \n"
48 " cmp %5,%1 \n"
49 " bne 2f \n"
50 " mov %6,(_ADR,%3) \n"
51 "2: mov (_ADR,%3),%0 \n" /* flush */
52 " mov (_ASR,%3),%0 \n"
53 " or %0,%0 \n"
54 " bne 1b \n"
55 : "=&r"(status), "=&r"(oldval), "=m"(*m)
56 : "a"(ATOMIC_OPS_BASE_ADDR), "r"(m),
57 "r"(old), "r"(new)
58 : "memory", "cc");
59
60 return oldval;
61}
62#else /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
63#error "No SMP atomic operation support!"
64#endif /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
65
66#else /* CONFIG_SMP */
67
68/*
69 * Emulate xchg for non-SMP MN10300
70 */
71struct __xchg_dummy { unsigned long a[100]; };
72#define __xg(x) ((struct __xchg_dummy *)(x))
73
74static inline
75unsigned long __xchg(volatile unsigned long *m, unsigned long val)
76{
77 unsigned long oldval;
78 unsigned long flags;
79
80 flags = arch_local_cli_save();
81 oldval = *m;
82 *m = val;
83 arch_local_irq_restore(flags);
84 return oldval;
85}
86
87/*
88 * Emulate cmpxchg for non-SMP MN10300
89 */
90static inline unsigned long __cmpxchg(volatile unsigned long *m,
91 unsigned long old, unsigned long new)
92{
93 unsigned long oldval;
94 unsigned long flags;
95
96 flags = arch_local_cli_save();
97 oldval = *m;
98 if (oldval == old)
99 *m = new;
100 arch_local_irq_restore(flags);
101 return oldval;
102}
103
104#endif /* CONFIG_SMP */
105
106#define xchg(ptr, v) \
107 ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
108 (unsigned long)(v)))
109
110#define cmpxchg(ptr, o, n) \
111 ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
112 (unsigned long)(o), \
113 (unsigned long)(n)))
114
115#endif /* _ASM_CMPXCHG_H */
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h
deleted file mode 100644
index c54effae2202..000000000000
--- a/arch/mn10300/include/asm/cpu-regs.h
+++ /dev/null
@@ -1,353 +0,0 @@
1/* MN10300 Core system registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CPU_REGS_H
12#define _ASM_CPU_REGS_H
13
14#ifndef __ASSEMBLY__
15#include <linux/types.h>
16#endif
17
18/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
19 * the FP regs, but tell the assembler that we're actually allowed AM33v2
20 * instructions */
21#ifndef __ASSEMBLY__
22asm(" .am33_2\n");
23#else
24.am33_2
25#endif
26
27#ifdef __KERNEL__
28
29#ifndef __ASSEMBLY__
30#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
31#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
32#else
33#define __SYSREG(ADDR, TYPE) ADDR
34#define __SYSREGC(ADDR, TYPE) ADDR
35#endif
36
37/* CPU registers */
38#define EPSW_FLAG_Z 0x00000001 /* zero flag */
39#define EPSW_FLAG_N 0x00000002 /* negative flag */
40#define EPSW_FLAG_C 0x00000004 /* carry flag */
41#define EPSW_FLAG_V 0x00000008 /* overflow flag */
42#define EPSW_IM 0x00000700 /* interrupt mode */
43#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
44#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
45#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
46#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
47#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
48#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
49#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
50#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
51#define EPSW_IE 0x00000800 /* interrupt enable */
52#define EPSW_S 0x00003000 /* software auxiliary bits */
53#define EPSW_T 0x00008000 /* trace enable */
54#define EPSW_nSL 0x00010000 /* not supervisor level */
55#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
56#define EPSW_nAR 0x00040000 /* register bank control */
57#define EPSW_ML 0x00080000 /* monitor level */
58#define EPSW_FE 0x00100000 /* FPU enable */
59#define EPSW_IM_SHIFT 8 /* EPSW_IM_SHIFT determines the interrupt mode */
60
61#define NUM2EPSW_IM(num) ((num) << EPSW_IM_SHIFT)
62
63/* FPU registers */
64#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
65#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
66#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
67#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
68#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
69#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
70#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
71#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
72#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
73#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
74#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
75#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
76#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
77#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
78#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
79#define FPCR_RM 0x00030000 /* rounding mode */
80#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
81#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
82#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
83#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
84#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
85#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
86
87/* CPU control registers */
88#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
89#define CPUP_DWBD 0x0020 /* write buffer disable flag */
90#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
91#define CPUP_EXM 0x0080 /* exception operation mode */
92#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
93#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
94
95#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
96#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
97#define CPUM_HALT 0x0008 /* set to enter halt state */
98#define CPUM_STOP 0x0010 /* set to enter stop state */
99
100#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
101#define CPUREV_TYPE 0x0000000f /* CPU type */
102#define CPUREV_TYPE_S 0
103#define CPUREV_TYPE_AM33_1 0x00000000 /* - AM33-1 core, AM33/1.00 arch */
104#define CPUREV_TYPE_AM33_2 0x00000001 /* - AM33-2 core, AM33/2.00 arch */
105#define CPUREV_TYPE_AM34_1 0x00000002 /* - AM34-1 core, AM33/2.00 arch */
106#define CPUREV_TYPE_AM33_3 0x00000003 /* - AM33-3 core, AM33/2.00 arch */
107#define CPUREV_TYPE_AM34_2 0x00000004 /* - AM34-2 core, AM33/3.00 arch */
108#define CPUREV_REVISION 0x000000f0 /* CPU revision */
109#define CPUREV_REVISION_S 4
110#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
111#define CPUREV_ICWAY_S 8
112#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
113#define CPUREV_ICSIZE_S 12
114#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
115#define CPUREV_DCWAY_S 16
116#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
117#define CPUREV_DCSIZE_S 20
118#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
119#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
120#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
121
122#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
123
124/* interrupt/exception control registers */
125#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
126#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
127#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
128#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
129#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
130#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
131#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
132
133#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
134#define TBR_TB 0xff000000 /* table base address bits 31-24 */
135#define TBR_INT_CODE 0x00ffffff /* interrupt code */
136
137#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
138
139#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
140#define sISR_IRQICE 0x00000001 /* ICE interrupt */
141#define sISR_ISTEP 0x00000002 /* single step interrupt */
142#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
143#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
144#define sISR_PIEXE 0x00000010 /* program interrupt */
145#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
146#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
147#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
148#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
149#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
150#define sISR_OBREAK 0x00000400 /* operand break interrupt */
151#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
152#define sISR_BUSERR 0x00001000 /* bus error fault */
153#define sISR_DBLFT 0x00002000 /* double fault */
154#define sISR_DBG 0x00008000 /* debug reserved interrupt */
155#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
156#define sISR_DTMISS 0x00020000 /* data TLB miss */
157#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
158#define sISR_DTEX 0x00080000 /* data TLB access exception */
159#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
160#define sISR_ILGDA 0x00200000 /* illegal data access exception */
161#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
162#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
163#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
164#define sISR_DISA 0x02000000 /* data space instruction access excep */
165#define sISR_SYSC 0x04000000 /* system call instruction excep */
166#define sISR_FPUD 0x08000000 /* FPU disabled excep */
167#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
168#define sISR_FPUOP 0x20000000 /* FPU operation excep */
169#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
170
171/* cache control registers */
172#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
173#define CHCTR_ICEN 0x0001 /* instruction cache enable */
174#define CHCTR_DCEN 0x0002 /* data cache enable */
175#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
176#define CHCTR_DCBUSY 0x0008 /* data cache busy */
177#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
178#define CHCTR_DCINV 0x0020 /* data cache invalidate */
179#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
180#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
181#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
182#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
183#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
184#define CHCTR_DCWMD 0xf000 /* data cache way mode */
185
186#ifdef CONFIG_AM34_2
187#define ICIVCR __SYSREG(0xc0000c00, u32) /* icache area invalidate control */
188#define ICIVCR_ICIVBSY 0x00000008 /* icache area invalidate busy */
189#define ICIVCR_ICI 0x00000001 /* icache area invalidate */
190
191#define ICIVMR __SYSREG(0xc0000c04, u32) /* icache area invalidate mask */
192
193#define DCPGCR __SYSREG(0xc0000c10, u32) /* data cache area purge control */
194#define DCPGCR_DCPGBSY 0x00000008 /* data cache area purge busy */
195#define DCPGCR_DCP 0x00000002 /* data cache area purge */
196#define DCPGCR_DCI 0x00000001 /* data cache area invalidate */
197
198#define DCPGMR __SYSREG(0xc0000c14, u32) /* data cache area purge mask */
199#endif /* CONFIG_AM34_2 */
200
201/* MMU control registers */
202#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
203#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
204#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
205#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
206#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
207#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
208#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
209#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
210#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
211#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
212#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
213#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
214#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
215#define MMUCTR_DTE 0x00400000 /* data TLB enable */
216#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
217#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
218#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
219#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
220#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
221#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
222#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
223#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
224#ifdef CONFIG_AM34_2
225#define MMUCTR_WTE 0x80000000 /* write-through cache TLB entry bit enable */
226#endif
227
228#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
229#define PIDR_PID 0x00ff /* process identifier */
230
231#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
232
233#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
234#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
235#define xPTEL_V 0x00000001 /* TLB entry valid */
236#define xPTEL_UNUSED1 0x00000002 /* unused bit */
237#define xPTEL_UNUSED2 0x00000004 /* unused bit */
238#define xPTEL_C 0x00000008 /* cached if set */
239#define xPTEL_PV 0x00000010 /* page valid */
240#define xPTEL_D 0x00000020 /* dirty */
241#define xPTEL_PR 0x000001c0 /* page protection */
242#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
243#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
244#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
245#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
246#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
247#define xPTEL_G 0x00000200 /* global (use PID if 0) */
248#define xPTEL_PS 0x00000c00 /* page size */
249#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
250#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
251#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
252#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
253#define xPTEL_PPN 0xfffff006 /* physical page number */
254
255#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
256#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
257#define xPTEU_VPN 0xfffffc00 /* virtual page number */
258#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
259
260#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
261#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
262#define xPTEL2_V 0x00000001 /* TLB entry valid */
263#define xPTEL2_C 0x00000002 /* cacheable */
264#define xPTEL2_PV 0x00000004 /* page valid */
265#define xPTEL2_D 0x00000008 /* dirty */
266#define xPTEL2_PR 0x00000070 /* page protection */
267#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
268#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
269#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
270#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
271#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
272#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
273#define xPTEL2_PS 0x00000300 /* page size */
274#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
275#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
276#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
277#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
278#define xPTEL2_CWT 0x00000400 /* cacheable write-through */
279#define xPTEL2_UNUSED1 0x00000800 /* unused bit (broadcast mask) */
280#define xPTEL2_PPN 0xfffff000 /* physical page number */
281
282#define xPTEL2_V_BIT 0 /* bit numbers corresponding to above masks */
283#define xPTEL2_C_BIT 1
284#define xPTEL2_PV_BIT 2
285#define xPTEL2_D_BIT 3
286#define xPTEL2_G_BIT 7
287#define xPTEL2_UNUSED1_BIT 11
288
289#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
290#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
291#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
292#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
293#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
294#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
295#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
296#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
297#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
298#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
299#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
300#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
301#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
302#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
303#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
304#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
305#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
306#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
307#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
308#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
309
310#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
311/* atomic operation registers */
312#define AAR __SYSREG(0xc0000a00, u32) /* cacheable address */
313#define AAR2 __SYSREG(0xc0000a04, u32) /* uncacheable address */
314#define ADR __SYSREG(0xc0000a08, u32) /* data */
315#define ASR __SYSREG(0xc0000a0c, u32) /* status */
316#define AARU __SYSREG(0xd400aa00, u32) /* user address */
317#define ADRU __SYSREG(0xd400aa08, u32) /* user data */
318#define ASRU __SYSREG(0xd400aa0c, u32) /* user status */
319
320#define ASR_RW 0x00000008 /* read */
321#define ASR_BW 0x00000004 /* bus error */
322#define ASR_IW 0x00000002 /* interrupt */
323#define ASR_LW 0x00000001 /* bus lock */
324
325#define ASRU_RW ASR_RW /* read */
326#define ASRU_BW ASR_BW /* bus error */
327#define ASRU_IW ASR_IW /* interrupt */
328#define ASRU_LW ASR_LW /* bus lock */
329
330/* in inline ASM, we stick the base pointer in to a reg and use offsets from
331 * it */
332#define ATOMIC_OPS_BASE_ADDR 0xc0000a00
333#ifndef __ASSEMBLY__
334asm(
335 "_AAR = 0\n"
336 "_AAR2 = 4\n"
337 "_ADR = 8\n"
338 "_ASR = 12\n");
339#else
340#define _AAR 0
341#define _AAR2 4
342#define _ADR 8
343#define _ASR 12
344#endif
345
346/* physical page address for userspace atomic operations registers */
347#define USER_ATOMIC_OPS_PAGE_ADDR 0xd400a000
348
349#endif /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
350
351#endif /* __KERNEL__ */
352
353#endif /* _ASM_CPU_REGS_H */
diff --git a/arch/mn10300/include/asm/current.h b/arch/mn10300/include/asm/current.h
deleted file mode 100644
index ca6027d83743..000000000000
--- a/arch/mn10300/include/asm/current.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* MN10300 Current task structure accessor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CURRENT_H
12#define _ASM_CURRENT_H
13
14#include <linux/thread_info.h>
15
16/*
17 * dedicate E2 to keeping the current task pointer
18 */
19#ifdef CONFIG_MN10300_CURRENT_IN_E2
20
21register struct task_struct *const current asm("e2") __attribute__((used));
22
23#define get_current() current
24
25extern struct task_struct *__current;
26
27#else
28static inline __attribute__((const))
29struct task_struct *get_current(void)
30{
31 return current_thread_info()->task;
32}
33
34#define current get_current()
35#endif
36
37#endif /* _ASM_CURRENT_H */
diff --git a/arch/mn10300/include/asm/debugger.h b/arch/mn10300/include/asm/debugger.h
deleted file mode 100644
index e1d3b083696c..000000000000
--- a/arch/mn10300/include/asm/debugger.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* Kernel debugger for MN10300
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DEBUGGER_H
13#define _ASM_DEBUGGER_H
14
15#if defined(CONFIG_KERNEL_DEBUGGER)
16
17extern int debugger_intercept(enum exception_code, int, int, struct pt_regs *);
18extern int at_debugger_breakpoint(struct pt_regs *);
19
20#ifndef CONFIG_MN10300_DEBUGGER_CACHE_NO_FLUSH
21extern void debugger_local_cache_flushinv(void);
22extern void debugger_local_cache_flushinv_one(u8 *);
23#else
24static inline void debugger_local_cache_flushinv(void) {}
25static inline void debugger_local_cache_flushinv_one(u8 *addr) {}
26#endif
27
28#else /* CONFIG_KERNEL_DEBUGGER */
29
30static inline int debugger_intercept(enum exception_code excep,
31 int signo, int si_code,
32 struct pt_regs *regs)
33{
34 return 0;
35}
36
37static inline int at_debugger_breakpoint(struct pt_regs *regs)
38{
39 return 0;
40}
41
42#endif /* CONFIG_KERNEL_DEBUGGER */
43#endif /* _ASM_DEBUGGER_H */
diff --git a/arch/mn10300/include/asm/delay.h b/arch/mn10300/include/asm/delay.h
deleted file mode 100644
index 34517b359399..000000000000
--- a/arch/mn10300/include/asm/delay.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* MN10300 Uninterruptible delay routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H
13
14extern void __udelay(unsigned long usecs);
15extern void __delay(unsigned long loops);
16
17#define udelay(n) __udelay(n)
18
19#endif /* _ASM_DELAY_H */
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
deleted file mode 100644
index 503efab2a516..000000000000
--- a/arch/mn10300/include/asm/div64.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/* MN10300 64-bit division
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DIV64
12#define _ASM_DIV64
13
14#include <linux/types.h>
15
16extern void ____unhandled_size_in_do_div___(void);
17
18/*
19 * Beginning with gcc 4.6, the MDR register is represented explicitly. We
20 * must, therefore, at least explicitly clobber the register when we make
21 * changes to it. The following assembly fragments *could* be rearranged in
22 * order to leave the moves to/from the MDR register to the compiler, but the
23 * gains would be minimal at best.
24 */
25#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
26# define CLOBBER_MDR_CC "mdr", "cc"
27#else
28# define CLOBBER_MDR_CC "cc"
29#endif
30
31/*
32 * divide n by base, leaving the result in n and returning the remainder
33 * - we can do this quite efficiently on the MN10300 by cascading the divides
34 * through the MDR register
35 */
36#define do_div(n, base) \
37({ \
38 unsigned __rem = 0; \
39 if (sizeof(n) <= 4) { \
40 asm("mov %1,mdr \n" \
41 "divu %2,%0 \n" \
42 "mov mdr,%1 \n" \
43 : "+r"(n), "=d"(__rem) \
44 : "r"(base), "1"(__rem) \
45 : CLOBBER_MDR_CC \
46 ); \
47 } else if (sizeof(n) <= 8) { \
48 union { \
49 unsigned long long l; \
50 u32 w[2]; \
51 } __quot; \
52 __quot.l = n; \
53 asm("mov %0,mdr \n" /* MDR = 0 */ \
54 "divu %3,%1 \n" \
55 /* __quot.MSL = __div.MSL / base, */ \
56 /* MDR = MDR:__div.MSL % base */ \
57 "divu %3,%2 \n" \
58 /* __quot.LSL = MDR:__div.LSL / base, */ \
59 /* MDR = MDR:__div.LSL % base */ \
60 "mov mdr,%0 \n" \
61 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
62 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
63 "2"(__quot.w[0]) \
64 : CLOBBER_MDR_CC \
65 ); \
66 n = __quot.l; \
67 } else { \
68 ____unhandled_size_in_do_div___(); \
69 } \
70 __rem; \
71})
72
73/*
74 * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
75 * so as not to lose accuracy
76 * - we use the MDR register to hold the MSW of the product
77 */
78static inline __attribute__((const))
79unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
80{
81 unsigned result;
82
83 asm("mulu %2,%0 \n" /* MDR:val = val*mult */
84 "divu %3,%0 \n" /* val = MDR:val/div;
85 * MDR = MDR:val%div */
86 : "=r"(result)
87 : "0"(val), "ir"(mult), "r"(div)
88 : CLOBBER_MDR_CC
89 );
90
91 return result;
92}
93
94/*
95 * do a signed 32-bit multiply and divide with intermediate 64-bit product so
96 * as not to lose accuracy
97 * - we use the MDR register to hold the MSW of the product
98 */
99static inline __attribute__((const))
100signed __muldiv64s(signed val, signed mult, signed div)
101{
102 signed result;
103
104 asm("mul %2,%0 \n" /* MDR:val = val*mult */
105 "div %3,%0 \n" /* val = MDR:val/div;
106 * MDR = MDR:val%div */
107 : "=r"(result)
108 : "0"(val), "ir"(mult), "r"(div)
109 : CLOBBER_MDR_CC
110 );
111
112 return result;
113}
114
115#endif /* _ASM_DIV64 */
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
deleted file mode 100644
index 439e474ed6d7..000000000000
--- a/arch/mn10300/include/asm/dma-mapping.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* DMA mapping routines for the MN10300 arch
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_MAPPING_H
12#define _ASM_DMA_MAPPING_H
13
14extern const struct dma_map_ops mn10300_dma_ops;
15
16static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
17{
18 return &mn10300_dma_ops;
19}
20
21#endif
diff --git a/arch/mn10300/include/asm/dma.h b/arch/mn10300/include/asm/dma.h
deleted file mode 100644
index 10b77d4628c2..000000000000
--- a/arch/mn10300/include/asm/dma.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/* MN10300 ISA DMA handlers and definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_H
12#define _ASM_DMA_H
13
14#include <linux/spinlock.h>
15#include <asm/io.h>
16#include <linux/delay.h>
17
18#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
19#define MAX_DMA_ADDRESS 0xbfffffff
20
21extern spinlock_t dma_spin_lock;
22
23static inline unsigned long claim_dma_lock(void)
24{
25 unsigned long flags;
26 spin_lock_irqsave(&dma_spin_lock, flags);
27 return flags;
28}
29
30static inline void release_dma_lock(unsigned long flags)
31{
32 spin_unlock_irqrestore(&dma_spin_lock, flags);
33}
34
35/* enable/disable a specific DMA channel */
36static inline void enable_dma(unsigned int dmanr)
37{
38}
39
40static inline void disable_dma(unsigned int dmanr)
41{
42}
43
44/* Clear the 'DMA Pointer Flip Flop'.
45 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
46 * Use this once to initialize the FF to a known state.
47 * After that, keep track of it. :-)
48 * --- In order to do that, the DMA routines below should ---
49 * --- only be used while holding the DMA lock ! ---
50 */
51static inline void clear_dma_ff(unsigned int dmanr)
52{
53}
54
55/* set mode (above) for a specific DMA channel */
56static inline void set_dma_mode(unsigned int dmanr, char mode)
57{
58}
59
60/* Set only the page register bits of the transfer address.
61 * This is used for successive transfers when we know the contents of
62 * the lower 16 bits of the DMA current address register, but a 64k boundary
63 * may have been crossed.
64 */
65static inline void set_dma_page(unsigned int dmanr, char pagenr)
66{
67}
68
69
70/* Set transfer address & page bits for specific DMA channel.
71 * Assumes dma flipflop is clear.
72 */
73static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
74{
75}
76
77
78/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
79 * a specific DMA channel.
80 * You must ensure the parameters are valid.
81 * NOTE: from a manual: "the number of transfers is one more
82 * than the initial word count"! This is taken into account.
83 * Assumes dma flip-flop is clear.
84 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
85 */
86static inline void set_dma_count(unsigned int dmanr, unsigned int count)
87{
88}
89
90
91/* Get DMA residue count. After a DMA transfer, this
92 * should return zero. Reading this while a DMA transfer is
93 * still in progress will return unpredictable results.
94 * If called before the channel has been used, it may return 1.
95 * Otherwise, it returns the number of _bytes_ left to transfer.
96 *
97 * Assumes DMA flip-flop is clear.
98 */
99static inline int get_dma_residue(unsigned int dmanr)
100{
101 return 0;
102}
103
104
105/* These are in kernel/dma.c: */
106extern int request_dma(unsigned int dmanr, const char *device_id);
107extern void free_dma(unsigned int dmanr);
108
109/* From PCI */
110
111#ifdef CONFIG_PCI
112extern int isa_dma_bridge_buggy;
113#else
114#define isa_dma_bridge_buggy (0)
115#endif
116
117#endif /* _ASM_DMA_H */
diff --git a/arch/mn10300/include/asm/dmactl-regs.h b/arch/mn10300/include/asm/dmactl-regs.h
deleted file mode 100644
index 80337b339c90..000000000000
--- a/arch/mn10300/include/asm/dmactl-regs.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* MN10300 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMACTL_REGS_H
12#define _ASM_DMACTL_REGS_H
13
14#include <proc/dmactl-regs.h>
15
16#endif /* _ASM_DMACTL_REGS_H */
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
deleted file mode 100644
index f592d7a9f032..000000000000
--- a/arch/mn10300/include/asm/elf.h
+++ /dev/null
@@ -1,153 +0,0 @@
1/* MN10300 ELF constant and register definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_ELF_H
13#define _ASM_ELF_H
14
15#include <linux/utsname.h>
16#include <asm/ptrace.h>
17#include <asm/user.h>
18
19/*
20 * AM33 relocations
21 */
22#define R_MN10300_NONE 0 /* No reloc. */
23#define R_MN10300_32 1 /* Direct 32 bit. */
24#define R_MN10300_16 2 /* Direct 16 bit. */
25#define R_MN10300_8 3 /* Direct 8 bit. */
26#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
27#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
28#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
29#define R_MN10300_24 9 /* Direct 24 bit. */
30#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
31#define R_MN10300_SYM_DIFF 33 /* Adjustment when relaxing. */
32#define R_MN10300_ALIGN 34 /* Alignment requirement. */
33
34/*
35 * AM33/AM34 HW Capabilities
36 */
37#define HWCAP_MN10300_ATOMIC_OP_UNIT 1 /* Has AM34 Atomic Operations */
38
39
40/*
41 * ELF register definitions..
42 */
43typedef unsigned long elf_greg_t;
44
45#define ELF_NGREG ((sizeof(struct pt_regs) / sizeof(elf_greg_t)) - 1)
46typedef elf_greg_t elf_gregset_t[ELF_NGREG];
47
48#define ELF_NFPREG 32
49typedef float elf_fpreg_t;
50
51typedef struct {
52 elf_fpreg_t fpregs[ELF_NFPREG];
53 u_int32_t fpcr;
54} elf_fpregset_t;
55
56/*
57 * This is used to ensure we don't load something for the wrong architecture
58 */
59#define elf_check_arch(x) \
60 (((x)->e_machine == EM_CYGNUS_MN10300) || \
61 ((x)->e_machine == EM_MN10300))
62
63/*
64 * These are used to set parameters in the core dumps.
65 */
66#define ELF_CLASS ELFCLASS32
67#define ELF_DATA ELFDATA2LSB
68#define ELF_ARCH EM_MN10300
69
70/*
71 * ELF process initialiser
72 */
73#define ELF_PLAT_INIT(_r, load_addr) \
74do { \
75 struct pt_regs *_ur = current->thread.uregs; \
76 _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
77 _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
78 _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
79 _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
80 _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
81 _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
82} while (0)
83
84#define CORE_DUMP_USE_REGSET
85#define ELF_EXEC_PAGESIZE 4096
86
87/*
88 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
89 * use of this is to invoke "./ld.so someprog" to test out a new version of
90 * the loader. We need to make sure that it is out of the way of the program
91 * that it will "exec", and that there is sufficient room for the brk.
92 * - must clear the VMALLOC area
93 */
94#define ELF_ET_DYN_BASE 0x04000000
95
96/*
97 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
98 * now struct user_regs, they are different)
99 * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
100 */
101#define ELF_CORE_COPY_REGS(pr_reg, regs) \
102do { \
103 pr_reg[0] = regs->a3; \
104 pr_reg[1] = regs->a2; \
105 pr_reg[2] = regs->d3; \
106 pr_reg[3] = regs->d2; \
107 pr_reg[4] = regs->mcvf; \
108 pr_reg[5] = regs->mcrl; \
109 pr_reg[6] = regs->mcrh; \
110 pr_reg[7] = regs->mdrq; \
111 pr_reg[8] = regs->e1; \
112 pr_reg[9] = regs->e0; \
113 pr_reg[10] = regs->e7; \
114 pr_reg[11] = regs->e6; \
115 pr_reg[12] = regs->e5; \
116 pr_reg[13] = regs->e4; \
117 pr_reg[14] = regs->e3; \
118 pr_reg[15] = regs->e2; \
119 pr_reg[16] = regs->sp; \
120 pr_reg[17] = regs->lar; \
121 pr_reg[18] = regs->lir; \
122 pr_reg[19] = regs->mdr; \
123 pr_reg[20] = regs->a1; \
124 pr_reg[21] = regs->a0; \
125 pr_reg[22] = regs->d1; \
126 pr_reg[23] = regs->d0; \
127 pr_reg[24] = regs->orig_d0; \
128 pr_reg[25] = regs->epsw; \
129 pr_reg[26] = regs->pc; \
130} while (0);
131
132/*
133 * This yields a mask that user programs can use to figure out what
134 * instruction set this CPU supports. This could be done in user space,
135 * but it's not easy, and we've already done it here.
136 */
137#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
138#define ELF_HWCAP (HWCAP_MN10300_ATOMIC_OP_UNIT)
139#else
140#define ELF_HWCAP (0)
141#endif
142
143/*
144 * This yields a string that ld.so will use to load implementation
145 * specific libraries for optimization. This is more specific in
146 * intent than poking at uname or /proc/cpuinfo.
147 *
148 * For the moment, we have only optimizations for the Intel generations,
149 * but that could change...
150 */
151#define ELF_PLATFORM (NULL)
152
153#endif /* _ASM_ELF_H */
diff --git a/arch/mn10300/include/asm/emergency-restart.h b/arch/mn10300/include/asm/emergency-restart.h
deleted file mode 100644
index 3711bd9d50bd..000000000000
--- a/arch/mn10300/include/asm/emergency-restart.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/emergency-restart.h>
diff --git a/arch/mn10300/include/asm/exceptions.h b/arch/mn10300/include/asm/exceptions.h
deleted file mode 100644
index 95a4d42c3a06..000000000000
--- a/arch/mn10300/include/asm/exceptions.h
+++ /dev/null
@@ -1,121 +0,0 @@
1/* MN10300 Microcontroller core exceptions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_EXCEPTIONS_H
12#define _ASM_EXCEPTIONS_H
13
14#include <linux/linkage.h>
15
16/*
17 * define the breakpoint instruction opcode to use
18 * - note that the JTAG unit steals 0xFF, so you can't use JTAG and GDBSTUB at
19 * the same time.
20 */
21#define GDBSTUB_BKPT 0xFF
22
23#ifndef __ASSEMBLY__
24
25/*
26 * enumeration of exception codes (as extracted from TBR MSW)
27 */
28enum exception_code {
29 EXCEP_RESET = 0x000000, /* reset */
30
31 /* MMU exceptions */
32 EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
33 EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
34 EXCEP_IAERROR = 0x000110, /* instruction address */
35 EXCEP_DAERROR = 0x000118, /* data address */
36
37 /* system exceptions */
38 EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
39 EXCEP_ISTEP = 0x000130, /* single step */
40 EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
41 EXCEP_OBREAK = 0x000158, /* operand breakpoint */
42 EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
43 EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
44 EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
45 EXCEP_MEMERR = 0x000178, /* illegal memory access */
46 EXCEP_MISALIGN = 0x000180, /* misalignment */
47 EXCEP_BUSERROR = 0x000188, /* bus error */
48 EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
49 EXCEP_ILLDATACC = 0x000198, /* illegal data access */
50 EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
51 EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
52 EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
53 EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
54 EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
55
56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
60
61 /* interrupts */
62 EXCEP_WDT = 0x000240, /* watchdog timer overflow */
63 EXCEP_NMI = 0x000248, /* non-maskable interrupt */
64 EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
65 EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
66 EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
67 EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
68 EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
69 EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
70 EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
71
72 /* system calls */
73 EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
74 EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
75 EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
76 EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
77 EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
78 EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
79 EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
80 EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
81 EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
82 EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
83 EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
84 EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
85 EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
86 EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
87 EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
88 EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
89};
90
91extern void __set_intr_stub(enum exception_code code, void *handler);
92extern void set_intr_stub(enum exception_code code, void *handler);
93
94struct pt_regs;
95
96extern asmlinkage void __common_exception(void);
97extern asmlinkage void itlb_miss(void);
98extern asmlinkage void dtlb_miss(void);
99extern asmlinkage void itlb_aerror(void);
100extern asmlinkage void dtlb_aerror(void);
101extern asmlinkage void raw_bus_error(void);
102extern asmlinkage void double_fault(void);
103extern asmlinkage int system_call(struct pt_regs *);
104extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
105extern asmlinkage void uninitialised_exception(struct pt_regs *,
106 enum exception_code);
107extern asmlinkage void irq_handler(void);
108extern asmlinkage void profile_handler(void);
109extern asmlinkage void nmi_handler(void);
110extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
111
112extern void die(const char *, struct pt_regs *, enum exception_code)
113 __noreturn;
114
115extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
116
117#define NUM2EXCEP_IRQ_LEVEL(num) (EXCEP_IRQ_LEVEL0 + (num) * 8)
118
119#endif /* __ASSEMBLY__ */
120
121#endif /* _ASM_EXCEPTIONS_H */
diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h
deleted file mode 100644
index a47e995d45f3..000000000000
--- a/arch/mn10300/include/asm/fpu.h
+++ /dev/null
@@ -1,132 +0,0 @@
1/* MN10300 FPU definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_FPU_H
13#define _ASM_FPU_H
14
15#ifndef __ASSEMBLY__
16
17#include <linux/sched.h>
18#include <asm/exceptions.h>
19#include <asm/sigcontext.h>
20
21#ifdef __KERNEL__
22
23extern asmlinkage void fpu_disabled(void);
24
25#ifdef CONFIG_FPU
26
27#ifdef CONFIG_LAZY_SAVE_FPU
28/* the task that currently owns the FPU state */
29extern struct task_struct *fpu_state_owner;
30#endif
31
32#if (THREAD_USING_FPU & ~0xff)
33#error THREAD_USING_FPU must be smaller than 0x100.
34#endif
35
36static inline void set_using_fpu(struct task_struct *tsk)
37{
38 asm volatile(
39 "bset %0,(0,%1)"
40 :
41 : "i"(THREAD_USING_FPU), "a"(&tsk->thread.fpu_flags)
42 : "memory", "cc");
43}
44
45static inline void clear_using_fpu(struct task_struct *tsk)
46{
47 asm volatile(
48 "bclr %0,(0,%1)"
49 :
50 : "i"(THREAD_USING_FPU), "a"(&tsk->thread.fpu_flags)
51 : "memory", "cc");
52}
53
54#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
55
56extern asmlinkage void fpu_kill_state(struct task_struct *);
57extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
58extern asmlinkage void fpu_init_state(void);
59extern asmlinkage void fpu_save(struct fpu_state_struct *);
60extern int fpu_setup_sigcontext(struct fpucontext *buf);
61extern int fpu_restore_sigcontext(struct fpucontext *buf);
62
63static inline void unlazy_fpu(struct task_struct *tsk)
64{
65 preempt_disable();
66#ifndef CONFIG_LAZY_SAVE_FPU
67 if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
68 fpu_save(&tsk->thread.fpu_state);
69 tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
70 tsk->thread.uregs->epsw &= ~EPSW_FE;
71 }
72#else
73 if (fpu_state_owner == tsk)
74 fpu_save(&tsk->thread.fpu_state);
75#endif
76 preempt_enable();
77}
78
79static inline void exit_fpu(struct task_struct *tsk)
80{
81#ifdef CONFIG_LAZY_SAVE_FPU
82 preempt_disable();
83 if (fpu_state_owner == tsk)
84 fpu_state_owner = NULL;
85 preempt_enable();
86#endif
87}
88
89static inline void flush_fpu(void)
90{
91 struct task_struct *tsk = current;
92
93 preempt_disable();
94#ifndef CONFIG_LAZY_SAVE_FPU
95 if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
96 tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
97 tsk->thread.uregs->epsw &= ~EPSW_FE;
98 }
99#else
100 if (fpu_state_owner == tsk) {
101 fpu_state_owner = NULL;
102 tsk->thread.uregs->epsw &= ~EPSW_FE;
103 }
104#endif
105 preempt_enable();
106 clear_using_fpu(tsk);
107}
108
109#else /* CONFIG_FPU */
110
111extern asmlinkage
112void unexpected_fpu_exception(struct pt_regs *, enum exception_code);
113#define fpu_exception unexpected_fpu_exception
114
115struct task_struct;
116struct fpu_state_struct;
117static inline bool is_using_fpu(struct task_struct *tsk) { return false; }
118static inline void set_using_fpu(struct task_struct *tsk) {}
119static inline void clear_using_fpu(struct task_struct *tsk) {}
120static inline void fpu_init_state(void) {}
121static inline void fpu_save(struct fpu_state_struct *s) {}
122static inline void fpu_kill_state(struct task_struct *tsk) {}
123static inline void unlazy_fpu(struct task_struct *tsk) {}
124static inline void exit_fpu(struct task_struct *tsk) {}
125static inline void flush_fpu(void) {}
126static inline int fpu_setup_sigcontext(struct fpucontext *buf) { return 0; }
127static inline int fpu_restore_sigcontext(struct fpucontext *buf) { return 0; }
128#endif /* CONFIG_FPU */
129
130#endif /* __KERNEL__ */
131#endif /* !__ASSEMBLY__ */
132#endif /* _ASM_FPU_H */
diff --git a/arch/mn10300/include/asm/frame.inc b/arch/mn10300/include/asm/frame.inc
deleted file mode 100644
index 1c3eb4fda958..000000000000
--- a/arch/mn10300/include/asm/frame.inc
+++ /dev/null
@@ -1,97 +0,0 @@
1/* MN10300 Microcontroller core system register definitions -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FRAME_INC
12#define _ASM_FRAME_INC
13
14#ifndef __ASSEMBLY__
15#error not for use in C files
16#endif
17
18#ifndef __ASM_OFFSETS_H__
19#include <asm/asm-offsets.h>
20#endif
21#include <asm/thread_info.h>
22
23#define pi break
24
25#define fp a3
26
27###############################################################################
28#
29# build a stack frame from the registers
30# - the caller has subtracted 4 from SP before coming here
31#
32###############################################################################
33.macro SAVE_ALL
34 add -4,sp # next exception frame ptr save area
35 movm [other],(sp)
36 mov usp,a1
37 mov a1,(sp) # USP in MOVM[other] dummy slot
38 movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
39 mov sp,fp # FRAME pointer in A3
40 add -12,sp # allow for calls to be made
41
42 # push the exception frame onto the front of the list
43 GET_THREAD_INFO a1
44 mov (TI_frame,a1),a0
45 mov a0,(REG_NEXT,fp)
46 mov fp,(TI_frame,a1)
47
48 # disable the FPU inside the kernel
49 and ~EPSW_FE,epsw
50
51 # we may be holding current in E2
52#ifdef CONFIG_MN10300_CURRENT_IN_E2
53 mov (__current),e2
54#endif
55.endm
56
57###############################################################################
58#
59# restore the registers from a stack frame
60#
61###############################################################################
62.macro RESTORE_ALL
63 # peel back the stack to the calling frame
64 # - we need that when returning from interrupts to kernel mode
65 GET_THREAD_INFO a0
66 mov (TI_frame,a0),fp
67 mov fp,sp
68 mov (REG_NEXT,fp),d0
69 mov d0,(TI_frame,a0) # userspace has regs->next == 0
70
71#ifndef CONFIG_MN10300_USING_JTAG
72 mov (REG_EPSW,fp),d0
73 btst EPSW_T,d0
74 beq 99f
75
76 or EPSW_NMID,epsw
77 movhu (DCR),d1
78 or 0x0001, d1
79 movhu d1,(DCR)
80
8199:
82#endif
83 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
84
85 # must restore usp even if returning to kernel space,
86 # when CONFIG_PREEMPT is enabled.
87 mov (sp),a1 # USP in MOVM[other] dummy slot
88 mov a1,usp
89
90 movm (sp),[other]
91 add 8,sp
92 rti
93
94.endm
95
96
97#endif /* _ASM_FRAME_INC */
diff --git a/arch/mn10300/include/asm/ftrace.h b/arch/mn10300/include/asm/ftrace.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/mn10300/include/asm/ftrace.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/mn10300/include/asm/futex.h b/arch/mn10300/include/asm/futex.h
deleted file mode 100644
index 0b745828f42b..000000000000
--- a/arch/mn10300/include/asm/futex.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/futex.h>
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
deleted file mode 100644
index f5495ad82b77..000000000000
--- a/arch/mn10300/include/asm/gdb-stub.h
+++ /dev/null
@@ -1,182 +0,0 @@
1/* MN10300 Kernel GDB stub definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_GDB_STUB_H
13#define _ASM_GDB_STUB_H
14
15#include <asm/exceptions.h>
16
17/*
18 * register ID numbers in GDB remote protocol
19 */
20
21#define GDB_REGID_PC 9
22#define GDB_REGID_FP 7
23#define GDB_REGID_SP 8
24
25/*
26 * virtual stack layout for the GDB exception handler
27 */
28#define NUMREGS 64
29
30#define GDB_FR_D0 (0 * 4)
31#define GDB_FR_D1 (1 * 4)
32#define GDB_FR_D2 (2 * 4)
33#define GDB_FR_D3 (3 * 4)
34#define GDB_FR_A0 (4 * 4)
35#define GDB_FR_A1 (5 * 4)
36#define GDB_FR_A2 (6 * 4)
37#define GDB_FR_A3 (7 * 4)
38
39#define GDB_FR_SP (8 * 4)
40#define GDB_FR_PC (9 * 4)
41#define GDB_FR_MDR (10 * 4)
42#define GDB_FR_EPSW (11 * 4)
43#define GDB_FR_LIR (12 * 4)
44#define GDB_FR_LAR (13 * 4)
45#define GDB_FR_MDRQ (14 * 4)
46
47#define GDB_FR_E0 (15 * 4)
48#define GDB_FR_E1 (16 * 4)
49#define GDB_FR_E2 (17 * 4)
50#define GDB_FR_E3 (18 * 4)
51#define GDB_FR_E4 (19 * 4)
52#define GDB_FR_E5 (20 * 4)
53#define GDB_FR_E6 (21 * 4)
54#define GDB_FR_E7 (22 * 4)
55
56#define GDB_FR_SSP (23 * 4)
57#define GDB_FR_MSP (24 * 4)
58#define GDB_FR_USP (25 * 4)
59#define GDB_FR_MCRH (26 * 4)
60#define GDB_FR_MCRL (27 * 4)
61#define GDB_FR_MCVF (28 * 4)
62
63#define GDB_FR_FPCR (29 * 4)
64#define GDB_FR_DUMMY0 (30 * 4)
65#define GDB_FR_DUMMY1 (31 * 4)
66
67#define GDB_FR_FS0 (32 * 4)
68
69#define GDB_FR_SIZE (NUMREGS * 4)
70
71#ifndef __ASSEMBLY__
72
73/*
74 * This is the same as above, but for the high-level
75 * part of the GDB stub.
76 */
77
78struct gdb_regs {
79 /* saved main processor registers */
80 u32 d0, d1, d2, d3, a0, a1, a2, a3;
81 u32 sp, pc, mdr, epsw, lir, lar, mdrq;
82 u32 e0, e1, e2, e3, e4, e5, e6, e7;
83 u32 ssp, msp, usp, mcrh, mcrl, mcvf;
84
85 /* saved floating point registers */
86 u32 fpcr, _dummy0, _dummy1;
87 u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
88 u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
89 u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
90 u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
91};
92
93/*
94 * Prototypes
95 */
96extern void show_registers_only(struct pt_regs *regs);
97
98extern asmlinkage void gdbstub_init(void);
99extern asmlinkage void gdbstub_exit(int status);
100extern asmlinkage void gdbstub_io_init(void);
101extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
102extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
103extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
104extern asmlinkage void gdbstub_io_tx_flush(void);
105
106extern asmlinkage void gdbstub_io_rx_handler(void);
107extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
108extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
109extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
110extern asmlinkage void __gdbstub_bug_trap(void);
111extern asmlinkage void __gdbstub_pause(void);
112
113#ifdef CONFIG_MN10300_CACHE_ENABLED
114extern asmlinkage void gdbstub_purge_cache(void);
115#else
116#define gdbstub_purge_cache() do {} while (0)
117#endif
118
119/* Used to prevent crashes in memory access */
120extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
121extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
122extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
123extern asmlinkage int gdbstub_write_byte(u32, u8 *);
124extern asmlinkage int gdbstub_write_word(u32, u8 *);
125extern asmlinkage int gdbstub_write_dword(u32, u8 *);
126
127extern asmlinkage void gdbstub_read_byte_guard(void);
128extern asmlinkage void gdbstub_read_byte_cont(void);
129extern asmlinkage void gdbstub_read_word_guard(void);
130extern asmlinkage void gdbstub_read_word_cont(void);
131extern asmlinkage void gdbstub_read_dword_guard(void);
132extern asmlinkage void gdbstub_read_dword_cont(void);
133extern asmlinkage void gdbstub_write_byte_guard(void);
134extern asmlinkage void gdbstub_write_byte_cont(void);
135extern asmlinkage void gdbstub_write_word_guard(void);
136extern asmlinkage void gdbstub_write_word_cont(void);
137extern asmlinkage void gdbstub_write_dword_guard(void);
138extern asmlinkage void gdbstub_write_dword_cont(void);
139
140extern u8 gdbstub_rx_buffer[PAGE_SIZE];
141extern u32 gdbstub_rx_inp;
142extern u32 gdbstub_rx_outp;
143extern u8 gdbstub_rx_overflow;
144extern u8 gdbstub_busy;
145extern u8 gdbstub_rx_unget;
146
147#ifdef CONFIG_GDBSTUB_DEBUGGING
148extern void gdbstub_printk(const char *fmt, ...)
149 __attribute__((format(printf, 1, 2)));
150#else
151static inline __attribute__((format(printf, 1, 2)))
152void gdbstub_printk(const char *fmt, ...)
153{
154}
155#endif
156
157#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
158#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
159#else
160#define gdbstub_entry(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
161#endif
162
163#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
164#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
165#else
166#define gdbstub_proto(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
167#endif
168
169#ifdef CONFIG_GDBSTUB_DEBUG_IO
170#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
171#else
172#define gdbstub_io(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
173#endif
174
175#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
176#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
177#else
178#define gdbstub_bkpt(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
179#endif
180
181#endif /* !__ASSEMBLY__ */
182#endif /* _ASM_GDB_STUB_H */
diff --git a/arch/mn10300/include/asm/hardirq.h b/arch/mn10300/include/asm/hardirq.h
deleted file mode 100644
index 0000d650b55f..000000000000
--- a/arch/mn10300/include/asm/hardirq.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* MN10300 Hardware IRQ statistics and management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HARDIRQ_H
13#define _ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17#include <asm/exceptions.h>
18
19/* assembly code in softirq.h is sensitive to the offsets of these fields */
20typedef struct {
21 unsigned int __softirq_pending;
22#ifdef CONFIG_MN10300_WD_TIMER
23 unsigned int __nmi_count; /* arch dependent */
24 unsigned int __irq_count; /* arch dependent */
25#endif
26} ____cacheline_aligned irq_cpustat_t;
27
28#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
29
30extern void ack_bad_irq(int irq);
31
32/*
33 * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
34 * - these should jump to __common_exception in entry.S unless there's a good
35 * reason to do otherwise (see trap_preinit() in traps.c)
36 */
37typedef void (*intr_stub_fnx)(struct pt_regs *regs,
38 enum exception_code intcode);
39
40/*
41 * manipulate pointers in the Exception table (see entry.S)
42 * - these are indexed by decoding the lower 24 bits of the TBR register
43 * - note that the MN103E010 doesn't always trap through the correct vector,
44 * but does always set the TBR correctly
45 */
46extern asmlinkage void set_excp_vector(enum exception_code code,
47 intr_stub_fnx handler);
48
49#endif /* _ASM_HARDIRQ_H */
diff --git a/arch/mn10300/include/asm/highmem.h b/arch/mn10300/include/asm/highmem.h
deleted file mode 100644
index 1ddea5afba09..000000000000
--- a/arch/mn10300/include/asm/highmem.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/* MN10300 Virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HIGHMEM_H
13#define _ASM_HIGHMEM_H
14
15#ifdef __KERNEL__
16
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/highmem.h>
20#include <asm/kmap_types.h>
21#include <asm/pgtable.h>
22
23/* undef for production */
24#undef HIGHMEM_DEBUG
25
26/* declarations for highmem.c */
27extern unsigned long highstart_pfn, highend_pfn;
28
29extern pte_t *kmap_pte;
30extern pgprot_t kmap_prot;
31extern pte_t *pkmap_page_table;
32
33extern void __init kmap_init(void);
34
35/*
36 * Right now we initialize only a single pte table. It can be extended
37 * easily, subsequent pte tables have to be allocated in one physical
38 * chunk of RAM.
39 */
40#define PKMAP_BASE 0xfe000000UL
41#define LAST_PKMAP 1024
42#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
43#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
44#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
45
46extern unsigned long kmap_high(struct page *page);
47extern void kunmap_high(struct page *page);
48
49static inline unsigned long kmap(struct page *page)
50{
51 if (in_interrupt())
52 BUG();
53 if (page < highmem_start_page)
54 return page_address(page);
55 return kmap_high(page);
56}
57
58static inline void kunmap(struct page *page)
59{
60 if (in_interrupt())
61 BUG();
62 if (page < highmem_start_page)
63 return;
64 kunmap_high(page);
65}
66
67/*
68 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
69 * gives a more generic (and caching) interface. But kmap_atomic can
70 * be used in IRQ contexts, so in some (very limited) cases we need
71 * it.
72 */
73static inline void *kmap_atomic(struct page *page)
74{
75 unsigned long vaddr;
76 int idx, type;
77
78 preempt_disable();
79 pagefault_disable();
80 if (page < highmem_start_page)
81 return page_address(page);
82
83 type = kmap_atomic_idx_push();
84 idx = type + KM_TYPE_NR * smp_processor_id();
85 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
86#if HIGHMEM_DEBUG
87 if (!pte_none(*(kmap_pte - idx)))
88 BUG();
89#endif
90 set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
91 local_flush_tlb_one(vaddr);
92
93 return (void *)vaddr;
94}
95
96static inline void __kunmap_atomic(unsigned long vaddr)
97{
98 int type;
99
100 if (vaddr < FIXADDR_START) { /* FIXME */
101 pagefault_enable();
102 preempt_enable();
103 return;
104 }
105
106 type = kmap_atomic_idx();
107
108#if HIGHMEM_DEBUG
109 {
110 unsigned int idx;
111 idx = type + KM_TYPE_NR * smp_processor_id();
112
113 if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
114 BUG();
115
116 /*
117 * force other mappings to Oops if they'll try to access
118 * this pte without first remap it
119 */
120 pte_clear(kmap_pte - idx);
121 local_flush_tlb_one(vaddr);
122 }
123#endif
124
125 kmap_atomic_idx_pop();
126 pagefault_enable();
127 preempt_enable();
128}
129#endif /* __KERNEL__ */
130
131#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/mn10300/include/asm/hw_irq.h b/arch/mn10300/include/asm/hw_irq.h
deleted file mode 100644
index 70619901098e..000000000000
--- a/arch/mn10300/include/asm/hw_irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_HW_IRQ_H
12#define _ASM_HW_IRQ_H
13
14#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h
deleted file mode 100644
index d65bbeebe50a..000000000000
--- a/arch/mn10300/include/asm/intctl-regs.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/* MN10300 On-board interrupt controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_INTCTL_REGS_H
12#define _ASM_INTCTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/*
19 * Interrupt controller registers
20 * - Registers 64-191 are at addresses offset from the main array
21 */
22#define GxICR(X) \
23 __SYSREG(0xd4000000 + (X) * 4 + \
24 (((X) >= 64) && ((X) < 192)) * 0xf00, u16)
25
26#define GxICR_u8(X) \
27 __SYSREG(0xd4000000 + (X) * 4 + \
28 (((X) >= 64) && ((X) < 192)) * 0xf00, u8)
29
30#include <proc/intctl-regs.h>
31
32#define XIRQ_TRIGGER_LOWLEVEL 0
33#define XIRQ_TRIGGER_HILEVEL 1
34#define XIRQ_TRIGGER_NEGEDGE 2
35#define XIRQ_TRIGGER_POSEDGE 3
36
37/* non-maskable interrupt control */
38#define NMIIRQ 0
39#define NMICR GxICR(NMIIRQ) /* NMI control register */
40#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
41#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
42#define NMICR_ABUSERR 0x0008 /* async bus error flag */
43
44/* maskable interrupt control */
45#define GxICR_DETECT 0x0001 /* interrupt detect flag */
46#define GxICR_REQUEST 0x0010 /* interrupt request flag */
47#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
48#define GxICR_LEVEL 0x7000 /* interrupt priority level */
49#define GxICR_LEVEL_0 0x0000 /* - level 0 */
50#define GxICR_LEVEL_1 0x1000 /* - level 1 */
51#define GxICR_LEVEL_2 0x2000 /* - level 2 */
52#define GxICR_LEVEL_3 0x3000 /* - level 3 */
53#define GxICR_LEVEL_4 0x4000 /* - level 4 */
54#define GxICR_LEVEL_5 0x5000 /* - level 5 */
55#define GxICR_LEVEL_6 0x6000 /* - level 6 */
56#define GxICR_LEVEL_SHIFT 12
57#define GxICR_NMI 0x8000 /* nmi request flag */
58
59#define NUM2GxICR_LEVEL(num) ((num) << GxICR_LEVEL_SHIFT)
60
61#ifndef __ASSEMBLY__
62extern void set_intr_level(int irq, u16 level);
63extern void mn10300_set_lateack_irq_type(int irq);
64#endif
65
66/* external interrupts */
67#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
68
69#endif /* __KERNEL__ */
70
71#endif /* _ASM_INTCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h
deleted file mode 100644
index 62189353d2f6..000000000000
--- a/arch/mn10300/include/asm/io.h
+++ /dev/null
@@ -1,325 +0,0 @@
1/* MN10300 I/O port emulation and memory-mapped I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IO_H
12#define _ASM_IO_H
13
14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <asm/cpu-regs.h>
16#include <asm/cacheflush.h>
17#include <asm-generic/pci_iomap.h>
18
19#define mmiowb() do {} while (0)
20
21/*****************************************************************************/
22/*
23 * readX/writeX() are used to access memory mapped devices. On some
24 * architectures the memory mapped IO stuff needs to be accessed
25 * differently. On the x86 architecture, we just read/write the
26 * memory location directly.
27 */
28static inline u8 readb(const volatile void __iomem *addr)
29{
30 return *(const volatile u8 *) addr;
31}
32
33static inline u16 readw(const volatile void __iomem *addr)
34{
35 return *(const volatile u16 *) addr;
36}
37
38static inline u32 readl(const volatile void __iomem *addr)
39{
40 return *(const volatile u32 *) addr;
41}
42
43#define __raw_readb readb
44#define __raw_readw readw
45#define __raw_readl readl
46
47#define readb_relaxed readb
48#define readw_relaxed readw
49#define readl_relaxed readl
50
51static inline void writeb(u8 b, volatile void __iomem *addr)
52{
53 *(volatile u8 *) addr = b;
54}
55
56static inline void writew(u16 b, volatile void __iomem *addr)
57{
58 *(volatile u16 *) addr = b;
59}
60
61static inline void writel(u32 b, volatile void __iomem *addr)
62{
63 *(volatile u32 *) addr = b;
64}
65
66#define __raw_writeb writeb
67#define __raw_writew writew
68#define __raw_writel writel
69
70#define writeb_relaxed writeb
71#define writew_relaxed writew
72#define writel_relaxed writel
73
74/*****************************************************************************/
75/*
76 * traditional input/output functions
77 */
78static inline u8 inb_local(unsigned long addr)
79{
80 return readb((volatile void __iomem *) addr);
81}
82
83static inline void outb_local(u8 b, unsigned long addr)
84{
85 return writeb(b, (volatile void __iomem *) addr);
86}
87
88static inline u8 inb(unsigned long addr)
89{
90 return readb((volatile void __iomem *) addr);
91}
92
93static inline u16 inw(unsigned long addr)
94{
95 return readw((volatile void __iomem *) addr);
96}
97
98static inline u32 inl(unsigned long addr)
99{
100 return readl((volatile void __iomem *) addr);
101}
102
103static inline void outb(u8 b, unsigned long addr)
104{
105 return writeb(b, (volatile void __iomem *) addr);
106}
107
108static inline void outw(u16 b, unsigned long addr)
109{
110 return writew(b, (volatile void __iomem *) addr);
111}
112
113static inline void outl(u32 b, unsigned long addr)
114{
115 return writel(b, (volatile void __iomem *) addr);
116}
117
118#define inb_p(addr) inb(addr)
119#define inw_p(addr) inw(addr)
120#define inl_p(addr) inl(addr)
121#define outb_p(x, addr) outb((x), (addr))
122#define outw_p(x, addr) outw((x), (addr))
123#define outl_p(x, addr) outl((x), (addr))
124
125static inline void insb(unsigned long addr, void *buffer, int count)
126{
127 if (count) {
128 u8 *buf = buffer;
129 do {
130 u8 x = inb(addr);
131 *buf++ = x;
132 } while (--count);
133 }
134}
135
136static inline void insw(unsigned long addr, void *buffer, int count)
137{
138 if (count) {
139 u16 *buf = buffer;
140 do {
141 u16 x = inw(addr);
142 *buf++ = x;
143 } while (--count);
144 }
145}
146
147static inline void insl(unsigned long addr, void *buffer, int count)
148{
149 if (count) {
150 u32 *buf = buffer;
151 do {
152 u32 x = inl(addr);
153 *buf++ = x;
154 } while (--count);
155 }
156}
157
158static inline void outsb(unsigned long addr, const void *buffer, int count)
159{
160 if (count) {
161 const u8 *buf = buffer;
162 do {
163 outb(*buf++, addr);
164 } while (--count);
165 }
166}
167
168static inline void outsw(unsigned long addr, const void *buffer, int count)
169{
170 if (count) {
171 const u16 *buf = buffer;
172 do {
173 outw(*buf++, addr);
174 } while (--count);
175 }
176}
177
178extern void __outsl(unsigned long addr, const void *buffer, int count);
179static inline void outsl(unsigned long addr, const void *buffer, int count)
180{
181 if ((unsigned long) buffer & 0x3)
182 return __outsl(addr, buffer, count);
183
184 if (count) {
185 const u32 *buf = buffer;
186 do {
187 outl(*buf++, addr);
188 } while (--count);
189 }
190}
191
192#define ioread8(addr) readb(addr)
193#define ioread16(addr) readw(addr)
194#define ioread32(addr) readl(addr)
195
196#define iowrite8(v, addr) writeb((v), (addr))
197#define iowrite16(v, addr) writew((v), (addr))
198#define iowrite32(v, addr) writel((v), (addr))
199
200#define ioread16be(addr) be16_to_cpu(readw(addr))
201#define ioread32be(addr) be32_to_cpu(readl(addr))
202#define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr))
203#define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr))
204
205#define ioread8_rep(p, dst, count) \
206 insb((unsigned long) (p), (dst), (count))
207#define ioread16_rep(p, dst, count) \
208 insw((unsigned long) (p), (dst), (count))
209#define ioread32_rep(p, dst, count) \
210 insl((unsigned long) (p), (dst), (count))
211
212#define iowrite8_rep(p, src, count) \
213 outsb((unsigned long) (p), (src), (count))
214#define iowrite16_rep(p, src, count) \
215 outsw((unsigned long) (p), (src), (count))
216#define iowrite32_rep(p, src, count) \
217 outsl((unsigned long) (p), (src), (count))
218
219#define readsb(p, dst, count) \
220 insb((unsigned long) (p), (dst), (count))
221#define readsw(p, dst, count) \
222 insw((unsigned long) (p), (dst), (count))
223#define readsl(p, dst, count) \
224 insl((unsigned long) (p), (dst), (count))
225
226#define writesb(p, src, count) \
227 outsb((unsigned long) (p), (src), (count))
228#define writesw(p, src, count) \
229 outsw((unsigned long) (p), (src), (count))
230#define writesl(p, src, count) \
231 outsl((unsigned long) (p), (src), (count))
232
233#define IO_SPACE_LIMIT 0xffffffff
234
235#ifdef __KERNEL__
236
237#include <linux/vmalloc.h>
238#define __io_virt(x) ((void *) (x))
239
240/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
241struct pci_dev;
242static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
243{
244}
245
246/*
247 * Change virtual addresses to physical addresses and vv.
248 * These are pretty trivial
249 */
250static inline unsigned long virt_to_phys(volatile void *address)
251{
252 return __pa(address);
253}
254
255static inline void *phys_to_virt(unsigned long address)
256{
257 return __va(address);
258}
259
260/*
261 * Change "struct page" to physical address.
262 */
263static inline void __iomem *__ioremap(unsigned long offset, unsigned long size,
264 unsigned long flags)
265{
266 return (void __iomem *) offset;
267}
268
269static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
270{
271 return (void __iomem *)(offset & ~0x20000000);
272}
273
274/*
275 * This one maps high address device memory and turns off caching for that
276 * area. it's useful if some control registers are in such an area and write
277 * combining or read caching is not desirable:
278 */
279static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size)
280{
281 return (void __iomem *) (offset | 0x20000000);
282}
283
284#define ioremap_wc ioremap_nocache
285#define ioremap_wt ioremap_nocache
286#define ioremap_uc ioremap_nocache
287
288static inline void iounmap(void __iomem *addr)
289{
290}
291
292static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
293{
294 return (void __iomem *) port;
295}
296
297static inline void ioport_unmap(void __iomem *p)
298{
299}
300
301#define xlate_dev_kmem_ptr(p) ((void *) (p))
302#define xlate_dev_mem_ptr(p) ((void *) (p))
303
304/*
305 * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
306 */
307static inline unsigned long virt_to_bus(volatile void *address)
308{
309 return ((unsigned long) address) & ~0x20000000;
310}
311
312static inline void *bus_to_virt(unsigned long address)
313{
314 return (void *) address;
315}
316
317#define page_to_bus page_to_phys
318
319#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
320#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
321#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
322
323#endif /* __KERNEL__ */
324
325#endif /* _ASM_IO_H */
diff --git a/arch/mn10300/include/asm/irq.h b/arch/mn10300/include/asm/irq.h
deleted file mode 100644
index 1a73fb3f60c6..000000000000
--- a/arch/mn10300/include/asm/irq.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-i386/irq.h:
7 * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence
11 * as published by the Free Software Foundation; either version
12 * 2 of the Licence, or (at your option) any later version.
13 */
14#ifndef _ASM_IRQ_H
15#define _ASM_IRQ_H
16
17#include <asm/intctl-regs.h>
18#include <asm/reset-regs.h>
19#include <proc/irq.h>
20
21/* this number is used when no interrupt has been assigned */
22#define NO_IRQ INT_MAX
23
24/*
25 * hardware irq numbers
26 * - the ASB2364 has an FPGA with an IRQ multiplexer on it
27 */
28#ifdef CONFIG_MN10300_UNIT_ASB2364
29#include <unit/irq.h>
30#else
31#define NR_CPU_IRQS GxICR_NUM_IRQS
32#define NR_IRQS NR_CPU_IRQS
33#endif
34
35/* external hardware irq numbers */
36#define NR_XIRQS GxICR_NUM_XIRQS
37
38#define irq_canonicalize(IRQ) (IRQ)
39
40#endif /* _ASM_IRQ_H */
diff --git a/arch/mn10300/include/asm/irq_regs.h b/arch/mn10300/include/asm/irq_regs.h
deleted file mode 100644
index 97d0cb5af807..000000000000
--- a/arch/mn10300/include/asm/irq_regs.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/* MN10300 IRQ registers pointer definition
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IRQ_REGS_H
12#define _ASM_IRQ_REGS_H
13
14/*
15 * Per-cpu current frame pointer - the location of the last exception frame on
16 * the stack
17 */
18#define ARCH_HAS_OWN_IRQ_REGS
19
20#ifndef __ASSEMBLY__
21static inline __attribute__((const))
22struct pt_regs *get_irq_regs(void)
23{
24 return current_frame();
25}
26#endif
27
28#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/mn10300/include/asm/irqflags.h b/arch/mn10300/include/asm/irqflags.h
deleted file mode 100644
index 8730c0a3c37d..000000000000
--- a/arch/mn10300/include/asm/irqflags.h
+++ /dev/null
@@ -1,215 +0,0 @@
1/* MN10300 IRQ flag handling
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQFLAGS_H
13#define _ASM_IRQFLAGS_H
14
15#include <asm/cpu-regs.h>
16/* linux/smp.h <- linux/irqflags.h needs asm/smp.h first */
17#include <asm/smp.h>
18
19/*
20 * interrupt control
21 * - "disabled": run in IM1/2
22 * - level 0 - kernel debugger
23 * - level 1 - virtual serial DMA (if present)
24 * - level 5 - normal interrupt priority
25 * - level 6 - timer interrupt
26 * - "enabled": run in IM7
27 */
28#define MN10300_CLI_LEVEL (CONFIG_LINUX_CLI_LEVEL << EPSW_IM_SHIFT)
29
30#ifndef __ASSEMBLY__
31
32static inline unsigned long arch_local_save_flags(void)
33{
34 unsigned long flags;
35
36 asm volatile("mov epsw,%0" : "=d"(flags));
37 return flags;
38}
39
40static inline void arch_local_irq_disable(void)
41{
42 asm volatile(
43 " and %0,epsw \n"
44 " or %1,epsw \n"
45 " nop \n"
46 " nop \n"
47 " nop \n"
48 :
49 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)
50 : "memory");
51}
52
53static inline unsigned long arch_local_irq_save(void)
54{
55 unsigned long flags;
56
57 flags = arch_local_save_flags();
58 arch_local_irq_disable();
59 return flags;
60}
61
62/*
63 * we make sure arch_irq_enable() doesn't cause priority inversion
64 */
65extern unsigned long __mn10300_irq_enabled_epsw[];
66
67static inline void arch_local_irq_enable(void)
68{
69 unsigned long tmp;
70 int cpu = raw_smp_processor_id();
71
72 asm volatile(
73 " mov epsw,%0 \n"
74 " and %1,%0 \n"
75 " or %2,%0 \n"
76 " mov %0,epsw \n"
77 : "=&d"(tmp)
78 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw[cpu])
79 : "memory", "cc");
80}
81
82static inline void arch_local_irq_restore(unsigned long flags)
83{
84 asm volatile(
85 " mov %0,epsw \n"
86 " nop \n"
87 " nop \n"
88 " nop \n"
89 :
90 : "d"(flags)
91 : "memory", "cc");
92}
93
94static inline bool arch_irqs_disabled_flags(unsigned long flags)
95{
96 return (flags & (EPSW_IE | EPSW_IM)) != (EPSW_IE | EPSW_IM_7);
97}
98
99static inline bool arch_irqs_disabled(void)
100{
101 return arch_irqs_disabled_flags(arch_local_save_flags());
102}
103
104/*
105 * Hook to save power by halting the CPU
106 * - called from the idle loop
107 * - must reenable interrupts (which takes three instruction cycles to complete)
108 */
109static inline void arch_safe_halt(void)
110{
111#ifdef CONFIG_SMP
112 arch_local_irq_enable();
113#else
114 asm volatile(
115 " or %0,epsw \n"
116 " nop \n"
117 " nop \n"
118 " bset %2,(%1) \n"
119 :
120 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)
121 : "cc");
122#endif
123}
124
125#define __sleep_cpu() \
126do { \
127 asm volatile( \
128 " bset %1,(%0)\n" \
129 "1: btst %1,(%0)\n" \
130 " bne 1b\n" \
131 : \
132 : "i"(&CPUM), "i"(CPUM_SLEEP) \
133 : "cc" \
134 ); \
135} while (0)
136
137static inline void arch_local_cli(void)
138{
139 asm volatile(
140 " and %0,epsw \n"
141 " nop \n"
142 " nop \n"
143 " nop \n"
144 :
145 : "i"(~EPSW_IE)
146 : "memory"
147 );
148}
149
150static inline unsigned long arch_local_cli_save(void)
151{
152 unsigned long flags = arch_local_save_flags();
153 arch_local_cli();
154 return flags;
155}
156
157static inline void arch_local_sti(void)
158{
159 asm volatile(
160 " or %0,epsw \n"
161 :
162 : "i"(EPSW_IE)
163 : "memory");
164}
165
166static inline void arch_local_change_intr_mask_level(unsigned long level)
167{
168 asm volatile(
169 " and %0,epsw \n"
170 " or %1,epsw \n"
171 :
172 : "i"(~EPSW_IM), "i"(EPSW_IE | level)
173 : "cc", "memory");
174}
175
176#else /* !__ASSEMBLY__ */
177
178#define LOCAL_SAVE_FLAGS(reg) \
179 mov epsw,reg
180
181#define LOCAL_IRQ_DISABLE \
182 and ~EPSW_IM,epsw; \
183 or EPSW_IE|MN10300_CLI_LEVEL,epsw; \
184 nop; \
185 nop; \
186 nop
187
188#define LOCAL_IRQ_ENABLE \
189 or EPSW_IE|EPSW_IM_7,epsw
190
191#define LOCAL_IRQ_RESTORE(reg) \
192 mov reg,epsw
193
194#define LOCAL_CLI_SAVE(reg) \
195 mov epsw,reg; \
196 and ~EPSW_IE,epsw; \
197 nop; \
198 nop; \
199 nop
200
201#define LOCAL_CLI \
202 and ~EPSW_IE,epsw; \
203 nop; \
204 nop; \
205 nop
206
207#define LOCAL_STI \
208 or EPSW_IE,epsw
209
210#define LOCAL_CHANGE_INTR_MASK_LEVEL(level) \
211 and ~EPSW_IM,epsw; \
212 or EPSW_IE|(level),epsw
213
214#endif /* __ASSEMBLY__ */
215#endif /* _ASM_IRQFLAGS_H */
diff --git a/arch/mn10300/include/asm/kdebug.h b/arch/mn10300/include/asm/kdebug.h
deleted file mode 100644
index 0f47e112190c..000000000000
--- a/arch/mn10300/include/asm/kdebug.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 In-kernel death knells
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KDEBUG_H
13#define _ASM_KDEBUG_H
14
15/* Grossly misnamed. */
16enum die_val {
17 DIE_OOPS = 1,
18 DIE_BREAKPOINT,
19 DIE_GPF,
20};
21
22#endif /* _ASM_KDEBUG_H */
diff --git a/arch/mn10300/include/asm/kgdb.h b/arch/mn10300/include/asm/kgdb.h
deleted file mode 100644
index eb245f18a708..000000000000
--- a/arch/mn10300/include/asm/kgdb.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/* Kernel debugger for MN10300
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KGDB_H
13#define _ASM_KGDB_H
14
15/*
16 * BUFMAX defines the maximum number of characters in inbound/outbound
17 * buffers at least NUMREGBYTES*2 are needed for register packets
18 * Longer buffer is needed to list all threads
19 */
20#define BUFMAX 1024
21
22/*
23 * Note that this register image is in a different order than the register
24 * image that Linux produces at interrupt time.
25 */
26enum regnames {
27 GDB_FR_D0 = 0,
28 GDB_FR_D1 = 1,
29 GDB_FR_D2 = 2,
30 GDB_FR_D3 = 3,
31 GDB_FR_A0 = 4,
32 GDB_FR_A1 = 5,
33 GDB_FR_A2 = 6,
34 GDB_FR_A3 = 7,
35
36 GDB_FR_SP = 8,
37 GDB_FR_PC = 9,
38 GDB_FR_MDR = 10,
39 GDB_FR_EPSW = 11,
40 GDB_FR_LIR = 12,
41 GDB_FR_LAR = 13,
42 GDB_FR_MDRQ = 14,
43
44 GDB_FR_E0 = 15,
45 GDB_FR_E1 = 16,
46 GDB_FR_E2 = 17,
47 GDB_FR_E3 = 18,
48 GDB_FR_E4 = 19,
49 GDB_FR_E5 = 20,
50 GDB_FR_E6 = 21,
51 GDB_FR_E7 = 22,
52
53 GDB_FR_SSP = 23,
54 GDB_FR_MSP = 24,
55 GDB_FR_USP = 25,
56 GDB_FR_MCRH = 26,
57 GDB_FR_MCRL = 27,
58 GDB_FR_MCVF = 28,
59
60 GDB_FR_FPCR = 29,
61 GDB_FR_DUMMY0 = 30,
62 GDB_FR_DUMMY1 = 31,
63
64 GDB_FR_FS0 = 32,
65
66 GDB_FR_SIZE = 64,
67};
68
69#define GDB_ORIG_D0 41
70#define NUMREGBYTES (GDB_FR_SIZE*4)
71
72static inline void arch_kgdb_breakpoint(void)
73{
74 asm(".globl __arch_kgdb_breakpoint; __arch_kgdb_breakpoint: break");
75}
76extern u8 __arch_kgdb_breakpoint;
77
78#define BREAK_INSTR_SIZE 1
79#define CACHE_FLUSH_IS_SAFE 1
80
81#endif /* _ASM_KGDB_H */
diff --git a/arch/mn10300/include/asm/kmap_types.h b/arch/mn10300/include/asm/kmap_types.h
deleted file mode 100644
index f444d7ffa766..000000000000
--- a/arch/mn10300/include/asm/kmap_types.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5#include <asm-generic/kmap_types.h>
6
7#endif /* _ASM_KMAP_TYPES_H */
diff --git a/arch/mn10300/include/asm/kprobes.h b/arch/mn10300/include/asm/kprobes.h
deleted file mode 100644
index 7abea0bdb549..000000000000
--- a/arch/mn10300/include/asm/kprobes.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/* MN10300 Kernel Probes support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21#ifndef _ASM_KPROBES_H
22#define _ASM_KPROBES_H
23
24#include <asm-generic/kprobes.h>
25
26#define BREAKPOINT_INSTRUCTION 0xff
27
28#ifdef CONFIG_KPROBES
29#include <linux/types.h>
30#include <linux/ptrace.h>
31
32struct kprobe;
33
34typedef unsigned char kprobe_opcode_t;
35#define MAX_INSN_SIZE 8
36#define MAX_STACK_SIZE 128
37
38/* Architecture specific copy of original instruction */
39struct arch_specific_insn {
40 /* copy of original instruction
41 */
42 kprobe_opcode_t insn[MAX_INSN_SIZE];
43};
44
45extern const int kretprobe_blacklist_size;
46
47extern int kprobe_exceptions_notify(struct notifier_block *self,
48 unsigned long val, void *data);
49
50#define flush_insn_slot(p) do {} while (0)
51
52extern void arch_remove_kprobe(struct kprobe *p);
53
54#endif /* CONFIG_KPROBES */
55#endif /* _ASM_KPROBES_H */
diff --git a/arch/mn10300/include/asm/linkage.h b/arch/mn10300/include/asm/linkage.h
deleted file mode 100644
index dda3002a5dfa..000000000000
--- a/arch/mn10300/include/asm/linkage.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Linkage and calling-convention overrides
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_LINKAGE_H
12#define _ASM_LINKAGE_H
13
14/* don't override anything */
15#define asmlinkage
16
17#define __ALIGN .align 4,0xcb
18#define __ALIGN_STR ".align 4,0xcb"
19
20#endif
diff --git a/arch/mn10300/include/asm/local.h b/arch/mn10300/include/asm/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/arch/mn10300/include/asm/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/arch/mn10300/include/asm/local64.h b/arch/mn10300/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/mn10300/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local64.h>
diff --git a/arch/mn10300/include/asm/mc146818rtc.h b/arch/mn10300/include/asm/mc146818rtc.h
deleted file mode 100644
index df6bc6e0e8c6..000000000000
--- a/arch/mn10300/include/asm/mc146818rtc.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm/rtc-regs.h>
diff --git a/arch/mn10300/include/asm/mmu.h b/arch/mn10300/include/asm/mmu.h
deleted file mode 100644
index b9d6d41adace..000000000000
--- a/arch/mn10300/include/asm/mmu.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/* MN10300 Memory management context
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-frv/mmu.h
7 */
8
9#ifndef _ASM_MMU_H
10#define _ASM_MMU_H
11
12/*
13 * MMU context
14 */
15typedef struct {
16 unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
17 * each CPU */
18} mm_context_t;
19
20#endif /* _ASM_MMU_H */
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
deleted file mode 100644
index d2034f5e6eda..000000000000
--- a/arch/mn10300/include/asm/mmu_context.h
+++ /dev/null
@@ -1,163 +0,0 @@
1/* MN10300 MMU context management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Modified by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m32r/mmu_context.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 *
12 *
13 * This implements an algorithm to provide TLB PID mappings to provide
14 * selective access to the TLB for processes, thus reducing the number of TLB
15 * flushes required.
16 *
17 * Note, however, that the M32R algorithm is technically broken as it does not
18 * handle version wrap-around, and could, theoretically, have a problem with a
19 * very long lived program that sleeps long enough for the version number to
20 * wrap all the way around so that its TLB mappings appear valid once again.
21 */
22#ifndef _ASM_MMU_CONTEXT_H
23#define _ASM_MMU_CONTEXT_H
24
25#include <linux/atomic.h>
26#include <linux/mm_types.h>
27
28#include <asm/pgalloc.h>
29#include <asm/tlbflush.h>
30#include <asm-generic/mm_hooks.h>
31
32#define MMU_CONTEXT_TLBPID_NR 256
33#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
34#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
35#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
36#define MMU_NO_CONTEXT 0x00000000UL
37#define MMU_CONTEXT_TLBPID_LOCK_NR 0
38
39#define enter_lazy_tlb(mm, tsk) do {} while (0)
40
41static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
42{
43#ifdef CONFIG_SMP
44 cpumask_set_cpu(cpu, mm_cpumask(mm));
45#endif
46}
47
48static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
49{
50#ifdef CONFIG_SMP
51 return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
52#else
53 return true;
54#endif
55}
56
57#ifdef CONFIG_MN10300_TLB_USE_PIDR
58extern unsigned long mmu_context_cache[NR_CPUS];
59#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
60
61/**
62 * allocate_mmu_context - Allocate storage for the arch-specific MMU data
63 * @mm: The userspace VM context being set up
64 */
65static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
66{
67 unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
68 unsigned long mc = ++(*pmc);
69
70 if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
71 /* we exhausted the TLB PIDs of this version on this CPU, so we
72 * flush this CPU's TLB in its entirety and start new cycle */
73 local_flush_tlb_all();
74
75 /* fix the TLB version if needed (we avoid version #0 so as to
76 * distinguish MMU_NO_CONTEXT) */
77 if (!mc)
78 *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
79 }
80 mm_context(mm) = mc;
81 return mc;
82}
83
84/*
85 * get an MMU context if one is needed
86 */
87static inline unsigned long get_mmu_context(struct mm_struct *mm)
88{
89 unsigned long mc = MMU_NO_CONTEXT, cache;
90
91 if (mm) {
92 cache = mmu_context_cache[smp_processor_id()];
93 mc = mm_context(mm);
94
95 /* if we have an old version of the context, replace it */
96 if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
97 mc = allocate_mmu_context(mm);
98 }
99 return mc;
100}
101
102/*
103 * initialise the context related info for a new mm_struct instance
104 */
105static inline int init_new_context(struct task_struct *tsk,
106 struct mm_struct *mm)
107{
108 int num_cpus = NR_CPUS, i;
109
110 for (i = 0; i < num_cpus; i++)
111 mm->context.tlbpid[i] = MMU_NO_CONTEXT;
112 return 0;
113}
114
115/*
116 * after we have set current->mm to a new value, this activates the context for
117 * the new mm so we see the new mappings.
118 */
119static inline void activate_context(struct mm_struct *mm)
120{
121 PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
122}
123#else /* CONFIG_MN10300_TLB_USE_PIDR */
124
125#define init_new_context(tsk, mm) (0)
126#define activate_context(mm) local_flush_tlb()
127
128#endif /* CONFIG_MN10300_TLB_USE_PIDR */
129
130/**
131 * destroy_context - Destroy mm context information
132 * @mm: The MM being destroyed.
133 *
134 * Destroy context related info for an mm_struct that is about to be put to
135 * rest
136 */
137#define destroy_context(mm) do {} while (0)
138
139/**
140 * switch_mm - Change between userspace virtual memory contexts
141 * @prev: The outgoing MM context.
142 * @next: The incoming MM context.
143 * @tsk: The incoming task.
144 */
145static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
146 struct task_struct *tsk)
147{
148 int cpu = smp_processor_id();
149
150 if (prev != next) {
151#ifdef CONFIG_SMP
152 per_cpu(cpu_tlbstate, cpu).active_mm = next;
153#endif
154 cpu_ran_vm(cpu, next);
155 PTBR = (unsigned long) next->pgd;
156 activate_context(next);
157 }
158}
159
160#define deactivate_mm(tsk, mm) do {} while (0)
161#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
162
163#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/arch/mn10300/include/asm/module.h b/arch/mn10300/include/asm/module.h
deleted file mode 100644
index 6571103b0518..000000000000
--- a/arch/mn10300/include/asm/module.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 Arch-specific module definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * Derived from include/asm-i386/module.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MODULE_H
13#define _ASM_MODULE_H
14
15#include <asm-generic/module.h>
16
17/*
18 * Include the MN10300 architecture version.
19 */
20#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
21
22#endif /* _ASM_MODULE_H */
diff --git a/arch/mn10300/include/asm/nmi.h b/arch/mn10300/include/asm/nmi.h
deleted file mode 100644
index b05627597b1b..000000000000
--- a/arch/mn10300/include/asm/nmi.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* MN10300 NMI handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_NMI_H
12#define _ASM_NMI_H
13
14extern void arch_touch_nmi_watchdog(void);
15
16#endif /* _ASM_NMI_H */
diff --git a/arch/mn10300/include/asm/page.h b/arch/mn10300/include/asm/page.h
deleted file mode 100644
index dfe730a5ede0..000000000000
--- a/arch/mn10300/include/asm/page.h
+++ /dev/null
@@ -1,130 +0,0 @@
1/* MN10300 Page table definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PAGE_H
12#define _ASM_PAGE_H
13
14/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12
16
17#ifndef __ASSEMBLY__
18#define PAGE_SIZE (1UL << PAGE_SHIFT)
19#define PAGE_MASK (~(PAGE_SIZE - 1))
20#else
21#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
22 * immediate val not an addr */
23#define PAGE_MASK +(~(PAGE_SIZE - 1))
24#endif
25
26#ifdef __KERNEL__
27#ifndef __ASSEMBLY__
28
29#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
30#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
31
32#define clear_user_page(addr, vaddr, page) clear_page(addr)
33#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
34
35/*
36 * These are used to make use of C type-checking..
37 */
38typedef struct { unsigned long pte; } pte_t;
39typedef struct { unsigned long pgd; } pgd_t;
40typedef struct { unsigned long pgprot; } pgprot_t;
41typedef struct page *pgtable_t;
42
43#define PTE_MASK PAGE_MASK
44#define HPAGE_SHIFT 22
45
46#ifdef CONFIG_HUGETLB_PAGE
47#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
48#define HPAGE_MASK (~(HPAGE_SIZE - 1))
49#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
50#endif
51
52#define pte_val(x) ((x).pte)
53#define pgd_val(x) ((x).pgd)
54#define pgprot_val(x) ((x).pgprot)
55
56#define __pte(x) ((pte_t) { (x) })
57#define __pgd(x) ((pgd_t) { (x) })
58#define __pgprot(x) ((pgprot_t) { (x) })
59
60#define __ARCH_USE_5LEVEL_HACK
61#include <asm-generic/pgtable-nopmd.h>
62
63#endif /* !__ASSEMBLY__ */
64
65/*
66 * This handles the memory map.. We could make this a config
67 * option, but too many people screw it up, and too few need
68 * it.
69 *
70 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
71 * a virtual address space of one gigabyte, which limits the
72 * amount of physical memory you can use to about 950MB.
73 */
74
75#ifndef __ASSEMBLY__
76
77/* Pure 2^n version of get_order */
78static inline int get_order(unsigned long size) __attribute__((const));
79static inline int get_order(unsigned long size)
80{
81 int order;
82
83 size = (size - 1) >> (PAGE_SHIFT - 1);
84 order = -1;
85 do {
86 size >>= 1;
87 order++;
88 } while (size);
89 return order;
90}
91
92#endif /* __ASSEMBLY__ */
93
94#include <asm/page_offset.h>
95
96#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
97#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
98
99/*
100 * main RAM and kernel working space are coincident at 0x90000000, but to make
101 * life more interesting, there's also an uncached virtual shadow at 0xb0000000
102 * - these mappings are fixed in the MMU
103 */
104#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
105
106#define __pa(x) ((unsigned long)(x))
107#define __va(x) ((void *)(unsigned long)(x))
108#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
109#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
110#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
111#define __pfn_to_phys(pfn) PFN_PHYS(pfn)
112
113#define pfn_valid(pfn) \
114({ \
115 unsigned long __pfn = (pfn) - __pfn_disp; \
116 __pfn < max_mapnr; \
117})
118
119#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
120#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
121#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
122
123#define VM_DATA_DEFAULT_FLAGS \
124 (VM_READ | VM_WRITE | \
125 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
126 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
127
128#endif /* __KERNEL__ */
129
130#endif /* _ASM_PAGE_H */
diff --git a/arch/mn10300/include/asm/page_offset.h b/arch/mn10300/include/asm/page_offset.h
deleted file mode 100644
index 1e869aa09418..000000000000
--- a/arch/mn10300/include/asm/page_offset.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/* MN10300 Kernel base address
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 */
7#ifndef _ASM_PAGE_OFFSET_H
8#define _ASM_PAGE_OFFSET_H
9
10#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
11
12#endif
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
deleted file mode 100644
index 5b75a1b2c4f6..000000000000
--- a/arch/mn10300/include/asm/pci.h
+++ /dev/null
@@ -1,84 +0,0 @@
1/* MN10300 PCI definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PCI_H
12#define _ASM_PCI_H
13
14#ifdef __KERNEL__
15#include <linux/mm.h> /* for struct page */
16
17#if 0
18#define __pcbdebug(FMT, ADDR, ...) \
19 printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
20 (u32)(ADDR), ##__VA_ARGS__)
21
22#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
23do { \
24 printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
25 (BUS)->number, \
26 PCI_SLOT(DEVFN), \
27 PCI_FUNC(DEVFN), \
28 (u32)(WHERE), ##__VA_ARGS__); \
29} while (0)
30
31#else
32#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
33#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
34#endif
35
36/* Can be used to override the logic in pci_scan_bus for skipping
37 * already-configured bus numbers - to be used for buggy BIOSes or
38 * architectures with incomplete PCI setup by the loader */
39
40#ifdef CONFIG_PCI
41#define pcibios_assign_all_busses() 1
42extern void unit_pci_init(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46
47#define PCIBIOS_MIN_IO 0xBE000004
48#define PCIBIOS_MIN_MEM 0xB8000000
49
50/* Dynamic DMA mapping stuff.
51 * i386 has everything mapped statically.
52 */
53
54#include <linux/types.h>
55#include <linux/slab.h>
56#include <linux/scatterlist.h>
57#include <linux/string.h>
58#include <asm/io.h>
59
60/* The PCI address space does equal the physical memory
61 * address space. The networking and block device layers use
62 * this boolean for bounce buffer decisions.
63 */
64#define PCI_DMA_BUS_IS_PHYS (1)
65
66/* Return the index of the PCI controller for device. */
67static inline int pci_controller_num(struct pci_dev *dev)
68{
69 return 0;
70}
71
72#define HAVE_PCI_MMAP
73#define ARCH_GENERIC_PCI_MMAP_RESOURCE
74
75#endif /* __KERNEL__ */
76
77static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
78{
79 return channel ? 15 : 14;
80}
81
82#include <asm-generic/pci_iomap.h>
83
84#endif /* _ASM_PCI_H */
diff --git a/arch/mn10300/include/asm/percpu.h b/arch/mn10300/include/asm/percpu.h
deleted file mode 100644
index 06a959d67234..000000000000
--- a/arch/mn10300/include/asm/percpu.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/percpu.h>
diff --git a/arch/mn10300/include/asm/pgalloc.h b/arch/mn10300/include/asm/pgalloc.h
deleted file mode 100644
index 0f25d5fa86f3..000000000000
--- a/arch/mn10300/include/asm/pgalloc.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/* MN10300 Page and page table/directory allocation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PGALLOC_H
12#define _ASM_PGALLOC_H
13
14#include <asm/page.h>
15#include <linux/threads.h>
16#include <linux/mm.h> /* for struct page */
17
18struct mm_struct;
19struct page;
20
21/* attach a page table to a PMD entry */
22#define pmd_populate_kernel(mm, pmd, pte) \
23 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
24
25static inline
26void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
27{
28 set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
29}
30#define pmd_pgtable(pmd) pmd_page(pmd)
31
32/*
33 * Allocate and free page tables.
34 */
35
36extern pgd_t *pgd_alloc(struct mm_struct *);
37extern void pgd_free(struct mm_struct *, pgd_t *);
38
39extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
40extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
41
42static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
43{
44 free_page((unsigned long) pte);
45}
46
47static inline void pte_free(struct mm_struct *mm, struct page *pte)
48{
49 pgtable_page_dtor(pte);
50 __free_page(pte);
51}
52
53
54#define __pte_free_tlb(tlb, pte, addr) tlb_remove_page((tlb), (pte))
55
56#endif /* _ASM_PGALLOC_H */
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
deleted file mode 100644
index 96d3f9deb59c..000000000000
--- a/arch/mn10300/include/asm/pgtable.h
+++ /dev/null
@@ -1,494 +0,0 @@
1/* MN10300 Page table manipulators and constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * The Linux memory management assumes a three-level page table setup. On
13 * the i386, we use that, but "fold" the mid level into the top-level page
14 * table, so that we physically have the same two-level page table as the
15 * i386 mmu expects.
16 *
17 * This file contains the functions and defines necessary to modify and use
18 * the i386 page table tree for the purposes of the MN10300 TLB handler
19 * functions.
20 */
21#ifndef _ASM_PGTABLE_H
22#define _ASM_PGTABLE_H
23
24#include <asm/cpu-regs.h>
25
26#ifndef __ASSEMBLY__
27#include <asm/processor.h>
28#include <asm/cache.h>
29#include <linux/threads.h>
30
31#include <asm/bitops.h>
32
33#include <linux/slab.h>
34#include <linux/list.h>
35#include <linux/spinlock.h>
36
37/*
38 * ZERO_PAGE is a global shared page that is always zero: used
39 * for zero-mapped memory areas etc..
40 */
41#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42extern unsigned long empty_zero_page[1024];
43extern spinlock_t pgd_lock;
44extern struct page *pgd_list;
45
46extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
47extern void pgtable_cache_init(void);
48extern void paging_init(void);
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * The Linux mn10300 paging architecture only implements both the traditional
54 * 2-level page tables
55 */
56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define __PAGETABLE_PUD_FOLDED
60#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
61#define __PAGETABLE_PMD_FOLDED
62#define PTRS_PER_PTE 1024
63
64#define PGD_SIZE PAGE_SIZE
65#define PMD_SIZE (1UL << PMD_SHIFT)
66#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
67#define PGDIR_MASK (~(PGDIR_SIZE - 1))
68
69#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
70#define FIRST_USER_ADDRESS 0UL
71
72#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
73#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
74
75#define TWOLEVEL_PGDIR_SHIFT 22
76#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
77#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
78
79#ifndef __ASSEMBLY__
80extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
81#endif
82
83/*
84 * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
85 * area has to be in the lower half of the virtual address range (the upper
86 * half is not translated through the TLB).
87 *
88 * So in this case, the vmalloc area goes at the bottom of the address map
89 * (leaving a hole at the very bottom to catch addressing errors), and
90 * userspace starts immediately above.
91 *
92 * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
93 * area to catch addressing errors.
94 */
95#ifndef __ASSEMBLY__
96#define VMALLOC_OFFSET (8UL * 1024 * 1024)
97#define VMALLOC_START (0x70000000UL)
98#define VMALLOC_END (0x7C000000UL)
99#else
100#define VMALLOC_OFFSET (8 * 1024 * 1024)
101#define VMALLOC_START (0x70000000)
102#define VMALLOC_END (0x7C000000)
103#endif
104
105#ifndef __ASSEMBLY__
106extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
107#endif
108
109/* IPTEL2/DPTEL2 bit assignments */
110#define _PAGE_BIT_VALID xPTEL2_V_BIT
111#define _PAGE_BIT_CACHE xPTEL2_C_BIT
112#define _PAGE_BIT_PRESENT xPTEL2_PV_BIT
113#define _PAGE_BIT_DIRTY xPTEL2_D_BIT
114#define _PAGE_BIT_GLOBAL xPTEL2_G_BIT
115#define _PAGE_BIT_ACCESSED xPTEL2_UNUSED1_BIT /* mustn't be loaded into IPTEL2/DPTEL2 */
116
117#define _PAGE_VALID xPTEL2_V
118#define _PAGE_CACHE xPTEL2_C
119#define _PAGE_PRESENT xPTEL2_PV
120#define _PAGE_DIRTY xPTEL2_D
121#define _PAGE_PROT xPTEL2_PR
122#define _PAGE_PROT_RKNU xPTEL2_PR_ROK
123#define _PAGE_PROT_WKNU xPTEL2_PR_RWK
124#define _PAGE_PROT_RKRU xPTEL2_PR_ROK_ROU
125#define _PAGE_PROT_WKRU xPTEL2_PR_RWK_ROU
126#define _PAGE_PROT_WKWU xPTEL2_PR_RWK_RWU
127#define _PAGE_GLOBAL xPTEL2_G
128#define _PAGE_PS_MASK xPTEL2_PS
129#define _PAGE_PS_4Kb xPTEL2_PS_4Kb
130#define _PAGE_PS_128Kb xPTEL2_PS_128Kb
131#define _PAGE_PS_1Kb xPTEL2_PS_1Kb
132#define _PAGE_PS_4Mb xPTEL2_PS_4Mb
133#define _PAGE_PSE xPTEL2_PS_4Mb /* 4MB page */
134#define _PAGE_CACHE_WT xPTEL2_CWT
135#define _PAGE_ACCESSED xPTEL2_UNUSED1
136#define _PAGE_NX 0 /* no-execute bit */
137
138/* If _PAGE_VALID is clear, we use these: */
139#define _PAGE_PROTNONE 0x000 /* If not present */
140
141#define __PAGE_PROT_UWAUX 0x010
142#define __PAGE_PROT_USER 0x020
143#define __PAGE_PROT_WRITE 0x040
144
145#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
146
147#ifndef __ASSEMBLY__
148
149#define VMALLOC_VMADDR(x) ((unsigned long)(x))
150
151#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
152#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
153
154#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
155#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
156#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
157#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
158
159#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
160#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
161#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
162#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
163#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
164#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
165#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
166#define PAGE_COPY PAGE_COPY_NOEXEC
167#define PAGE_READONLY PAGE_READONLY_NOEXEC
168#define PAGE_SHARED PAGE_SHARED_EXEC
169
170#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
171
172#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
173#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
174#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
175#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
176#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
177#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
178
179#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
180#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
181#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
182#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
183#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
184#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
185
186#define __PAGE_USERIO (__PAGE_KERNEL_BASE | _PAGE_PROT_WKWU | _PAGE_NX)
187#define PAGE_USERIO __pgprot(__PAGE_USERIO)
188
189/*
190 * Whilst the MN10300 can do page protection for execute (given separate data
191 * and insn TLBs), we are not supporting it at the moment. Write permission,
192 * however, always implies read permission (but not execute permission).
193 */
194#define __P000 PAGE_NONE
195#define __P001 PAGE_READONLY_NOEXEC
196#define __P010 PAGE_COPY_NOEXEC
197#define __P011 PAGE_COPY_NOEXEC
198#define __P100 PAGE_READONLY_EXEC
199#define __P101 PAGE_READONLY_EXEC
200#define __P110 PAGE_COPY_EXEC
201#define __P111 PAGE_COPY_EXEC
202
203#define __S000 PAGE_NONE
204#define __S001 PAGE_READONLY_NOEXEC
205#define __S010 PAGE_SHARED_NOEXEC
206#define __S011 PAGE_SHARED_NOEXEC
207#define __S100 PAGE_READONLY_EXEC
208#define __S101 PAGE_READONLY_EXEC
209#define __S110 PAGE_SHARED_EXEC
210#define __S111 PAGE_SHARED_EXEC
211
212/*
213 * Define this to warn about kernel memory accesses that are
214 * done without a 'verify_area(VERIFY_WRITE,..)'
215 */
216#undef TEST_VERIFY_AREA
217
218#define pte_present(x) (pte_val(x) & _PAGE_VALID)
219#define pte_clear(mm, addr, xp) \
220do { \
221 set_pte_at((mm), (addr), (xp), __pte(0)); \
222} while (0)
223
224#define pmd_none(x) (!pmd_val(x))
225#define pmd_present(x) (!pmd_none(x))
226#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
227#define pmd_bad(x) 0
228
229
230#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
231
232#ifndef __ASSEMBLY__
233
234/*
235 * The following only work if pte_present() is true.
236 * Undefined behaviour if not..
237 */
238static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
239static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
240static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
241static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
242static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
243static inline int pte_special(pte_t pte){ return 0; }
244
245static inline pte_t pte_rdprotect(pte_t pte)
246{
247 pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
248}
249static inline pte_t pte_exprotect(pte_t pte)
250{
251 pte_val(pte) |= _PAGE_NX; return pte;
252}
253
254static inline pte_t pte_wrprotect(pte_t pte)
255{
256 pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
257}
258
259static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
260static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
261static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
262static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
263static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
264
265static inline pte_t pte_mkread(pte_t pte)
266{
267 pte_val(pte) |= __PAGE_PROT_USER;
268 if (pte_write(pte))
269 pte_val(pte) |= __PAGE_PROT_UWAUX;
270 return pte;
271}
272static inline pte_t pte_mkwrite(pte_t pte)
273{
274 pte_val(pte) |= __PAGE_PROT_WRITE;
275 if (pte_val(pte) & __PAGE_PROT_USER)
276 pte_val(pte) |= __PAGE_PROT_UWAUX;
277 return pte;
278}
279
280static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
281
282#define pte_ERROR(e) \
283 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
284 __FILE__, __LINE__, pte_val(e))
285#define pgd_ERROR(e) \
286 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
287 __FILE__, __LINE__, pgd_val(e))
288
289/*
290 * The "pgd_xxx()" functions here are trivial for a folded two-level
291 * setup: the pgd is never bad, and a pmd always exists (as it's folded
292 * into the pgd entry)
293 */
294#define pgd_clear(xp) do { } while (0)
295
296/*
297 * Certain architectures need to do special things when PTEs
298 * within a page table are directly modified. Thus, the following
299 * hook is made available.
300 */
301#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
302#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
303#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
304
305/*
306 * (pmds are folded into pgds so this doesn't get actually called,
307 * but the define is needed for a generic inline function.)
308 */
309#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
310
311#define ptep_get_and_clear(mm, addr, ptep) \
312 __pte(xchg(&(ptep)->pte, 0))
313#define pte_same(a, b) (pte_val(a) == pte_val(b))
314#define pte_page(x) pfn_to_page(pte_pfn(x))
315#define pte_none(x) (!pte_val(x))
316#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
317#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
318#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
319#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
320
321/*
322 * All present user pages are user-executable:
323 */
324static inline int pte_exec(pte_t pte)
325{
326 return pte_user(pte);
327}
328
329/*
330 * All present pages are kernel-executable:
331 */
332static inline int pte_exec_kernel(pte_t pte)
333{
334 return 1;
335}
336
337/* Encode and de-code a swap entry */
338#define __swp_type(x) (((x).val >> 1) & 0x3f)
339#define __swp_offset(x) ((x).val >> 7)
340#define __swp_entry(type, offset) \
341 ((swp_entry_t) { ((type) << 1) | ((offset) << 7) })
342#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
343#define __swp_entry_to_pte(x) __pte((x).val)
344
345static inline
346int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
347 pte_t *ptep)
348{
349 if (!pte_dirty(*ptep))
350 return 0;
351 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
352}
353
354static inline
355int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
356 pte_t *ptep)
357{
358 if (!pte_young(*ptep))
359 return 0;
360 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
361}
362
363static inline
364void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
365{
366 pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
367}
368
369static inline void ptep_mkdirty(pte_t *ptep)
370{
371 set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
372}
373
374/*
375 * Macro to mark a page protection value as "uncacheable". On processors which
376 * do not support it, this is a no-op.
377 */
378#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHE)
379
380/*
381 * Macro to mark a page protection value as "Write-Through".
382 * On processors which do not support it, this is a no-op.
383 */
384#define pgprot_through(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE_WT)
385
386/*
387 * Conversion functions: convert a page and protection to a page entry,
388 * and a page entry and page directory to the page they refer to.
389 */
390
391#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
392#define mk_pte_huge(entry) \
393 ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
394
395static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
396{
397 pte_val(pte) &= _PAGE_CHG_MASK;
398 pte_val(pte) |= pgprot_val(newprot);
399 return pte;
400}
401
402#define page_pte(page) page_pte_prot((page), __pgprot(0))
403
404#define pmd_page_kernel(pmd) \
405 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
406
407#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
408
409#define pmd_large(pmd) \
410 ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
411 (_PAGE_PSE | _PAGE_PRESENT))
412
413/*
414 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
415 *
416 * this macro returns the index of the entry in the pgd page which would
417 * control the given virtual address
418 */
419#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
420
421/*
422 * pgd_offset() returns a (pgd_t *)
423 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
424 */
425#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
426
427/*
428 * a shortcut which implies the use of the kernel's pgd, instead
429 * of a process's
430 */
431#define pgd_offset_k(address) pgd_offset(&init_mm, address)
432
433/*
434 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
435 *
436 * this macro returns the index of the entry in the pmd page which would
437 * control the given virtual address
438 */
439#define pmd_index(address) \
440 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
441
442/*
443 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
444 *
445 * this macro returns the index of the entry in the pte page which would
446 * control the given virtual address
447 */
448#define pte_index(address) \
449 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
450
451#define pte_offset_kernel(dir, address) \
452 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
453
454/*
455 * Make a given kernel text page executable/non-executable.
456 * Returns the previous executability setting of that page (which
457 * is used to restore the previous state). Used by the SMP bootup code.
458 * NOTE: this is an __init function for security reasons.
459 */
460static inline int set_kernel_exec(unsigned long vaddr, int enable)
461{
462 return 0;
463}
464
465#define pte_offset_map(dir, address) \
466 ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
467#define pte_unmap(pte) do {} while (0)
468
469/*
470 * The MN10300 has external MMU info in the form of a TLB: this is adapted from
471 * the kernel page tables containing the necessary information by tlb-mn10300.S
472 */
473extern void update_mmu_cache(struct vm_area_struct *vma,
474 unsigned long address, pte_t *ptep);
475
476#endif /* !__ASSEMBLY__ */
477
478#define kern_addr_valid(addr) (1)
479
480#define MK_IOSPACE_PFN(space, pfn) (pfn)
481#define GET_IOSPACE(pfn) 0
482#define GET_PFN(pfn) (pfn)
483
484#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
485#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
486#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
487#define __HAVE_ARCH_PTEP_SET_WRPROTECT
488#define __HAVE_ARCH_PTEP_MKDIRTY
489#define __HAVE_ARCH_PTE_SAME
490#include <asm-generic/pgtable.h>
491
492#endif /* !__ASSEMBLY__ */
493
494#endif /* _ASM_PGTABLE_H */
diff --git a/arch/mn10300/include/asm/pio-regs.h b/arch/mn10300/include/asm/pio-regs.h
deleted file mode 100644
index 96bc8182d0ba..000000000000
--- a/arch/mn10300/include/asm/pio-regs.h
+++ /dev/null
@@ -1,233 +0,0 @@
1/* MN10300 On-board I/O port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PIO_REGS_H
12#define _ASM_PIO_REGS_H
13
14#include <asm/cpu-regs.h>
15#include <asm/intctl-regs.h>
16
17#ifdef __KERNEL__
18
19/* I/O port 0 */
20#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
21#define P0MD_0 0x0003 /* mask */
22#define P0MD_0_IN 0x0000 /* input mode */
23#define P0MD_0_OUT 0x0001 /* output mode */
24#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
25#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
26#define P0MD_1 0x000c
27#define P0MD_1_IN 0x0000
28#define P0MD_1_OUT 0x0004
29#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
30#define P0MD_1_EYED 0x000c /* test signal output (data) */
31#define P0MD_2 0x0030
32#define P0MD_2_IN 0x0000
33#define P0MD_2_OUT 0x0010
34#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
35#define P0MD_3 0x00c0
36#define P0MD_3_IN 0x0000
37#define P0MD_3_OUT 0x0040
38#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
39#define P0MD_4 0x0300
40#define P0MD_4_IN 0x0000
41#define P0MD_4_OUT 0x0100
42#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
43#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
44#define P0MD_5 0x0c00
45#define P0MD_5_IN 0x0000
46#define P0MD_5_OUT 0x0400
47#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
48#define P0MD_6 0x3000
49#define P0MD_6_IN 0x0000
50#define P0MD_6_OUT 0x1000
51#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
52#define P0MD_7 0xc000
53#define P0MD_7_IN 0x0000
54#define P0MD_7_OUT 0x4000
55#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
56
57#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
59
60#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
61#define P0TMIO_TM0_IN 0x00
62#define P0TMIO_TM0_OUT 0x01
63#define P0TMIO_TM1_IN 0x00
64#define P0TMIO_TM1_OUT 0x02
65#define P0TMIO_TM2_IN 0x00
66#define P0TMIO_TM2_OUT 0x04
67#define P0TMIO_TM3_IN 0x00
68#define P0TMIO_TM3_OUT 0x08
69#define P0TMIO_TM4_IN 0x00
70#define P0TMIO_TM4_OUT 0x10
71#define P0TMIO_TM5_IN 0x00
72#define P0TMIO_TM5_OUT 0x20
73#define P0TMIO_TM6A_IN 0x00
74#define P0TMIO_TM6A_OUT 0x40
75#define P0TMIO_TM6B_IN 0x00
76#define P0TMIO_TM6B_OUT 0x80
77
78/* I/O port 1 */
79#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
80#define P1MD_0 0x0003 /* mask */
81#define P1MD_0_IN 0x0000 /* input mode */
82#define P1MD_0_OUT 0x0001 /* output mode */
83#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
84#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
85#define P1MD_1 0x000c
86#define P1MD_1_IN 0x0000
87#define P1MD_1_OUT 0x0004
88#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
89#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
90#define P1MD_2 0x0030
91#define P1MD_2_IN 0x0000
92#define P1MD_2_OUT 0x0010
93#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
94#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
95#define P1MD_3 0x00c0
96#define P1MD_3_IN 0x0000
97#define P1MD_3_OUT 0x0040
98#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
99#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
100#define P1MD_4 0x0300
101#define P1MD_4_IN 0x0000
102#define P1MD_4_OUT 0x0100
103#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
104#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
105
106#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
109#define P1TMIO_TM11_IN 0x00
110#define P1TMIO_TM11_OUT 0x01
111#define P1TMIO_TM10_IN 0x00
112#define P1TMIO_TM10_OUT 0x02
113#define P1TMIO_TM9_IN 0x00
114#define P1TMIO_TM9_OUT 0x04
115#define P1TMIO_TM8_IN 0x00
116#define P1TMIO_TM8_OUT 0x08
117#define P1TMIO_TM7_IN 0x00
118#define P1TMIO_TM7_OUT 0x10
119
120/* I/O port 2 */
121#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
122#define P2MD_0 0x0003 /* mask */
123#define P2MD_0_IN 0x0000 /* input mode */
124#define P2MD_0_OUT 0x0001 /* output mode */
125#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
126#define P2MD_1 0x000c
127#define P2MD_1_IN 0x0000
128#define P2MD_1_OUT 0x0004
129#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
130#define P2MD_2 0x0030
131#define P2MD_2_IN 0x0000
132#define P2MD_2_OUT 0x0010
133#define P2MD_3 0x00c0
134#define P2MD_3_IN 0x0000
135#define P2MD_3_OUT 0x0040
136#define P2MD_3_CKIO 0x00c0 /* mode */
137#define P2MD_4 0x0300
138#define P2MD_4_IN 0x0000
139#define P2MD_4_OUT 0x0100
140#define P2MD_4_CMOD 0x0300 /* mode */
141
142#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
145
146/* I/O port 3 */
147#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
148#define P3MD_0 0x0003 /* mask */
149#define P3MD_0_IN 0x0000 /* input mode */
150#define P3MD_0_OUT 0x0001 /* output mode */
151#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
152#define P3MD_1 0x000c
153#define P3MD_1_IN 0x0000
154#define P3MD_1_OUT 0x0004
155#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
156#define P3MD_2 0x0030
157#define P3MD_2_IN 0x0000
158#define P3MD_2_OUT 0x0010
159#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
160#define P3MD_3 0x00c0
161#define P3MD_3_IN 0x0000
162#define P3MD_3_OUT 0x0040
163#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
164#define P3MD_4 0x0300
165#define P3MD_4_IN 0x0000
166#define P3MD_4_OUT 0x0100
167#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
168
169#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
171
172/* I/O port 4 */
173#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
174#define P4MD_0 0x0003 /* mask */
175#define P4MD_0_IN 0x0000 /* input mode */
176#define P4MD_0_OUT 0x0001 /* output mode */
177#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
178#define P4MD_1 0x000c
179#define P4MD_1_IN 0x0000
180#define P4MD_1_OUT 0x0004
181#define P4MD_1_SDA0 0x0008
182#define P4MD_2 0x0030
183#define P4MD_2_IN 0x0000
184#define P4MD_2_OUT 0x0010
185#define P4MD_2_SCL1 0x0020
186#define P4MD_3 0x00c0
187#define P4MD_3_IN 0x0000
188#define P4MD_3_OUT 0x0040
189#define P4MD_3_SDA1 0x0080
190#define P4MD_4 0x0300
191#define P4MD_4_IN 0x0000
192#define P4MD_4_OUT 0x0100
193#define P4MD_4_SBO0 0x0200
194#define P4MD_5 0x0c00
195#define P4MD_5_IN 0x0000
196#define P4MD_5_OUT 0x0400
197#define P4MD_5_SBO1 0x0800
198#define P4MD_6 0x3000
199#define P4MD_6_IN 0x0000
200#define P4MD_6_OUT 0x1000
201#define P4MD_6_SBT0 0x2000
202#define P4MD_7 0xc000
203#define P4MD_7_IN 0x0000
204#define P4MD_7_OUT 0x4000
205#define P4MD_7_SBT1 0x8000
206
207#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
209
210/* I/O port 5 */
211#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
212#define P5MD_0 0x0003 /* mask */
213#define P5MD_0_IN 0x0000 /* input mode */
214#define P5MD_0_OUT 0x0001 /* output mode */
215#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
216#define P5MD_0_SOUT 0x0004 /* serial mode */
217#define P5MD_1 0x000c
218#define P5MD_1_IN 0x0000
219#define P5MD_1_OUT 0x0004
220#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
221#define P5MD_1_SIN 0x000c /* serial mode */
222#define P5MD_2 0x0030
223#define P5MD_2_IN 0x0000
224#define P5MD_2_OUT 0x0010
225#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
226
227#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
229
230
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_PIO_REGS_H */
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
deleted file mode 100644
index 3ae479117b42..000000000000
--- a/arch/mn10300/include/asm/processor.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/* MN10300 Processor specifics
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <linux/threads.h>
17#include <linux/thread_info.h>
18#include <asm/page.h>
19#include <asm/ptrace.h>
20#include <asm/cpu-regs.h>
21#include <asm/current.h>
22
23/* Forward declaration, a strange C thing */
24struct task_struct;
25struct mm_struct;
26
27/*
28 * Default implementation of macro that returns current
29 * instruction pointer ("program counter").
30 */
31#define current_text_addr() \
32({ \
33 void *__pc; \
34 asm("mov pc,%0" : "=a"(__pc)); \
35 __pc; \
36})
37
38extern void get_mem_info(unsigned long *mem_base, unsigned long *mem_size);
39
40extern void show_registers(struct pt_regs *regs);
41
42/*
43 * CPU type and hardware bug flags. Kept separately for each CPU.
44 * Members of this structure are referenced in head.S, so think twice
45 * before touching them. [mj]
46 */
47
48struct mn10300_cpuinfo {
49 int type;
50 unsigned long loops_per_jiffy;
51 char hard_math;
52};
53
54extern struct mn10300_cpuinfo boot_cpu_data;
55
56#ifdef CONFIG_SMP
57#if CONFIG_NR_CPUS < 2 || CONFIG_NR_CPUS > 8
58# error Sorry, NR_CPUS should be 2 to 8
59#endif
60extern struct mn10300_cpuinfo cpu_data[];
61#define current_cpu_data cpu_data[smp_processor_id()]
62#else /* CONFIG_SMP */
63#define cpu_data &boot_cpu_data
64#define current_cpu_data boot_cpu_data
65#endif /* CONFIG_SMP */
66
67extern void identify_cpu(struct mn10300_cpuinfo *);
68extern void print_cpu_info(struct mn10300_cpuinfo *);
69extern void dodgy_tsc(void);
70
71#define cpu_relax() barrier()
72
73/*
74 * User space process size: 1.75GB (default).
75 */
76#define TASK_SIZE 0x70000000
77
78/*
79 * Where to put the userspace stack by default
80 */
81#define STACK_TOP 0x70000000
82#define STACK_TOP_MAX STACK_TOP
83
84/* This decides where the kernel will search for a free chunk of vm
85 * space during mmap's.
86 */
87#define TASK_UNMAPPED_BASE 0x30000000
88
89struct fpu_state_struct {
90 unsigned long fs[32]; /* fpu registers */
91 unsigned long fpcr; /* fpu control register */
92};
93
94struct thread_struct {
95 struct pt_regs *uregs; /* userspace register frame */
96 unsigned long pc; /* kernel PC */
97 unsigned long sp; /* kernel SP */
98 unsigned long a3; /* kernel FP */
99 unsigned long wchan;
100 unsigned long usp;
101 unsigned long fpu_flags;
102#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
103#define THREAD_HAS_FPU 0x00000002 /* T if this task owns the FPU right now */
104 struct fpu_state_struct fpu_state;
105};
106
107#define INIT_THREAD \
108{ \
109 .uregs = init_uregs, \
110 .pc = 0, \
111 .sp = 0, \
112 .a3 = 0, \
113 .wchan = 0, \
114}
115
116#define INIT_MMAP \
117{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
118 NULL, NULL }
119
120/*
121 * do necessary setup to start up a newly executed thread
122 */
123static inline void start_thread(struct pt_regs *regs,
124 unsigned long new_pc, unsigned long new_sp)
125{
126 regs->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;
127 regs->pc = new_pc;
128 regs->sp = new_sp;
129}
130
131
132/* Free all resources held by a thread. */
133extern void release_thread(struct task_struct *);
134
135unsigned long get_wchan(struct task_struct *p);
136
137#define task_pt_regs(task) ((task)->thread.uregs)
138#define KSTK_EIP(task) (task_pt_regs(task)->pc)
139#define KSTK_ESP(task) (task_pt_regs(task)->sp)
140
141#define KSTK_TOP(info) \
142({ \
143 (unsigned long)(info) + THREAD_SIZE; \
144})
145
146#define ARCH_HAS_PREFETCH
147#define ARCH_HAS_PREFETCHW
148
149static inline void prefetch(const void *x)
150{
151#ifdef CONFIG_MN10300_CACHE_ENABLED
152#ifdef CONFIG_MN10300_PROC_MN103E010
153 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
154#else
155 asm volatile ("dcpf (%0)" : : "r"(x));
156#endif
157#endif
158}
159
160static inline void prefetchw(const void *x)
161{
162#ifdef CONFIG_MN10300_CACHE_ENABLED
163#ifdef CONFIG_MN10300_PROC_MN103E010
164 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
165#else
166 asm volatile ("dcpf (%0)" : : "r"(x));
167#endif
168#endif
169}
170
171#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
deleted file mode 100644
index 838a3830010e..000000000000
--- a/arch/mn10300/include/asm/ptrace.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* MN10300 Exception frame layout and ptrace constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#include <uapi/asm/ptrace.h>
15
16
17#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
18#define instruction_pointer(regs) ((regs)->pc)
19#define user_stack_pointer(regs) ((regs)->sp)
20#define current_pt_regs() current_frame()
21
22#define arch_has_single_step() (1)
23
24#define profile_pc(regs) ((regs)->pc)
25
26#endif /* _ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/reset-regs.h b/arch/mn10300/include/asm/reset-regs.h
deleted file mode 100644
index 8ca2a42d365b..000000000000
--- a/arch/mn10300/include/asm/reset-regs.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/* MN10300 Reset controller and watchdog timer definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_RESET_REGS_H
13#define _ASM_RESET_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/exceptions.h>
17
18#ifdef __KERNEL__
19
20/*
21 * watchdog timer registers
22 */
23#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
24
25#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
26#define WDCTR_WDCK 0x07 /* clock source selection */
27#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
28#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
29#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
30#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
31#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
32#define WDCTR_WDRST 0x40 /* binary counter reset */
33#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
34
35#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
36#define RSTCTR_CHIPRST 0x01 /* chip reset */
37#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
38#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
39#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
40
41#ifndef __ASSEMBLY__
42
43static inline void mn10300_proc_hard_reset(void)
44{
45 RSTCTR &= ~RSTCTR_CHIPRST;
46 RSTCTR |= RSTCTR_CHIPRST;
47}
48
49extern unsigned int watchdog_alert_counter[];
50
51extern void watchdog_go(void);
52extern asmlinkage void watchdog_handler(void);
53extern asmlinkage
54void watchdog_interrupt(struct pt_regs *, enum exception_code);
55
56#endif
57
58#endif /* __KERNEL__ */
59
60#endif /* _ASM_RESET_REGS_H */
diff --git a/arch/mn10300/include/asm/rtc-regs.h b/arch/mn10300/include/asm/rtc-regs.h
deleted file mode 100644
index c81cacecb6e3..000000000000
--- a/arch/mn10300/include/asm/rtc-regs.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/* MN10300 on-chip Real-Time Clock registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
28
29#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
30#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
31#define RTCRA_RS_NONE 0x00 /* - off */
32#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
33#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
34#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
35#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
36#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
37#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
38#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
39#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
40#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
41#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
42#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
43#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
44#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
45#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
46#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
47#define RTCRA_DVR 0x40 /* divider reset */
48#define RTCRA_UIP 0x80 /* clock update flag */
49
50#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
51#define RTCRB_DSE 0x01 /* daylight savings time enable */
52#define RTCRB_TM 0x02 /* time format */
53#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
54#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
55#define RTCRB_DM 0x04 /* numeric value format */
56#define RTCRB_DM_BCD 0x00 /* - BCD */
57#define RTCRB_DM_BINARY 0x04 /* - binary */
58#define RTCRB_UIE 0x10 /* update interrupt disable */
59#define RTCRB_AIE 0x20 /* alarm interrupt disable */
60#define RTCRB_PIE 0x40 /* periodic interrupt disable */
61#define RTCRB_SET 0x80 /* clock update enable */
62
63#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
64#define RTSRC_UF 0x10 /* update end interrupt flag */
65#define RTSRC_AF 0x20 /* alarm interrupt flag */
66#define RTSRC_PF 0x40 /* periodic interrupt flag */
67#define RTSRC_IRQF 0x80 /* interrupt flag */
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
71
72/*
73 * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
74 */
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (u32)(addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (u32)(addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif /* __KERNEL__ */
85
86#endif /* _ASM_RTC_REGS_H */
diff --git a/arch/mn10300/include/asm/rtc.h b/arch/mn10300/include/asm/rtc.h
deleted file mode 100644
index 07dc87656197..000000000000
--- a/arch/mn10300/include/asm/rtc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/* MN10300 Real time clock definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_H
12#define _ASM_RTC_H
13
14#ifdef CONFIG_MN10300_RTC
15
16#include <linux/init.h>
17
18extern void __init calibrate_clock(void);
19
20#else /* !CONFIG_MN10300_RTC */
21
22static inline void calibrate_clock(void)
23{
24}
25
26#endif /* !CONFIG_MN10300_RTC */
27
28#endif /* _ASM_RTC_H */
diff --git a/arch/mn10300/include/asm/rwlock.h b/arch/mn10300/include/asm/rwlock.h
deleted file mode 100644
index 6d594d4a0e10..000000000000
--- a/arch/mn10300/include/asm/rwlock.h
+++ /dev/null
@@ -1,125 +0,0 @@
1/*
2 * Helpers used by both rw spinlocks and rw semaphores.
3 *
4 * Based in part on code from semaphore.h and
5 * spinlock.h Copyright 1996 Linus Torvalds.
6 *
7 * Copyright 1999 Red Hat, Inc.
8 *
9 * Written by Benjamin LaHaise.
10 *
11 * Modified by Matsushita Electric Industrial Co., Ltd.
12 * Modifications:
13 * 13-Nov-2006 MEI Temporarily delete lock functions for SMP support.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the Free
17 * Software Foundation; either version 2 of the License, or (at your option)
18 * any later version.
19 */
20#ifndef _ASM_RWLOCK_H
21#define _ASM_RWLOCK_H
22
23#define RW_LOCK_BIAS 0x01000000
24
25#ifndef CONFIG_SMP
26
27typedef struct { unsigned long a[100]; } __dummy_lock_t;
28#define __dummy_lock(lock) (*(__dummy_lock_t *)(lock))
29
30#define RW_LOCK_BIAS_STR "0x01000000"
31
32#define __build_read_lock_ptr(rw, helper) \
33 do { \
34 asm volatile( \
35 " mov (%0),d3 \n" \
36 " sub 1,d3 \n" \
37 " mov d3,(%0) \n" \
38 " blt 1f \n" \
39 " bra 2f \n" \
40 "1: jmp 3f \n" \
41 "2: \n" \
42 " .section .text.lock,\"ax\" \n" \
43 "3: call "helper"[],0 \n" \
44 " jmp 2b \n" \
45 " .previous" \
46 : \
47 : "d" (rw) \
48 : "memory", "d3", "cc"); \
49 } while (0)
50
51#define __build_read_lock_const(rw, helper) \
52 do { \
53 asm volatile( \
54 " mov (%0),d3 \n" \
55 " sub 1,d3 \n" \
56 " mov d3,(%0) \n" \
57 " blt 1f \n" \
58 " bra 2f \n" \
59 "1: jmp 3f \n" \
60 "2: \n" \
61 " .section .text.lock,\"ax\" \n" \
62 "3: call "helper"[],0 \n" \
63 " jmp 2b \n" \
64 " .previous" \
65 : \
66 : "d" (rw) \
67 : "memory", "d3", "cc"); \
68 } while (0)
69
70#define __build_read_lock(rw, helper) \
71 do { \
72 if (__builtin_constant_p(rw)) \
73 __build_read_lock_const(rw, helper); \
74 else \
75 __build_read_lock_ptr(rw, helper); \
76 } while (0)
77
78#define __build_write_lock_ptr(rw, helper) \
79 do { \
80 asm volatile( \
81 " mov (%0),d3 \n" \
82 " sub 1,d3 \n" \
83 " mov d3,(%0) \n" \
84 " blt 1f \n" \
85 " bra 2f \n" \
86 "1: jmp 3f \n" \
87 "2: \n" \
88 " .section .text.lock,\"ax\" \n" \
89 "3: call "helper"[],0 \n" \
90 " jmp 2b \n" \
91 " .previous" \
92 : \
93 : "d" (rw) \
94 : "memory", "d3", "cc"); \
95 } while (0)
96
97#define __build_write_lock_const(rw, helper) \
98 do { \
99 asm volatile( \
100 " mov (%0),d3 \n" \
101 " sub 1,d3 \n" \
102 " mov d3,(%0) \n" \
103 " blt 1f \n" \
104 " bra 2f \n" \
105 "1: jmp 3f \n" \
106 "2: \n" \
107 " .section .text.lock,\"ax\" \n" \
108 "3: call "helper"[],0 \n" \
109 " jmp 2b \n" \
110 " .previous" \
111 : \
112 : "d" (rw) \
113 : "memory", "d3", "cc"); \
114 } while (0)
115
116#define __build_write_lock(rw, helper) \
117 do { \
118 if (__builtin_constant_p(rw)) \
119 __build_write_lock_const(rw, helper); \
120 else \
121 __build_write_lock_ptr(rw, helper); \
122 } while (0)
123
124#endif /* CONFIG_SMP */
125#endif /* _ASM_RWLOCK_H */
diff --git a/arch/mn10300/include/asm/serial-regs.h b/arch/mn10300/include/asm/serial-regs.h
deleted file mode 100644
index 8320cda32f5a..000000000000
--- a/arch/mn10300/include/asm/serial-regs.h
+++ /dev/null
@@ -1,191 +0,0 @@
1/* MN10300 on-board serial port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* serial port 0 */
21#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
22#define SC01CTR_CK 0x0007 /* clock source select */
23#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
24#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
25#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
26#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
27#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
28#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
29#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
30#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
31#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
33#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
34#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 1 only) */
35#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
36#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
37#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
38#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
39#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
40#define SC1CTR_CK_TM12UFLOW_8 0x0000 /* - 1/8 timer 12 underflow (serial port 1 only) */
41#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
42#define SC01CTR_STB 0x0008 /* stop bit select */
43#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
44#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
45#define SC01CTR_PB 0x0070 /* parity bit select */
46#define SC01CTR_PB_NONE 0x0000 /* - no parity */
47#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
48#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
49#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
50#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
51#define SC01CTR_CLN 0x0080 /* character length */
52#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
53#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
54#define SC01CTR_TOE 0x0100 /* T input output enable */
55#define SC01CTR_OD 0x0200 /* bit order select */
56#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
57#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
58#define SC01CTR_MD 0x0c00 /* mode select */
59#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
60#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
61#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
62#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
63#define SC01CTR_IIC 0x1000 /* I2C mode select */
64#define SC01CTR_BKE 0x2000 /* break transmit enable */
65#define SC01CTR_RXE 0x4000 /* receive enable */
66#define SC01CTR_TXE 0x8000 /* transmit enable */
67
68#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
69#define SC01ICR_DMD 0x80 /* output data mode */
70#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
71#define SC01ICR_TI 0x10 /* transmit interrupt cause */
72#define SC01ICR_RES 0x04 /* receive error select */
73#define SC01ICR_RI 0x01 /* receive interrupt cause */
74
75#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
76#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
77
78#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
79#define SC01STR_OEF 0x0001 /* overrun error found */
80#define SC01STR_PEF 0x0002 /* parity error found */
81#define SC01STR_FEF 0x0004 /* framing error found */
82#define SC01STR_RBF 0x0010 /* receive buffer status */
83#define SC01STR_TBF 0x0020 /* transmit buffer status */
84#define SC01STR_RXF 0x0040 /* receive status */
85#define SC01STR_TXF 0x0080 /* transmit status */
86#define SC01STR_STF 0x0100 /* I2C start sequence found */
87#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
88
89#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
90#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
91
92#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
93#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
94
95/* serial port 1 */
96#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
97#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
98#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
99#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
100#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
101
102#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
103#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
104
105#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
106#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
107
108/* serial port 2 */
109#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
110#ifdef CONFIG_AM33_2
111#define SC2CTR_CK 0x0003 /* clock source select */
112#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
113#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
114#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
115#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
116#else /* CONFIG_AM33_2 */
117#define SC2CTR_CK 0x0007 /* clock source select */
118#define SC2CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow */
119#define SC2CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
120#define SC2CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
121#define SC2CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow */
122#define SC2CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow */
123#define SC2CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow */
124#define SC2CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
125#define SC2CTR_CK_EXTERN 0x0007 /* - external closk */
126#endif /* CONFIG_AM33_2 */
127#define SC2CTR_STB 0x0008 /* stop bit select */
128#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
129#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
130#define SC2CTR_PB 0x0070 /* parity bit select */
131#define SC2CTR_PB_NONE 0x0000 /* - no parity */
132#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
133#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
134#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
135#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
136#define SC2CTR_CLN 0x0080 /* character length */
137#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
138#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
139#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
140#define SC2CTR_OD 0x0200 /* bit order select */
141#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
142#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
143#define SC2CTR_TWS 0x1000 /* transmit wait select */
144#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
145#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
146#define SC2CTR_BKE 0x2000 /* break transmit enable */
147#define SC2CTR_RXE 0x4000 /* receive enable */
148#define SC2CTR_TXE 0x8000 /* transmit enable */
149
150#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
151#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
152#define SC2ICR_TI 0x10 /* transmit interrupt cause */
153#define SC2ICR_RES 0x04 /* receive error select */
154#define SC2ICR_RI 0x01 /* receive interrupt cause */
155
156#define SC2TXB __SYSREG(0xd4002028, u8) /* transmit buffer reg */
157#define SC2RXB __SYSREG(0xd4002029, u8) /* receive buffer reg */
158
159#ifdef CONFIG_AM33_2
160#define SC2STR __SYSREG(0xd400202c, u8) /* status reg */
161#else /* CONFIG_AM33_2 */
162#define SC2STR __SYSREG(0xd400202c, u16) /* status reg */
163#endif /* CONFIG_AM33_2 */
164#define SC2STR_OEF 0x0001 /* overrun error found */
165#define SC2STR_PEF 0x0002 /* parity error found */
166#define SC2STR_FEF 0x0004 /* framing error found */
167#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
168#define SC2STR_RBF 0x0010 /* receive buffer status */
169#define SC2STR_TBF 0x0020 /* transmit buffer status */
170#define SC2STR_RXF 0x0040 /* receive status */
171#define SC2STR_TXF 0x0080 /* transmit status */
172
173#ifdef CONFIG_AM33_2
174#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
175#endif
176
177#ifdef CONFIG_AM33_2
178#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
179#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
180#else /* CONFIG_AM33_2 */
181#define SC2RXIRQ 68 /* serial 2 Receive IRQ */
182#define SC2TXIRQ 69 /* serial 2 Transmit IRQ */
183#endif /* CONFIG_AM33_2 */
184
185#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
186#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
187
188
189#endif /* __KERNEL__ */
190
191#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/mn10300/include/asm/serial.h b/arch/mn10300/include/asm/serial.h
deleted file mode 100644
index 594ebff15d3f..000000000000
--- a/arch/mn10300/include/asm/serial.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* Standard UART definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_H
13#define _ASM_SERIAL_H
14
15/* Standard COM flags (except for COM4, because of the 8514 problem) */
16#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
17#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ)
18#define STD_COM4_FLAGS (UPF_BOOT_AUTOCONF | UPF_AUTO_IRQ)
19#else
20#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
21#define STD_COM4_FLAGS UPF_BOOT_AUTOCONF
22#endif
23
24#ifdef CONFIG_SERIAL_8250_MANY_PORTS
25#define FOURPORT_FLAGS UPF_FOURPORT
26#define ACCENT_FLAGS 0
27#define BOCA_FLAGS 0
28#define HUB6_FLAGS 0
29#define RS_TABLE_SIZE 64
30#else
31#define RS_TABLE_SIZE
32#endif
33
34#include <unit/serial.h>
35
36#endif /* _ASM_SERIAL_H */
diff --git a/arch/mn10300/include/asm/setup.h b/arch/mn10300/include/asm/setup.h
deleted file mode 100644
index fb024555d2a9..000000000000
--- a/arch/mn10300/include/asm/setup.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* MN10300 Setup declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SETUP_H
12#define _ASM_SETUP_H
13
14#include <uapi/asm/setup.h>
15
16extern void __init unit_setup(void);
17extern void __init unit_init_IRQ(void);
18#endif /* _ASM_SETUP_H */
diff --git a/arch/mn10300/include/asm/shmparam.h b/arch/mn10300/include/asm/shmparam.h
deleted file mode 100644
index 3a31faaa4353..000000000000
--- a/arch/mn10300/include/asm/shmparam.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_SHMPARAM_H
3#define _ASM_SHMPARAM_H
4
5#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
6
7#endif /* _ASM_SHMPARAM_H */
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
deleted file mode 100644
index 214ff5e9fe60..000000000000
--- a/arch/mn10300/include/asm/signal.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* MN10300 Signal definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGNAL_H
12#define _ASM_SIGNAL_H
13
14#include <uapi/asm/signal.h>
15
16/* Most things should be clean enough to redefine this at will, if care
17 is taken to make libc match. */
18
19#define _NSIG 64
20#define _NSIG_BPW 32
21#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
22
23typedef unsigned long old_sigset_t; /* at least 32 bits */
24
25typedef struct {
26 unsigned long sig[_NSIG_WORDS];
27} sigset_t;
28
29#define __ARCH_HAS_SA_RESTORER
30
31#include <asm/sigcontext.h>
32
33#endif /* _ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h
deleted file mode 100644
index 56c42417d428..000000000000
--- a/arch/mn10300/include/asm/smp.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/* MN10300 SMP support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 13-Nov-2006 MEI Define IPI-IRQ number and add inline/macro function
9 * for SMP support.
10 * 22-Jan-2007 MEI Add the define related to SMP_BOOT_IRQ.
11 * 23-Feb-2007 MEI Add the define related to SMP icahce invalidate.
12 * 23-Jun-2008 MEI Delete INTC_IPI.
13 * 22-Jul-2008 MEI Add smp_nmi_call_function and related defines.
14 * 04-Aug-2008 MEI Delete USE_DOIRQ_CACHE_IPI.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public Licence
18 * as published by the Free Software Foundation; either version
19 * 2 of the Licence, or (at your option) any later version.
20 */
21#ifndef _ASM_SMP_H
22#define _ASM_SMP_H
23
24#ifndef __ASSEMBLY__
25#include <linux/threads.h>
26#include <linux/cpumask.h>
27#include <linux/thread_info.h>
28#endif
29
30#ifdef CONFIG_SMP
31#include <proc/smp-regs.h>
32
33#define RESCHEDULE_IPI 63
34#define CALL_FUNC_SINGLE_IPI 192
35#define LOCAL_TIMER_IPI 193
36#define FLUSH_CACHE_IPI 194
37#define CALL_FUNCTION_NMI_IPI 195
38#define DEBUGGER_NMI_IPI 196
39
40#define SMP_BOOT_IRQ 195
41
42#define RESCHEDULE_GxICR_LV GxICR_LEVEL_6
43#define CALL_FUNCTION_GxICR_LV GxICR_LEVEL_4
44#define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4
45#define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0
46#define SMP_BOOT_GxICR_LV GxICR_LEVEL_0
47#define DEBUGGER_GxICR_LV CONFIG_DEBUGGER_IRQ_LEVEL
48
49#define TIME_OUT_COUNT_BOOT_IPI 100
50#define DELAY_TIME_BOOT_IPI 75000
51
52
53#ifndef __ASSEMBLY__
54
55/**
56 * raw_smp_processor_id - Determine the raw CPU ID of the CPU running it
57 *
58 * What we really want to do is to use the CPUID hardware CPU register to get
59 * this information, but accesses to that aren't cached, and run at system bus
60 * speed, not CPU speed. A copy of this value is, however, stored in the
61 * thread_info struct, and that can be cached.
62 *
63 * An alternate way of dealing with this could be to use the EPSW.S bits to
64 * cache this information for systems with up to four CPUs.
65 */
66#define arch_smp_processor_id() (CPUID)
67#if 0
68#define raw_smp_processor_id() (arch_smp_processor_id())
69#else
70#define raw_smp_processor_id() (current_thread_info()->cpu)
71#endif
72
73static inline int cpu_logical_map(int cpu)
74{
75 return cpu;
76}
77
78static inline int cpu_number_map(int cpu)
79{
80 return cpu;
81}
82
83
84extern cpumask_t cpu_boot_map;
85
86extern void smp_init_cpus(void);
87extern void smp_cache_interrupt(void);
88extern void send_IPI_allbutself(int irq);
89extern int smp_nmi_call_function(void (*func)(void *), void *info, int wait);
90
91extern void arch_send_call_function_single_ipi(int cpu);
92extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
93
94#ifdef CONFIG_HOTPLUG_CPU
95extern int __cpu_disable(void);
96extern void __cpu_die(unsigned int cpu);
97#endif /* CONFIG_HOTPLUG_CPU */
98
99#endif /* __ASSEMBLY__ */
100#else /* CONFIG_SMP */
101#ifndef __ASSEMBLY__
102
103static inline void smp_init_cpus(void) {}
104#define raw_smp_processor_id() 0
105
106#endif /* __ASSEMBLY__ */
107#endif /* CONFIG_SMP */
108
109#endif /* _ASM_SMP_H */
diff --git a/arch/mn10300/include/asm/smsc911x.h b/arch/mn10300/include/asm/smsc911x.h
deleted file mode 100644
index 2fcd1080322b..000000000000
--- a/arch/mn10300/include/asm/smsc911x.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <unit/smsc911x.h>
diff --git a/arch/mn10300/include/asm/spinlock.h b/arch/mn10300/include/asm/spinlock.h
deleted file mode 100644
index 879cd0df53ba..000000000000
--- a/arch/mn10300/include/asm/spinlock.h
+++ /dev/null
@@ -1,180 +0,0 @@
1/* MN10300 spinlock support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SPINLOCK_H
12#define _ASM_SPINLOCK_H
13
14#include <linux/atomic.h>
15#include <asm/barrier.h>
16#include <asm/processor.h>
17#include <asm/rwlock.h>
18#include <asm/page.h>
19
20/*
21 * Simple spin lock operations. There are two variants, one clears IRQ's
22 * on the local processor, one does not.
23 *
24 * We make no fairness assumptions. They have a cost.
25 */
26
27#define arch_spin_is_locked(x) (*(volatile signed char *)(&(x)->slock) != 0)
28
29static inline void arch_spin_unlock(arch_spinlock_t *lock)
30{
31 asm volatile(
32 " bclr 1,(0,%0) \n"
33 :
34 : "a"(&lock->slock)
35 : "memory", "cc");
36}
37
38static inline int arch_spin_trylock(arch_spinlock_t *lock)
39{
40 int ret;
41
42 asm volatile(
43 " mov 1,%0 \n"
44 " bset %0,(%1) \n"
45 " bne 1f \n"
46 " clr %0 \n"
47 "1: xor 1,%0 \n"
48 : "=d"(ret)
49 : "a"(&lock->slock)
50 : "memory", "cc");
51
52 return ret;
53}
54
55static inline void arch_spin_lock(arch_spinlock_t *lock)
56{
57 asm volatile(
58 "1: bset 1,(0,%0) \n"
59 " bne 1b \n"
60 :
61 : "a"(&lock->slock)
62 : "memory", "cc");
63}
64
65static inline void arch_spin_lock_flags(arch_spinlock_t *lock,
66 unsigned long flags)
67{
68 int temp;
69
70 asm volatile(
71 "1: bset 1,(0,%2) \n"
72 " beq 3f \n"
73 " mov %1,epsw \n"
74 "2: mov (0,%2),%0 \n"
75 " or %0,%0 \n"
76 " bne 2b \n"
77 " mov %3,%0 \n"
78 " mov %0,epsw \n"
79 " nop \n"
80 " nop \n"
81 " bra 1b\n"
82 "3: \n"
83 : "=&d" (temp)
84 : "d" (flags), "a"(&lock->slock), "i"(EPSW_IE | MN10300_CLI_LEVEL)
85 : "memory", "cc");
86}
87#define arch_spin_lock_flags arch_spin_lock_flags
88
89#ifdef __KERNEL__
90
91/*
92 * Read-write spinlocks, allowing multiple readers
93 * but only one writer.
94 *
95 * NOTE! it is quite common to have readers in interrupts
96 * but no interrupt writers. For those circumstances we
97 * can "mix" irq-safe locks - any writer needs to get a
98 * irq-safe write-lock, but readers can get non-irqsafe
99 * read-locks.
100 */
101
102/*
103 * On mn10300, we implement read-write locks as a 32-bit counter
104 * with the high bit (sign) being the "contended" bit.
105 */
106static inline void arch_read_lock(arch_rwlock_t *rw)
107{
108#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
109 __build_read_lock(rw, "__read_lock_failed");
110#else
111 {
112 atomic_t *count = (atomic_t *)rw;
113 while (atomic_dec_return(count) < 0)
114 atomic_inc(count);
115 }
116#endif
117}
118
119static inline void arch_write_lock(arch_rwlock_t *rw)
120{
121#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
122 __build_write_lock(rw, "__write_lock_failed");
123#else
124 {
125 atomic_t *count = (atomic_t *)rw;
126 while (!atomic_sub_and_test(RW_LOCK_BIAS, count))
127 atomic_add(RW_LOCK_BIAS, count);
128 }
129#endif
130}
131
132static inline void arch_read_unlock(arch_rwlock_t *rw)
133{
134#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
135 __build_read_unlock(rw);
136#else
137 {
138 atomic_t *count = (atomic_t *)rw;
139 atomic_inc(count);
140 }
141#endif
142}
143
144static inline void arch_write_unlock(arch_rwlock_t *rw)
145{
146#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
147 __build_write_unlock(rw);
148#else
149 {
150 atomic_t *count = (atomic_t *)rw;
151 atomic_add(RW_LOCK_BIAS, count);
152 }
153#endif
154}
155
156static inline int arch_read_trylock(arch_rwlock_t *lock)
157{
158 atomic_t *count = (atomic_t *)lock;
159 atomic_dec(count);
160 if (atomic_read(count) >= 0)
161 return 1;
162 atomic_inc(count);
163 return 0;
164}
165
166static inline int arch_write_trylock(arch_rwlock_t *lock)
167{
168 atomic_t *count = (atomic_t *)lock;
169 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
170 return 1;
171 atomic_add(RW_LOCK_BIAS, count);
172 return 0;
173}
174
175#define _raw_spin_relax(lock) cpu_relax()
176#define _raw_read_relax(lock) cpu_relax()
177#define _raw_write_relax(lock) cpu_relax()
178
179#endif /* __KERNEL__ */
180#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/mn10300/include/asm/spinlock_types.h b/arch/mn10300/include/asm/spinlock_types.h
deleted file mode 100644
index 32abdc89bbc7..000000000000
--- a/arch/mn10300/include/asm/spinlock_types.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_SPINLOCK_TYPES_H
3#define _ASM_SPINLOCK_TYPES_H
4
5#ifndef __LINUX_SPINLOCK_TYPES_H
6# error "please don't include this file directly"
7#endif
8
9typedef struct arch_spinlock {
10 unsigned int slock;
11} arch_spinlock_t;
12
13#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
14
15typedef struct {
16 unsigned int lock;
17} arch_rwlock_t;
18
19#define __ARCH_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
20
21#endif /* _ASM_SPINLOCK_TYPES_H */
diff --git a/arch/mn10300/include/asm/string.h b/arch/mn10300/include/asm/string.h
deleted file mode 100644
index 47dbd4346c32..000000000000
--- a/arch/mn10300/include/asm/string.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* MN10300 Optimised string functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_STRING_H
13#define _ASM_STRING_H
14
15#define __HAVE_ARCH_MEMSET
16#define __HAVE_ARCH_MEMCPY
17#define __HAVE_ARCH_MEMMOVE
18
19extern void *memset(void *dest, int ch, size_t count);
20extern void *memcpy(void *dest, const void *src, size_t count);
21extern void *memmove(void *dest, const void *src, size_t count);
22
23
24extern void __struct_cpy_bug(void);
25#define struct_cpy(x, y) \
26({ \
27 if (sizeof(*(x)) != sizeof(*(y))) \
28 __struct_cpy_bug; \
29 memcpy(x, y, sizeof(*(x))); \
30})
31
32#endif /* _ASM_STRING_H */
diff --git a/arch/mn10300/include/asm/switch_to.h b/arch/mn10300/include/asm/switch_to.h
deleted file mode 100644
index 67e333aa7629..000000000000
--- a/arch/mn10300/include/asm/switch_to.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* MN10300 task switching definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SWITCH_TO_H
12#define _ASM_SWITCH_TO_H
13
14#include <asm/barrier.h>
15
16struct task_struct;
17struct thread_struct;
18
19#if defined(CONFIG_FPU) && !defined(CONFIG_LAZY_SAVE_FPU)
20struct fpu_state_struct;
21extern asmlinkage void fpu_save(struct fpu_state_struct *);
22#define switch_fpu(prev, next) \
23 do { \
24 if ((prev)->thread.fpu_flags & THREAD_HAS_FPU) { \
25 (prev)->thread.fpu_flags &= ~THREAD_HAS_FPU; \
26 (prev)->thread.uregs->epsw &= ~EPSW_FE; \
27 fpu_save(&(prev)->thread.fpu_state); \
28 } \
29 } while (0)
30#else
31#define switch_fpu(prev, next) do {} while (0)
32#endif
33
34/* context switching is now performed out-of-line in switch_to.S */
35extern asmlinkage
36struct task_struct *__switch_to(struct thread_struct *prev,
37 struct thread_struct *next,
38 struct task_struct *prev_task);
39
40#define switch_to(prev, next, last) \
41do { \
42 switch_fpu(prev, next); \
43 current->thread.wchan = (u_long) __builtin_return_address(0); \
44 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
45 mb(); \
46 current->thread.wchan = 0; \
47} while (0)
48
49#endif /* _ASM_SWITCH_TO_H */
diff --git a/arch/mn10300/include/asm/syscall.h b/arch/mn10300/include/asm/syscall.h
deleted file mode 100644
index b44b0bb75a01..000000000000
--- a/arch/mn10300/include/asm/syscall.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/* Access to user system call parameters and results
2 *
3 * See asm-generic/syscall.h for function descriptions.
4 *
5 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
6 * Written by David Howells (dhowells@redhat.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13
14#ifndef _ASM_SYSCALL_H
15#define _ASM_SYSCALL_H
16
17#include <linux/sched.h>
18#include <linux/err.h>
19
20extern const unsigned long sys_call_table[];
21
22static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
23{
24 return regs->orig_d0;
25}
26
27static inline void syscall_rollback(struct task_struct *task,
28 struct pt_regs *regs)
29{
30 regs->d0 = regs->orig_d0;
31}
32
33static inline long syscall_get_error(struct task_struct *task,
34 struct pt_regs *regs)
35{
36 unsigned long error = regs->d0;
37 return IS_ERR_VALUE(error) ? error : 0;
38}
39
40static inline long syscall_get_return_value(struct task_struct *task,
41 struct pt_regs *regs)
42{
43 return regs->d0;
44}
45
46static inline void syscall_set_return_value(struct task_struct *task,
47 struct pt_regs *regs,
48 int error, long val)
49{
50 regs->d0 = (long) error ?: val;
51}
52
53static inline void syscall_get_arguments(struct task_struct *task,
54 struct pt_regs *regs,
55 unsigned int i, unsigned int n,
56 unsigned long *args)
57{
58 switch (i) {
59 case 0:
60 if (!n--) break;
61 *args++ = regs->a0;
62 case 1:
63 if (!n--) break;
64 *args++ = regs->d1;
65 case 2:
66 if (!n--) break;
67 *args++ = regs->a3;
68 case 3:
69 if (!n--) break;
70 *args++ = regs->a2;
71 case 4:
72 if (!n--) break;
73 *args++ = regs->d3;
74 case 5:
75 if (!n--) break;
76 *args++ = regs->d2;
77 case 6:
78 if (!n--) break;
79 default:
80 BUG();
81 break;
82 }
83}
84
85static inline void syscall_set_arguments(struct task_struct *task,
86 struct pt_regs *regs,
87 unsigned int i, unsigned int n,
88 const unsigned long *args)
89{
90 switch (i) {
91 case 0:
92 if (!n--) break;
93 regs->a0 = *args++;
94 case 1:
95 if (!n--) break;
96 regs->d1 = *args++;
97 case 2:
98 if (!n--) break;
99 regs->a3 = *args++;
100 case 3:
101 if (!n--) break;
102 regs->a2 = *args++;
103 case 4:
104 if (!n--) break;
105 regs->d3 = *args++;
106 case 5:
107 if (!n--) break;
108 regs->d2 = *args++;
109 case 6:
110 if (!n--) break;
111 default:
112 BUG();
113 break;
114 }
115}
116
117#endif /* _ASM_SYSCALL_H */
diff --git a/arch/mn10300/include/asm/termios.h b/arch/mn10300/include/asm/termios.h
deleted file mode 100644
index 4010edcaa08e..000000000000
--- a/arch/mn10300/include/asm/termios.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_TERMIOS_H
3#define _ASM_TERMIOS_H
4
5#include <uapi/asm/termios.h>
6
7/* intr=^C quit=^| erase=del kill=^U
8 eof=^D vtime=\0 vmin=\1 sxtc=\0
9 start=^Q stop=^S susp=^Z eol=\0
10 reprint=^R discard=^U werase=^W lnext=^V
11 eol2=\0
12*/
13#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
14#endif /* _ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
deleted file mode 100644
index 1748a7b25bf8..000000000000
--- a/arch/mn10300/include/asm/thread_info.h
+++ /dev/null
@@ -1,160 +0,0 @@
1/* MN10300 Low-level thread information
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_THREAD_INFO_H
13#define _ASM_THREAD_INFO_H
14
15#ifdef __KERNEL__
16
17#include <asm/page.h>
18
19#ifdef CONFIG_4KSTACKS
20#define THREAD_SIZE (4096)
21#define THREAD_SIZE_ORDER (0)
22#else
23#define THREAD_SIZE (8192)
24#define THREAD_SIZE_ORDER (1)
25#endif
26
27#define STACK_WARN (THREAD_SIZE / 8)
28
29/*
30 * low level task data that entry.S needs immediate access to
31 * - this struct should fit entirely inside of one cache line
32 * - this struct shares the supervisor stack pages
33 * - if the contents of this structure are changed, the assembly constants
34 * must also be changed
35 */
36#ifndef __ASSEMBLY__
37typedef struct {
38 unsigned long seg;
39} mm_segment_t;
40
41struct thread_info {
42 struct task_struct *task; /* main task structure */
43 struct pt_regs *frame; /* current exception frame */
44 unsigned long flags; /* low level flags */
45 __u32 cpu; /* current CPU */
46 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
47
48 mm_segment_t addr_limit; /* thread address space:
49 0-0xBFFFFFFF for user-thead
50 0-0xFFFFFFFF for kernel-thread
51 */
52
53 __u8 supervisor_stack[0];
54};
55
56#define thread_info_to_uregs(ti) \
57 ((struct pt_regs *) \
58 ((unsigned long)ti + THREAD_SIZE - sizeof(struct pt_regs)))
59
60#else /* !__ASSEMBLY__ */
61
62#ifndef __ASM_OFFSETS_H__
63#include <asm/asm-offsets.h>
64#endif
65
66#endif
67
68/*
69 * macros/functions for gaining access to the thread information structure
70 */
71#ifndef __ASSEMBLY__
72
73#define INIT_THREAD_INFO(tsk) \
74{ \
75 .task = &tsk, \
76 .flags = 0, \
77 .cpu = 0, \
78 .preempt_count = INIT_PREEMPT_COUNT, \
79 .addr_limit = KERNEL_DS, \
80}
81
82#define init_uregs \
83 ((struct pt_regs *) \
84 ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
85
86extern struct thread_info *__current_ti;
87
88/* how to get the thread information struct from C */
89static inline __attribute__((const))
90struct thread_info *current_thread_info(void)
91{
92 struct thread_info *ti;
93 asm("mov sp,%0\n"
94 "and %1,%0\n"
95 : "=d" (ti)
96 : "i" (~(THREAD_SIZE - 1))
97 : "cc");
98 return ti;
99}
100
101static inline __attribute__((const))
102struct pt_regs *current_frame(void)
103{
104 return current_thread_info()->frame;
105}
106
107/* how to get the current stack pointer from C */
108static inline unsigned long current_stack_pointer(void)
109{
110 unsigned long sp;
111 asm("mov sp,%0; ":"=r" (sp));
112 return sp;
113}
114
115#ifndef CONFIG_KGDB
116void arch_release_thread_stack(unsigned long *stack);
117#endif
118#define get_thread_info(ti) get_task_struct((ti)->task)
119#define put_thread_info(ti) put_task_struct((ti)->task)
120
121#else /* !__ASSEMBLY__ */
122
123#ifndef __VMLINUX_LDS__
124/* how to get the thread information struct from ASM */
125.macro GET_THREAD_INFO reg
126 mov sp,\reg
127 and -THREAD_SIZE,\reg
128.endm
129#endif
130#endif
131
132/*
133 * thread information flags
134 * - these are process state flags that various assembly files may need to
135 * access
136 * - pending work-to-be-done flags are in LSW
137 * - other flags in MSW
138 */
139#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
140#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
141#define TIF_SIGPENDING 2 /* signal pending */
142#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
143#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
144#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
145#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
146#define TIF_MEMDIE 17 /* is terminating due to OOM killer */
147
148#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
149#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
150#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
151#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
152#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
153#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
154
155#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
156#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
157
158#endif /* __KERNEL__ */
159
160#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/mn10300/include/asm/timer-regs.h b/arch/mn10300/include/asm/timer-regs.h
deleted file mode 100644
index c634977caf66..000000000000
--- a/arch/mn10300/include/asm/timer-regs.h
+++ /dev/null
@@ -1,452 +0,0 @@
1/* AM33v2 on-board timer module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/*
21 * Timer prescalar control
22 */
23#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
24#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
25#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
26
27/*
28 * 8-bit timers
29 */
30#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
31#define TM0MD_SRC 0x07 /* timer source */
32#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
33#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
34#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
35#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
36#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
37#if defined(CONFIG_AM33_2)
38#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
39#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
40#endif /* CONFIG_AM33_2 */
41#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
42#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
43
44#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
45#define TM1MD_SRC 0x07 /* timer source */
46#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
47#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
48#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
49#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
50#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
51#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
52#if defined(CONFIG_AM33_2)
53#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
54#endif /* CONFIG_AM33_2 */
55#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
56#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
57
58#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
59#define TM2MD_SRC 0x07 /* timer source */
60#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
61#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
62#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
63#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
64#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
65#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
66#if defined(CONFIG_AM33_2)
67#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
68#endif /* CONFIG_AM33_2 */
69#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
70#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
71
72#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
73#define TM3MD_SRC 0x07 /* timer source */
74#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
75#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
76#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
77#define TM3MD_SRC_TM2CASCADE 0x03 /* - cascade with timer 2 */
78#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
79#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
80#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
81#if defined(CONFIG_AM33_2)
82#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
83#endif /* CONFIG_AM33_2 */
84#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
85#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
86
87#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
88
89#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
90#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
91#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
92#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
93#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
94
95#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
96#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
97#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
98#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
99#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
100
101#define TM0IRQ 2 /* timer 0 IRQ */
102#define TM1IRQ 3 /* timer 1 IRQ */
103#define TM2IRQ 4 /* timer 2 IRQ */
104#define TM3IRQ 5 /* timer 3 IRQ */
105
106#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
107#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
108#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
109#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
110
111/*
112 * 16-bit timers 4,5 & 7-15
113 */
114#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
115#define TM4MD_SRC 0x07 /* timer source */
116#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
117#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
118#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
119#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
120#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
121#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
122#if defined(CONFIG_AM33_2)
123#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
124#endif /* CONFIG_AM33_2 */
125#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
126#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
127
128#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
129#define TM5MD_SRC 0x07 /* timer source */
130#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
131#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
132#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
133#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
134#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
135#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
136#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
137#if defined(CONFIG_AM33_2)
138#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
139#else /* !CONFIG_AM33_2 */
140#define TM5MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
141#endif /* CONFIG_AM33_2 */
142#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
143#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
144
145#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
146#define TM7MD_SRC 0x07 /* timer source */
147#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
148#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
149#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
150#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
151#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
152#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
153#if defined(CONFIG_AM33_2)
154#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
155#endif /* CONFIG_AM33_2 */
156#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
157#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
158
159#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
160#define TM8MD_SRC 0x07 /* timer source */
161#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
162#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
163#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
164#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
165#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
166#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
167#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
168#if defined(CONFIG_AM33_2)
169#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
170#else /* !CONFIG_AM33_2 */
171#define TM8MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
172#endif /* CONFIG_AM33_2 */
173#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
174#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
175
176#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
177#define TM9MD_SRC 0x07 /* timer source */
178#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
179#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
180#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
181#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
182#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
185#if defined(CONFIG_AM33_2)
186#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
187#else /* !CONFIG_AM33_2 */
188#define TM9MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
189#endif /* CONFIG_AM33_2 */
190#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
191#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
192
193#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
194#define TM10MD_SRC 0x07 /* timer source */
195#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
196#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
197#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
198#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
199#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
200#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
201#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
202#if defined(CONFIG_AM33_2)
203#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
204#else /* !CONFIG_AM33_2 */
205#define TM10MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
206#endif /* CONFIG_AM33_2 */
207#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
208#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
209
210#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
211#define TM11MD_SRC 0x07 /* timer source */
212#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
213#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
214#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
215#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
216#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
217#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
218#if defined(CONFIG_AM33_2)
219#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
220#else /* !CONFIG_AM33_2 */
221#define TM11MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
222#endif /* CONFIG_AM33_2 */
223#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
224#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
225
226#if defined(CONFIG_AM34_2)
227#define TM12MD __SYSREG(0xd4003180, u8) /* timer 11 mode register */
228#define TM12MD_SRC 0x07 /* timer source */
229#define TM12MD_SRC_IOCLK 0x00 /* - IOCLK */
230#define TM12MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
231#define TM12MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
232#define TM12MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
233#define TM12MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
234#define TM12MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
235#define TM12MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
236#define TM12MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
237#define TM12MD_COUNT_ENABLE 0x80 /* timer count enable */
238
239#define TM13MD __SYSREG(0xd4003182, u8) /* timer 11 mode register */
240#define TM13MD_SRC 0x07 /* timer source */
241#define TM13MD_SRC_IOCLK 0x00 /* - IOCLK */
242#define TM13MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
243#define TM13MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
244#define TM13MD_SRC_TM12CASCADE 0x03 /* - cascade with timer 12 */
245#define TM13MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
246#define TM13MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
247#define TM13MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
248#define TM13MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
249#define TM13MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
250#define TM13MD_COUNT_ENABLE 0x80 /* timer count enable */
251
252#define TM14MD __SYSREG(0xd4003184, u8) /* timer 11 mode register */
253#define TM14MD_SRC 0x07 /* timer source */
254#define TM14MD_SRC_IOCLK 0x00 /* - IOCLK */
255#define TM14MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
256#define TM14MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
257#define TM14MD_SRC_TM13CASCADE 0x03 /* - cascade with timer 13 */
258#define TM14MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
259#define TM14MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
260#define TM14MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
261#define TM14MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
262#define TM14MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
263#define TM14MD_COUNT_ENABLE 0x80 /* timer count enable */
264
265#define TM15MD __SYSREG(0xd4003186, u8) /* timer 11 mode register */
266#define TM15MD_SRC 0x07 /* timer source */
267#define TM15MD_SRC_IOCLK 0x00 /* - IOCLK */
268#define TM15MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
269#define TM15MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
270#define TM15MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
271#define TM15MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
272#define TM15MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
273#define TM15MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
274#define TM15MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
275#define TM15MD_COUNT_ENABLE 0x80 /* timer count enable */
276#endif /* CONFIG_AM34_2 */
277
278
279#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
280#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
281#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
282#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
283#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
284#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
285#define TM89BR __SYSREG(0xd4003098, u32) /* timer 8:9 base register */
286#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
287#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
288#if defined(CONFIG_AM34_2)
289#define TM12BR __SYSREG(0xd4003190, u16) /* timer 12 base register */
290#define TM13BR __SYSREG(0xd4003192, u16) /* timer 13 base register */
291#define TM14BR __SYSREG(0xd4003194, u16) /* timer 14 base register */
292#define TM15BR __SYSREG(0xd4003196, u16) /* timer 15 base register */
293#endif /* CONFIG_AM34_2 */
294
295#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
296#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
297#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
298#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
299#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
300#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
301#define TM89BC __SYSREG(0xd40030a8, u32) /* timer 8:9 binary counter */
302#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
303#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
304#if defined(CONFIG_AM34_2)
305#define TM12BC __SYSREG(0xd40031a0, u16) /* timer 12 binary counter */
306#define TM13BC __SYSREG(0xd40031a2, u16) /* timer 13 binary counter */
307#define TM14BC __SYSREG(0xd40031a4, u16) /* timer 14 binary counter */
308#define TM15BC __SYSREG(0xd40031a6, u16) /* timer 15 binary counter */
309#endif /* CONFIG_AM34_2 */
310
311#define TM4IRQ 6 /* timer 4 IRQ */
312#define TM5IRQ 7 /* timer 5 IRQ */
313#define TM7IRQ 11 /* timer 7 IRQ */
314#define TM8IRQ 12 /* timer 8 IRQ */
315#define TM9IRQ 13 /* timer 9 IRQ */
316#define TM10IRQ 14 /* timer 10 IRQ */
317#define TM11IRQ 15 /* timer 11 IRQ */
318#if defined(CONFIG_AM34_2)
319#define TM12IRQ 64 /* timer 12 IRQ */
320#define TM13IRQ 65 /* timer 13 IRQ */
321#define TM14IRQ 66 /* timer 14 IRQ */
322#define TM15IRQ 67 /* timer 15 IRQ */
323#endif /* CONFIG_AM34_2 */
324
325#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
326#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
327#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
328#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
329#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
330#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
331#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
332#if defined(CONFIG_AM34_2)
333#define TM12ICR GxICR(TM12IRQ) /* timer 12 uflow intr ctrl reg */
334#define TM13ICR GxICR(TM13IRQ) /* timer 13 uflow intr ctrl reg */
335#define TM14ICR GxICR(TM14IRQ) /* timer 14 uflow intr ctrl reg */
336#define TM15ICR GxICR(TM15IRQ) /* timer 15 uflow intr ctrl reg */
337#endif /* CONFIG_AM34_2 */
338
339/*
340 * 16-bit timer 6
341 */
342#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
343#define TM6MD_SRC 0x0007 /* timer source */
344#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
345#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
346#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
347#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
348#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
349#define TM6MD_SRC_TM2UFLOW 0x0006 /* - timer 2 underflow */
350#if defined(CONFIG_AM33_2)
351/* #define TM6MD_SRC_TM6IOB_BOTH 0x0006 */ /* - TM6IOB pin input (both edges) */
352#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
353#endif /* CONFIG_AM33_2 */
354#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
355#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
356#if defined(CONFIG_AM33_2)
357#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
358#define TM6MD_PWM 0x3800 /* PWM output mode */
359#define TM6MD_PWM_DIS 0x0000 /* - disabled */
360#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
361#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
362#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
363#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
364#endif /* CONFIG_AM33_2 */
365
366#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
367#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
368
369#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
370#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
371#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
372#if defined(CONFIG_AM33_2)
373#define TM6MDA_OUT 0x07 /* output select */
374#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
375#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
376#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
377#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
378#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
379#define TM6MDA_MODE 0xc0 /* compare A register mode */
380#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
381#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
382#define TM6MDA_EDGE 0x20 /* compare A edge select */
383#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
384#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
385#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
386#else /* !CONFIG_AM33_2 */
387#define TM6MDA_MODE 0x40 /* compare A register mode */
388#endif /* CONFIG_AM33_2 */
389
390#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
391#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
392#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
393#if defined(CONFIG_AM33_2)
394#define TM6MDB_OUT 0x07 /* output select */
395#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
396#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
397#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
398#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
399#define TM6MDB_MODE 0xc0 /* compare B register mode */
400#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
401#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
402#define TM6MDB_EDGE 0x20 /* compare B edge select */
403#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
404#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
405#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
406#else /* !CONFIG_AM33_2 */
407#define TM6MDB_MODE 0x40 /* compare B register mode */
408#endif /* CONFIG_AM33_2 */
409
410#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
411#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
412#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
413
414#define TM6IRQ 6 /* timer 6 IRQ */
415#define TM6AIRQ 9 /* timer 6A IRQ */
416#define TM6BIRQ 10 /* timer 6B IRQ */
417
418#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
419#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
420#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
421
422#if defined(CONFIG_AM34_2)
423/*
424 * MTM: OS Tick-Timer
425 */
426#define TMTMD __SYSREG(0xd4004100, u8) /* Tick Timer mode register */
427#define TMTMD_TMTLDE 0x40 /* initialize TMTBC = TMTBR */
428#define TMTMD_TMTCNE 0x80 /* timer count enable */
429
430#define TMTBR __SYSREG(0xd4004110, u32) /* Tick Timer mode reg */
431#define TMTBC __SYSREG(0xd4004120, u32) /* Tick Timer mode reg */
432
433/*
434 * MTM: OS Timestamp-Timer
435 */
436#define TMSMD __SYSREG(0xd4004140, u8) /* Tick Timer mode register */
437#define TMSMD_TMSLDE 0x40 /* initialize TMSBC = TMSBR */
438#define TMSMD_TMSCNE 0x80 /* timer count enable */
439
440#define TMSBR __SYSREG(0xd4004150, u32) /* Tick Timer mode register */
441#define TMSBC __SYSREG(0xd4004160, u32) /* Tick Timer mode register */
442
443#define TMTIRQ 119 /* OS Tick timer IRQ */
444#define TMSIRQ 120 /* Timestamp timer IRQ */
445
446#define TMTICR GxICR(TMTIRQ) /* OS Tick timer uflow intr ctrl reg */
447#define TMSICR GxICR(TMSIRQ) /* Timestamp timer uflow intr ctrl reg */
448#endif /* CONFIG_AM34_2 */
449
450#endif /* __KERNEL__ */
451
452#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/mn10300/include/asm/timex.h b/arch/mn10300/include/asm/timex.h
deleted file mode 100644
index f8e66425cbf8..000000000000
--- a/arch/mn10300/include/asm/timex.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN10300 Architecture time management specifications
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H
13
14#include <unit/timex.h>
15
16#define TICK_SIZE (tick_nsec / 1000)
17
18#define CLOCK_TICK_RATE MN10300_JCCLK /* Underlying HZ */
19
20#ifdef __KERNEL__
21
22extern cycles_t cacheflush_time;
23
24static inline cycles_t get_cycles(void)
25{
26 return read_timestamp_counter();
27}
28
29extern int init_clockevents(void);
30extern int init_clocksource(void);
31
32#endif /* __KERNEL__ */
33
34#endif /* _ASM_TIMEX_H */
diff --git a/arch/mn10300/include/asm/tlb.h b/arch/mn10300/include/asm/tlb.h
deleted file mode 100644
index 65d232b96613..000000000000
--- a/arch/mn10300/include/asm/tlb.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN10300 TLB definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLB_H
13#define _ASM_TLB_H
14
15#include <asm/tlbflush.h>
16
17extern void check_pgt_cache(void);
18
19/*
20 * we don't need any special per-pte or per-vma handling...
21 */
22#define tlb_start_vma(tlb, vma) do { } while (0)
23#define tlb_end_vma(tlb, vma) do { } while (0)
24#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
25
26/*
27 * .. because we flush the whole mm when it fills up
28 */
29#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
30
31/* for now, just use the generic stuff */
32#include <asm-generic/tlb.h>
33
34#endif /* _ASM_TLB_H */
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
deleted file mode 100644
index efddd6e1adea..000000000000
--- a/arch/mn10300/include/asm/tlbflush.h
+++ /dev/null
@@ -1,154 +0,0 @@
1/* MN10300 TLB flushing functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H
13
14#include <linux/mm.h>
15#include <asm/processor.h>
16
17struct tlb_state {
18 struct mm_struct *active_mm;
19 int state;
20};
21DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
22
23/**
24 * local_flush_tlb - Flush the current MM's entries from the local CPU's TLBs
25 */
26static inline void local_flush_tlb(void)
27{
28 int w;
29 asm volatile(
30 " mov %1,%0 \n"
31 " or %2,%0 \n"
32 " mov %0,%1 \n"
33 : "=d"(w)
34 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV)
35 : "cc", "memory");
36}
37
38/**
39 * local_flush_tlb_all - Flush all entries from the local CPU's TLBs
40 */
41static inline void local_flush_tlb_all(void)
42{
43 local_flush_tlb();
44}
45
46/**
47 * local_flush_tlb_one - Flush one entry from the local CPU's TLBs
48 */
49static inline void local_flush_tlb_one(unsigned long addr)
50{
51 local_flush_tlb();
52}
53
54/**
55 * local_flush_tlb_page - Flush a page's entry from the local CPU's TLBs
56 * @mm: The MM to flush for
57 * @addr: The address of the target page in RAM (not its page struct)
58 */
59static inline
60void local_flush_tlb_page(struct mm_struct *mm, unsigned long addr)
61{
62 unsigned long pteu, flags, cnx;
63
64 addr &= PAGE_MASK;
65
66 local_irq_save(flags);
67
68 cnx = 1;
69#ifdef CONFIG_MN10300_TLB_USE_PIDR
70 cnx = mm->context.tlbpid[smp_processor_id()];
71#endif
72 if (cnx) {
73 pteu = addr;
74#ifdef CONFIG_MN10300_TLB_USE_PIDR
75 pteu |= cnx & xPTEU_PID;
76#endif
77 IPTEU = pteu;
78 DPTEU = pteu;
79 if (IPTEL & xPTEL_V)
80 IPTEL = 0;
81 if (DPTEL & xPTEL_V)
82 DPTEL = 0;
83 }
84 local_irq_restore(flags);
85}
86
87/*
88 * TLB flushing:
89 *
90 * - flush_tlb() flushes the current mm struct TLBs
91 * - flush_tlb_all() flushes all processes TLBs
92 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
93 * - flush_tlb_page(vma, vmaddr) flushes one page
94 * - flush_tlb_range(mm, start, end) flushes a range of pages
95 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
96 */
97#ifdef CONFIG_SMP
98
99#include <asm/smp.h>
100
101extern void flush_tlb_all(void);
102extern void flush_tlb_current_task(void);
103extern void flush_tlb_mm(struct mm_struct *);
104extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
105
106#define flush_tlb() flush_tlb_current_task()
107
108static inline void flush_tlb_range(struct vm_area_struct *vma,
109 unsigned long start, unsigned long end)
110{
111 flush_tlb_mm(vma->vm_mm);
112}
113
114#else /* CONFIG_SMP */
115
116static inline void flush_tlb_all(void)
117{
118 preempt_disable();
119 local_flush_tlb_all();
120 preempt_enable();
121}
122
123static inline void flush_tlb_mm(struct mm_struct *mm)
124{
125 preempt_disable();
126 local_flush_tlb_all();
127 preempt_enable();
128}
129
130static inline void flush_tlb_range(struct vm_area_struct *vma,
131 unsigned long start, unsigned long end)
132{
133 preempt_disable();
134 local_flush_tlb_all();
135 preempt_enable();
136}
137
138#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr)
139#define flush_tlb() flush_tlb_all()
140
141#endif /* CONFIG_SMP */
142
143static inline void flush_tlb_kernel_range(unsigned long start,
144 unsigned long end)
145{
146 flush_tlb_all();
147}
148
149static inline void flush_tlb_pgtables(struct mm_struct *mm,
150 unsigned long start, unsigned long end)
151{
152}
153
154#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/mn10300/include/asm/topology.h b/arch/mn10300/include/asm/topology.h
deleted file mode 100644
index 5428f333a02c..000000000000
--- a/arch/mn10300/include/asm/topology.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/topology.h>
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
deleted file mode 100644
index 3d6e48311bef..000000000000
--- a/arch/mn10300/include/asm/types.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 Basic type definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TYPES_H
12#define _ASM_TYPES_H
13
14#include <uapi/asm/types.h>
15
16/*
17 * These aren't exported outside the kernel to avoid name space clashes
18 */
19
20#define BITS_PER_LONG 32
21
22#endif /* _ASM_TYPES_H */
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
deleted file mode 100644
index 5af468fd1359..000000000000
--- a/arch/mn10300/include/asm/uaccess.h
+++ /dev/null
@@ -1,297 +0,0 @@
1/* MN10300 userspace access functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UACCESS_H
12#define _ASM_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/kernel.h>
18#include <asm/page.h>
19
20/*
21 * The fs value determines whether argument validity checking should be
22 * performed or not. If get_fs() == USER_DS, checking is performed, with
23 * get_fs() == KERNEL_DS, checking is bypassed.
24 *
25 * For historical reasons, these macros are grossly misnamed.
26 */
27#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
28
29#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
30#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
31#define USER_DS MAKE_MM_SEG(TASK_SIZE)
32
33#define get_ds() (KERNEL_DS)
34#define get_fs() (current_thread_info()->addr_limit)
35#define set_fs(x) (current_thread_info()->addr_limit = (x))
36
37#define segment_eq(a, b) ((a).seg == (b).seg)
38
39#define __addr_ok(addr) \
40 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
41
42/*
43 * check that a range of addresses falls within the current address limit
44 */
45static inline int ___range_ok(unsigned long addr, unsigned int size)
46{
47 int flag = 1, tmp;
48
49 asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
50 " bcs 0f \n"
51 " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
52 " bhi 0f \n"
53 " clr %0 \n" /* mark okay */
54 "0: \n"
55 : "=r"(flag), "=&r"(tmp)
56 : "1"(addr), "ir"(size),
57 "r"(current_thread_info()->addr_limit.seg), "0"(flag)
58 : "cc"
59 );
60
61 return flag;
62}
63
64#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
65
66#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
67#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
68
69#include <asm/extable.h>
70
71#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
72#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
73
74/*
75 * The "__xxx" versions do not do address space checking, useful when
76 * doing multiple accesses to the same area (the user has to do the
77 * checks by hand with "access_ok()")
78 */
79#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
80#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
81
82struct __large_struct { unsigned long buf[100]; };
83#define __m(x) (*(struct __large_struct *)(x))
84
85#define __get_user_nocheck(x, ptr, size) \
86({ \
87 unsigned long __gu_addr; \
88 int __gu_err; \
89 __gu_addr = (unsigned long) (ptr); \
90 switch (size) { \
91 case 1: { \
92 unsigned char __gu_val; \
93 __get_user_asm("bu"); \
94 (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
95 break; \
96 } \
97 case 2: { \
98 unsigned short __gu_val; \
99 __get_user_asm("hu"); \
100 (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
101 break; \
102 } \
103 case 4: { \
104 unsigned int __gu_val; \
105 __get_user_asm(""); \
106 (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
107 break; \
108 } \
109 default: \
110 __get_user_unknown(); \
111 break; \
112 } \
113 __gu_err; \
114})
115
116#define __get_user_check(x, ptr, size) \
117({ \
118 const __typeof__(*(ptr))* __guc_ptr = (ptr); \
119 int _e; \
120 if (likely(__access_ok((unsigned long) __guc_ptr, (size)))) \
121 _e = __get_user_nocheck((x), __guc_ptr, (size)); \
122 else { \
123 _e = -EFAULT; \
124 (x) = (__typeof__(x))0; \
125 } \
126 _e; \
127})
128
129#define __get_user_asm(INSN) \
130({ \
131 asm volatile( \
132 "1:\n" \
133 " mov"INSN" %2,%1\n" \
134 " mov 0,%0\n" \
135 "2:\n" \
136 " .section .fixup,\"ax\"\n" \
137 "3:\n\t" \
138 " mov 0,%1\n" \
139 " mov %3,%0\n" \
140 " jmp 2b\n" \
141 " .previous\n" \
142 " .section __ex_table,\"a\"\n" \
143 " .balign 4\n" \
144 " .long 1b, 3b\n" \
145 " .previous" \
146 : "=&r" (__gu_err), "=&r" (__gu_val) \
147 : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
148})
149
150extern int __get_user_unknown(void);
151
152#define __put_user_nocheck(x, ptr, size) \
153({ \
154 union { \
155 __typeof__(*(ptr)) val; \
156 u32 bits[2]; \
157 } __pu_val; \
158 unsigned long __pu_addr; \
159 int __pu_err; \
160 __pu_val.val = (x); \
161 __pu_addr = (unsigned long) (ptr); \
162 switch (size) { \
163 case 1: __put_user_asm("bu"); break; \
164 case 2: __put_user_asm("hu"); break; \
165 case 4: __put_user_asm("" ); break; \
166 case 8: __put_user_asm8(); break; \
167 default: __pu_err = __put_user_unknown(); break; \
168 } \
169 __pu_err; \
170})
171
172#define __put_user_check(x, ptr, size) \
173({ \
174 union { \
175 __typeof__(*(ptr)) val; \
176 u32 bits[2]; \
177 } __pu_val; \
178 unsigned long __pu_addr; \
179 int __pu_err; \
180 __pu_val.val = (x); \
181 __pu_addr = (unsigned long) (ptr); \
182 if (likely(__access_ok(__pu_addr, size))) { \
183 switch (size) { \
184 case 1: __put_user_asm("bu"); break; \
185 case 2: __put_user_asm("hu"); break; \
186 case 4: __put_user_asm("" ); break; \
187 case 8: __put_user_asm8(); break; \
188 default: __pu_err = __put_user_unknown(); break; \
189 } \
190 } \
191 else { \
192 __pu_err = -EFAULT; \
193 } \
194 __pu_err; \
195})
196
197#define __put_user_asm(INSN) \
198({ \
199 asm volatile( \
200 "1:\n" \
201 " mov"INSN" %1,%2\n" \
202 " mov 0,%0\n" \
203 "2:\n" \
204 " .section .fixup,\"ax\"\n" \
205 "3:\n" \
206 " mov %3,%0\n" \
207 " jmp 2b\n" \
208 " .previous\n" \
209 " .section __ex_table,\"a\"\n" \
210 " .balign 4\n" \
211 " .long 1b, 3b\n" \
212 " .previous" \
213 : "=&r" (__pu_err) \
214 : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
215 "i" (-EFAULT) \
216 ); \
217})
218
219#define __put_user_asm8() \
220({ \
221 asm volatile( \
222 "1: mov %1,%3 \n" \
223 "2: mov %2,%4 \n" \
224 " mov 0,%0 \n" \
225 "3: \n" \
226 " .section .fixup,\"ax\" \n" \
227 "4: \n" \
228 " mov %5,%0 \n" \
229 " jmp 3b \n" \
230 " .previous \n" \
231 " .section __ex_table,\"a\"\n" \
232 " .balign 4 \n" \
233 " .long 1b, 4b \n" \
234 " .long 2b, 4b \n" \
235 " .previous \n" \
236 : "=&r" (__pu_err) \
237 : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
238 "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
239 "i" (-EFAULT) \
240 ); \
241})
242
243extern int __put_user_unknown(void);
244
245
246/*
247 * Copy To/From Userspace
248 */
249/* Generic arbitrary sized copy. */
250#define __copy_user(to, from, size) \
251do { \
252 if (size) { \
253 void *__to = to; \
254 const void *__from = from; \
255 int w; \
256 asm volatile( \
257 "0: movbu (%0),%3;\n" \
258 "1: movbu %3,(%1);\n" \
259 " inc %0;\n" \
260 " inc %1;\n" \
261 " add -1,%2;\n" \
262 " bne 0b;\n" \
263 "2:\n" \
264 " .section .fixup,\"ax\"\n" \
265 "3: jmp 2b\n" \
266 " .previous\n" \
267 " .section __ex_table,\"a\"\n" \
268 " .balign 4\n" \
269 " .long 0b,3b\n" \
270 " .long 1b,3b\n" \
271 " .previous\n" \
272 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
273 : "0"(__from), "1"(__to), "2"(size) \
274 : "cc", "memory"); \
275 } \
276} while (0)
277
278static inline unsigned long
279raw_copy_from_user(void *to, const void __user *from, unsigned long n)
280{
281 __copy_user(to, from, n);
282 return n;
283}
284
285static inline unsigned long
286raw_copy_to_user(void __user *to, const void *from, unsigned long n)
287{
288 __copy_user(to, from, n);
289 return n;
290}
291
292extern long strncpy_from_user(char *dst, const char __user *src, long count);
293extern long strnlen_user(const char __user *str, long n);
294extern unsigned long clear_user(void __user *mem, unsigned long len);
295extern unsigned long __clear_user(void __user *mem, unsigned long len);
296
297#endif /* _ASM_UACCESS_H */
diff --git a/arch/mn10300/include/asm/ucontext.h b/arch/mn10300/include/asm/ucontext.h
deleted file mode 100644
index fcab5c1d8e18..000000000000
--- a/arch/mn10300/include/asm/ucontext.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 User context
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UCONTEXT_H
12#define _ASM_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_UCONTEXT_H */
diff --git a/arch/mn10300/include/asm/unaligned.h b/arch/mn10300/include/asm/unaligned.h
deleted file mode 100644
index 0df671318ae4..000000000000
--- a/arch/mn10300/include/asm/unaligned.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Unaligned memory access handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_MN10300_UNALIGNED_H
12#define _ASM_MN10300_UNALIGNED_H
13
14#include <linux/unaligned/access_ok.h>
15#include <linux/unaligned/generic.h>
16
17#define get_unaligned __get_unaligned_le
18#define put_unaligned __put_unaligned_le
19
20#endif /* _ASM_MN10300_UNALIGNED_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
deleted file mode 100644
index 0522468f488b..000000000000
--- a/arch/mn10300/include/asm/unistd.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/* MN10300 System call number list
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNISTD_H
12#define _ASM_UNISTD_H
13
14#include <uapi/asm/unistd.h>
15
16
17#define NR_syscalls 340
18
19/*
20 * specify the deprecated syscalls we want to support on this arch
21 */
22#define __ARCH_WANT_OLD_READDIR
23#define __ARCH_WANT_OLD_STAT
24#define __ARCH_WANT_STAT64
25#define __ARCH_WANT_SYS_ALARM
26#define __ARCH_WANT_SYS_GETHOSTNAME
27#define __ARCH_WANT_SYS_IPC
28#define __ARCH_WANT_SYS_PAUSE
29#define __ARCH_WANT_SYS_SIGNAL
30#define __ARCH_WANT_SYS_TIME
31#define __ARCH_WANT_SYS_UTIME
32#define __ARCH_WANT_SYS_WAITPID
33#define __ARCH_WANT_SYS_SOCKETCALL
34#define __ARCH_WANT_SYS_FADVISE64
35#define __ARCH_WANT_SYS_GETPGRP
36#define __ARCH_WANT_SYS_LLSEEK
37#define __ARCH_WANT_SYS_NICE
38#define __ARCH_WANT_SYS_OLD_GETRLIMIT
39#define __ARCH_WANT_SYS_OLD_SELECT
40#define __ARCH_WANT_SYS_OLDUMOUNT
41#define __ARCH_WANT_SYS_SIGPENDING
42#define __ARCH_WANT_SYS_SIGPROCMASK
43#define __ARCH_WANT_SYS_FORK
44#define __ARCH_WANT_SYS_VFORK
45#define __ARCH_WANT_SYS_CLONE
46
47#endif /* _ASM_UNISTD_H */
diff --git a/arch/mn10300/include/asm/user.h b/arch/mn10300/include/asm/user.h
deleted file mode 100644
index e1193908b78c..000000000000
--- a/arch/mn10300/include/asm/user.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* MN10300 User process data
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <linux/ptrace.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * When the kernel dumps core, it starts by dumping the user struct - this will
20 * be used by gdb to figure out where the data and stack segments are within
21 * the file, and what virtual addresses to use.
22 */
23struct user {
24 /* We start with the registers, to mimic the way that "memory" is
25 * returned from the ptrace(3,...) function.
26 */
27 struct pt_regs regs; /* Where the registers are actually stored */
28
29 /* The rest of this junk is to help gdb figure out what goes where */
30 unsigned long int u_tsize; /* Text segment size (pages). */
31 unsigned long int u_dsize; /* Data segment size (pages). */
32 unsigned long int u_ssize; /* Stack segment size (pages). */
33 unsigned long start_code; /* Starting virtual address of text. */
34 unsigned long start_stack; /* Starting virtual address of stack area.
35 This is actually the bottom of the stack,
36 the top of the stack is always found in the
37 esp register. */
38 long int signal; /* Signal that caused the core dump. */
39 int reserved; /* No longer used */
40 struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
41
42 /* the registers */
43 unsigned long magic; /* To uniquely identify a core file */
44 char u_comm[32]; /* User command that was responsible */
45};
46#endif
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR +(u.start_code)
51#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
52
53#endif /* _ASM_USER_H */
diff --git a/arch/mn10300/include/asm/vga.h b/arch/mn10300/include/asm/vga.h
deleted file mode 100644
index 0163e50a3459..000000000000
--- a/arch/mn10300/include/asm/vga.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* MN10300 VGA register definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/arch/mn10300/include/asm/xor.h b/arch/mn10300/include/asm/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/arch/mn10300/include/asm/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/arch/mn10300/include/uapi/asm/Kbuild b/arch/mn10300/include/uapi/asm/Kbuild
deleted file mode 100644
index b04fd1632051..000000000000
--- a/arch/mn10300/include/uapi/asm/Kbuild
+++ /dev/null
@@ -1,6 +0,0 @@
1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm
3
4generic-y += bpf_perf_event.h
5generic-y += poll.h
6generic-y += siginfo.h
diff --git a/arch/mn10300/include/uapi/asm/auxvec.h b/arch/mn10300/include/uapi/asm/auxvec.h
deleted file mode 100644
index 4fdb60b2ae39..000000000000
--- a/arch/mn10300/include/uapi/asm/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASM_AUXVEC_H
2#define _ASM_AUXVEC_H
3
4#endif
diff --git a/arch/mn10300/include/uapi/asm/bitsperlong.h b/arch/mn10300/include/uapi/asm/bitsperlong.h
deleted file mode 100644
index 76da34b10f59..000000000000
--- a/arch/mn10300/include/uapi/asm/bitsperlong.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/bitsperlong.h>
diff --git a/arch/mn10300/include/uapi/asm/byteorder.h b/arch/mn10300/include/uapi/asm/byteorder.h
deleted file mode 100644
index 3467df91216c..000000000000
--- a/arch/mn10300/include/uapi/asm/byteorder.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_BYTEORDER_H
3#define _ASM_BYTEORDER_H
4
5#include <linux/byteorder/little_endian.h>
6
7#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/mn10300/include/uapi/asm/errno.h b/arch/mn10300/include/uapi/asm/errno.h
deleted file mode 100644
index 9addba592646..000000000000
--- a/arch/mn10300/include/uapi/asm/errno.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/errno.h>
diff --git a/arch/mn10300/include/uapi/asm/fcntl.h b/arch/mn10300/include/uapi/asm/fcntl.h
deleted file mode 100644
index a77648c505d1..000000000000
--- a/arch/mn10300/include/uapi/asm/fcntl.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/fcntl.h>
diff --git a/arch/mn10300/include/uapi/asm/ioctl.h b/arch/mn10300/include/uapi/asm/ioctl.h
deleted file mode 100644
index b809c4566e5f..000000000000
--- a/arch/mn10300/include/uapi/asm/ioctl.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/ioctl.h>
diff --git a/arch/mn10300/include/uapi/asm/ioctls.h b/arch/mn10300/include/uapi/asm/ioctls.h
deleted file mode 100644
index 0955d4f854e9..000000000000
--- a/arch/mn10300/include/uapi/asm/ioctls.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_IOCTLS_H
3#define _ASM_IOCTLS_H
4
5#include <asm-generic/ioctls.h>
6
7#endif /* _ASM_IOCTLS_H */
diff --git a/arch/mn10300/include/uapi/asm/ipcbuf.h b/arch/mn10300/include/uapi/asm/ipcbuf.h
deleted file mode 100644
index 90d6445a14df..000000000000
--- a/arch/mn10300/include/uapi/asm/ipcbuf.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/ipcbuf.h>
diff --git a/arch/mn10300/include/uapi/asm/kvm_para.h b/arch/mn10300/include/uapi/asm/kvm_para.h
deleted file mode 100644
index baacc4996d18..000000000000
--- a/arch/mn10300/include/uapi/asm/kvm_para.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/kvm_para.h>
diff --git a/arch/mn10300/include/uapi/asm/mman.h b/arch/mn10300/include/uapi/asm/mman.h
deleted file mode 100644
index eb7f4798c036..000000000000
--- a/arch/mn10300/include/uapi/asm/mman.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/mman.h>
3
4#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */
5
6#define arch_mmap_check(addr, len, flags) \
7 (((flags) & MAP_FIXED && (addr) < MIN_MAP_ADDR) ? -EINVAL : 0)
diff --git a/arch/mn10300/include/uapi/asm/msgbuf.h b/arch/mn10300/include/uapi/asm/msgbuf.h
deleted file mode 100644
index 5982def83355..000000000000
--- a/arch/mn10300/include/uapi/asm/msgbuf.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_MSGBUF_H
3#define _ASM_MSGBUF_H
4
5/*
6 * The msqid64_ds structure for MN10300 architecture.
7 * Note extra padding because this structure is passed back and forth
8 * between kernel and user space.
9 *
10 * Pad space is left for:
11 * - 64-bit time_t to solve y2038 problem
12 * - 2 miscellaneous 32-bit values
13 */
14
15struct msqid64_ds {
16 struct ipc64_perm msg_perm;
17 __kernel_time_t msg_stime; /* last msgsnd time */
18 unsigned long __unused1;
19 __kernel_time_t msg_rtime; /* last msgrcv time */
20 unsigned long __unused2;
21 __kernel_time_t msg_ctime; /* last change time */
22 unsigned long __unused3;
23 unsigned long msg_cbytes; /* current number of bytes on queue */
24 unsigned long msg_qnum; /* number of messages in queue */
25 unsigned long msg_qbytes; /* max number of bytes on queue */
26 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
27 __kernel_pid_t msg_lrpid; /* last receive pid */
28 unsigned long __unused4;
29 unsigned long __unused5;
30};
31
32#endif /* _ASM_MSGBUF_H */
diff --git a/arch/mn10300/include/uapi/asm/param.h b/arch/mn10300/include/uapi/asm/param.h
deleted file mode 100644
index e0020d7742bd..000000000000
--- a/arch/mn10300/include/uapi/asm/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Kernel parameters
3 *
4 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
5 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_PARAM_H
13#define _ASM_PARAM_H
14
15#include <asm-generic/param.h>
16
17#define COMMAND_LINE_SIZE 256
18
19#endif /* _ASM_PARAM_H */
diff --git a/arch/mn10300/include/uapi/asm/posix_types.h b/arch/mn10300/include/uapi/asm/posix_types.h
deleted file mode 100644
index 6b4cfc7136e9..000000000000
--- a/arch/mn10300/include/uapi/asm/posix_types.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 POSIX types
3 *
4 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
5 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_POSIX_TYPES_H
13#define _ASM_POSIX_TYPES_H
14
15/*
16 * This file is generally used by user-level software, so you need to
17 * be a little careful about namespace pollution etc. Also, we cannot
18 * assume GCC is being used.
19 */
20
21typedef unsigned short __kernel_mode_t;
22#define __kernel_mode_t __kernel_mode_t
23
24typedef unsigned short __kernel_ipc_pid_t;
25#define __kernel_ipc_pid_t __kernel_ipc_pid_t
26
27typedef unsigned short __kernel_uid_t;
28typedef unsigned short __kernel_gid_t;
29#define __kernel_uid_t __kernel_uid_t
30
31#if __GNUC__ == 4
32typedef unsigned int __kernel_size_t;
33typedef signed int __kernel_ssize_t;
34#else
35typedef unsigned long __kernel_size_t;
36typedef signed long __kernel_ssize_t;
37#endif
38typedef int __kernel_ptrdiff_t;
39#define __kernel_size_t __kernel_size_t
40
41typedef unsigned short __kernel_old_dev_t;
42#define __kernel_old_dev_t __kernel_old_dev_t
43
44#include <asm-generic/posix_types.h>
45
46#endif /* _ASM_POSIX_TYPES_H */
diff --git a/arch/mn10300/include/uapi/asm/ptrace.h b/arch/mn10300/include/uapi/asm/ptrace.h
deleted file mode 100644
index f485c481a266..000000000000
--- a/arch/mn10300/include/uapi/asm/ptrace.h
+++ /dev/null
@@ -1,85 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Exception frame layout and ptrace constants
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _UAPI_ASM_PTRACE_H
13#define _UAPI_ASM_PTRACE_H
14
15#define PT_A3 0
16#define PT_A2 1
17#define PT_D3 2
18#define PT_D2 3
19#define PT_MCVF 4
20#define PT_MCRL 5
21#define PT_MCRH 6
22#define PT_MDRQ 7
23#define PT_E1 8
24#define PT_E0 9
25#define PT_E7 10
26#define PT_E6 11
27#define PT_E5 12
28#define PT_E4 13
29#define PT_E3 14
30#define PT_E2 15
31#define PT_SP 16
32#define PT_LAR 17
33#define PT_LIR 18
34#define PT_MDR 19
35#define PT_A1 20
36#define PT_A0 21
37#define PT_D1 22
38#define PT_D0 23
39#define PT_ORIG_D0 24
40#define PT_EPSW 25
41#define PT_PC 26
42#define NR_PTREGS 27
43
44/*
45 * This defines the way registers are stored in the event of an exception
46 * - the strange order is due to the MOVM instruction
47 */
48struct pt_regs {
49 unsigned long a3; /* syscall arg 3 */
50 unsigned long a2; /* syscall arg 4 */
51 unsigned long d3; /* syscall arg 5 */
52 unsigned long d2; /* syscall arg 6 */
53 unsigned long mcvf;
54 unsigned long mcrl;
55 unsigned long mcrh;
56 unsigned long mdrq;
57 unsigned long e1;
58 unsigned long e0;
59 unsigned long e7;
60 unsigned long e6;
61 unsigned long e5;
62 unsigned long e4;
63 unsigned long e3;
64 unsigned long e2;
65 unsigned long sp;
66 unsigned long lar;
67 unsigned long lir;
68 unsigned long mdr;
69 unsigned long a1;
70 unsigned long a0; /* syscall arg 1 */
71 unsigned long d1; /* syscall arg 2 */
72 unsigned long d0; /* syscall ret */
73 struct pt_regs *next; /* next frame pointer */
74 unsigned long orig_d0; /* syscall number */
75 unsigned long epsw;
76 unsigned long pc;
77};
78
79/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
80#define PTRACE_GETREGS 12
81#define PTRACE_SETREGS 13
82#define PTRACE_GETFPREGS 14
83#define PTRACE_SETFPREGS 15
84
85#endif /* _UAPI_ASM_PTRACE_H */
diff --git a/arch/mn10300/include/uapi/asm/resource.h b/arch/mn10300/include/uapi/asm/resource.h
deleted file mode 100644
index 49a81fbab43d..000000000000
--- a/arch/mn10300/include/uapi/asm/resource.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#include <asm-generic/resource.h>
diff --git a/arch/mn10300/include/uapi/asm/sembuf.h b/arch/mn10300/include/uapi/asm/sembuf.h
deleted file mode 100644
index ef44c42c7e0f..000000000000
--- a/arch/mn10300/include/uapi/asm/sembuf.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_SEMBUF_H
3#define _ASM_SEMBUF_H
4
5/*
6 * The semid64_ds structure for MN10300 architecture.
7 * Note extra padding because this structure is passed back and forth
8 * between kernel and user space.
9 *
10 * Pad space is left for:
11 * - 64-bit time_t to solve y2038 problem
12 * - 2 miscellaneous 32-bit values
13 */
14
15struct semid64_ds {
16 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
17 __kernel_time_t sem_otime; /* last semop time */
18 unsigned long __unused1;
19 __kernel_time_t sem_ctime; /* last change time */
20 unsigned long __unused2;
21 unsigned long sem_nsems; /* no. of semaphores in array */
22 unsigned long __unused3;
23 unsigned long __unused4;
24};
25
26#endif /* _ASM_SEMBUF_H */
diff --git a/arch/mn10300/include/uapi/asm/setup.h b/arch/mn10300/include/uapi/asm/setup.h
deleted file mode 100644
index 043dd4b92026..000000000000
--- a/arch/mn10300/include/uapi/asm/setup.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 * There isn't anything here anymore, but the file must not be empty or patch
4 * will delete it.
5 */
diff --git a/arch/mn10300/include/uapi/asm/shmbuf.h b/arch/mn10300/include/uapi/asm/shmbuf.h
deleted file mode 100644
index 6e81f74f51c6..000000000000
--- a/arch/mn10300/include/uapi/asm/shmbuf.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_SHMBUF_H
3#define _ASM_SHMBUF_H
4
5/*
6 * The shmid64_ds structure for MN10300 architecture.
7 * Note extra padding because this structure is passed back and forth
8 * between kernel and user space.
9 *
10 * Pad space is left for:
11 * - 64-bit time_t to solve y2038 problem
12 * - 2 miscellaneous 32-bit values
13 */
14
15struct shmid64_ds {
16 struct ipc64_perm shm_perm; /* operation perms */
17 size_t shm_segsz; /* size of segment (bytes) */
18 __kernel_time_t shm_atime; /* last attach time */
19 unsigned long __unused1;
20 __kernel_time_t shm_dtime; /* last detach time */
21 unsigned long __unused2;
22 __kernel_time_t shm_ctime; /* last change time */
23 unsigned long __unused3;
24 __kernel_pid_t shm_cpid; /* pid of creator */
25 __kernel_pid_t shm_lpid; /* pid of last operator */
26 unsigned long shm_nattch; /* no. of current attaches */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31struct shminfo64 {
32 unsigned long shmmax;
33 unsigned long shmmin;
34 unsigned long shmmni;
35 unsigned long shmseg;
36 unsigned long shmall;
37 unsigned long __unused1;
38 unsigned long __unused2;
39 unsigned long __unused3;
40 unsigned long __unused4;
41};
42
43#endif /* _ASM_SHMBUF_H */
diff --git a/arch/mn10300/include/uapi/asm/sigcontext.h b/arch/mn10300/include/uapi/asm/sigcontext.h
deleted file mode 100644
index 1c361fabb977..000000000000
--- a/arch/mn10300/include/uapi/asm/sigcontext.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Userspace signal context
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_SIGCONTEXT_H
13#define _ASM_SIGCONTEXT_H
14
15struct fpucontext {
16 /* Regular FPU environment */
17 unsigned long fs[32]; /* fpu registers */
18 unsigned long fpcr; /* fpu control register */
19};
20
21struct sigcontext {
22 unsigned long d0;
23 unsigned long d1;
24 unsigned long d2;
25 unsigned long d3;
26 unsigned long a0;
27 unsigned long a1;
28 unsigned long a2;
29 unsigned long a3;
30 unsigned long e0;
31 unsigned long e1;
32 unsigned long e2;
33 unsigned long e3;
34 unsigned long e4;
35 unsigned long e5;
36 unsigned long e6;
37 unsigned long e7;
38 unsigned long lar;
39 unsigned long lir;
40 unsigned long mdr;
41 unsigned long mcvf;
42 unsigned long mcrl;
43 unsigned long mcrh;
44 unsigned long mdrq;
45 unsigned long sp;
46 unsigned long epsw;
47 unsigned long pc;
48 struct fpucontext *fpucontext;
49 unsigned long oldmask;
50};
51
52
53#endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mn10300/include/uapi/asm/signal.h b/arch/mn10300/include/uapi/asm/signal.h
deleted file mode 100644
index 566cb199d5ac..000000000000
--- a/arch/mn10300/include/uapi/asm/signal.h
+++ /dev/null
@@ -1,126 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Signal definitions
3 *
4 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
5 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _UAPI_ASM_SIGNAL_H
13#define _UAPI_ASM_SIGNAL_H
14
15#include <linux/types.h>
16
17/* Avoid too many header ordering problems. */
18struct siginfo;
19
20#ifndef __KERNEL__
21/* Here we must cater to libcs that poke about in kernel headers. */
22
23#define NSIG 32
24typedef unsigned long sigset_t;
25
26#endif /* __KERNEL__ */
27
28#define SIGHUP 1
29#define SIGINT 2
30#define SIGQUIT 3
31#define SIGILL 4
32#define SIGTRAP 5
33#define SIGABRT 6
34#define SIGIOT 6
35#define SIGBUS 7
36#define SIGFPE 8
37#define SIGKILL 9
38#define SIGUSR1 10
39#define SIGSEGV 11
40#define SIGUSR2 12
41#define SIGPIPE 13
42#define SIGALRM 14
43#define SIGTERM 15
44#define SIGSTKFLT 16
45#define SIGCHLD 17
46#define SIGCONT 18
47#define SIGSTOP 19
48#define SIGTSTP 20
49#define SIGTTIN 21
50#define SIGTTOU 22
51#define SIGURG 23
52#define SIGXCPU 24
53#define SIGXFSZ 25
54#define SIGVTALRM 26
55#define SIGPROF 27
56#define SIGWINCH 28
57#define SIGIO 29
58#define SIGPOLL SIGIO
59/*
60#define SIGLOST 29
61*/
62#define SIGPWR 30
63#define SIGSYS 31
64#define SIGUNUSED 31
65
66/* These should not be considered constants from userland. */
67#define SIGRTMIN 32
68#define SIGRTMAX _NSIG
69
70/*
71 * SA_FLAGS values:
72 *
73 * SA_ONSTACK indicates that a registered stack_t will be used.
74 * SA_RESTART flag to get restarting signals (which were the default long ago)
75 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
76 * SA_RESETHAND clears the handler when the signal is delivered.
77 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
78 * SA_NODEFER prevents the current signal from being masked in the handler.
79 *
80 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
81 * Unix names RESETHAND and NODEFER respectively.
82 */
83#define SA_NOCLDSTOP 0x00000001U
84#define SA_NOCLDWAIT 0x00000002U
85#define SA_SIGINFO 0x00000004U
86#define SA_ONSTACK 0x08000000U
87#define SA_RESTART 0x10000000U
88#define SA_NODEFER 0x40000000U
89#define SA_RESETHAND 0x80000000U
90
91#define SA_NOMASK SA_NODEFER
92#define SA_ONESHOT SA_RESETHAND
93
94#define SA_RESTORER 0x04000000
95
96#define MINSIGSTKSZ 2048
97#define SIGSTKSZ 8192
98
99#include <asm-generic/signal-defs.h>
100
101#ifndef __KERNEL__
102/* Here we must cater to libcs that poke about in kernel headers. */
103
104struct sigaction {
105 union {
106 __sighandler_t _sa_handler;
107 void (*_sa_sigaction)(int, struct siginfo *, void *);
108 } _u;
109 sigset_t sa_mask;
110 unsigned long sa_flags;
111 void (*sa_restorer)(void);
112};
113
114#define sa_handler _u._sa_handler
115#define sa_sigaction _u._sa_sigaction
116
117#endif /* __KERNEL__ */
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125
126#endif /* _UAPI_ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/uapi/asm/socket.h b/arch/mn10300/include/uapi/asm/socket.h
deleted file mode 100644
index b35eee132142..000000000000
--- a/arch/mn10300/include/uapi/asm/socket.h
+++ /dev/null
@@ -1,108 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_SOCKET_H
3#define _ASM_SOCKET_H
4
5#include <asm/sockios.h>
6
7/* For setsockopt(2) */
8#define SOL_SOCKET 1
9
10#define SO_DEBUG 1
11#define SO_REUSEADDR 2
12#define SO_TYPE 3
13#define SO_ERROR 4
14#define SO_DONTROUTE 5
15#define SO_BROADCAST 6
16#define SO_SNDBUF 7
17#define SO_RCVBUF 8
18#define SO_SNDBUFFORCE 32
19#define SO_RCVBUFFORCE 33
20#define SO_KEEPALIVE 9
21#define SO_OOBINLINE 10
22#define SO_NO_CHECK 11
23#define SO_PRIORITY 12
24#define SO_LINGER 13
25#define SO_BSDCOMPAT 14
26#define SO_REUSEPORT 15
27#define SO_PASSCRED 16
28#define SO_PEERCRED 17
29#define SO_RCVLOWAT 18
30#define SO_SNDLOWAT 19
31#define SO_RCVTIMEO 20
32#define SO_SNDTIMEO 21
33
34/* Security levels - as per NRL IPv6 - don't actually do anything */
35#define SO_SECURITY_AUTHENTICATION 22
36#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
37#define SO_SECURITY_ENCRYPTION_NETWORK 24
38
39#define SO_BINDTODEVICE 25
40
41/* Socket filtering */
42#define SO_ATTACH_FILTER 26
43#define SO_DETACH_FILTER 27
44#define SO_GET_FILTER SO_ATTACH_FILTER
45
46#define SO_PEERNAME 28
47#define SO_TIMESTAMP 29
48#define SCM_TIMESTAMP SO_TIMESTAMP
49
50#define SO_ACCEPTCONN 30
51
52#define SO_PEERSEC 31
53#define SO_PASSSEC 34
54#define SO_TIMESTAMPNS 35
55#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
56
57#define SO_MARK 36
58
59#define SO_TIMESTAMPING 37
60#define SCM_TIMESTAMPING SO_TIMESTAMPING
61
62#define SO_PROTOCOL 38
63#define SO_DOMAIN 39
64
65#define SO_RXQ_OVFL 40
66
67#define SO_WIFI_STATUS 41
68#define SCM_WIFI_STATUS SO_WIFI_STATUS
69#define SO_PEEK_OFF 42
70
71/* Instruct lower device to use last 4-bytes of skb data as FCS */
72#define SO_NOFCS 43
73
74#define SO_LOCK_FILTER 44
75
76#define SO_SELECT_ERR_QUEUE 45
77
78#define SO_BUSY_POLL 46
79
80#define SO_MAX_PACING_RATE 47
81
82#define SO_BPF_EXTENSIONS 48
83
84#define SO_INCOMING_CPU 49
85
86#define SO_ATTACH_BPF 50
87#define SO_DETACH_BPF SO_DETACH_FILTER
88
89#define SO_ATTACH_REUSEPORT_CBPF 51
90#define SO_ATTACH_REUSEPORT_EBPF 52
91
92#define SO_CNX_ADVICE 53
93
94#define SCM_TIMESTAMPING_OPT_STATS 54
95
96#define SO_MEMINFO 55
97
98#define SO_INCOMING_NAPI_ID 56
99
100#define SO_COOKIE 57
101
102#define SCM_TIMESTAMPING_PKTINFO 58
103
104#define SO_PEERGROUPS 59
105
106#define SO_ZEROCOPY 60
107
108#endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/include/uapi/asm/sockios.h b/arch/mn10300/include/uapi/asm/sockios.h
deleted file mode 100644
index 5706baa3cd0d..000000000000
--- a/arch/mn10300/include/uapi/asm/sockios.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_SOCKIOS_H
3#define _ASM_SOCKIOS_H
4
5/* Socket-level I/O control calls. */
6#define FIOSETOWN 0x8901
7#define SIOCSPGRP 0x8902
8#define FIOGETOWN 0x8903
9#define SIOCGPGRP 0x8904
10#define SIOCATMARK 0x8905
11#define SIOCGSTAMP 0x8906 /* Get stamp */
12#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
13
14#endif /* _ASM_SOCKIOS_H */
diff --git a/arch/mn10300/include/uapi/asm/stat.h b/arch/mn10300/include/uapi/asm/stat.h
deleted file mode 100644
index 769f5f8829d4..000000000000
--- a/arch/mn10300/include/uapi/asm/stat.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_STAT_H
3#define _ASM_STAT_H
4
5struct __old_kernel_stat {
6 unsigned short st_dev;
7 unsigned short st_ino;
8 unsigned short st_mode;
9 unsigned short st_nlink;
10 unsigned short st_uid;
11 unsigned short st_gid;
12 unsigned short st_rdev;
13 unsigned long st_size;
14 unsigned long st_atime;
15 unsigned long st_mtime;
16 unsigned long st_ctime;
17};
18
19struct stat {
20 unsigned long st_dev;
21 unsigned long st_ino;
22 unsigned short st_mode;
23 unsigned short st_nlink;
24 unsigned short st_uid;
25 unsigned short st_gid;
26 unsigned long st_rdev;
27 unsigned long st_size;
28 unsigned long st_blksize;
29 unsigned long st_blocks;
30 unsigned long st_atime;
31 unsigned long st_atime_nsec;
32 unsigned long st_mtime;
33 unsigned long st_mtime_nsec;
34 unsigned long st_ctime;
35 unsigned long st_ctime_nsec;
36 unsigned long __unused4;
37 unsigned long __unused5;
38};
39
40/* This matches struct stat64 in glibc2.1, hence the absolutely
41 * insane amounts of padding around dev_t's.
42 */
43struct stat64 {
44 unsigned long long st_dev;
45 unsigned char __pad0[4];
46
47#define STAT64_HAS_BROKEN_ST_INO 1
48 unsigned long __st_ino;
49
50 unsigned int st_mode;
51 unsigned int st_nlink;
52
53 unsigned long st_uid;
54 unsigned long st_gid;
55
56 unsigned long long st_rdev;
57 unsigned char __pad3[4];
58
59 long long st_size;
60 unsigned long st_blksize;
61
62 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
63 unsigned long __pad4; /* future possible st_blocks high bits */
64
65 unsigned long st_atime;
66 unsigned long st_atime_nsec;
67
68 unsigned long st_mtime;
69 unsigned int st_mtime_nsec;
70
71 unsigned long st_ctime;
72 unsigned long st_ctime_nsec;
73
74 unsigned long long st_ino;
75};
76
77#define STAT_HAVE_NSEC 1
78
79#endif /* _ASM_STAT_H */
diff --git a/arch/mn10300/include/uapi/asm/statfs.h b/arch/mn10300/include/uapi/asm/statfs.h
deleted file mode 100644
index 0b91fe198c20..000000000000
--- a/arch/mn10300/include/uapi/asm/statfs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/statfs.h>
diff --git a/arch/mn10300/include/uapi/asm/swab.h b/arch/mn10300/include/uapi/asm/swab.h
deleted file mode 100644
index d2284dd27ad4..000000000000
--- a/arch/mn10300/include/uapi/asm/swab.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Byte-order primitive construction
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_SWAB_H
13#define _ASM_SWAB_H
14
15#include <linux/types.h>
16
17#ifdef __GNUC__
18
19static inline __attribute__((const))
20__u32 __arch_swab32(__u32 x)
21{
22 __u32 ret;
23 asm("swap %1,%0" : "=r" (ret) : "r" (x));
24 return ret;
25}
26#define __arch_swab32 __arch_swab32
27
28static inline __attribute__((const))
29__u16 __arch_swab16(__u16 x)
30{
31 __u16 ret;
32 asm("swaph %1,%0" : "=r" (ret) : "r" (x));
33 return ret;
34}
35#define __arch_swab32 __arch_swab32
36
37#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
38# define __SWAB_64_THRU_32__
39#endif
40
41#endif /* __GNUC__ */
42
43#endif /* _ASM_SWAB_H */
diff --git a/arch/mn10300/include/uapi/asm/termbits.h b/arch/mn10300/include/uapi/asm/termbits.h
deleted file mode 100644
index fca82ea2ca2c..000000000000
--- a/arch/mn10300/include/uapi/asm/termbits.h
+++ /dev/null
@@ -1,202 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_TERMBITS_H
3#define _ASM_TERMBITS_H
4
5#include <linux/posix_types.h>
6
7typedef unsigned char cc_t;
8typedef unsigned int speed_t;
9typedef unsigned int tcflag_t;
10
11#define NCCS 19
12struct termios {
13 tcflag_t c_iflag; /* input mode flags */
14 tcflag_t c_oflag; /* output mode flags */
15 tcflag_t c_cflag; /* control mode flags */
16 tcflag_t c_lflag; /* local mode flags */
17 cc_t c_line; /* line discipline */
18 cc_t c_cc[NCCS]; /* control characters */
19};
20
21struct termios2 {
22 tcflag_t c_iflag; /* input mode flags */
23 tcflag_t c_oflag; /* output mode flags */
24 tcflag_t c_cflag; /* control mode flags */
25 tcflag_t c_lflag; /* local mode flags */
26 cc_t c_line; /* line discipline */
27 cc_t c_cc[NCCS]; /* control characters */
28 speed_t c_ispeed; /* input speed */
29 speed_t c_ospeed; /* output speed */
30};
31
32struct ktermios {
33 tcflag_t c_iflag; /* input mode flags */
34 tcflag_t c_oflag; /* output mode flags */
35 tcflag_t c_cflag; /* control mode flags */
36 tcflag_t c_lflag; /* local mode flags */
37 cc_t c_line; /* line discipline */
38 cc_t c_cc[NCCS]; /* control characters */
39 speed_t c_ispeed; /* input speed */
40 speed_t c_ospeed; /* output speed */
41};
42
43/* c_cc characters */
44#define VINTR 0
45#define VQUIT 1
46#define VERASE 2
47#define VKILL 3
48#define VEOF 4
49#define VTIME 5
50#define VMIN 6
51#define VSWTC 7
52#define VSTART 8
53#define VSTOP 9
54#define VSUSP 10
55#define VEOL 11
56#define VREPRINT 12
57#define VDISCARD 13
58#define VWERASE 14
59#define VLNEXT 15
60#define VEOL2 16
61
62
63/* c_iflag bits */
64#define IGNBRK 0000001
65#define BRKINT 0000002
66#define IGNPAR 0000004
67#define PARMRK 0000010
68#define INPCK 0000020
69#define ISTRIP 0000040
70#define INLCR 0000100
71#define IGNCR 0000200
72#define ICRNL 0000400
73#define IUCLC 0001000
74#define IXON 0002000
75#define IXANY 0004000
76#define IXOFF 0010000
77#define IMAXBEL 0020000
78#define IUTF8 0040000
79
80/* c_oflag bits */
81#define OPOST 0000001
82#define OLCUC 0000002
83#define ONLCR 0000004
84#define OCRNL 0000010
85#define ONOCR 0000020
86#define ONLRET 0000040
87#define OFILL 0000100
88#define OFDEL 0000200
89#define NLDLY 0000400
90#define NL0 0000000
91#define NL1 0000400
92#define CRDLY 0003000
93#define CR0 0000000
94#define CR1 0001000
95#define CR2 0002000
96#define CR3 0003000
97#define TABDLY 0014000
98#define TAB0 0000000
99#define TAB1 0004000
100#define TAB2 0010000
101#define TAB3 0014000
102#define XTABS 0014000
103#define BSDLY 0020000
104#define BS0 0000000
105#define BS1 0020000
106#define VTDLY 0040000
107#define VT0 0000000
108#define VT1 0040000
109#define FFDLY 0100000
110#define FF0 0000000
111#define FF1 0100000
112
113/* c_cflag bit meaning */
114#define CBAUD 0010017
115#define B0 0000000 /* hang up */
116#define B50 0000001
117#define B75 0000002
118#define B110 0000003
119#define B134 0000004
120#define B150 0000005
121#define B200 0000006
122#define B300 0000007
123#define B600 0000010
124#define B1200 0000011
125#define B1800 0000012
126#define B2400 0000013
127#define B4800 0000014
128#define B9600 0000015
129#define B19200 0000016
130#define B38400 0000017
131#define EXTA B19200
132#define EXTB B38400
133#define CSIZE 0000060
134#define CS5 0000000
135#define CS6 0000020
136#define CS7 0000040
137#define CS8 0000060
138#define CSTOPB 0000100
139#define CREAD 0000200
140#define PARENB 0000400
141#define PARODD 0001000
142#define HUPCL 0002000
143#define CLOCAL 0004000
144#define CBAUDEX 0010000
145#define BOTHER 0010000
146#define B57600 0010001
147#define B115200 0010002
148#define B230400 0010003
149#define B460800 0010004
150#define B500000 0010005
151#define B576000 0010006
152#define B921600 0010007
153#define B1000000 0010010
154#define B1152000 0010011
155#define B1500000 0010012
156#define B2000000 0010013
157#define B2500000 0010014
158#define B3000000 0010015
159#define B3500000 0010016
160#define B4000000 0010017
161#define CIBAUD 002003600000 /* input baud rate (not used) */
162#define CTVB 004000000000 /* VisioBraille Terminal flow control */
163#define CMSPAR 010000000000 /* mark or space (stick) parity */
164#define CRTSCTS 020000000000 /* flow control */
165
166#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
167
168/* c_lflag bits */
169#define ISIG 0000001
170#define ICANON 0000002
171#define XCASE 0000004
172#define ECHO 0000010
173#define ECHOE 0000020
174#define ECHOK 0000040
175#define ECHONL 0000100
176#define NOFLSH 0000200
177#define TOSTOP 0000400
178#define ECHOCTL 0001000
179#define ECHOPRT 0002000
180#define ECHOKE 0004000
181#define FLUSHO 0010000
182#define PENDIN 0040000
183#define IEXTEN 0100000
184#define EXTPROC 0200000
185
186/* tcflow() and TCXONC use these */
187#define TCOOFF 0
188#define TCOON 1
189#define TCIOFF 2
190#define TCION 3
191
192/* tcflush() and TCFLSH use these */
193#define TCIFLUSH 0
194#define TCOFLUSH 1
195#define TCIOFLUSH 2
196
197/* tcsetattr uses these */
198#define TCSANOW 0
199#define TCSADRAIN 1
200#define TCSAFLUSH 2
201
202#endif /* _ASM_TERMBITS_H */
diff --git a/arch/mn10300/include/uapi/asm/termios.h b/arch/mn10300/include/uapi/asm/termios.h
deleted file mode 100644
index 25981aadb8cd..000000000000
--- a/arch/mn10300/include/uapi/asm/termios.h
+++ /dev/null
@@ -1,84 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _UAPI_ASM_TERMIOS_H
3#define _UAPI_ASM_TERMIOS_H
4
5#include <asm/termbits.h>
6#include <asm/ioctls.h>
7
8struct winsize {
9 unsigned short ws_row;
10 unsigned short ws_col;
11 unsigned short ws_xpixel;
12 unsigned short ws_ypixel;
13};
14
15#define NCC 8
16struct termio {
17 unsigned short c_iflag; /* input mode flags */
18 unsigned short c_oflag; /* output mode flags */
19 unsigned short c_cflag; /* control mode flags */
20 unsigned short c_lflag; /* local mode flags */
21 unsigned char c_line; /* line discipline */
22 unsigned char c_cc[NCC]; /* control characters */
23};
24
25
26/* modem lines */
27#define TIOCM_LE 0x001
28#define TIOCM_DTR 0x002
29#define TIOCM_RTS 0x004
30#define TIOCM_ST 0x008
31#define TIOCM_SR 0x010
32#define TIOCM_CTS 0x020
33#define TIOCM_CAR 0x040
34#define TIOCM_RNG 0x080
35#define TIOCM_DSR 0x100
36#define TIOCM_CD TIOCM_CAR
37#define TIOCM_RI TIOCM_RNG
38#define TIOCM_OUT1 0x2000
39#define TIOCM_OUT2 0x4000
40#define TIOCM_LOOP 0x8000
41
42#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
43
44/*
45 * Translate a "termio" structure into a "termios". Ugh.
46 */
47#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
48 unsigned short __tmp; \
49 get_user(__tmp, &(termio)->x); \
50 *(unsigned short *) &(termios)->x = __tmp; \
51}
52
53#define user_termio_to_kernel_termios(termios, termio) \
54({ \
55 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
56 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
57 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
58 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
59 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
60})
61
62/*
63 * Translate a "termios" structure into a "termio". Ugh.
64 */
65#define kernel_termios_to_user_termio(termio, termios) \
66({ \
67 put_user((termios)->c_iflag, &(termio)->c_iflag); \
68 put_user((termios)->c_oflag, &(termio)->c_oflag); \
69 put_user((termios)->c_cflag, &(termio)->c_cflag); \
70 put_user((termios)->c_lflag, &(termio)->c_lflag); \
71 put_user((termios)->c_line, &(termio)->c_line); \
72 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
73})
74
75#define user_termios_to_kernel_termios(k, u) \
76 copy_from_user(k, u, sizeof(struct termios2))
77#define kernel_termios_to_user_termios(u, k) \
78 copy_to_user(u, k, sizeof(struct termios2))
79#define user_termios_to_kernel_termios_1(k, u) \
80 copy_from_user(k, u, sizeof(struct termios))
81#define kernel_termios_to_user_termios_1(u, k) \
82 copy_to_user(u, k, sizeof(struct termios))
83
84#endif /* _UAPI_ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/uapi/asm/types.h b/arch/mn10300/include/uapi/asm/types.h
deleted file mode 100644
index 7d2a697e2937..000000000000
--- a/arch/mn10300/include/uapi/asm/types.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 Basic type definitions
3 *
4 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
5 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <asm-generic/int-ll64.h>
diff --git a/arch/mn10300/include/uapi/asm/unistd.h b/arch/mn10300/include/uapi/asm/unistd.h
deleted file mode 100644
index c0c96b650692..000000000000
--- a/arch/mn10300/include/uapi/asm/unistd.h
+++ /dev/null
@@ -1,355 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2/* MN10300 System call number list
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _UAPI_ASM_UNISTD_H
13#define _UAPI_ASM_UNISTD_H
14
15#define __NR_restart_syscall 0
16#define __NR_exit 1
17#define __NR_fork 2
18#define __NR_read 3
19#define __NR_write 4
20#define __NR_open 5
21#define __NR_close 6
22#define __NR_waitpid 7
23#define __NR_creat 8
24#define __NR_link 9
25#define __NR_unlink 10
26#define __NR_execve 11
27#define __NR_chdir 12
28#define __NR_time 13
29#define __NR_mknod 14
30#define __NR_chmod 15
31#define __NR_lchown 16
32#define __NR_break 17
33#define __NR_oldstat 18
34#define __NR_lseek 19
35#define __NR_getpid 20
36#define __NR_mount 21
37#define __NR_umount 22
38#define __NR_setuid 23
39#define __NR_getuid 24
40#define __NR_stime 25
41#define __NR_ptrace 26
42#define __NR_alarm 27
43#define __NR_oldfstat 28
44#define __NR_pause 29
45#define __NR_utime 30
46#define __NR_stty 31
47#define __NR_gtty 32
48#define __NR_access 33
49#define __NR_nice 34
50#define __NR_ftime 35
51#define __NR_sync 36
52#define __NR_kill 37
53#define __NR_rename 38
54#define __NR_mkdir 39
55#define __NR_rmdir 40
56#define __NR_dup 41
57#define __NR_pipe 42
58#define __NR_times 43
59#define __NR_prof 44
60#define __NR_brk 45
61#define __NR_setgid 46
62#define __NR_getgid 47
63#define __NR_signal 48
64#define __NR_geteuid 49
65#define __NR_getegid 50
66#define __NR_acct 51
67#define __NR_umount2 52
68#define __NR_lock 53
69#define __NR_ioctl 54
70#define __NR_fcntl 55
71#define __NR_mpx 56
72#define __NR_setpgid 57
73#define __NR_ulimit 58
74#define __NR_oldolduname 59
75#define __NR_umask 60
76#define __NR_chroot 61
77#define __NR_ustat 62
78#define __NR_dup2 63
79#define __NR_getppid 64
80#define __NR_getpgrp 65
81#define __NR_setsid 66
82#define __NR_sigaction 67
83#define __NR_sgetmask 68
84#define __NR_ssetmask 69
85#define __NR_setreuid 70
86#define __NR_setregid 71
87#define __NR_sigsuspend 72
88#define __NR_sigpending 73
89#define __NR_sethostname 74
90#define __NR_setrlimit 75
91#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
92#define __NR_getrusage 77
93#define __NR_gettimeofday 78
94#define __NR_settimeofday 79
95#define __NR_getgroups 80
96#define __NR_setgroups 81
97#define __NR_select 82
98#define __NR_symlink 83
99#define __NR_oldlstat 84
100#define __NR_readlink 85
101#define __NR_uselib 86
102#define __NR_swapon 87
103#define __NR_reboot 88
104#define __NR_readdir 89
105#define __NR_mmap 90
106#define __NR_munmap 91
107#define __NR_truncate 92
108#define __NR_ftruncate 93
109#define __NR_fchmod 94
110#define __NR_fchown 95
111#define __NR_getpriority 96
112#define __NR_setpriority 97
113#define __NR_profil 98
114#define __NR_statfs 99
115#define __NR_fstatfs 100
116#define __NR_ioperm 101
117#define __NR_socketcall 102
118#define __NR_syslog 103
119#define __NR_setitimer 104
120#define __NR_getitimer 105
121#define __NR_stat 106
122#define __NR_lstat 107
123#define __NR_fstat 108
124#define __NR_olduname 109
125#define __NR_iopl 110
126#define __NR_vhangup 111
127#define __NR_idle 112
128#define __NR_vm86old 113
129#define __NR_wait4 114
130#define __NR_swapoff 115
131#define __NR_sysinfo 116
132#define __NR_ipc 117
133#define __NR_fsync 118
134#define __NR_sigreturn 119
135#define __NR_clone 120
136#define __NR_setdomainname 121
137#define __NR_uname 122
138#define __NR_modify_ldt 123
139#define __NR_adjtimex 124
140#define __NR_mprotect 125
141#define __NR_sigprocmask 126
142#define __NR_create_module 127
143#define __NR_init_module 128
144#define __NR_delete_module 129
145#define __NR_get_kernel_syms 130
146#define __NR_quotactl 131
147#define __NR_getpgid 132
148#define __NR_fchdir 133
149#define __NR_bdflush 134
150#define __NR_sysfs 135
151#define __NR_personality 136
152#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
153#define __NR_setfsuid 138
154#define __NR_setfsgid 139
155#define __NR__llseek 140
156#define __NR_getdents 141
157#define __NR__newselect 142
158#define __NR_flock 143
159#define __NR_msync 144
160#define __NR_readv 145
161#define __NR_writev 146
162#define __NR_getsid 147
163#define __NR_fdatasync 148
164#define __NR__sysctl 149
165#define __NR_mlock 150
166#define __NR_munlock 151
167#define __NR_mlockall 152
168#define __NR_munlockall 153
169#define __NR_sched_setparam 154
170#define __NR_sched_getparam 155
171#define __NR_sched_setscheduler 156
172#define __NR_sched_getscheduler 157
173#define __NR_sched_yield 158
174#define __NR_sched_get_priority_max 159
175#define __NR_sched_get_priority_min 160
176#define __NR_sched_rr_get_interval 161
177#define __NR_nanosleep 162
178#define __NR_mremap 163
179#define __NR_setresuid 164
180#define __NR_getresuid 165
181#define __NR_vm86 166
182#define __NR_query_module 167
183#define __NR_poll 168
184#define __NR_nfsservctl 169
185#define __NR_setresgid 170
186#define __NR_getresgid 171
187#define __NR_prctl 172
188#define __NR_rt_sigreturn 173
189#define __NR_rt_sigaction 174
190#define __NR_rt_sigprocmask 175
191#define __NR_rt_sigpending 176
192#define __NR_rt_sigtimedwait 177
193#define __NR_rt_sigqueueinfo 178
194#define __NR_rt_sigsuspend 179
195#define __NR_pread64 180
196#define __NR_pwrite64 181
197#define __NR_chown 182
198#define __NR_getcwd 183
199#define __NR_capget 184
200#define __NR_capset 185
201#define __NR_sigaltstack 186
202#define __NR_sendfile 187
203#define __NR_getpmsg 188 /* some people actually want streams */
204#define __NR_putpmsg 189 /* some people actually want streams */
205#define __NR_vfork 190
206#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
207#define __NR_mmap2 192
208#define __NR_truncate64 193
209#define __NR_ftruncate64 194
210#define __NR_stat64 195
211#define __NR_lstat64 196
212#define __NR_fstat64 197
213#define __NR_lchown32 198
214#define __NR_getuid32 199
215#define __NR_getgid32 200
216#define __NR_geteuid32 201
217#define __NR_getegid32 202
218#define __NR_setreuid32 203
219#define __NR_setregid32 204
220#define __NR_getgroups32 205
221#define __NR_setgroups32 206
222#define __NR_fchown32 207
223#define __NR_setresuid32 208
224#define __NR_getresuid32 209
225#define __NR_setresgid32 210
226#define __NR_getresgid32 211
227#define __NR_chown32 212
228#define __NR_setuid32 213
229#define __NR_setgid32 214
230#define __NR_setfsuid32 215
231#define __NR_setfsgid32 216
232#define __NR_pivot_root 217
233#define __NR_mincore 218
234#define __NR_madvise 219
235#define __NR_madvise1 219 /* delete when C lib stub is removed */
236#define __NR_getdents64 220
237#define __NR_fcntl64 221
238/* 223 is unused */
239#define __NR_gettid 224
240#define __NR_readahead 225
241#define __NR_setxattr 226
242#define __NR_lsetxattr 227
243#define __NR_fsetxattr 228
244#define __NR_getxattr 229
245#define __NR_lgetxattr 230
246#define __NR_fgetxattr 231
247#define __NR_listxattr 232
248#define __NR_llistxattr 233
249#define __NR_flistxattr 234
250#define __NR_removexattr 235
251#define __NR_lremovexattr 236
252#define __NR_fremovexattr 237
253#define __NR_tkill 238
254#define __NR_sendfile64 239
255#define __NR_futex 240
256#define __NR_sched_setaffinity 241
257#define __NR_sched_getaffinity 242
258#define __NR_set_thread_area 243
259#define __NR_get_thread_area 244
260#define __NR_io_setup 245
261#define __NR_io_destroy 246
262#define __NR_io_getevents 247
263#define __NR_io_submit 248
264#define __NR_io_cancel 249
265#define __NR_fadvise64 250
266
267#define __NR_exit_group 252
268#define __NR_lookup_dcookie 253
269#define __NR_epoll_create 254
270#define __NR_epoll_ctl 255
271#define __NR_epoll_wait 256
272#define __NR_remap_file_pages 257
273#define __NR_set_tid_address 258
274#define __NR_timer_create 259
275#define __NR_timer_settime (__NR_timer_create+1)
276#define __NR_timer_gettime (__NR_timer_create+2)
277#define __NR_timer_getoverrun (__NR_timer_create+3)
278#define __NR_timer_delete (__NR_timer_create+4)
279#define __NR_clock_settime (__NR_timer_create+5)
280#define __NR_clock_gettime (__NR_timer_create+6)
281#define __NR_clock_getres (__NR_timer_create+7)
282#define __NR_clock_nanosleep (__NR_timer_create+8)
283#define __NR_statfs64 268
284#define __NR_fstatfs64 269
285#define __NR_tgkill 270
286#define __NR_utimes 271
287#define __NR_fadvise64_64 272
288#define __NR_vserver 273
289#define __NR_mbind 274
290#define __NR_get_mempolicy 275
291#define __NR_set_mempolicy 276
292#define __NR_mq_open 277
293#define __NR_mq_unlink (__NR_mq_open+1)
294#define __NR_mq_timedsend (__NR_mq_open+2)
295#define __NR_mq_timedreceive (__NR_mq_open+3)
296#define __NR_mq_notify (__NR_mq_open+4)
297#define __NR_mq_getsetattr (__NR_mq_open+5)
298#define __NR_kexec_load 283
299#define __NR_waitid 284
300#define __NR_add_key 286
301#define __NR_request_key 287
302#define __NR_keyctl 288
303#define __NR_cacheflush 289
304#define __NR_ioprio_set 290
305#define __NR_ioprio_get 291
306#define __NR_inotify_init 292
307#define __NR_inotify_add_watch 293
308#define __NR_inotify_rm_watch 294
309#define __NR_migrate_pages 295
310#define __NR_openat 296
311#define __NR_mkdirat 297
312#define __NR_mknodat 298
313#define __NR_fchownat 299
314#define __NR_futimesat 300
315#define __NR_fstatat64 301
316#define __NR_unlinkat 302
317#define __NR_renameat 303
318#define __NR_linkat 304
319#define __NR_symlinkat 305
320#define __NR_readlinkat 306
321#define __NR_fchmodat 307
322#define __NR_faccessat 308
323#define __NR_pselect6 309
324#define __NR_ppoll 310
325#define __NR_unshare 311
326#define __NR_set_robust_list 312
327#define __NR_get_robust_list 313
328#define __NR_splice 314
329#define __NR_sync_file_range 315
330#define __NR_tee 316
331#define __NR_vmsplice 317
332#define __NR_move_pages 318
333#define __NR_getcpu 319
334#define __NR_epoll_pwait 320
335#define __NR_utimensat 321
336#define __NR_signalfd 322
337#define __NR_timerfd_create 323
338#define __NR_eventfd 324
339#define __NR_fallocate 325
340#define __NR_timerfd_settime 326
341#define __NR_timerfd_gettime 327
342#define __NR_signalfd4 328
343#define __NR_eventfd2 329
344#define __NR_epoll_create1 330
345#define __NR_dup3 331
346#define __NR_pipe2 332
347#define __NR_inotify_init1 333
348#define __NR_preadv 334
349#define __NR_pwritev 335
350#define __NR_rt_tgsigqueueinfo 336
351#define __NR_perf_event_open 337
352#define __NR_recvmmsg 338
353#define __NR_setns 339
354
355#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
deleted file mode 100644
index de32af0e4b6e..000000000000
--- a/arch/mn10300/kernel/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the MN10300-specific core kernel code
4#
5extra-y := head.o vmlinux.lds
6
7fpu-obj-y := fpu-nofpu.o fpu-nofpu-low.o
8fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o
9
10obj-y := process.o signal.o entry.o traps.o irq.o \
11 ptrace.o setup.o time.o sys_mn10300.o io.o \
12 switch_to.o mn10300_ksyms.o $(fpu-obj-y) \
13 csrc-mn10300.o cevt-mn10300.o
14
15obj-$(CONFIG_SMP) += smp.o smp-low.o
16
17obj-$(CONFIG_MN10300_WD_TIMER) += mn10300-watchdog.o mn10300-watchdog-low.o
18
19obj-$(CONFIG_MN10300_TTYSM) += mn10300-serial.o mn10300-serial-low.o \
20 mn10300-debug.o
21obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-low.o
22obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o
23obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o
24
25obj-$(CONFIG_MN10300_RTC) += rtc.o
26obj-$(CONFIG_PROFILE) += profile.o profile-low.o
27obj-$(CONFIG_MODULES) += module.o
28obj-$(CONFIG_KPROBES) += kprobes.o
29obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c
deleted file mode 100644
index 57e6cc96267b..000000000000
--- a/arch/mn10300/kernel/asm-offsets.c
+++ /dev/null
@@ -1,108 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Generate definitions needed by assembly language modules.
4 * This code generates raw asm output which is post-processed
5 * to extract and format the required data.
6 */
7
8#include <linux/sched.h>
9#include <linux/signal.h>
10#include <linux/personality.h>
11#include <linux/kbuild.h>
12#include <asm/ucontext.h>
13#include <asm/processor.h>
14#include <asm/thread_info.h>
15#include <asm/ptrace.h>
16#include "sigframe.h"
17#include "mn10300-serial.h"
18
19void foo(void)
20{
21 OFFSET(SIGCONTEXT_d0, sigcontext, d0);
22 OFFSET(SIGCONTEXT_d1, sigcontext, d1);
23 BLANK();
24
25 OFFSET(TI_task, thread_info, task);
26 OFFSET(TI_frame, thread_info, frame);
27 OFFSET(TI_flags, thread_info, flags);
28 OFFSET(TI_cpu, thread_info, cpu);
29 OFFSET(TI_preempt_count, thread_info, preempt_count);
30 OFFSET(TI_addr_limit, thread_info, addr_limit);
31 BLANK();
32
33 OFFSET(REG_D0, pt_regs, d0);
34 OFFSET(REG_D1, pt_regs, d1);
35 OFFSET(REG_D2, pt_regs, d2);
36 OFFSET(REG_D3, pt_regs, d3);
37 OFFSET(REG_A0, pt_regs, a0);
38 OFFSET(REG_A1, pt_regs, a1);
39 OFFSET(REG_A2, pt_regs, a2);
40 OFFSET(REG_A3, pt_regs, a3);
41 OFFSET(REG_E0, pt_regs, e0);
42 OFFSET(REG_E1, pt_regs, e1);
43 OFFSET(REG_E2, pt_regs, e2);
44 OFFSET(REG_E3, pt_regs, e3);
45 OFFSET(REG_E4, pt_regs, e4);
46 OFFSET(REG_E5, pt_regs, e5);
47 OFFSET(REG_E6, pt_regs, e6);
48 OFFSET(REG_E7, pt_regs, e7);
49 OFFSET(REG_SP, pt_regs, sp);
50 OFFSET(REG_EPSW, pt_regs, epsw);
51 OFFSET(REG_PC, pt_regs, pc);
52 OFFSET(REG_LAR, pt_regs, lar);
53 OFFSET(REG_LIR, pt_regs, lir);
54 OFFSET(REG_MDR, pt_regs, mdr);
55 OFFSET(REG_MCVF, pt_regs, mcvf);
56 OFFSET(REG_MCRL, pt_regs, mcrl);
57 OFFSET(REG_MCRH, pt_regs, mcrh);
58 OFFSET(REG_MDRQ, pt_regs, mdrq);
59 OFFSET(REG_ORIG_D0, pt_regs, orig_d0);
60 OFFSET(REG_NEXT, pt_regs, next);
61 DEFINE(REG__END, sizeof(struct pt_regs));
62 BLANK();
63
64 OFFSET(THREAD_UREGS, thread_struct, uregs);
65 OFFSET(THREAD_PC, thread_struct, pc);
66 OFFSET(THREAD_SP, thread_struct, sp);
67 OFFSET(THREAD_A3, thread_struct, a3);
68 OFFSET(THREAD_USP, thread_struct, usp);
69#ifdef CONFIG_FPU
70 OFFSET(THREAD_FPU_FLAGS, thread_struct, fpu_flags);
71 OFFSET(THREAD_FPU_STATE, thread_struct, fpu_state);
72 DEFINE(__THREAD_USING_FPU, THREAD_USING_FPU);
73 DEFINE(__THREAD_HAS_FPU, THREAD_HAS_FPU);
74#endif /* CONFIG_FPU */
75 BLANK();
76
77 OFFSET(TASK_THREAD, task_struct, thread);
78 BLANK();
79
80 DEFINE(CLONE_VM_asm, CLONE_VM);
81 DEFINE(CLONE_FS_asm, CLONE_FS);
82 DEFINE(CLONE_FILES_asm, CLONE_FILES);
83 DEFINE(CLONE_SIGHAND_asm, CLONE_SIGHAND);
84 DEFINE(CLONE_UNTRACED_asm, CLONE_UNTRACED);
85 DEFINE(SIGCHLD_asm, SIGCHLD);
86 BLANK();
87
88 OFFSET(RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);
89
90 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
91
92 OFFSET(__rx_buffer, mn10300_serial_port, rx_buffer);
93 OFFSET(__rx_inp, mn10300_serial_port, rx_inp);
94 OFFSET(__rx_outp, mn10300_serial_port, rx_outp);
95 OFFSET(__uart_state, mn10300_serial_port, uart.state);
96 OFFSET(__tx_xchar, mn10300_serial_port, tx_xchar);
97 OFFSET(__tx_flags, mn10300_serial_port, tx_flags);
98 OFFSET(__intr_flags, mn10300_serial_port, intr_flags);
99 OFFSET(__rx_icr, mn10300_serial_port, rx_icr);
100 OFFSET(__tx_icr, mn10300_serial_port, tx_icr);
101 OFFSET(__tm_icr, mn10300_serial_port, _tmicr);
102 OFFSET(__iobase, mn10300_serial_port, _iobase);
103
104 DEFINE(__UART_XMIT_SIZE, UART_XMIT_SIZE);
105 OFFSET(__xmit_buffer, uart_state, xmit.buf);
106 OFFSET(__xmit_head, uart_state, xmit.head);
107 OFFSET(__xmit_tail, uart_state, xmit.tail);
108}
diff --git a/arch/mn10300/kernel/cevt-mn10300.c b/arch/mn10300/kernel/cevt-mn10300.c
deleted file mode 100644
index 2b21bbc9efa4..000000000000
--- a/arch/mn10300/kernel/cevt-mn10300.c
+++ /dev/null
@@ -1,137 +0,0 @@
1/* MN10300 clockevents
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/clockchips.h>
12#include <linux/interrupt.h>
13#include <linux/percpu.h>
14#include <linux/smp.h>
15#include <asm/timex.h>
16#include "internal.h"
17
18#ifdef CONFIG_SMP
19#if (CONFIG_NR_CPUS > 2) && !defined(CONFIG_GEENERIC_CLOCKEVENTS_BROADCAST)
20#error "This doesn't scale well! Need per-core local timers."
21#endif
22#else /* CONFIG_SMP */
23#define stop_jiffies_counter1()
24#define reload_jiffies_counter1(x)
25#define TMJC1IRQ TMJCIRQ
26#endif
27
28
29static int next_event(unsigned long delta,
30 struct clock_event_device *evt)
31{
32 unsigned int cpu = smp_processor_id();
33
34 if (cpu == 0) {
35 stop_jiffies_counter();
36 reload_jiffies_counter(delta - 1);
37 } else {
38 stop_jiffies_counter1();
39 reload_jiffies_counter1(delta - 1);
40 }
41 return 0;
42}
43
44static DEFINE_PER_CPU(struct clock_event_device, mn10300_clockevent_device);
45static DEFINE_PER_CPU(struct irqaction, timer_irq);
46
47static irqreturn_t timer_interrupt(int irq, void *dev_id)
48{
49 struct clock_event_device *cd;
50 unsigned int cpu = smp_processor_id();
51
52 if (cpu == 0)
53 stop_jiffies_counter();
54 else
55 stop_jiffies_counter1();
56
57 cd = &per_cpu(mn10300_clockevent_device, cpu);
58 cd->event_handler(cd);
59
60 return IRQ_HANDLED;
61}
62
63static void event_handler(struct clock_event_device *dev)
64{
65}
66
67static inline void setup_jiffies_interrupt(int irq,
68 struct irqaction *action)
69{
70 u16 tmp;
71 setup_irq(irq, action);
72 set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
73 GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
74 tmp = GxICR(irq);
75}
76
77int __init init_clockevents(void)
78{
79 struct clock_event_device *cd;
80 struct irqaction *iact;
81 unsigned int cpu = smp_processor_id();
82
83 cd = &per_cpu(mn10300_clockevent_device, cpu);
84
85 if (cpu == 0) {
86 stop_jiffies_counter();
87 cd->irq = TMJCIRQ;
88 } else {
89 stop_jiffies_counter1();
90 cd->irq = TMJC1IRQ;
91 }
92
93 cd->name = "Timestamp";
94 cd->features = CLOCK_EVT_FEAT_ONESHOT;
95
96 /* Calculate shift/mult. We want to spawn at least 1 second */
97 clockevents_calc_mult_shift(cd, MN10300_JCCLK, 1);
98
99 /* Calculate the min / max delta */
100 cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd);
101 cd->max_delta_ticks = TMJCBR_MAX;
102 cd->min_delta_ns = clockevent_delta2ns(100, cd);
103 cd->min_delta_ticks = 100;
104
105 cd->rating = 200;
106 cd->cpumask = cpumask_of(smp_processor_id());
107 cd->event_handler = event_handler;
108 cd->set_next_event = next_event;
109
110 iact = &per_cpu(timer_irq, cpu);
111 iact->flags = IRQF_SHARED | IRQF_TIMER;
112 iact->handler = timer_interrupt;
113
114 clockevents_register_device(cd);
115
116#if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
117 /* setup timer irq affinity so it only runs on this cpu */
118 {
119 struct irq_data *data;
120 data = irq_get_irq_data(cd->irq);
121 cpumask_copy(irq_data_get_affinity_mask(data), cpumask_of(cpu));
122 iact->flags |= IRQF_NOBALANCING;
123 }
124#endif
125
126 if (cpu == 0) {
127 reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
128 iact->name = "CPU0 Timer";
129 } else {
130 reload_jiffies_counter1(MN10300_JC_PER_HZ - 1);
131 iact->name = "CPU1 Timer";
132 }
133
134 setup_jiffies_interrupt(cd->irq, iact);
135
136 return 0;
137}
diff --git a/arch/mn10300/kernel/csrc-mn10300.c b/arch/mn10300/kernel/csrc-mn10300.c
deleted file mode 100644
index 6b74df3661f2..000000000000
--- a/arch/mn10300/kernel/csrc-mn10300.c
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN10300 clocksource
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/clocksource.h>
12#include <linux/init.h>
13#include <asm/timex.h>
14#include "internal.h"
15
16static u64 mn10300_read(struct clocksource *cs)
17{
18 return read_timestamp_counter();
19}
20
21static struct clocksource clocksource_mn10300 = {
22 .name = "TSC",
23 .rating = 200,
24 .read = mn10300_read,
25 .mask = CLOCKSOURCE_MASK(32),
26 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
27};
28
29int __init init_clocksource(void)
30{
31 startup_timestamp_counter();
32 clocksource_register_hz(&clocksource_mn10300, MN10300_TSCCLK);
33 return 0;
34}
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
deleted file mode 100644
index 177d61de51c9..000000000000
--- a/arch/mn10300/kernel/entry.S
+++ /dev/null
@@ -1,772 +0,0 @@
1###############################################################################
2#
3# MN10300 Exception and interrupt entry points
4#
5# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
6# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
7# Modified by David Howells (dhowells@redhat.com)
8#
9# This program is free software; you can redistribute it and/or
10# modify it under the terms of the GNU General Public Licence
11# as published by the Free Software Foundation; either version
12# 2 of the Licence, or (at your option) any later version.
13#
14###############################################################################
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/smp.h>
18#include <asm/irqflags.h>
19#include <asm/thread_info.h>
20#include <asm/intctl-regs.h>
21#include <asm/busctl-regs.h>
22#include <asm/timer-regs.h>
23#include <unit/leds.h>
24#include <asm/page.h>
25#include <asm/pgtable.h>
26#include <asm/errno.h>
27#include <asm/asm-offsets.h>
28#include <asm/frame.inc>
29
30#if defined(CONFIG_SMP) && defined(CONFIG_GDBSTUB)
31#include <asm/gdb-stub.h>
32#endif /* CONFIG_SMP && CONFIG_GDBSTUB */
33
34#ifdef CONFIG_PREEMPT
35#define preempt_stop LOCAL_IRQ_DISABLE
36#else
37#define preempt_stop
38#define resume_kernel restore_all
39#endif
40
41 .am33_2
42
43###############################################################################
44#
45# the return path for a forked child
46# - on entry, D0 holds the address of the previous task to run
47#
48###############################################################################
49ENTRY(ret_from_fork)
50 call schedule_tail[],0
51 GET_THREAD_INFO a2
52
53 # return 0 to indicate child process
54 clr d0
55 mov d0,(REG_D0,fp)
56 jmp syscall_exit
57
58ENTRY(ret_from_kernel_thread)
59 call schedule_tail[],0
60 mov (REG_D0,fp),d0
61 mov (REG_A0,fp),a0
62 calls (a0)
63 GET_THREAD_INFO a2 # A2 must be set on return from sys_exit()
64 clr d0
65 mov d0,(REG_D0,fp)
66 jmp syscall_exit
67
68###############################################################################
69#
70# system call handler
71#
72###############################################################################
73ENTRY(system_call)
74 add -4,sp
75 SAVE_ALL
76 mov d0,(REG_ORIG_D0,fp)
77 GET_THREAD_INFO a2
78 cmp nr_syscalls,d0
79 bcc syscall_badsys
80 btst _TIF_SYSCALL_TRACE,(TI_flags,a2)
81 bne syscall_entry_trace
82syscall_call:
83 add d0,d0,a1
84 add a1,a1
85 mov (REG_A0,fp),d0
86 mov (sys_call_table,a1),a0
87 calls (a0)
88 mov d0,(REG_D0,fp)
89syscall_exit:
90 # make sure we don't miss an interrupt setting need_resched or
91 # sigpending between sampling and the rti
92 LOCAL_IRQ_DISABLE
93 mov (TI_flags,a2),d2
94 btst _TIF_ALLWORK_MASK,d2
95 bne syscall_exit_work
96restore_all:
97 RESTORE_ALL
98
99###############################################################################
100#
101# perform work that needs to be done immediately before resumption and syscall
102# tracing
103#
104###############################################################################
105 ALIGN
106syscall_exit_work:
107 mov (REG_EPSW,fp),d0
108 and EPSW_nSL,d0
109 beq resume_kernel # returning to supervisor mode
110
111 LOCAL_IRQ_ENABLE # could let syscall_trace_exit() call
112 # schedule() instead
113 btst _TIF_SYSCALL_TRACE,d2
114 beq work_pending
115 mov fp,d0
116 call syscall_trace_exit[],0 # do_syscall_trace(regs)
117 jmp resume_userspace
118
119 ALIGN
120work_pending:
121 btst _TIF_NEED_RESCHED,d2
122 beq work_notifysig
123
124work_resched:
125 call schedule[],0
126
127resume_userspace:
128 # make sure we don't miss an interrupt setting need_resched or
129 # sigpending between sampling and the rti
130 LOCAL_IRQ_DISABLE
131
132 # is there any work to be done other than syscall tracing?
133 mov (TI_flags,a2),d2
134 btst _TIF_WORK_MASK,d2
135 beq restore_all
136
137 LOCAL_IRQ_ENABLE
138 btst _TIF_NEED_RESCHED,d2
139 bne work_resched
140
141 # deal with pending signals and notify-resume requests
142work_notifysig:
143 mov fp,d0
144 mov d2,d1
145 call do_notify_resume[],0
146 jmp resume_userspace
147
148 # perform syscall entry tracing
149syscall_entry_trace:
150 mov -ENOSYS,d0
151 mov d0,(REG_D0,fp)
152 mov fp,d0
153 call syscall_trace_entry[],0 # returns the syscall number to actually use
154 mov (REG_D1,fp),d1
155 cmp nr_syscalls,d0
156 bcs syscall_call
157 jmp syscall_exit
158
159syscall_badsys:
160 mov -ENOSYS,d0
161 mov d0,(REG_D0,fp)
162 jmp resume_userspace
163
164 # userspace resumption stub bypassing syscall exit tracing
165 .globl ret_from_exception, ret_from_intr
166 ALIGN
167ret_from_exception:
168 preempt_stop
169ret_from_intr:
170 GET_THREAD_INFO a2
171 mov (REG_EPSW,fp),d0 # need to deliver signals before
172 # returning to userspace
173 and EPSW_nSL,d0
174 bne resume_userspace # returning to userspace
175
176#ifdef CONFIG_PREEMPT
177resume_kernel:
178 LOCAL_IRQ_DISABLE
179 mov (TI_preempt_count,a2),d0 # non-zero preempt_count ?
180 cmp 0,d0
181 bne restore_all
182
183need_resched:
184 btst _TIF_NEED_RESCHED,(TI_flags,a2)
185 beq restore_all
186 mov (REG_EPSW,fp),d0
187 and EPSW_IM,d0
188 cmp EPSW_IM_7,d0 # interrupts off (exception path) ?
189 bne restore_all
190 call preempt_schedule_irq[],0
191 jmp need_resched
192#else
193 jmp resume_kernel
194#endif
195
196
197###############################################################################
198#
199# IRQ handler entry point
200# - intended to be entered at multiple priorities
201#
202###############################################################################
203ENTRY(irq_handler)
204 add -4,sp
205 SAVE_ALL
206
207 # it's not a syscall
208 mov 0xffffffff,d0
209 mov d0,(REG_ORIG_D0,fp)
210
211 mov fp,d0
212 call do_IRQ[],0 # do_IRQ(regs)
213
214 jmp ret_from_intr
215
216###############################################################################
217#
218# Double Fault handler entry point
219# - note that there will not be a stack, D0/A0 will hold EPSW/PC as were
220#
221###############################################################################
222 .section .bss
223 .balign THREAD_SIZE
224 .space THREAD_SIZE
225__df_stack:
226 .previous
227
228ENTRY(double_fault)
229 mov a0,(__df_stack-4) # PC as was
230 mov d0,(__df_stack-8) # EPSW as was
231 mn10300_set_dbfleds # display 'db-f' on the LEDs
232 mov 0xaa55aa55,d0
233 mov d0,(__df_stack-12) # no ORIG_D0
234 mov sp,a0 # save corrupted SP
235 mov __df_stack-12,sp # emergency supervisor stack
236 SAVE_ALL
237 mov a0,(REG_A0,fp) # save corrupted SP as A0 (which got
238 # clobbered by the CPU)
239 mov fp,d0
240 calls do_double_fault
241double_fault_loop:
242 bra double_fault_loop
243
244###############################################################################
245#
246# Bus Error handler entry point
247# - handle external (async) bus errors separately
248#
249###############################################################################
250ENTRY(raw_bus_error)
251 add -4,sp
252 mov d0,(sp)
253#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
254 mov (MMUCTR),d0
255 mov d0,(MMUCTR)
256#endif
257 mov (BCBERR),d0 # what
258 btst BCBERR_BEMR_DMA,d0 # see if it was an external bus error
259 beq __common_exception_aux # it wasn't
260
261 SAVE_ALL
262 mov (BCBEAR),d1 # destination of erroneous access
263
264 mov (REG_ORIG_D0,fp),d2
265 mov d2,(REG_D0,fp)
266 mov -1,d2
267 mov d2,(REG_ORIG_D0,fp)
268
269 add -4,sp
270 mov fp,(12,sp) # frame pointer
271 call io_bus_error[],0
272 jmp restore_all
273
274###############################################################################
275#
276# NMI exception entry points
277#
278# This is used by ordinary interrupt channels that have the GxICR_NMI bit set
279# in addition to the main NMI and Watchdog channels. SMP NMI IPIs use this
280# facility.
281#
282###############################################################################
283ENTRY(nmi_handler)
284 add -4,sp
285 mov d0,(sp)
286 mov (TBR),d0
287
288#ifdef CONFIG_SMP
289 add -4,sp
290 mov d0,(sp) # save d0(TBR)
291 movhu (NMIAGR),d0
292 and NMIAGR_GN,d0
293 lsr 0x2,d0
294 cmp CALL_FUNCTION_NMI_IPI,d0
295 bne nmi_not_smp_callfunc # if not call function, jump
296
297 # function call nmi ipi
298 add 4,sp # no need to store TBR
299 mov GxICR_DETECT,d0 # clear NMI request
300 movbu d0,(GxICR(CALL_FUNCTION_NMI_IPI))
301 movhu (GxICR(CALL_FUNCTION_NMI_IPI)),d0
302 and ~EPSW_NMID,epsw # enable NMI
303
304 mov (sp),d0 # restore d0
305 SAVE_ALL
306 call smp_nmi_call_function_interrupt[],0
307 RESTORE_ALL
308
309nmi_not_smp_callfunc:
310#ifdef CONFIG_KERNEL_DEBUGGER
311 cmp DEBUGGER_NMI_IPI,d0
312 bne nmi_not_debugger # if not kernel debugger NMI IPI, jump
313
314 # kernel debugger NMI IPI
315 add 4,sp # no need to store TBR
316 mov GxICR_DETECT,d0 # clear NMI
317 movbu d0,(GxICR(DEBUGGER_NMI_IPI))
318 movhu (GxICR(DEBUGGER_NMI_IPI)),d0
319 and ~EPSW_NMID,epsw # enable NMI
320
321 mov (sp),d0
322 SAVE_ALL
323 mov fp,d0 # arg 0: stacked register file
324 mov a2,d1 # arg 1: exception number
325 call debugger_nmi_interrupt[],0
326 RESTORE_ALL
327
328nmi_not_debugger:
329#endif /* CONFIG_KERNEL_DEBUGGER */
330 mov (sp),d0 # restore TBR to d0
331 add 4,sp
332#endif /* CONFIG_SMP */
333
334 bra __common_exception_nonmi
335
336###############################################################################
337#
338# General exception entry point
339#
340###############################################################################
341ENTRY(__common_exception)
342 add -4,sp
343 mov d0,(sp)
344#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
345 mov (MMUCTR),d0
346 mov d0,(MMUCTR)
347#endif
348
349__common_exception_aux:
350 mov (TBR),d0
351 and ~EPSW_NMID,epsw # turn NMIs back on if not NMI
352 or EPSW_IE,epsw
353
354__common_exception_nonmi:
355 and 0x0000FFFF,d0 # turn the exception code into a vector
356 # table index
357
358 btst 0x00000007,d0
359 bne 1f
360 cmp 0x00000400,d0
361 bge 1f
362
363 SAVE_ALL # build the stack frame
364
365 mov (REG_D0,fp),a2 # get the exception number
366 mov (REG_ORIG_D0,fp),d0
367 mov d0,(REG_D0,fp)
368 mov -1,d0
369 mov d0,(REG_ORIG_D0,fp)
370
371#ifdef CONFIG_GDBSTUB
372#ifdef CONFIG_SMP
373 call gdbstub_busy_check[],0
374 and d0,d0 # check return value
375 beq 2f
376#else /* CONFIG_SMP */
377 btst 0x01,(gdbstub_busy)
378 beq 2f
379#endif /* CONFIG_SMP */
380 and ~EPSW_IE,epsw
381 mov fp,d0
382 mov a2,d1
383 call gdbstub_exception[],0 # gdbstub itself caused an exception
384 bra restore_all
3852:
386#endif /* CONFIG_GDBSTUB */
387
388 mov fp,d0 # arg 0: stacked register file
389 mov a2,d1 # arg 1: exception number
390 lsr 1,a2
391
392 mov (exception_table,a2),a2
393 calls (a2)
394 jmp ret_from_exception
395
3961: pi # BUG() equivalent
397
398###############################################################################
399#
400# Exception handler functions table
401#
402###############################################################################
403 .data
404ENTRY(exception_table)
405 .rept 0x400>>1
406 .long uninitialised_exception
407 .endr
408 .previous
409
410###############################################################################
411#
412# Change an entry in the exception table
413# - D0 exception code, D1 handler
414#
415###############################################################################
416ENTRY(set_excp_vector)
417 lsr 1,d0
418 add exception_table,d0
419 mov d1,(d0)
420 mov 4,d1
421 ret [],0
422
423###############################################################################
424#
425# System call table
426#
427###############################################################################
428 .data
429ENTRY(sys_call_table)
430 .long sys_restart_syscall /* 0 */
431 .long sys_exit
432 .long sys_fork
433 .long sys_read
434 .long sys_write
435 .long sys_open /* 5 */
436 .long sys_close
437 .long sys_waitpid
438 .long sys_creat
439 .long sys_link
440 .long sys_unlink /* 10 */
441 .long sys_execve
442 .long sys_chdir
443 .long sys_time
444 .long sys_mknod
445 .long sys_chmod /* 15 */
446 .long sys_lchown16
447 .long sys_ni_syscall /* old break syscall holder */
448 .long sys_stat
449 .long sys_lseek
450 .long sys_getpid /* 20 */
451 .long sys_mount
452 .long sys_oldumount
453 .long sys_setuid16
454 .long sys_getuid16
455 .long sys_stime /* 25 */
456 .long sys_ptrace
457 .long sys_alarm
458 .long sys_fstat
459 .long sys_pause
460 .long sys_utime /* 30 */
461 .long sys_ni_syscall /* old stty syscall holder */
462 .long sys_ni_syscall /* old gtty syscall holder */
463 .long sys_access
464 .long sys_nice
465 .long sys_ni_syscall /* 35 - old ftime syscall holder */
466 .long sys_sync
467 .long sys_kill
468 .long sys_rename
469 .long sys_mkdir
470 .long sys_rmdir /* 40 */
471 .long sys_dup
472 .long sys_pipe
473 .long sys_times
474 .long sys_ni_syscall /* old prof syscall holder */
475 .long sys_brk /* 45 */
476 .long sys_setgid16
477 .long sys_getgid16
478 .long sys_signal
479 .long sys_geteuid16
480 .long sys_getegid16 /* 50 */
481 .long sys_acct
482 .long sys_umount /* recycled never used phys() */
483 .long sys_ni_syscall /* old lock syscall holder */
484 .long sys_ioctl
485 .long sys_fcntl /* 55 */
486 .long sys_ni_syscall /* old mpx syscall holder */
487 .long sys_setpgid
488 .long sys_ni_syscall /* old ulimit syscall holder */
489 .long sys_ni_syscall /* old sys_olduname */
490 .long sys_umask /* 60 */
491 .long sys_chroot
492 .long sys_ustat
493 .long sys_dup2
494 .long sys_getppid
495 .long sys_getpgrp /* 65 */
496 .long sys_setsid
497 .long sys_sigaction
498 .long sys_sgetmask
499 .long sys_ssetmask
500 .long sys_setreuid16 /* 70 */
501 .long sys_setregid16
502 .long sys_sigsuspend
503 .long sys_sigpending
504 .long sys_sethostname
505 .long sys_setrlimit /* 75 */
506 .long sys_old_getrlimit
507 .long sys_getrusage
508 .long sys_gettimeofday
509 .long sys_settimeofday
510 .long sys_getgroups16 /* 80 */
511 .long sys_setgroups16
512 .long sys_old_select
513 .long sys_symlink
514 .long sys_lstat
515 .long sys_readlink /* 85 */
516 .long sys_uselib
517 .long sys_swapon
518 .long sys_reboot
519 .long sys_old_readdir
520 .long old_mmap /* 90 */
521 .long sys_munmap
522 .long sys_truncate
523 .long sys_ftruncate
524 .long sys_fchmod
525 .long sys_fchown16 /* 95 */
526 .long sys_getpriority
527 .long sys_setpriority
528 .long sys_ni_syscall /* old profil syscall holder */
529 .long sys_statfs
530 .long sys_fstatfs /* 100 */
531 .long sys_ni_syscall /* ioperm */
532 .long sys_socketcall
533 .long sys_syslog
534 .long sys_setitimer
535 .long sys_getitimer /* 105 */
536 .long sys_newstat
537 .long sys_newlstat
538 .long sys_newfstat
539 .long sys_ni_syscall /* old sys_uname */
540 .long sys_ni_syscall /* 110 - iopl */
541 .long sys_vhangup
542 .long sys_ni_syscall /* old "idle" system call */
543 .long sys_ni_syscall /* vm86old */
544 .long sys_wait4
545 .long sys_swapoff /* 115 */
546 .long sys_sysinfo
547 .long sys_ipc
548 .long sys_fsync
549 .long sys_sigreturn
550 .long sys_clone /* 120 */
551 .long sys_setdomainname
552 .long sys_newuname
553 .long sys_ni_syscall /* modify_ldt */
554 .long sys_adjtimex
555 .long sys_mprotect /* 125 */
556 .long sys_sigprocmask
557 .long sys_ni_syscall /* old "create_module" */
558 .long sys_init_module
559 .long sys_delete_module
560 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
561 .long sys_quotactl
562 .long sys_getpgid
563 .long sys_fchdir
564 .long sys_bdflush
565 .long sys_sysfs /* 135 */
566 .long sys_personality
567 .long sys_ni_syscall /* reserved for afs_syscall */
568 .long sys_setfsuid16
569 .long sys_setfsgid16
570 .long sys_llseek /* 140 */
571 .long sys_getdents
572 .long sys_select
573 .long sys_flock
574 .long sys_msync
575 .long sys_readv /* 145 */
576 .long sys_writev
577 .long sys_getsid
578 .long sys_fdatasync
579 .long sys_sysctl
580 .long sys_mlock /* 150 */
581 .long sys_munlock
582 .long sys_mlockall
583 .long sys_munlockall
584 .long sys_sched_setparam
585 .long sys_sched_getparam /* 155 */
586 .long sys_sched_setscheduler
587 .long sys_sched_getscheduler
588 .long sys_sched_yield
589 .long sys_sched_get_priority_max
590 .long sys_sched_get_priority_min /* 160 */
591 .long sys_sched_rr_get_interval
592 .long sys_nanosleep
593 .long sys_mremap
594 .long sys_setresuid16
595 .long sys_getresuid16 /* 165 */
596 .long sys_ni_syscall /* vm86 */
597 .long sys_ni_syscall /* Old sys_query_module */
598 .long sys_poll
599 .long sys_ni_syscall /* was nfsservctl */
600 .long sys_setresgid16 /* 170 */
601 .long sys_getresgid16
602 .long sys_prctl
603 .long sys_rt_sigreturn
604 .long sys_rt_sigaction
605 .long sys_rt_sigprocmask /* 175 */
606 .long sys_rt_sigpending
607 .long sys_rt_sigtimedwait
608 .long sys_rt_sigqueueinfo
609 .long sys_rt_sigsuspend
610 .long sys_pread64 /* 180 */
611 .long sys_pwrite64
612 .long sys_chown16
613 .long sys_getcwd
614 .long sys_capget
615 .long sys_capset /* 185 */
616 .long sys_sigaltstack
617 .long sys_sendfile
618 .long sys_ni_syscall /* reserved for streams1 */
619 .long sys_ni_syscall /* reserved for streams2 */
620 .long sys_vfork /* 190 */
621 .long sys_getrlimit
622 .long sys_mmap_pgoff
623 .long sys_truncate64
624 .long sys_ftruncate64
625 .long sys_stat64 /* 195 */
626 .long sys_lstat64
627 .long sys_fstat64
628 .long sys_lchown
629 .long sys_getuid
630 .long sys_getgid /* 200 */
631 .long sys_geteuid
632 .long sys_getegid
633 .long sys_setreuid
634 .long sys_setregid
635 .long sys_getgroups /* 205 */
636 .long sys_setgroups
637 .long sys_fchown
638 .long sys_setresuid
639 .long sys_getresuid
640 .long sys_setresgid /* 210 */
641 .long sys_getresgid
642 .long sys_chown
643 .long sys_setuid
644 .long sys_setgid
645 .long sys_setfsuid /* 215 */
646 .long sys_setfsgid
647 .long sys_pivot_root
648 .long sys_mincore
649 .long sys_madvise
650 .long sys_getdents64 /* 220 */
651 .long sys_fcntl64
652 .long sys_ni_syscall /* reserved for TUX */
653 .long sys_ni_syscall
654 .long sys_gettid
655 .long sys_readahead /* 225 */
656 .long sys_setxattr
657 .long sys_lsetxattr
658 .long sys_fsetxattr
659 .long sys_getxattr
660 .long sys_lgetxattr /* 230 */
661 .long sys_fgetxattr
662 .long sys_listxattr
663 .long sys_llistxattr
664 .long sys_flistxattr
665 .long sys_removexattr /* 235 */
666 .long sys_lremovexattr
667 .long sys_fremovexattr
668 .long sys_tkill
669 .long sys_sendfile64
670 .long sys_futex /* 240 */
671 .long sys_sched_setaffinity
672 .long sys_sched_getaffinity
673 .long sys_ni_syscall /* sys_set_thread_area */
674 .long sys_ni_syscall /* sys_get_thread_area */
675 .long sys_io_setup /* 245 */
676 .long sys_io_destroy
677 .long sys_io_getevents
678 .long sys_io_submit
679 .long sys_io_cancel
680 .long sys_fadvise64 /* 250 */
681 .long sys_ni_syscall
682 .long sys_exit_group
683 .long sys_lookup_dcookie
684 .long sys_epoll_create
685 .long sys_epoll_ctl /* 255 */
686 .long sys_epoll_wait
687 .long sys_remap_file_pages
688 .long sys_set_tid_address
689 .long sys_timer_create
690 .long sys_timer_settime /* 260 */
691 .long sys_timer_gettime
692 .long sys_timer_getoverrun
693 .long sys_timer_delete
694 .long sys_clock_settime
695 .long sys_clock_gettime /* 265 */
696 .long sys_clock_getres
697 .long sys_clock_nanosleep
698 .long sys_statfs64
699 .long sys_fstatfs64
700 .long sys_tgkill /* 270 */
701 .long sys_utimes
702 .long sys_fadvise64_64
703 .long sys_ni_syscall /* sys_vserver */
704 .long sys_mbind
705 .long sys_get_mempolicy /* 275 */
706 .long sys_set_mempolicy
707 .long sys_mq_open
708 .long sys_mq_unlink
709 .long sys_mq_timedsend
710 .long sys_mq_timedreceive /* 280 */
711 .long sys_mq_notify
712 .long sys_mq_getsetattr
713 .long sys_kexec_load
714 .long sys_waitid
715 .long sys_ni_syscall /* 285 */ /* available */
716 .long sys_add_key
717 .long sys_request_key
718 .long sys_keyctl
719 .long sys_cacheflush
720 .long sys_ioprio_set /* 290 */
721 .long sys_ioprio_get
722 .long sys_inotify_init
723 .long sys_inotify_add_watch
724 .long sys_inotify_rm_watch
725 .long sys_migrate_pages /* 295 */
726 .long sys_openat
727 .long sys_mkdirat
728 .long sys_mknodat
729 .long sys_fchownat
730 .long sys_futimesat /* 300 */
731 .long sys_fstatat64
732 .long sys_unlinkat
733 .long sys_renameat
734 .long sys_linkat
735 .long sys_symlinkat /* 305 */
736 .long sys_readlinkat
737 .long sys_fchmodat
738 .long sys_faccessat
739 .long sys_pselect6
740 .long sys_ppoll /* 310 */
741 .long sys_unshare
742 .long sys_set_robust_list
743 .long sys_get_robust_list
744 .long sys_splice
745 .long sys_sync_file_range /* 315 */
746 .long sys_tee
747 .long sys_vmsplice
748 .long sys_move_pages
749 .long sys_getcpu
750 .long sys_epoll_pwait /* 320 */
751 .long sys_utimensat
752 .long sys_signalfd
753 .long sys_timerfd_create
754 .long sys_eventfd
755 .long sys_fallocate /* 325 */
756 .long sys_timerfd_settime
757 .long sys_timerfd_gettime
758 .long sys_signalfd4
759 .long sys_eventfd2
760 .long sys_epoll_create1 /* 330 */
761 .long sys_dup3
762 .long sys_pipe2
763 .long sys_inotify_init1
764 .long sys_preadv
765 .long sys_pwritev /* 335 */
766 .long sys_rt_tgsigqueueinfo
767 .long sys_perf_event_open
768 .long sys_recvmmsg
769 .long sys_setns
770
771
772nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/fpu-low.S b/arch/mn10300/kernel/fpu-low.S
deleted file mode 100644
index 78df25cfae29..000000000000
--- a/arch/mn10300/kernel/fpu-low.S
+++ /dev/null
@@ -1,258 +0,0 @@
1/* MN10300 Low level FPU management operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/linkage.h>
12#include <asm/cpu-regs.h>
13#include <asm/smp.h>
14#include <asm/thread_info.h>
15#include <asm/asm-offsets.h>
16#include <asm/frame.inc>
17
18.macro FPU_INIT_STATE_ALL
19 fmov 0,fs0
20 fmov fs0,fs1
21 fmov fs0,fs2
22 fmov fs0,fs3
23 fmov fs0,fs4
24 fmov fs0,fs5
25 fmov fs0,fs6
26 fmov fs0,fs7
27 fmov fs0,fs8
28 fmov fs0,fs9
29 fmov fs0,fs10
30 fmov fs0,fs11
31 fmov fs0,fs12
32 fmov fs0,fs13
33 fmov fs0,fs14
34 fmov fs0,fs15
35 fmov fs0,fs16
36 fmov fs0,fs17
37 fmov fs0,fs18
38 fmov fs0,fs19
39 fmov fs0,fs20
40 fmov fs0,fs21
41 fmov fs0,fs22
42 fmov fs0,fs23
43 fmov fs0,fs24
44 fmov fs0,fs25
45 fmov fs0,fs26
46 fmov fs0,fs27
47 fmov fs0,fs28
48 fmov fs0,fs29
49 fmov fs0,fs30
50 fmov fs0,fs31
51 fmov FPCR_INIT,fpcr
52.endm
53
54.macro FPU_SAVE_ALL areg,dreg
55 fmov fs0,(\areg+)
56 fmov fs1,(\areg+)
57 fmov fs2,(\areg+)
58 fmov fs3,(\areg+)
59 fmov fs4,(\areg+)
60 fmov fs5,(\areg+)
61 fmov fs6,(\areg+)
62 fmov fs7,(\areg+)
63 fmov fs8,(\areg+)
64 fmov fs9,(\areg+)
65 fmov fs10,(\areg+)
66 fmov fs11,(\areg+)
67 fmov fs12,(\areg+)
68 fmov fs13,(\areg+)
69 fmov fs14,(\areg+)
70 fmov fs15,(\areg+)
71 fmov fs16,(\areg+)
72 fmov fs17,(\areg+)
73 fmov fs18,(\areg+)
74 fmov fs19,(\areg+)
75 fmov fs20,(\areg+)
76 fmov fs21,(\areg+)
77 fmov fs22,(\areg+)
78 fmov fs23,(\areg+)
79 fmov fs24,(\areg+)
80 fmov fs25,(\areg+)
81 fmov fs26,(\areg+)
82 fmov fs27,(\areg+)
83 fmov fs28,(\areg+)
84 fmov fs29,(\areg+)
85 fmov fs30,(\areg+)
86 fmov fs31,(\areg+)
87 fmov fpcr,\dreg
88 mov \dreg,(\areg)
89.endm
90
91.macro FPU_RESTORE_ALL areg,dreg
92 fmov (\areg+),fs0
93 fmov (\areg+),fs1
94 fmov (\areg+),fs2
95 fmov (\areg+),fs3
96 fmov (\areg+),fs4
97 fmov (\areg+),fs5
98 fmov (\areg+),fs6
99 fmov (\areg+),fs7
100 fmov (\areg+),fs8
101 fmov (\areg+),fs9
102 fmov (\areg+),fs10
103 fmov (\areg+),fs11
104 fmov (\areg+),fs12
105 fmov (\areg+),fs13
106 fmov (\areg+),fs14
107 fmov (\areg+),fs15
108 fmov (\areg+),fs16
109 fmov (\areg+),fs17
110 fmov (\areg+),fs18
111 fmov (\areg+),fs19
112 fmov (\areg+),fs20
113 fmov (\areg+),fs21
114 fmov (\areg+),fs22
115 fmov (\areg+),fs23
116 fmov (\areg+),fs24
117 fmov (\areg+),fs25
118 fmov (\areg+),fs26
119 fmov (\areg+),fs27
120 fmov (\areg+),fs28
121 fmov (\areg+),fs29
122 fmov (\areg+),fs30
123 fmov (\areg+),fs31
124 mov (\areg),\dreg
125 fmov \dreg,fpcr
126.endm
127
128###############################################################################
129#
130# void fpu_init_state(void)
131# - initialise the FPU
132#
133###############################################################################
134 .globl fpu_init_state
135 .type fpu_init_state,@function
136fpu_init_state:
137 mov epsw,d0
138 or EPSW_FE,epsw
139
140#ifdef CONFIG_MN10300_PROC_MN103E010
141 nop
142 nop
143 nop
144#endif
145 FPU_INIT_STATE_ALL
146#ifdef CONFIG_MN10300_PROC_MN103E010
147 nop
148 nop
149 nop
150#endif
151 mov d0,epsw
152 ret [],0
153
154 .size fpu_init_state,.-fpu_init_state
155
156###############################################################################
157#
158# void fpu_save(struct fpu_state_struct *)
159# - save the fpu state
160# - note that an FPU Operational exception might occur during this process
161#
162###############################################################################
163 .globl fpu_save
164 .type fpu_save,@function
165fpu_save:
166 mov epsw,d1
167 or EPSW_FE,epsw /* enable the FPU so we can access it */
168
169#ifdef CONFIG_MN10300_PROC_MN103E010
170 nop
171 nop
172#endif
173 mov d0,a0
174 FPU_SAVE_ALL a0,d0
175#ifdef CONFIG_MN10300_PROC_MN103E010
176 nop
177 nop
178#endif
179
180 mov d1,epsw
181 ret [],0
182
183 .size fpu_save,.-fpu_save
184
185###############################################################################
186#
187# void fpu_disabled(void)
188# - handle an exception due to the FPU being disabled
189# when CONFIG_FPU is enabled
190#
191###############################################################################
192 .type fpu_disabled,@function
193 .globl fpu_disabled
194fpu_disabled:
195 or EPSW_nAR|EPSW_FE,epsw
196 nop
197 nop
198 nop
199
200 mov sp,a1
201 mov (a1),d1 /* get epsw of user context */
202 and ~(THREAD_SIZE-1),a1 /* a1: (thread_info *ti) */
203 mov (TI_task,a1),a2 /* a2: (task_struct *tsk) */
204 btst EPSW_nSL,d1
205 beq fpu_used_in_kernel
206
207 or EPSW_FE,d1
208 mov d1,(sp)
209 mov (TASK_THREAD+THREAD_FPU_FLAGS,a2),d1
210#ifndef CONFIG_LAZY_SAVE_FPU
211 or __THREAD_HAS_FPU,d1
212 mov d1,(TASK_THREAD+THREAD_FPU_FLAGS,a2)
213#else /* !CONFIG_LAZY_SAVE_FPU */
214 mov (fpu_state_owner),a0
215 cmp 0,a0
216 beq fpu_regs_save_end
217
218 mov (TASK_THREAD+THREAD_UREGS,a0),a1
219 add TASK_THREAD+THREAD_FPU_STATE,a0
220 FPU_SAVE_ALL a0,d0
221
222 mov (REG_EPSW,a1),d0
223 and ~EPSW_FE,d0
224 mov d0,(REG_EPSW,a1)
225
226fpu_regs_save_end:
227 mov a2,(fpu_state_owner)
228#endif /* !CONFIG_LAZY_SAVE_FPU */
229
230 btst __THREAD_USING_FPU,d1
231 beq fpu_regs_init
232 add TASK_THREAD+THREAD_FPU_STATE,a2
233 FPU_RESTORE_ALL a2,d0
234 rti
235
236fpu_regs_init:
237 FPU_INIT_STATE_ALL
238 add TASK_THREAD+THREAD_FPU_FLAGS,a2
239 bset __THREAD_USING_FPU,(0,a2)
240 rti
241
242fpu_used_in_kernel:
243 and ~(EPSW_nAR|EPSW_FE),epsw
244 nop
245 nop
246
247 add -4,sp
248 SAVE_ALL
249 mov -1,d0
250 mov d0,(REG_ORIG_D0,fp)
251
252 and ~EPSW_NMID,epsw
253
254 mov fp,d0
255 call fpu_disabled_in_kernel[],0
256 jmp ret_from_exception
257
258 .size fpu_disabled,.-fpu_disabled
diff --git a/arch/mn10300/kernel/fpu-nofpu-low.S b/arch/mn10300/kernel/fpu-nofpu-low.S
deleted file mode 100644
index 7ea087a549f4..000000000000
--- a/arch/mn10300/kernel/fpu-nofpu-low.S
+++ /dev/null
@@ -1,39 +0,0 @@
1/* MN10300 Low level FPU management operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/linkage.h>
12#include <asm/cpu-regs.h>
13#include <asm/smp.h>
14#include <asm/thread_info.h>
15#include <asm/asm-offsets.h>
16#include <asm/frame.inc>
17
18###############################################################################
19#
20# void fpu_disabled(void)
21# - handle an exception due to the FPU being disabled
22# when CONFIG_FPU is disabled
23#
24###############################################################################
25 .type fpu_disabled,@function
26 .globl fpu_disabled
27fpu_disabled:
28 add -4,sp
29 SAVE_ALL
30 mov -1,d0
31 mov d0,(REG_ORIG_D0,fp)
32
33 and ~EPSW_NMID,epsw
34
35 mov fp,d0
36 call unexpected_fpu_exception[],0
37 jmp ret_from_exception
38
39 .size fpu_disabled,.-fpu_disabled
diff --git a/arch/mn10300/kernel/fpu-nofpu.c b/arch/mn10300/kernel/fpu-nofpu.c
deleted file mode 100644
index 8d0e041aa798..000000000000
--- a/arch/mn10300/kernel/fpu-nofpu.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/* MN10300 FPU management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/fpu.h>
12#include <asm/elf.h>
13
14/*
15 * handle an FPU operational exception
16 * - there's a possibility that if the FPU is asynchronous, the signal might
17 * be meant for a process other than the current one
18 */
19asmlinkage
20void unexpected_fpu_exception(struct pt_regs *regs, enum exception_code code)
21{
22 panic("An FPU exception was received, but there's no FPU enabled.");
23}
24
25/*
26 * fill in the FPU structure for a core dump
27 */
28int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpreg)
29{
30 return 0; /* not valid */
31}
diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c
deleted file mode 100644
index 50ce7b447fed..000000000000
--- a/arch/mn10300/kernel/fpu.c
+++ /dev/null
@@ -1,177 +0,0 @@
1/* MN10300 FPU management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/uaccess.h>
12#include <linux/sched/signal.h>
13
14#include <asm/fpu.h>
15#include <asm/elf.h>
16#include <asm/exceptions.h>
17
18#ifdef CONFIG_LAZY_SAVE_FPU
19struct task_struct *fpu_state_owner;
20#endif
21
22/*
23 * error functions in FPU disabled exception
24 */
25asmlinkage void fpu_disabled_in_kernel(struct pt_regs *regs)
26{
27 die_if_no_fixup("An FPU Disabled exception happened in kernel space\n",
28 regs, EXCEP_FPU_DISABLED);
29}
30
31/*
32 * handle an FPU operational exception
33 * - there's a possibility that if the FPU is asynchronous, the signal might
34 * be meant for a process other than the current one
35 */
36asmlinkage void fpu_exception(struct pt_regs *regs, enum exception_code code)
37{
38 struct task_struct *tsk = current;
39 siginfo_t info;
40 u32 fpcr;
41
42 if (!user_mode(regs))
43 die_if_no_fixup("An FPU Operation exception happened in"
44 " kernel space\n",
45 regs, code);
46
47 if (!is_using_fpu(tsk))
48 die_if_no_fixup("An FPU Operation exception happened,"
49 " but the FPU is not in use",
50 regs, code);
51
52 info.si_signo = SIGFPE;
53 info.si_errno = 0;
54 info.si_addr = (void *) tsk->thread.uregs->pc;
55 info.si_code = FPE_FLTINV;
56
57 unlazy_fpu(tsk);
58
59 fpcr = tsk->thread.fpu_state.fpcr;
60
61 if (fpcr & FPCR_EC_Z)
62 info.si_code = FPE_FLTDIV;
63 else if (fpcr & FPCR_EC_O)
64 info.si_code = FPE_FLTOVF;
65 else if (fpcr & FPCR_EC_U)
66 info.si_code = FPE_FLTUND;
67 else if (fpcr & FPCR_EC_I)
68 info.si_code = FPE_FLTRES;
69
70 force_sig_info(SIGFPE, &info, tsk);
71}
72
73/*
74 * save the FPU state to a signal context
75 */
76int fpu_setup_sigcontext(struct fpucontext *fpucontext)
77{
78 struct task_struct *tsk = current;
79
80 if (!is_using_fpu(tsk))
81 return 0;
82
83 /* transfer the current FPU state to memory and cause fpu_init() to be
84 * triggered by the next attempted FPU operation by the current
85 * process.
86 */
87 preempt_disable();
88
89#ifndef CONFIG_LAZY_SAVE_FPU
90 if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
91 fpu_save(&tsk->thread.fpu_state);
92 tsk->thread.uregs->epsw &= ~EPSW_FE;
93 tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
94 }
95#else /* !CONFIG_LAZY_SAVE_FPU */
96 if (fpu_state_owner == tsk) {
97 fpu_save(&tsk->thread.fpu_state);
98 fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
99 fpu_state_owner = NULL;
100 }
101#endif /* !CONFIG_LAZY_SAVE_FPU */
102
103 preempt_enable();
104
105 /* we no longer have a valid current FPU state */
106 clear_using_fpu(tsk);
107
108 /* transfer the saved FPU state onto the userspace stack */
109 if (copy_to_user(fpucontext,
110 &tsk->thread.fpu_state,
111 min(sizeof(struct fpu_state_struct),
112 sizeof(struct fpucontext))))
113 return -1;
114
115 return 1;
116}
117
118/*
119 * kill a process's FPU state during restoration after signal handling
120 */
121void fpu_kill_state(struct task_struct *tsk)
122{
123 /* disown anything left in the FPU */
124 preempt_disable();
125
126#ifndef CONFIG_LAZY_SAVE_FPU
127 if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
128 tsk->thread.uregs->epsw &= ~EPSW_FE;
129 tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
130 }
131#else /* !CONFIG_LAZY_SAVE_FPU */
132 if (fpu_state_owner == tsk) {
133 fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
134 fpu_state_owner = NULL;
135 }
136#endif /* !CONFIG_LAZY_SAVE_FPU */
137
138 preempt_enable();
139
140 /* we no longer have a valid current FPU state */
141 clear_using_fpu(tsk);
142}
143
144/*
145 * restore the FPU state from a signal context
146 */
147int fpu_restore_sigcontext(struct fpucontext *fpucontext)
148{
149 struct task_struct *tsk = current;
150 int ret;
151
152 /* load up the old FPU state */
153 ret = copy_from_user(&tsk->thread.fpu_state, fpucontext,
154 min(sizeof(struct fpu_state_struct),
155 sizeof(struct fpucontext)));
156 if (!ret)
157 set_using_fpu(tsk);
158
159 return ret;
160}
161
162/*
163 * fill in the FPU structure for a core dump
164 */
165int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpreg)
166{
167 struct task_struct *tsk = current;
168 int fpvalid;
169
170 fpvalid = is_using_fpu(tsk);
171 if (fpvalid) {
172 unlazy_fpu(tsk);
173 memcpy(fpreg, &tsk->thread.fpu_state, sizeof(*fpreg));
174 }
175
176 return fpvalid;
177}
diff --git a/arch/mn10300/kernel/gdb-io-serial-low.S b/arch/mn10300/kernel/gdb-io-serial-low.S
deleted file mode 100644
index b1d0152e96cb..000000000000
--- a/arch/mn10300/kernel/gdb-io-serial-low.S
+++ /dev/null
@@ -1,91 +0,0 @@
1###############################################################################
2#
3# 16550 serial Rx interrupt handler for gdbstub I/O
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cpu-regs.h>
18#include <asm/thread_info.h>
19#include <asm/frame.inc>
20#include <asm/intctl-regs.h>
21#include <asm/irqflags.h>
22#include <unit/serial.h>
23
24 .text
25
26###############################################################################
27#
28# GDB stub serial receive interrupt entry point
29# - intended to run at interrupt priority 0
30#
31###############################################################################
32 .globl gdbstub_io_rx_handler
33 .type gdbstub_io_rx_handler,@function
34gdbstub_io_rx_handler:
35 movm [d2,d3,a2,a3],(sp)
36
37#if 1
38 movbu (GDBPORT_SERIAL_IIR),d2
39#endif
40
41 mov (gdbstub_rx_inp),a3
42gdbstub_io_rx_more:
43 mov a3,a2
44 add 2,a3
45 and 0x00000fff,a3
46 mov (gdbstub_rx_outp),d3
47 cmp a3,d3
48 beq gdbstub_io_rx_overflow
49
50 movbu (GDBPORT_SERIAL_LSR),d3
51 btst UART_LSR_DR,d3
52 beq gdbstub_io_rx_done
53 movbu (GDBPORT_SERIAL_RX),d2
54 movbu d3,(gdbstub_rx_buffer+1,a2)
55 movbu d2,(gdbstub_rx_buffer,a2)
56 mov a3,(gdbstub_rx_inp)
57 bra gdbstub_io_rx_more
58
59gdbstub_io_rx_done:
60 mov GxICR_DETECT,d2
61 movbu d2,(XIRQxICR(GDBPORT_SERIAL_IRQ)) # ACK the interrupt
62 movhu (XIRQxICR(GDBPORT_SERIAL_IRQ)),d2 # flush
63 movm (sp),[d2,d3,a2,a3]
64 bset 0x01,(gdbstub_busy)
65 beq gdbstub_io_rx_enter
66 rti
67
68gdbstub_io_rx_overflow:
69 bset 0x01,(gdbstub_rx_overflow)
70 bra gdbstub_io_rx_done
71
72gdbstub_io_rx_enter:
73 LOCAL_CHANGE_INTR_MASK_LEVEL(NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL+1))
74 add -4,sp
75 SAVE_ALL
76
77 mov 0xffffffff,d0
78 mov d0,(REG_ORIG_D0,fp)
79 mov 0x280,d1
80
81 mov fp,d0
82 call gdbstub_rx_irq[],0 # gdbstub_rx_irq(regs,excep)
83
84 LOCAL_CLI
85 bclr 0x01,(gdbstub_busy)
86
87 .globl gdbstub_return
88gdbstub_return:
89 RESTORE_ALL
90
91 .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
deleted file mode 100644
index df51242744cc..000000000000
--- a/arch/mn10300/kernel/gdb-io-serial.c
+++ /dev/null
@@ -1,174 +0,0 @@
1/* 16550 serial driver for gdbstub I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/nmi.h>
19
20#include <asm/pgtable.h>
21#include <asm/gdb-stub.h>
22#include <asm/exceptions.h>
23#include <asm/serial-regs.h>
24#include <unit/serial.h>
25#include <asm/smp.h>
26
27/*
28 * initialise the GDB stub
29 */
30void gdbstub_io_init(void)
31{
32 u16 tmp;
33
34 /* set up the serial port */
35 GDBPORT_SERIAL_LCR = UART_LCR_WLEN8; /* 1N8 */
36 GDBPORT_SERIAL_FCR = (UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
37 UART_FCR_CLEAR_XMIT);
38
39 FLOWCTL_CLEAR(DTR);
40 FLOWCTL_SET(RTS);
41
42 gdbstub_io_set_baud(115200);
43
44 /* we want to get serial receive interrupts */
45 XIRQxICR(GDBPORT_SERIAL_IRQ) = 0;
46 tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
47
48#if CONFIG_GDBSTUB_IRQ_LEVEL == 0
49 IVAR0 = EXCEP_IRQ_LEVEL0;
50#elif CONFIG_GDBSTUB_IRQ_LEVEL == 1
51 IVAR1 = EXCEP_IRQ_LEVEL1;
52#elif CONFIG_GDBSTUB_IRQ_LEVEL == 2
53 IVAR2 = EXCEP_IRQ_LEVEL2;
54#elif CONFIG_GDBSTUB_IRQ_LEVEL == 3
55 IVAR3 = EXCEP_IRQ_LEVEL3;
56#elif CONFIG_GDBSTUB_IRQ_LEVEL == 4
57 IVAR4 = EXCEP_IRQ_LEVEL4;
58#elif CONFIG_GDBSTUB_IRQ_LEVEL == 5
59 IVAR5 = EXCEP_IRQ_LEVEL5;
60#else
61#error "Unknown irq level for gdbstub."
62#endif
63
64 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL),
65 gdbstub_io_rx_handler);
66
67 XIRQxICR(GDBPORT_SERIAL_IRQ) &= ~GxICR_REQUEST;
68 XIRQxICR(GDBPORT_SERIAL_IRQ) =
69 GxICR_ENABLE | NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL);
70 tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
71
72 GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI;
73
74 /* permit level 0 IRQs to take place */
75 arch_local_change_intr_mask_level(
76 NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1));
77}
78
79/*
80 * set up the GDB stub serial port baud rate timers
81 */
82void gdbstub_io_set_baud(unsigned baud)
83{
84 unsigned value;
85 u8 lcr;
86
87 value = 18432000 / 16 / baud;
88
89 lcr = GDBPORT_SERIAL_LCR;
90 GDBPORT_SERIAL_LCR |= UART_LCR_DLAB;
91 GDBPORT_SERIAL_DLL = value & 0xff;
92 GDBPORT_SERIAL_DLM = (value >> 8) & 0xff;
93 GDBPORT_SERIAL_LCR = lcr;
94}
95
96/*
97 * wait for a character to come from the debugger
98 */
99int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
100{
101 unsigned ix;
102 u8 ch, st;
103#if defined(CONFIG_MN10300_WD_TIMER)
104 int cpu;
105#endif
106
107 *_ch = 0xff;
108
109 if (gdbstub_rx_unget) {
110 *_ch = gdbstub_rx_unget;
111 gdbstub_rx_unget = 0;
112 return 0;
113 }
114
115 try_again:
116 /* pull chars out of the buffer */
117 ix = gdbstub_rx_outp;
118 barrier();
119 if (ix == gdbstub_rx_inp) {
120 if (nonblock)
121 return -EAGAIN;
122#ifdef CONFIG_MN10300_WD_TIMER
123 for (cpu = 0; cpu < NR_CPUS; cpu++)
124 watchdog_alert_counter[cpu] = 0;
125#endif
126 goto try_again;
127 }
128
129 ch = gdbstub_rx_buffer[ix++];
130 st = gdbstub_rx_buffer[ix++];
131 barrier();
132 gdbstub_rx_outp = ix & 0x00000fff;
133
134 if (st & UART_LSR_BI) {
135 gdbstub_proto("### GDB Rx Break Detected ###\n");
136 return -EINTR;
137 } else if (st & (UART_LSR_FE | UART_LSR_OE | UART_LSR_PE)) {
138 gdbstub_proto("### GDB Rx Error (st=%02x) ###\n", st);
139 return -EIO;
140 } else {
141 gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n", ch, st);
142 *_ch = ch & 0x7f;
143 return 0;
144 }
145}
146
147/*
148 * send a character to the debugger
149 */
150void gdbstub_io_tx_char(unsigned char ch)
151{
152 FLOWCTL_SET(DTR);
153 LSR_WAIT_FOR(THRE);
154 /* FLOWCTL_WAIT_FOR(CTS); */
155
156 if (ch == 0x0a) {
157 GDBPORT_SERIAL_TX = 0x0d;
158 LSR_WAIT_FOR(THRE);
159 /* FLOWCTL_WAIT_FOR(CTS); */
160 }
161 GDBPORT_SERIAL_TX = ch;
162
163 FLOWCTL_CLEAR(DTR);
164}
165
166/*
167 * send a character to the debugger
168 */
169void gdbstub_io_tx_flush(void)
170{
171 LSR_WAIT_FOR(TEMT);
172 LSR_WAIT_FOR(THRE);
173 FLOWCTL_CLEAR(DTR);
174}
diff --git a/arch/mn10300/kernel/gdb-io-ttysm-low.S b/arch/mn10300/kernel/gdb-io-ttysm-low.S
deleted file mode 100644
index 060b7cca735d..000000000000
--- a/arch/mn10300/kernel/gdb-io-ttysm-low.S
+++ /dev/null
@@ -1,93 +0,0 @@
1###############################################################################
2#
3# MN10300 On-chip serial Rx interrupt handler for GDB stub I/O
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/thread_info.h>
18#include <asm/cpu-regs.h>
19#include <asm/frame.inc>
20#include <asm/intctl-regs.h>
21#include <unit/serial.h>
22#include "mn10300-serial.h"
23
24 .text
25
26###############################################################################
27#
28# GDB stub serial receive interrupt entry point
29# - intended to run at interrupt priority 0
30#
31###############################################################################
32 .globl gdbstub_io_rx_handler
33 .type gdbstub_io_rx_handler,@function
34gdbstub_io_rx_handler:
35 movm [d2,d3,a2,a3],(sp)
36
37 mov (gdbstub_rx_inp),a3
38gdbstub_io_rx_more:
39 mov a3,a2
40 add 2,a3
41 and PAGE_SIZE_asm-1,a3
42 mov (gdbstub_rx_outp),d3
43 cmp a3,d3
44 beq gdbstub_io_rx_overflow
45
46 movbu (SCgSTR),d3
47 btst SC01STR_RBF,d3
48 beq gdbstub_io_rx_done
49 movbu (SCgRXB),d2
50 movbu d3,(gdbstub_rx_buffer+1,a2)
51 movbu d2,(gdbstub_rx_buffer,a2)
52 mov a3,(gdbstub_rx_inp)
53 bra gdbstub_io_rx_more
54
55gdbstub_io_rx_done:
56 mov GxICR_DETECT,d2
57 movbu d2,(GxICR(SCgRXIRQ)) # ACK the interrupt
58 movhu (GxICR(SCgRXIRQ)),d2 # flush
59
60 movm (sp),[d2,d3,a2,a3]
61 bset 0x01,(gdbstub_busy)
62 beq gdbstub_io_rx_enter
63 rti
64
65gdbstub_io_rx_overflow:
66 bset 0x01,(gdbstub_rx_overflow)
67 bra gdbstub_io_rx_done
68
69###############################################################################
70#
71# debugging interrupt - enter the GDB stub proper
72#
73###############################################################################
74gdbstub_io_rx_enter:
75 or EPSW_IE|EPSW_IM_1,epsw
76 add -4,sp
77 SAVE_ALL
78
79 mov 0xffffffff,d0
80 mov d0,(REG_ORIG_D0,fp)
81 mov 0x280,d1
82
83 mov fp,d0
84 call gdbstub_rx_irq[],0 # gdbstub_io_rx_irq(regs,excep)
85
86 and ~EPSW_IE,epsw
87 bclr 0x01,(gdbstub_busy)
88
89 .globl gdbstub_return
90gdbstub_return:
91 RESTORE_ALL
92
93 .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
deleted file mode 100644
index caae8cac9db1..000000000000
--- a/arch/mn10300/kernel/gdb-io-ttysm.c
+++ /dev/null
@@ -1,303 +0,0 @@
1/* MN10300 On-chip serial driver for gdbstub I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/tty.h>
19#include <asm/pgtable.h>
20#include <asm/gdb-stub.h>
21#include <asm/exceptions.h>
22#include <unit/clock.h>
23#include "mn10300-serial.h"
24
25#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
26struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif0;
27#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
28struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif1;
29#else
30struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif2;
31#endif
32
33
34/*
35 * initialise the GDB stub I/O routines
36 */
37void __init gdbstub_io_init(void)
38{
39 uint16_t scxctr;
40 int tmp;
41
42 switch (gdbstub_port->clock_src) {
43 case MNSCx_CLOCK_SRC_IOCLK:
44 gdbstub_port->ioclk = MN10300_IOCLK;
45 break;
46
47#ifdef MN10300_IOBCLK
48 case MNSCx_CLOCK_SRC_IOBCLK:
49 gdbstub_port->ioclk = MN10300_IOBCLK;
50 break;
51#endif
52 default:
53 BUG();
54 }
55
56 /* set up the serial port */
57 gdbstub_io_set_baud(115200);
58
59 /* we want to get serial receive interrupts */
60 set_intr_level(gdbstub_port->rx_irq,
61 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
62 set_intr_level(gdbstub_port->tx_irq,
63 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
64 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL),
65 gdbstub_io_rx_handler);
66
67 *gdbstub_port->rx_icr |= GxICR_ENABLE;
68 tmp = *gdbstub_port->rx_icr;
69
70 /* enable the device */
71 scxctr = SC01CTR_CLN_8BIT; /* 1N8 */
72 switch (gdbstub_port->div_timer) {
73 case MNSCx_DIV_TIMER_16BIT:
74 scxctr |= SC0CTR_CK_TM8UFLOW_8; /* == SC1CTR_CK_TM9UFLOW_8
75 == SC2CTR_CK_TM10UFLOW_8 */
76 break;
77
78 case MNSCx_DIV_TIMER_8BIT:
79 scxctr |= SC0CTR_CK_TM2UFLOW_8;
80 break;
81 }
82
83 scxctr |= SC01CTR_TXE | SC01CTR_RXE;
84
85 *gdbstub_port->_control = scxctr;
86 tmp = *gdbstub_port->_control;
87
88 /* permit level 0 IRQs only */
89 arch_local_change_intr_mask_level(
90 NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
91}
92
93/*
94 * set up the GDB stub serial port baud rate timers
95 */
96void gdbstub_io_set_baud(unsigned baud)
97{
98 const unsigned bits = 10; /* 1 [start] + 8 [data] + 0 [parity] +
99 * 1 [stop] */
100 unsigned long ioclk = gdbstub_port->ioclk;
101 unsigned xdiv, tmp;
102 uint16_t tmxbr;
103 uint8_t tmxmd;
104
105 if (!baud) {
106 baud = 9600;
107 } else if (baud == 134) {
108 baud = 269; /* 134 is really 134.5 */
109 xdiv = 2;
110 }
111
112try_alternative:
113 xdiv = 1;
114
115 switch (gdbstub_port->div_timer) {
116 case MNSCx_DIV_TIMER_16BIT:
117 tmxmd = TM8MD_SRC_IOCLK;
118 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
119 if (tmp > 0 && tmp <= 65535)
120 goto timer_okay;
121
122 tmxmd = TM8MD_SRC_IOCLK_8;
123 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
124 if (tmp > 0 && tmp <= 65535)
125 goto timer_okay;
126
127 tmxmd = TM8MD_SRC_IOCLK_32;
128 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
129 if (tmp > 0 && tmp <= 65535)
130 goto timer_okay;
131
132 break;
133
134 case MNSCx_DIV_TIMER_8BIT:
135 tmxmd = TM2MD_SRC_IOCLK;
136 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
137 if (tmp > 0 && tmp <= 255)
138 goto timer_okay;
139
140 tmxmd = TM2MD_SRC_IOCLK_8;
141 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
142 if (tmp > 0 && tmp <= 255)
143 goto timer_okay;
144
145 tmxmd = TM2MD_SRC_IOCLK_32;
146 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
147 if (tmp > 0 && tmp <= 255)
148 goto timer_okay;
149 break;
150 }
151
152 /* as a last resort, if the quotient is zero, default to 9600 bps */
153 baud = 9600;
154 goto try_alternative;
155
156timer_okay:
157 gdbstub_port->uart.timeout = (2 * bits * HZ) / baud;
158 gdbstub_port->uart.timeout += HZ / 50;
159
160 /* set the timer to produce the required baud rate */
161 switch (gdbstub_port->div_timer) {
162 case MNSCx_DIV_TIMER_16BIT:
163 *gdbstub_port->_tmxmd = 0;
164 *gdbstub_port->_tmxbr = tmxbr;
165 *gdbstub_port->_tmxmd = TM8MD_INIT_COUNTER;
166 *gdbstub_port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
167 break;
168
169 case MNSCx_DIV_TIMER_8BIT:
170 *gdbstub_port->_tmxmd = 0;
171 *(volatile u8 *) gdbstub_port->_tmxbr = (u8)tmxbr;
172 *gdbstub_port->_tmxmd = TM2MD_INIT_COUNTER;
173 *gdbstub_port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
174 break;
175 }
176}
177
178/*
179 * wait for a character to come from the debugger
180 */
181int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
182{
183 unsigned ix;
184 u8 ch, st;
185#if defined(CONFIG_MN10300_WD_TIMER)
186 int cpu;
187#endif
188
189 *_ch = 0xff;
190
191 if (gdbstub_rx_unget) {
192 *_ch = gdbstub_rx_unget;
193 gdbstub_rx_unget = 0;
194 return 0;
195 }
196
197try_again:
198 /* pull chars out of the buffer */
199 ix = gdbstub_rx_outp;
200 barrier();
201 if (ix == gdbstub_rx_inp) {
202 if (nonblock)
203 return -EAGAIN;
204#ifdef CONFIG_MN10300_WD_TIMER
205 for (cpu = 0; cpu < NR_CPUS; cpu++)
206 watchdog_alert_counter[cpu] = 0;
207#endif
208 goto try_again;
209 }
210
211 ch = gdbstub_rx_buffer[ix++];
212 st = gdbstub_rx_buffer[ix++];
213 barrier();
214 gdbstub_rx_outp = ix & (PAGE_SIZE - 1);
215
216 st &= SC01STR_RXF | SC01STR_RBF | SC01STR_FEF | SC01STR_PEF |
217 SC01STR_OEF;
218
219 /* deal with what we've got
220 * - note that the UART doesn't do BREAK-detection for us
221 */
222 if (st & SC01STR_FEF && ch == 0) {
223 switch (gdbstub_port->rx_brk) {
224 case 0: gdbstub_port->rx_brk = 1; goto try_again;
225 case 1: gdbstub_port->rx_brk = 2; goto try_again;
226 case 2:
227 gdbstub_port->rx_brk = 3;
228 gdbstub_proto("### GDB MNSERIAL Rx Break Detected"
229 " ###\n");
230 return -EINTR;
231 default:
232 goto try_again;
233 }
234 } else if (st & SC01STR_FEF) {
235 if (gdbstub_port->rx_brk)
236 goto try_again;
237
238 gdbstub_proto("### GDB MNSERIAL Framing Error ###\n");
239 return -EIO;
240 } else if (st & SC01STR_OEF) {
241 if (gdbstub_port->rx_brk)
242 goto try_again;
243
244 gdbstub_proto("### GDB MNSERIAL Overrun Error ###\n");
245 return -EIO;
246 } else if (st & SC01STR_PEF) {
247 if (gdbstub_port->rx_brk)
248 goto try_again;
249
250 gdbstub_proto("### GDB MNSERIAL Parity Error ###\n");
251 return -EIO;
252 } else {
253 /* look for the tail-end char on a break run */
254 if (gdbstub_port->rx_brk == 3) {
255 switch (ch) {
256 case 0xFF:
257 case 0xFE:
258 case 0xFC:
259 case 0xF8:
260 case 0xF0:
261 case 0xE0:
262 case 0xC0:
263 case 0x80:
264 case 0x00:
265 gdbstub_port->rx_brk = 0;
266 goto try_again;
267 default:
268 break;
269 }
270 }
271
272 gdbstub_port->rx_brk = 0;
273 gdbstub_io("### GDB Rx %02x (st=%02x) ###\n", ch, st);
274 *_ch = ch & 0x7f;
275 return 0;
276 }
277}
278
279/*
280 * send a character to the debugger
281 */
282void gdbstub_io_tx_char(unsigned char ch)
283{
284 while (*gdbstub_port->_status & SC01STR_TBF)
285 continue;
286
287 if (ch == 0x0a) {
288 *(u8 *) gdbstub_port->_txb = 0x0d;
289 while (*gdbstub_port->_status & SC01STR_TBF)
290 continue;
291 }
292
293 *(u8 *) gdbstub_port->_txb = ch;
294}
295
296/*
297 * flush the transmission buffers
298 */
299void gdbstub_io_tx_flush(void)
300{
301 while (*gdbstub_port->_status & (SC01STR_TBF | SC01STR_TXF))
302 continue;
303}
diff --git a/arch/mn10300/kernel/gdb-low.S b/arch/mn10300/kernel/gdb-low.S
deleted file mode 100644
index e2725552cd82..000000000000
--- a/arch/mn10300/kernel/gdb-low.S
+++ /dev/null
@@ -1,115 +0,0 @@
1###############################################################################
2#
3# MN10300 Low-level gdbstub routines
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cache.h>
18#include <asm/cpu-regs.h>
19#include <asm/exceptions.h>
20#include <asm/frame.inc>
21#include <asm/serial-regs.h>
22
23 .text
24
25###############################################################################
26#
27# GDB stub read memory with guard
28# - D0 holds the memory address to read
29# - D1 holds the address to store the byte into
30#
31###############################################################################
32 .globl gdbstub_read_byte_guard
33 .globl gdbstub_read_byte_cont
34ENTRY(gdbstub_read_byte)
35 mov d0,a0
36 mov d1,a1
37 clr d0
38gdbstub_read_byte_guard:
39 movbu (a0),d1
40gdbstub_read_byte_cont:
41 movbu d1,(a1)
42 ret [],0
43
44 .globl gdbstub_read_word_guard
45 .globl gdbstub_read_word_cont
46ENTRY(gdbstub_read_word)
47 mov d0,a0
48 mov d1,a1
49 clr d0
50gdbstub_read_word_guard:
51 movhu (a0),d1
52gdbstub_read_word_cont:
53 movhu d1,(a1)
54 ret [],0
55
56 .globl gdbstub_read_dword_guard
57 .globl gdbstub_read_dword_cont
58ENTRY(gdbstub_read_dword)
59 mov d0,a0
60 mov d1,a1
61 clr d0
62gdbstub_read_dword_guard:
63 mov (a0),d1
64gdbstub_read_dword_cont:
65 mov d1,(a1)
66 ret [],0
67
68###############################################################################
69#
70# GDB stub write memory with guard
71# - D0 holds the byte to store
72# - D1 holds the memory address to write
73#
74###############################################################################
75 .globl gdbstub_write_byte_guard
76 .globl gdbstub_write_byte_cont
77ENTRY(gdbstub_write_byte)
78 mov d0,a0
79 mov d1,a1
80 clr d0
81gdbstub_write_byte_guard:
82 movbu a0,(a1)
83gdbstub_write_byte_cont:
84 ret [],0
85
86 .globl gdbstub_write_word_guard
87 .globl gdbstub_write_word_cont
88ENTRY(gdbstub_write_word)
89 mov d0,a0
90 mov d1,a1
91 clr d0
92gdbstub_write_word_guard:
93 movhu a0,(a1)
94gdbstub_write_word_cont:
95 ret [],0
96
97 .globl gdbstub_write_dword_guard
98 .globl gdbstub_write_dword_cont
99ENTRY(gdbstub_write_dword)
100 mov d0,a0
101 mov d1,a1
102 clr d0
103gdbstub_write_dword_guard:
104 mov a0,(a1)
105gdbstub_write_dword_cont:
106 ret [],0
107
108###############################################################################
109#
110# GDB stub BUG() trap
111#
112###############################################################################
113ENTRY(__gdbstub_bug_trap)
114 .byte 0xF7,0xF7 # don't use 0xFF as the JTAG unit preempts that
115 ret [],0
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
deleted file mode 100644
index 3399d5699804..000000000000
--- a/arch/mn10300/kernel/gdb-stub.c
+++ /dev/null
@@ -1,1924 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/* MN10300 GDB stub
3 *
4 * Originally written by Glenn Engel, Lake Stevens Instrument Division
5 *
6 * Contributed by HP Systems
7 *
8 * Modified for SPARC by Stu Grossman, Cygnus Support.
9 *
10 * Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
11 * Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
12 *
13 * Copyright (C) 1995 Andreas Busse
14 *
15 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
16 * Modified for Linux/mn10300 by David Howells <dhowells@redhat.com>
17 */
18
19/*
20 * To enable debugger support, two things need to happen. One, a
21 * call to set_debug_traps() is necessary in order to allow any breakpoints
22 * or error conditions to be properly intercepted and reported to gdb.
23 * Two, a breakpoint needs to be generated to begin communication. This
24 * is most easily accomplished by a call to breakpoint(). Breakpoint()
25 * simulates a breakpoint by executing a BREAK instruction.
26 *
27 *
28 * The following gdb commands are supported:
29 *
30 * command function Return value
31 *
32 * g return the value of the CPU registers hex data or ENN
33 * G set the value of the CPU registers OK or ENN
34 *
35 * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
36 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
37 *
38 * c Resume at current address SNN ( signal NN)
39 * cAA..AA Continue at address AA..AA SNN
40 *
41 * s Step one instruction SNN
42 * sAA..AA Step one instruction from AA..AA SNN
43 *
44 * k kill
45 *
46 * ? What was the last sigval ? SNN (signal NN)
47 *
48 * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
49 * baud rate
50 *
51 * All commands and responses are sent with a packet which includes a
52 * checksum. A packet consists of
53 *
54 * $<packet info>#<checksum>.
55 *
56 * where
57 * <packet info> :: <characters representing the command or response>
58 * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
59 *
60 * When a packet is received, it is first acknowledged with either '+' or '-'.
61 * '+' indicates a successful transfer. '-' indicates a failed transfer.
62 *
63 * Example:
64 *
65 * Host: Reply:
66 * $m0,10#2a +$00010203040506070809101112131415#42
67 *
68 *
69 * ==============
70 * MORE EXAMPLES:
71 * ==============
72 *
73 * For reference -- the following are the steps that one
74 * company took (RidgeRun Inc) to get remote gdb debugging
75 * going. In this scenario the host machine was a PC and the
76 * target platform was a Galileo EVB64120A MIPS evaluation
77 * board.
78 *
79 * Step 1:
80 * First download gdb-5.0.tar.gz from the internet.
81 * and then build/install the package.
82 *
83 * Example:
84 * $ tar zxf gdb-5.0.tar.gz
85 * $ cd gdb-5.0
86 * $ ./configure --target=am33_2.0-linux-gnu
87 * $ make
88 * $ install
89 * am33_2.0-linux-gnu-gdb
90 *
91 * Step 2:
92 * Configure linux for remote debugging and build it.
93 *
94 * Example:
95 * $ cd ~/linux
96 * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
97 * $ make dep; make vmlinux
98 *
99 * Step 3:
100 * Download the kernel to the remote target and start
101 * the kernel running. It will promptly halt and wait
102 * for the host gdb session to connect. It does this
103 * since the "Kernel Hacking" option has defined
104 * CONFIG_REMOTE_DEBUG which in turn enables your calls
105 * to:
106 * set_debug_traps();
107 * breakpoint();
108 *
109 * Step 4:
110 * Start the gdb session on the host.
111 *
112 * Example:
113 * $ am33_2.0-linux-gnu-gdb vmlinux
114 * (gdb) set remotebaud 115200
115 * (gdb) target remote /dev/ttyS1
116 * ...at this point you are connected to
117 * the remote target and can use gdb
118 * in the normal fasion. Setting
119 * breakpoints, single stepping,
120 * printing variables, etc.
121 *
122 */
123
124#include <linux/string.h>
125#include <linux/kernel.h>
126#include <linux/signal.h>
127#include <linux/sched.h>
128#include <linux/mm.h>
129#include <linux/console.h>
130#include <linux/init.h>
131#include <linux/bug.h>
132
133#include <asm/pgtable.h>
134#include <asm/gdb-stub.h>
135#include <asm/exceptions.h>
136#include <asm/debugger.h>
137#include <asm/serial-regs.h>
138#include <asm/busctl-regs.h>
139#include <unit/leds.h>
140#include <unit/serial.h>
141
142/* define to use F7F7 rather than FF which is subverted by JTAG debugger */
143#undef GDBSTUB_USE_F7F7_AS_BREAKPOINT
144
145/*
146 * BUFMAX defines the maximum number of characters in inbound/outbound buffers
147 * at least NUMREGBYTES*2 are needed for register packets
148 */
149#define BUFMAX 2048
150
151static const char gdbstub_banner[] =
152 "Linux/MN10300 GDB Stub (c) RedHat 2007\n";
153
154u8 gdbstub_rx_buffer[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));
155u32 gdbstub_rx_inp;
156u32 gdbstub_rx_outp;
157u8 gdbstub_busy;
158u8 gdbstub_rx_overflow;
159u8 gdbstub_rx_unget;
160
161static u8 gdbstub_flush_caches;
162static char input_buffer[BUFMAX];
163static char output_buffer[BUFMAX];
164static char trans_buffer[BUFMAX];
165
166struct gdbstub_bkpt {
167 u8 *addr; /* address of breakpoint */
168 u8 len; /* size of breakpoint */
169 u8 origbytes[7]; /* original bytes */
170};
171
172static struct gdbstub_bkpt gdbstub_bkpts[256];
173
174/*
175 * local prototypes
176 */
177static void getpacket(char *buffer);
178static int putpacket(char *buffer);
179static int computeSignal(enum exception_code excep);
180static int hex(unsigned char ch);
181static int hexToInt(char **ptr, int *intValue);
182static unsigned char *mem2hex(const void *mem, char *buf, int count,
183 int may_fault);
184static const char *hex2mem(const char *buf, void *_mem, int count,
185 int may_fault);
186
187/*
188 * Convert ch from a hex digit to an int
189 */
190static int hex(unsigned char ch)
191{
192 if (ch >= 'a' && ch <= 'f')
193 return ch - 'a' + 10;
194 if (ch >= '0' && ch <= '9')
195 return ch - '0';
196 if (ch >= 'A' && ch <= 'F')
197 return ch - 'A' + 10;
198 return -1;
199}
200
201#ifdef CONFIG_GDBSTUB_DEBUGGING
202
203void debug_to_serial(const char *p, int n)
204{
205 __debug_to_serial(p, n);
206 /* gdbstub_console_write(NULL, p, n); */
207}
208
209void gdbstub_printk(const char *fmt, ...)
210{
211 va_list args;
212 int len;
213
214 /* Emit the output into the temporary buffer */
215 va_start(args, fmt);
216 len = vsnprintf(trans_buffer, sizeof(trans_buffer), fmt, args);
217 va_end(args);
218 debug_to_serial(trans_buffer, len);
219}
220
221#endif
222
223static inline char *gdbstub_strcpy(char *dst, const char *src)
224{
225 int loop = 0;
226 while ((dst[loop] = src[loop]))
227 loop++;
228 return dst;
229}
230
231/*
232 * scan for the sequence $<data>#<checksum>
233 */
234static void getpacket(char *buffer)
235{
236 unsigned char checksum;
237 unsigned char xmitcsum;
238 unsigned char ch;
239 int count, i, ret, error;
240
241 for (;;) {
242 /*
243 * wait around for the start character,
244 * ignore all other characters
245 */
246 do {
247 gdbstub_io_rx_char(&ch, 0);
248 } while (ch != '$');
249
250 checksum = 0;
251 xmitcsum = -1;
252 count = 0;
253 error = 0;
254
255 /*
256 * now, read until a # or end of buffer is found
257 */
258 while (count < BUFMAX) {
259 ret = gdbstub_io_rx_char(&ch, 0);
260 if (ret < 0)
261 error = ret;
262
263 if (ch == '#')
264 break;
265 checksum += ch;
266 buffer[count] = ch;
267 count++;
268 }
269
270 if (error == -EIO) {
271 gdbstub_proto("### GDB Rx Error - Skipping packet"
272 " ###\n");
273 gdbstub_proto("### GDB Tx NAK\n");
274 gdbstub_io_tx_char('-');
275 continue;
276 }
277
278 if (count >= BUFMAX || error)
279 continue;
280
281 buffer[count] = 0;
282
283 /* read the checksum */
284 ret = gdbstub_io_rx_char(&ch, 0);
285 if (ret < 0)
286 error = ret;
287 xmitcsum = hex(ch) << 4;
288
289 ret = gdbstub_io_rx_char(&ch, 0);
290 if (ret < 0)
291 error = ret;
292 xmitcsum |= hex(ch);
293
294 if (error) {
295 if (error == -EIO)
296 gdbstub_io("### GDB Rx Error -"
297 " Skipping packet\n");
298 gdbstub_io("### GDB Tx NAK\n");
299 gdbstub_io_tx_char('-');
300 continue;
301 }
302
303 /* check the checksum */
304 if (checksum != xmitcsum) {
305 gdbstub_io("### GDB Tx NAK\n");
306 gdbstub_io_tx_char('-'); /* failed checksum */
307 continue;
308 }
309
310 gdbstub_proto("### GDB Rx '$%s#%02x' ###\n", buffer, checksum);
311 gdbstub_io("### GDB Tx ACK\n");
312 gdbstub_io_tx_char('+'); /* successful transfer */
313
314 /*
315 * if a sequence char is present,
316 * reply the sequence ID
317 */
318 if (buffer[2] == ':') {
319 gdbstub_io_tx_char(buffer[0]);
320 gdbstub_io_tx_char(buffer[1]);
321
322 /*
323 * remove sequence chars from buffer
324 */
325 count = 0;
326 while (buffer[count])
327 count++;
328 for (i = 3; i <= count; i++)
329 buffer[i - 3] = buffer[i];
330 }
331
332 break;
333 }
334}
335
336/*
337 * send the packet in buffer.
338 * - return 0 if successfully ACK'd
339 * - return 1 if abandoned due to new incoming packet
340 */
341static int putpacket(char *buffer)
342{
343 unsigned char checksum;
344 unsigned char ch;
345 int count;
346
347 /*
348 * $<packet info>#<checksum>.
349 */
350 gdbstub_proto("### GDB Tx $'%s'#?? ###\n", buffer);
351
352 do {
353 gdbstub_io_tx_char('$');
354 checksum = 0;
355 count = 0;
356
357 while ((ch = buffer[count]) != 0) {
358 gdbstub_io_tx_char(ch);
359 checksum += ch;
360 count += 1;
361 }
362
363 gdbstub_io_tx_char('#');
364 gdbstub_io_tx_char(hex_asc_hi(checksum));
365 gdbstub_io_tx_char(hex_asc_lo(checksum));
366
367 } while (gdbstub_io_rx_char(&ch, 0),
368 ch == '-' && (gdbstub_io("### GDB Rx NAK\n"), 0),
369 ch != '-' && ch != '+' &&
370 (gdbstub_io("### GDB Rx ??? %02x\n", ch), 0),
371 ch != '+' && ch != '$');
372
373 if (ch == '+') {
374 gdbstub_io("### GDB Rx ACK\n");
375 return 0;
376 }
377
378 gdbstub_io("### GDB Tx Abandoned\n");
379 gdbstub_rx_unget = ch;
380 return 1;
381}
382
383/*
384 * While we find nice hex chars, build an int.
385 * Return number of chars processed.
386 */
387static int hexToInt(char **ptr, int *intValue)
388{
389 int numChars = 0;
390 int hexValue;
391
392 *intValue = 0;
393
394 while (**ptr) {
395 hexValue = hex(**ptr);
396 if (hexValue < 0)
397 break;
398
399 *intValue = (*intValue << 4) | hexValue;
400 numChars++;
401
402 (*ptr)++;
403 }
404
405 return (numChars);
406}
407
408#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
409/*
410 * We single-step by setting breakpoints. When an exception
411 * is handled, we need to restore the instructions hoisted
412 * when the breakpoints were set.
413 *
414 * This is where we save the original instructions.
415 */
416static struct gdb_bp_save {
417 u8 *addr;
418 u8 opcode[2];
419} step_bp[2];
420
421static const unsigned char gdbstub_insn_sizes[256] =
422{
423 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
424 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
425 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
426 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
427 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
428 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
429 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
430 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
431 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
432 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
433 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
434 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
435 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
436 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
437 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
438 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
439 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
440};
441
442static int __gdbstub_mark_bp(u8 *addr, int ix)
443{
444 /* vmalloc area */
445 if (((u8 *) VMALLOC_START <= addr) && (addr < (u8 *) VMALLOC_END))
446 goto okay;
447 /* SRAM, SDRAM */
448 if (((u8 *) 0x80000000UL <= addr) && (addr < (u8 *) 0xa0000000UL))
449 goto okay;
450 return 0;
451
452okay:
453 if (gdbstub_read_byte(addr + 0, &step_bp[ix].opcode[0]) < 0 ||
454 gdbstub_read_byte(addr + 1, &step_bp[ix].opcode[1]) < 0)
455 return 0;
456
457 step_bp[ix].addr = addr;
458 return 1;
459}
460
461static inline void __gdbstub_restore_bp(void)
462{
463#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
464 if (step_bp[0].addr) {
465 gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
466 gdbstub_write_byte(step_bp[0].opcode[1], step_bp[0].addr + 1);
467 }
468 if (step_bp[1].addr) {
469 gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
470 gdbstub_write_byte(step_bp[1].opcode[1], step_bp[1].addr + 1);
471 }
472#else
473 if (step_bp[0].addr)
474 gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
475 if (step_bp[1].addr)
476 gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
477#endif
478
479 gdbstub_flush_caches = 1;
480
481 step_bp[0].addr = NULL;
482 step_bp[0].opcode[0] = 0;
483 step_bp[0].opcode[1] = 0;
484 step_bp[1].addr = NULL;
485 step_bp[1].opcode[0] = 0;
486 step_bp[1].opcode[1] = 0;
487}
488
489/*
490 * emulate single stepping by means of breakpoint instructions
491 */
492static int gdbstub_single_step(struct pt_regs *regs)
493{
494 unsigned size;
495 uint32_t x;
496 uint8_t cur, *pc, *sp;
497
498 step_bp[0].addr = NULL;
499 step_bp[0].opcode[0] = 0;
500 step_bp[0].opcode[1] = 0;
501 step_bp[1].addr = NULL;
502 step_bp[1].opcode[0] = 0;
503 step_bp[1].opcode[1] = 0;
504 x = 0;
505
506 pc = (u8 *) regs->pc;
507 sp = (u8 *) (regs + 1);
508 if (gdbstub_read_byte(pc, &cur) < 0)
509 return -EFAULT;
510
511 gdbstub_bkpt("Single Step from %p { %02x }\n", pc, cur);
512
513 gdbstub_flush_caches = 1;
514
515 size = gdbstub_insn_sizes[cur];
516 if (size > 0) {
517 if (!__gdbstub_mark_bp(pc + size, 0))
518 goto fault;
519 } else {
520 switch (cur) {
521 /* Bxx (d8,PC) */
522 case 0xc0 ... 0xca:
523 if (gdbstub_read_byte(pc + 1, (u8 *) &x) < 0)
524 goto fault;
525 if (!__gdbstub_mark_bp(pc + 2, 0))
526 goto fault;
527 if ((x < 0 || x > 2) &&
528 !__gdbstub_mark_bp(pc + (s8) x, 1))
529 goto fault;
530 break;
531
532 /* LXX (d8,PC) */
533 case 0xd0 ... 0xda:
534 if (!__gdbstub_mark_bp(pc + 1, 0))
535 goto fault;
536 if (regs->pc != regs->lar &&
537 !__gdbstub_mark_bp((u8 *) regs->lar, 1))
538 goto fault;
539 break;
540
541 /* SETLB - loads the next for bytes into the LIR
542 * register */
543 case 0xdb:
544 if (!__gdbstub_mark_bp(pc + 1, 0))
545 goto fault;
546 break;
547
548 /* JMP (d16,PC) or CALL (d16,PC) */
549 case 0xcc:
550 case 0xcd:
551 if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
552 gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0)
553 goto fault;
554 if (!__gdbstub_mark_bp(pc + (s16) x, 0))
555 goto fault;
556 break;
557
558 /* JMP (d32,PC) or CALL (d32,PC) */
559 case 0xdc:
560 case 0xdd:
561 if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
562 gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0 ||
563 gdbstub_read_byte(pc + 3, ((u8 *) &x) + 2) < 0 ||
564 gdbstub_read_byte(pc + 4, ((u8 *) &x) + 3) < 0)
565 goto fault;
566 if (!__gdbstub_mark_bp(pc + (s32) x, 0))
567 goto fault;
568 break;
569
570 /* RETF */
571 case 0xde:
572 if (!__gdbstub_mark_bp((u8 *) regs->mdr, 0))
573 goto fault;
574 break;
575
576 /* RET */
577 case 0xdf:
578 if (gdbstub_read_byte(pc + 2, (u8 *) &x) < 0)
579 goto fault;
580 sp += (s8)x;
581 if (gdbstub_read_byte(sp + 0, ((u8 *) &x) + 0) < 0 ||
582 gdbstub_read_byte(sp + 1, ((u8 *) &x) + 1) < 0 ||
583 gdbstub_read_byte(sp + 2, ((u8 *) &x) + 2) < 0 ||
584 gdbstub_read_byte(sp + 3, ((u8 *) &x) + 3) < 0)
585 goto fault;
586 if (!__gdbstub_mark_bp((u8 *) x, 0))
587 goto fault;
588 break;
589
590 case 0xf0:
591 if (gdbstub_read_byte(pc + 1, &cur) < 0)
592 goto fault;
593
594 if (cur >= 0xf0 && cur <= 0xf7) {
595 /* JMP (An) / CALLS (An) */
596 switch (cur & 3) {
597 case 0: x = regs->a0; break;
598 case 1: x = regs->a1; break;
599 case 2: x = regs->a2; break;
600 case 3: x = regs->a3; break;
601 }
602 if (!__gdbstub_mark_bp((u8 *) x, 0))
603 goto fault;
604 } else if (cur == 0xfc) {
605 /* RETS */
606 if (gdbstub_read_byte(
607 sp + 0, ((u8 *) &x) + 0) < 0 ||
608 gdbstub_read_byte(
609 sp + 1, ((u8 *) &x) + 1) < 0 ||
610 gdbstub_read_byte(
611 sp + 2, ((u8 *) &x) + 2) < 0 ||
612 gdbstub_read_byte(
613 sp + 3, ((u8 *) &x) + 3) < 0)
614 goto fault;
615 if (!__gdbstub_mark_bp((u8 *) x, 0))
616 goto fault;
617 } else if (cur == 0xfd) {
618 /* RTI */
619 if (gdbstub_read_byte(
620 sp + 4, ((u8 *) &x) + 0) < 0 ||
621 gdbstub_read_byte(
622 sp + 5, ((u8 *) &x) + 1) < 0 ||
623 gdbstub_read_byte(
624 sp + 6, ((u8 *) &x) + 2) < 0 ||
625 gdbstub_read_byte(
626 sp + 7, ((u8 *) &x) + 3) < 0)
627 goto fault;
628 if (!__gdbstub_mark_bp((u8 *) x, 0))
629 goto fault;
630 } else {
631 if (!__gdbstub_mark_bp(pc + 2, 0))
632 goto fault;
633 }
634
635 break;
636
637 /* potential 3-byte conditional branches */
638 case 0xf8:
639 if (gdbstub_read_byte(pc + 1, &cur) < 0)
640 goto fault;
641 if (!__gdbstub_mark_bp(pc + 3, 0))
642 goto fault;
643
644 if (cur >= 0xe8 && cur <= 0xeb) {
645 if (gdbstub_read_byte(
646 pc + 2, ((u8 *) &x) + 0) < 0)
647 goto fault;
648 if ((x < 0 || x > 3) &&
649 !__gdbstub_mark_bp(pc + (s8) x, 1))
650 goto fault;
651 }
652 break;
653
654 case 0xfa:
655 if (gdbstub_read_byte(pc + 1, &cur) < 0)
656 goto fault;
657
658 if (cur == 0xff) {
659 /* CALLS (d16,PC) */
660 if (gdbstub_read_byte(
661 pc + 2, ((u8 *) &x) + 0) < 0 ||
662 gdbstub_read_byte(
663 pc + 3, ((u8 *) &x) + 1) < 0)
664 goto fault;
665 if (!__gdbstub_mark_bp(pc + (s16) x, 0))
666 goto fault;
667 } else {
668 if (!__gdbstub_mark_bp(pc + 4, 0))
669 goto fault;
670 }
671 break;
672
673 case 0xfc:
674 if (gdbstub_read_byte(pc + 1, &cur) < 0)
675 goto fault;
676 if (cur == 0xff) {
677 /* CALLS (d32,PC) */
678 if (gdbstub_read_byte(
679 pc + 2, ((u8 *) &x) + 0) < 0 ||
680 gdbstub_read_byte(
681 pc + 3, ((u8 *) &x) + 1) < 0 ||
682 gdbstub_read_byte(
683 pc + 4, ((u8 *) &x) + 2) < 0 ||
684 gdbstub_read_byte(
685 pc + 5, ((u8 *) &x) + 3) < 0)
686 goto fault;
687 if (!__gdbstub_mark_bp(
688 pc + (s32) x, 0))
689 goto fault;
690 } else {
691 if (!__gdbstub_mark_bp(
692 pc + 6, 0))
693 goto fault;
694 }
695 break;
696
697 }
698 }
699
700 gdbstub_bkpt("Step: %02x at %p; %02x at %p\n",
701 step_bp[0].opcode[0], step_bp[0].addr,
702 step_bp[1].opcode[0], step_bp[1].addr);
703
704 if (step_bp[0].addr) {
705#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
706 if (gdbstub_write_byte(0xF7, step_bp[0].addr + 0) < 0 ||
707 gdbstub_write_byte(0xF7, step_bp[0].addr + 1) < 0)
708 goto fault;
709#else
710 if (gdbstub_write_byte(0xFF, step_bp[0].addr + 0) < 0)
711 goto fault;
712#endif
713 }
714
715 if (step_bp[1].addr) {
716#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
717 if (gdbstub_write_byte(0xF7, step_bp[1].addr + 0) < 0 ||
718 gdbstub_write_byte(0xF7, step_bp[1].addr + 1) < 0)
719 goto fault;
720#else
721 if (gdbstub_write_byte(0xFF, step_bp[1].addr + 0) < 0)
722 goto fault;
723#endif
724 }
725
726 return 0;
727
728 fault:
729 /* uh-oh - silly address alert, try and restore things */
730 __gdbstub_restore_bp();
731 return -EFAULT;
732}
733#endif /* CONFIG_GDBSTUB_ALLOW_SINGLE_STEP */
734
735#ifdef CONFIG_GDBSTUB_CONSOLE
736
737void gdbstub_console_write(struct console *con, const char *p, unsigned n)
738{
739 static const char gdbstub_cr[] = { 0x0d };
740 char outbuf[26];
741 int qty;
742 u8 busy;
743
744 busy = gdbstub_busy;
745 gdbstub_busy = 1;
746
747 outbuf[0] = 'O';
748
749 while (n > 0) {
750 qty = 1;
751
752 while (n > 0 && qty < 20) {
753 mem2hex(p, outbuf + qty, 2, 0);
754 qty += 2;
755 if (*p == 0x0a) {
756 mem2hex(gdbstub_cr, outbuf + qty, 2, 0);
757 qty += 2;
758 }
759 p++;
760 n--;
761 }
762
763 outbuf[qty] = 0;
764 putpacket(outbuf);
765 }
766
767 gdbstub_busy = busy;
768}
769
770static kdev_t gdbstub_console_dev(struct console *con)
771{
772 return MKDEV(1, 3); /* /dev/null */
773}
774
775static struct console gdbstub_console = {
776 .name = "gdb",
777 .write = gdbstub_console_write,
778 .device = gdbstub_console_dev,
779 .flags = CON_PRINTBUFFER,
780 .index = -1,
781};
782
783#endif
784
785/*
786 * Convert the memory pointed to by mem into hex, placing result in buf.
787 * - if successful, return a pointer to the last char put in buf (NUL)
788 * - in case of mem fault, return NULL
789 * may_fault is non-zero if we are reading from arbitrary memory, but is
790 * currently not used.
791 */
792static
793unsigned char *mem2hex(const void *_mem, char *buf, int count, int may_fault)
794{
795 const u8 *mem = _mem;
796 u8 ch[4];
797
798 if ((u32) mem & 1 && count >= 1) {
799 if (gdbstub_read_byte(mem, ch) != 0)
800 return 0;
801 buf = hex_byte_pack(buf, ch[0]);
802 mem++;
803 count--;
804 }
805
806 if ((u32) mem & 3 && count >= 2) {
807 if (gdbstub_read_word(mem, ch) != 0)
808 return 0;
809 buf = hex_byte_pack(buf, ch[0]);
810 buf = hex_byte_pack(buf, ch[1]);
811 mem += 2;
812 count -= 2;
813 }
814
815 while (count >= 4) {
816 if (gdbstub_read_dword(mem, ch) != 0)
817 return 0;
818 buf = hex_byte_pack(buf, ch[0]);
819 buf = hex_byte_pack(buf, ch[1]);
820 buf = hex_byte_pack(buf, ch[2]);
821 buf = hex_byte_pack(buf, ch[3]);
822 mem += 4;
823 count -= 4;
824 }
825
826 if (count >= 2) {
827 if (gdbstub_read_word(mem, ch) != 0)
828 return 0;
829 buf = hex_byte_pack(buf, ch[0]);
830 buf = hex_byte_pack(buf, ch[1]);
831 mem += 2;
832 count -= 2;
833 }
834
835 if (count >= 1) {
836 if (gdbstub_read_byte(mem, ch) != 0)
837 return 0;
838 buf = hex_byte_pack(buf, ch[0]);
839 }
840
841 *buf = 0;
842 return buf;
843}
844
845/*
846 * convert the hex array pointed to by buf into binary to be placed in mem
847 * return a pointer to the character AFTER the last byte written
848 * may_fault is non-zero if we are reading from arbitrary memory, but is
849 * currently not used.
850 */
851static
852const char *hex2mem(const char *buf, void *_mem, int count, int may_fault)
853{
854 u8 *mem = _mem;
855 union {
856 u32 val;
857 u8 b[4];
858 } ch;
859
860 if ((u32) mem & 1 && count >= 1) {
861 ch.b[0] = hex(*buf++) << 4;
862 ch.b[0] |= hex(*buf++);
863 if (gdbstub_write_byte(ch.val, mem) != 0)
864 return 0;
865 mem++;
866 count--;
867 }
868
869 if ((u32) mem & 3 && count >= 2) {
870 ch.b[0] = hex(*buf++) << 4;
871 ch.b[0] |= hex(*buf++);
872 ch.b[1] = hex(*buf++) << 4;
873 ch.b[1] |= hex(*buf++);
874 if (gdbstub_write_word(ch.val, mem) != 0)
875 return 0;
876 mem += 2;
877 count -= 2;
878 }
879
880 while (count >= 4) {
881 ch.b[0] = hex(*buf++) << 4;
882 ch.b[0] |= hex(*buf++);
883 ch.b[1] = hex(*buf++) << 4;
884 ch.b[1] |= hex(*buf++);
885 ch.b[2] = hex(*buf++) << 4;
886 ch.b[2] |= hex(*buf++);
887 ch.b[3] = hex(*buf++) << 4;
888 ch.b[3] |= hex(*buf++);
889 if (gdbstub_write_dword(ch.val, mem) != 0)
890 return 0;
891 mem += 4;
892 count -= 4;
893 }
894
895 if (count >= 2) {
896 ch.b[0] = hex(*buf++) << 4;
897 ch.b[0] |= hex(*buf++);
898 ch.b[1] = hex(*buf++) << 4;
899 ch.b[1] |= hex(*buf++);
900 if (gdbstub_write_word(ch.val, mem) != 0)
901 return 0;
902 mem += 2;
903 count -= 2;
904 }
905
906 if (count >= 1) {
907 ch.b[0] = hex(*buf++) << 4;
908 ch.b[0] |= hex(*buf++);
909 if (gdbstub_write_byte(ch.val, mem) != 0)
910 return 0;
911 }
912
913 return buf;
914}
915
916/*
917 * This table contains the mapping between MN10300 exception codes, and
918 * signals, which are primarily what GDB understands. It also indicates
919 * which hardware traps we need to commandeer when initializing the stub.
920 */
921static const struct excep_to_sig_map {
922 enum exception_code excep; /* MN10300 exception code */
923 unsigned char signo; /* Signal that we map this into */
924} excep_to_sig_map[] = {
925 { EXCEP_ITLBMISS, SIGSEGV },
926 { EXCEP_DTLBMISS, SIGSEGV },
927 { EXCEP_TRAP, SIGTRAP },
928 { EXCEP_ISTEP, SIGTRAP },
929 { EXCEP_IBREAK, SIGTRAP },
930 { EXCEP_OBREAK, SIGTRAP },
931 { EXCEP_UNIMPINS, SIGILL },
932 { EXCEP_UNIMPEXINS, SIGILL },
933 { EXCEP_MEMERR, SIGSEGV },
934 { EXCEP_MISALIGN, SIGSEGV },
935 { EXCEP_BUSERROR, SIGBUS },
936 { EXCEP_ILLINSACC, SIGSEGV },
937 { EXCEP_ILLDATACC, SIGSEGV },
938 { EXCEP_IOINSACC, SIGSEGV },
939 { EXCEP_PRIVINSACC, SIGSEGV },
940 { EXCEP_PRIVDATACC, SIGSEGV },
941 { EXCEP_FPU_DISABLED, SIGFPE },
942 { EXCEP_FPU_UNIMPINS, SIGFPE },
943 { EXCEP_FPU_OPERATION, SIGFPE },
944 { EXCEP_WDT, SIGALRM },
945 { EXCEP_NMI, SIGQUIT },
946 { EXCEP_IRQ_LEVEL0, SIGINT },
947 { EXCEP_IRQ_LEVEL1, SIGINT },
948 { EXCEP_IRQ_LEVEL2, SIGINT },
949 { EXCEP_IRQ_LEVEL3, SIGINT },
950 { EXCEP_IRQ_LEVEL4, SIGINT },
951 { EXCEP_IRQ_LEVEL5, SIGINT },
952 { EXCEP_IRQ_LEVEL6, SIGINT },
953 { 0, 0}
954};
955
956/*
957 * convert the MN10300 exception code into a UNIX signal number
958 */
959static int computeSignal(enum exception_code excep)
960{
961 const struct excep_to_sig_map *map;
962
963 for (map = excep_to_sig_map; map->signo; map++)
964 if (map->excep == excep)
965 return map->signo;
966
967 return SIGHUP; /* default for things we don't know about */
968}
969
970static u32 gdbstub_fpcr, gdbstub_fpufs_array[32];
971
972/*
973 *
974 */
975static void gdbstub_store_fpu(void)
976{
977#ifdef CONFIG_FPU
978
979 asm volatile(
980 "or %2,epsw\n"
981#ifdef CONFIG_MN10300_PROC_MN103E010
982 "nop\n"
983 "nop\n"
984#endif
985 "mov %1, a1\n"
986 "fmov fs0, (a1+)\n"
987 "fmov fs1, (a1+)\n"
988 "fmov fs2, (a1+)\n"
989 "fmov fs3, (a1+)\n"
990 "fmov fs4, (a1+)\n"
991 "fmov fs5, (a1+)\n"
992 "fmov fs6, (a1+)\n"
993 "fmov fs7, (a1+)\n"
994 "fmov fs8, (a1+)\n"
995 "fmov fs9, (a1+)\n"
996 "fmov fs10, (a1+)\n"
997 "fmov fs11, (a1+)\n"
998 "fmov fs12, (a1+)\n"
999 "fmov fs13, (a1+)\n"
1000 "fmov fs14, (a1+)\n"
1001 "fmov fs15, (a1+)\n"
1002 "fmov fs16, (a1+)\n"
1003 "fmov fs17, (a1+)\n"
1004 "fmov fs18, (a1+)\n"
1005 "fmov fs19, (a1+)\n"
1006 "fmov fs20, (a1+)\n"
1007 "fmov fs21, (a1+)\n"
1008 "fmov fs22, (a1+)\n"
1009 "fmov fs23, (a1+)\n"
1010 "fmov fs24, (a1+)\n"
1011 "fmov fs25, (a1+)\n"
1012 "fmov fs26, (a1+)\n"
1013 "fmov fs27, (a1+)\n"
1014 "fmov fs28, (a1+)\n"
1015 "fmov fs29, (a1+)\n"
1016 "fmov fs30, (a1+)\n"
1017 "fmov fs31, (a1+)\n"
1018 "fmov fpcr, %0\n"
1019 : "=d"(gdbstub_fpcr)
1020 : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE)
1021 : "a1"
1022 );
1023#endif
1024}
1025
1026/*
1027 *
1028 */
1029static void gdbstub_load_fpu(void)
1030{
1031#ifdef CONFIG_FPU
1032
1033 asm volatile(
1034 "or %1,epsw\n"
1035#ifdef CONFIG_MN10300_PROC_MN103E010
1036 "nop\n"
1037 "nop\n"
1038#endif
1039 "mov %0, a1\n"
1040 "fmov (a1+), fs0\n"
1041 "fmov (a1+), fs1\n"
1042 "fmov (a1+), fs2\n"
1043 "fmov (a1+), fs3\n"
1044 "fmov (a1+), fs4\n"
1045 "fmov (a1+), fs5\n"
1046 "fmov (a1+), fs6\n"
1047 "fmov (a1+), fs7\n"
1048 "fmov (a1+), fs8\n"
1049 "fmov (a1+), fs9\n"
1050 "fmov (a1+), fs10\n"
1051 "fmov (a1+), fs11\n"
1052 "fmov (a1+), fs12\n"
1053 "fmov (a1+), fs13\n"
1054 "fmov (a1+), fs14\n"
1055 "fmov (a1+), fs15\n"
1056 "fmov (a1+), fs16\n"
1057 "fmov (a1+), fs17\n"
1058 "fmov (a1+), fs18\n"
1059 "fmov (a1+), fs19\n"
1060 "fmov (a1+), fs20\n"
1061 "fmov (a1+), fs21\n"
1062 "fmov (a1+), fs22\n"
1063 "fmov (a1+), fs23\n"
1064 "fmov (a1+), fs24\n"
1065 "fmov (a1+), fs25\n"
1066 "fmov (a1+), fs26\n"
1067 "fmov (a1+), fs27\n"
1068 "fmov (a1+), fs28\n"
1069 "fmov (a1+), fs29\n"
1070 "fmov (a1+), fs30\n"
1071 "fmov (a1+), fs31\n"
1072 "fmov %2, fpcr\n"
1073 :
1074 : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE), "d"(gdbstub_fpcr)
1075 : "a1"
1076 );
1077#endif
1078}
1079
1080/*
1081 * set a software breakpoint
1082 */
1083int gdbstub_set_breakpoint(u8 *addr, int len)
1084{
1085 int bkpt, loop, xloop;
1086
1087#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1088 len = (len + 1) & ~1;
1089#endif
1090
1091 gdbstub_bkpt("setbkpt(%p,%d)\n", addr, len);
1092
1093 for (bkpt = 255; bkpt >= 0; bkpt--)
1094 if (!gdbstub_bkpts[bkpt].addr)
1095 break;
1096 if (bkpt < 0)
1097 return -ENOSPC;
1098
1099 for (loop = 0; loop < len; loop++)
1100 if (gdbstub_read_byte(&addr[loop],
1101 &gdbstub_bkpts[bkpt].origbytes[loop]
1102 ) < 0)
1103 return -EFAULT;
1104
1105 gdbstub_flush_caches = 1;
1106
1107#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1108 for (loop = 0; loop < len; loop++)
1109 if (gdbstub_write_byte(0xF7, &addr[loop]) < 0)
1110 goto restore;
1111#else
1112 for (loop = 0; loop < len; loop++)
1113 if (gdbstub_write_byte(0xFF, &addr[loop]) < 0)
1114 goto restore;
1115#endif
1116
1117 gdbstub_bkpts[bkpt].addr = addr;
1118 gdbstub_bkpts[bkpt].len = len;
1119
1120 gdbstub_bkpt("Set BKPT[%02x]: %p-%p {%02x%02x%02x%02x%02x%02x%02x}\n",
1121 bkpt,
1122 gdbstub_bkpts[bkpt].addr,
1123 gdbstub_bkpts[bkpt].addr + gdbstub_bkpts[bkpt].len - 1,
1124 gdbstub_bkpts[bkpt].origbytes[0],
1125 gdbstub_bkpts[bkpt].origbytes[1],
1126 gdbstub_bkpts[bkpt].origbytes[2],
1127 gdbstub_bkpts[bkpt].origbytes[3],
1128 gdbstub_bkpts[bkpt].origbytes[4],
1129 gdbstub_bkpts[bkpt].origbytes[5],
1130 gdbstub_bkpts[bkpt].origbytes[6]
1131 );
1132
1133 return 0;
1134
1135restore:
1136 for (xloop = 0; xloop < loop; xloop++)
1137 gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[xloop],
1138 addr + xloop);
1139 return -EFAULT;
1140}
1141
1142/*
1143 * clear a software breakpoint
1144 */
1145int gdbstub_clear_breakpoint(u8 *addr, int len)
1146{
1147 int bkpt, loop;
1148
1149#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1150 len = (len + 1) & ~1;
1151#endif
1152
1153 gdbstub_bkpt("clearbkpt(%p,%d)\n", addr, len);
1154
1155 for (bkpt = 255; bkpt >= 0; bkpt--)
1156 if (gdbstub_bkpts[bkpt].addr == addr &&
1157 gdbstub_bkpts[bkpt].len == len)
1158 break;
1159 if (bkpt < 0)
1160 return -ENOENT;
1161
1162 gdbstub_bkpts[bkpt].addr = NULL;
1163
1164 gdbstub_flush_caches = 1;
1165
1166 for (loop = 0; loop < len; loop++)
1167 if (gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[loop],
1168 addr + loop) < 0)
1169 return -EFAULT;
1170
1171 return 0;
1172}
1173
1174/*
1175 * This function does all command processing for interfacing to gdb
1176 * - returns 0 if the exception should be skipped, -ERROR otherwise.
1177 */
1178static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1179{
1180 unsigned long *stack;
1181 unsigned long epsw, mdr;
1182 uint32_t zero, ssp;
1183 uint8_t broke;
1184 char *ptr;
1185 int sigval;
1186 int addr;
1187 int length;
1188 int loop;
1189
1190 if (excep == EXCEP_FPU_DISABLED)
1191 return -ENOTSUPP;
1192
1193 gdbstub_flush_caches = 0;
1194
1195 mn10300_set_gdbleds(1);
1196
1197 asm volatile("mov mdr,%0" : "=d"(mdr));
1198 local_save_flags(epsw);
1199 arch_local_change_intr_mask_level(
1200 NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
1201
1202 gdbstub_store_fpu();
1203
1204#ifdef CONFIG_GDBSTUB_IMMEDIATE
1205 /* skip the initial pause loop */
1206 if (regs->pc == (unsigned long) __gdbstub_pause)
1207 regs->pc = (unsigned long) start_kernel;
1208#endif
1209
1210 /* if we were single stepping, restore the opcodes hoisted for the
1211 * breakpoint[s] */
1212 broke = 0;
1213#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
1214 if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) ||
1215 (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc))
1216 broke = 1;
1217
1218 __gdbstub_restore_bp();
1219#endif
1220
1221 if (gdbstub_rx_unget) {
1222 sigval = SIGINT;
1223 if (gdbstub_rx_unget != 3)
1224 goto packet_waiting;
1225 gdbstub_rx_unget = 0;
1226 }
1227
1228 stack = (unsigned long *) regs->sp;
1229 sigval = broke ? SIGTRAP : computeSignal(excep);
1230
1231 /* send information about a BUG() */
1232 if (!user_mode(regs) && excep == EXCEP_SYSCALL15) {
1233 const struct bug_entry *bug;
1234
1235 bug = find_bug(regs->pc);
1236 if (bug)
1237 goto found_bug;
1238 length = snprintf(trans_buffer, sizeof(trans_buffer),
1239 "BUG() at address %lx\n", regs->pc);
1240 goto send_bug_pkt;
1241
1242 found_bug:
1243 length = snprintf(trans_buffer, sizeof(trans_buffer),
1244 "BUG() at address %lx (%s:%d)\n",
1245 regs->pc, bug->file, bug->line);
1246
1247 send_bug_pkt:
1248 ptr = output_buffer;
1249 *ptr++ = 'O';
1250 ptr = mem2hex(trans_buffer, ptr, length, 0);
1251 *ptr = 0;
1252 putpacket(output_buffer);
1253
1254 regs->pc -= 2;
1255 sigval = SIGABRT;
1256 } else if (regs->pc == (unsigned long) __gdbstub_bug_trap) {
1257 regs->pc = regs->mdr;
1258 sigval = SIGABRT;
1259 }
1260
1261 /*
1262 * send a message to the debugger's user saying what happened if it may
1263 * not be clear cut (we can't map exceptions onto signals properly)
1264 */
1265 if (sigval != SIGINT && sigval != SIGTRAP && sigval != SIGILL) {
1266 static const char title[] = "Excep ", tbcberr[] = "BCBERR ";
1267 static const char crlf[] = "\r\n";
1268 char hx;
1269 u32 bcberr = BCBERR;
1270
1271 ptr = output_buffer;
1272 *ptr++ = 'O';
1273 ptr = mem2hex(title, ptr, sizeof(title) - 1, 0);
1274
1275 hx = hex_asc_hi(excep >> 8);
1276 ptr = hex_byte_pack(ptr, hx);
1277 hx = hex_asc_lo(excep >> 8);
1278 ptr = hex_byte_pack(ptr, hx);
1279 hx = hex_asc_hi(excep);
1280 ptr = hex_byte_pack(ptr, hx);
1281 hx = hex_asc_lo(excep);
1282 ptr = hex_byte_pack(ptr, hx);
1283
1284 ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
1285 *ptr = 0;
1286 putpacket(output_buffer); /* send it off... */
1287
1288 /* BCBERR */
1289 ptr = output_buffer;
1290 *ptr++ = 'O';
1291 ptr = mem2hex(tbcberr, ptr, sizeof(tbcberr) - 1, 0);
1292
1293 hx = hex_asc_hi(bcberr >> 24);
1294 ptr = hex_byte_pack(ptr, hx);
1295 hx = hex_asc_lo(bcberr >> 24);
1296 ptr = hex_byte_pack(ptr, hx);
1297 hx = hex_asc_hi(bcberr >> 16);
1298 ptr = hex_byte_pack(ptr, hx);
1299 hx = hex_asc_lo(bcberr >> 16);
1300 ptr = hex_byte_pack(ptr, hx);
1301 hx = hex_asc_hi(bcberr >> 8);
1302 ptr = hex_byte_pack(ptr, hx);
1303 hx = hex_asc_lo(bcberr >> 8);
1304 ptr = hex_byte_pack(ptr, hx);
1305 hx = hex_asc_hi(bcberr);
1306 ptr = hex_byte_pack(ptr, hx);
1307 hx = hex_asc_lo(bcberr);
1308 ptr = hex_byte_pack(ptr, hx);
1309
1310 ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
1311 *ptr = 0;
1312 putpacket(output_buffer); /* send it off... */
1313 }
1314
1315 /*
1316 * tell the debugger that an exception has occurred
1317 */
1318 ptr = output_buffer;
1319
1320 /*
1321 * Send trap type (converted to signal)
1322 */
1323 *ptr++ = 'T';
1324 ptr = hex_byte_pack(ptr, sigval);
1325
1326 /*
1327 * Send Error PC
1328 */
1329 ptr = hex_byte_pack(ptr, GDB_REGID_PC);
1330 *ptr++ = ':';
1331 ptr = mem2hex(&regs->pc, ptr, 4, 0);
1332 *ptr++ = ';';
1333
1334 /*
1335 * Send frame pointer
1336 */
1337 ptr = hex_byte_pack(ptr, GDB_REGID_FP);
1338 *ptr++ = ':';
1339 ptr = mem2hex(&regs->a3, ptr, 4, 0);
1340 *ptr++ = ';';
1341
1342 /*
1343 * Send stack pointer
1344 */
1345 ssp = (unsigned long) (regs + 1);
1346 ptr = hex_byte_pack(ptr, GDB_REGID_SP);
1347 *ptr++ = ':';
1348 ptr = mem2hex(&ssp, ptr, 4, 0);
1349 *ptr++ = ';';
1350
1351 *ptr++ = 0;
1352 putpacket(output_buffer); /* send it off... */
1353
1354packet_waiting:
1355 /*
1356 * Wait for input from remote GDB
1357 */
1358 while (1) {
1359 output_buffer[0] = 0;
1360 getpacket(input_buffer);
1361
1362 switch (input_buffer[0]) {
1363 /* request repeat of last signal number */
1364 case '?':
1365 output_buffer[0] = 'S';
1366 output_buffer[1] = hex_asc_hi(sigval);
1367 output_buffer[2] = hex_asc_lo(sigval);
1368 output_buffer[3] = 0;
1369 break;
1370
1371 case 'd':
1372 /* toggle debug flag */
1373 break;
1374
1375 /*
1376 * Return the value of the CPU registers
1377 */
1378 case 'g':
1379 zero = 0;
1380 ssp = (u32) (regs + 1);
1381 ptr = output_buffer;
1382 ptr = mem2hex(&regs->d0, ptr, 4, 0);
1383 ptr = mem2hex(&regs->d1, ptr, 4, 0);
1384 ptr = mem2hex(&regs->d2, ptr, 4, 0);
1385 ptr = mem2hex(&regs->d3, ptr, 4, 0);
1386 ptr = mem2hex(&regs->a0, ptr, 4, 0);
1387 ptr = mem2hex(&regs->a1, ptr, 4, 0);
1388 ptr = mem2hex(&regs->a2, ptr, 4, 0);
1389 ptr = mem2hex(&regs->a3, ptr, 4, 0);
1390
1391 ptr = mem2hex(&ssp, ptr, 4, 0); /* 8 */
1392 ptr = mem2hex(&regs->pc, ptr, 4, 0);
1393 ptr = mem2hex(&regs->mdr, ptr, 4, 0);
1394 ptr = mem2hex(&regs->epsw, ptr, 4, 0);
1395 ptr = mem2hex(&regs->lir, ptr, 4, 0);
1396 ptr = mem2hex(&regs->lar, ptr, 4, 0);
1397 ptr = mem2hex(&regs->mdrq, ptr, 4, 0);
1398
1399 ptr = mem2hex(&regs->e0, ptr, 4, 0); /* 15 */
1400 ptr = mem2hex(&regs->e1, ptr, 4, 0);
1401 ptr = mem2hex(&regs->e2, ptr, 4, 0);
1402 ptr = mem2hex(&regs->e3, ptr, 4, 0);
1403 ptr = mem2hex(&regs->e4, ptr, 4, 0);
1404 ptr = mem2hex(&regs->e5, ptr, 4, 0);
1405 ptr = mem2hex(&regs->e6, ptr, 4, 0);
1406 ptr = mem2hex(&regs->e7, ptr, 4, 0);
1407
1408 ptr = mem2hex(&ssp, ptr, 4, 0);
1409 ptr = mem2hex(&regs, ptr, 4, 0);
1410 ptr = mem2hex(&regs->sp, ptr, 4, 0);
1411 ptr = mem2hex(&regs->mcrh, ptr, 4, 0); /* 26 */
1412 ptr = mem2hex(&regs->mcrl, ptr, 4, 0);
1413 ptr = mem2hex(&regs->mcvf, ptr, 4, 0);
1414
1415 ptr = mem2hex(&gdbstub_fpcr, ptr, 4, 0); /* 29 - FPCR */
1416 ptr = mem2hex(&zero, ptr, 4, 0);
1417 ptr = mem2hex(&zero, ptr, 4, 0);
1418 for (loop = 0; loop < 32; loop++)
1419 ptr = mem2hex(&gdbstub_fpufs_array[loop],
1420 ptr, 4, 0); /* 32 - FS0-31 */
1421
1422 break;
1423
1424 /*
1425 * set the value of the CPU registers - return OK
1426 */
1427 case 'G':
1428 {
1429 const char *ptr;
1430
1431 ptr = &input_buffer[1];
1432 ptr = hex2mem(ptr, &regs->d0, 4, 0);
1433 ptr = hex2mem(ptr, &regs->d1, 4, 0);
1434 ptr = hex2mem(ptr, &regs->d2, 4, 0);
1435 ptr = hex2mem(ptr, &regs->d3, 4, 0);
1436 ptr = hex2mem(ptr, &regs->a0, 4, 0);
1437 ptr = hex2mem(ptr, &regs->a1, 4, 0);
1438 ptr = hex2mem(ptr, &regs->a2, 4, 0);
1439 ptr = hex2mem(ptr, &regs->a3, 4, 0);
1440
1441 ptr = hex2mem(ptr, &ssp, 4, 0); /* 8 */
1442 ptr = hex2mem(ptr, &regs->pc, 4, 0);
1443 ptr = hex2mem(ptr, &regs->mdr, 4, 0);
1444 ptr = hex2mem(ptr, &regs->epsw, 4, 0);
1445 ptr = hex2mem(ptr, &regs->lir, 4, 0);
1446 ptr = hex2mem(ptr, &regs->lar, 4, 0);
1447 ptr = hex2mem(ptr, &regs->mdrq, 4, 0);
1448
1449 ptr = hex2mem(ptr, &regs->e0, 4, 0); /* 15 */
1450 ptr = hex2mem(ptr, &regs->e1, 4, 0);
1451 ptr = hex2mem(ptr, &regs->e2, 4, 0);
1452 ptr = hex2mem(ptr, &regs->e3, 4, 0);
1453 ptr = hex2mem(ptr, &regs->e4, 4, 0);
1454 ptr = hex2mem(ptr, &regs->e5, 4, 0);
1455 ptr = hex2mem(ptr, &regs->e6, 4, 0);
1456 ptr = hex2mem(ptr, &regs->e7, 4, 0);
1457
1458 ptr = hex2mem(ptr, &ssp, 4, 0);
1459 ptr = hex2mem(ptr, &zero, 4, 0);
1460 ptr = hex2mem(ptr, &regs->sp, 4, 0);
1461 ptr = hex2mem(ptr, &regs->mcrh, 4, 0); /* 26 */
1462 ptr = hex2mem(ptr, &regs->mcrl, 4, 0);
1463 ptr = hex2mem(ptr, &regs->mcvf, 4, 0);
1464
1465 ptr = hex2mem(ptr, &zero, 4, 0); /* 29 - FPCR */
1466 ptr = hex2mem(ptr, &zero, 4, 0);
1467 ptr = hex2mem(ptr, &zero, 4, 0);
1468 for (loop = 0; loop < 32; loop++) /* 32 - FS0-31 */
1469 ptr = hex2mem(ptr, &zero, 4, 0);
1470
1471#if 0
1472 /*
1473 * See if the stack pointer has moved. If so, then copy
1474 * the saved locals and ins to the new location.
1475 */
1476 unsigned long *newsp = (unsigned long *) registers[SP];
1477 if (sp != newsp)
1478 sp = memcpy(newsp, sp, 16 * 4);
1479#endif
1480
1481 gdbstub_strcpy(output_buffer, "OK");
1482 }
1483 break;
1484
1485 /*
1486 * mAA..AA,LLLL Read LLLL bytes at address AA..AA
1487 */
1488 case 'm':
1489 ptr = &input_buffer[1];
1490
1491 if (hexToInt(&ptr, &addr) &&
1492 *ptr++ == ',' &&
1493 hexToInt(&ptr, &length)
1494 ) {
1495 if (mem2hex((char *) addr, output_buffer,
1496 length, 1))
1497 break;
1498 gdbstub_strcpy(output_buffer, "E03");
1499 } else {
1500 gdbstub_strcpy(output_buffer, "E01");
1501 }
1502 break;
1503
1504 /*
1505 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA
1506 * return OK
1507 */
1508 case 'M':
1509 ptr = &input_buffer[1];
1510
1511 if (hexToInt(&ptr, &addr) &&
1512 *ptr++ == ',' &&
1513 hexToInt(&ptr, &length) &&
1514 *ptr++ == ':'
1515 ) {
1516 if (hex2mem(ptr, (char *) addr, length, 1))
1517 gdbstub_strcpy(output_buffer, "OK");
1518 else
1519 gdbstub_strcpy(output_buffer, "E03");
1520
1521 gdbstub_flush_caches = 1;
1522 } else {
1523 gdbstub_strcpy(output_buffer, "E02");
1524 }
1525 break;
1526
1527 /*
1528 * cAA..AA Continue at address AA..AA(optional)
1529 */
1530 case 'c':
1531 /* try to read optional parameter, pc unchanged if no
1532 * parm */
1533
1534 ptr = &input_buffer[1];
1535 if (hexToInt(&ptr, &addr))
1536 regs->pc = addr;
1537 goto done;
1538
1539 /*
1540 * kill the program
1541 */
1542 case 'k' :
1543 goto done; /* just continue */
1544
1545 /*
1546 * Reset the whole machine (FIXME: system dependent)
1547 */
1548 case 'r':
1549 break;
1550
1551 /*
1552 * Step to next instruction
1553 */
1554 case 's':
1555 /* Using the T flag doesn't seem to perform single
1556 * stepping (it seems to wind up being caught by the
1557 * JTAG unit), so we have to use breakpoints and
1558 * continue instead.
1559 */
1560#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
1561 if (gdbstub_single_step(regs) < 0)
1562 /* ignore any fault error for now */
1563 gdbstub_printk("unable to set single-step"
1564 " bp\n");
1565 goto done;
1566#else
1567 gdbstub_strcpy(output_buffer, "E01");
1568 break;
1569#endif
1570
1571 /*
1572 * Set baud rate (bBB)
1573 */
1574 case 'b':
1575 do {
1576 int baudrate;
1577
1578 ptr = &input_buffer[1];
1579 if (!hexToInt(&ptr, &baudrate)) {
1580 gdbstub_strcpy(output_buffer, "B01");
1581 break;
1582 }
1583
1584 if (baudrate) {
1585 /* ACK before changing speed */
1586 putpacket("OK");
1587 gdbstub_io_set_baud(baudrate);
1588 }
1589 } while (0);
1590 break;
1591
1592 /*
1593 * Set breakpoint
1594 */
1595 case 'Z':
1596 ptr = &input_buffer[1];
1597
1598 if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
1599 !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
1600 !hexToInt(&ptr, &length)
1601 ) {
1602 gdbstub_strcpy(output_buffer, "E01");
1603 break;
1604 }
1605
1606 /* only support software breakpoints */
1607 gdbstub_strcpy(output_buffer, "E03");
1608 if (loop != 0 ||
1609 length < 1 ||
1610 length > 7 ||
1611 (unsigned long) addr < 4096)
1612 break;
1613
1614 if (gdbstub_set_breakpoint((u8 *) addr, length) < 0)
1615 break;
1616
1617 gdbstub_strcpy(output_buffer, "OK");
1618 break;
1619
1620 /*
1621 * Clear breakpoint
1622 */
1623 case 'z':
1624 ptr = &input_buffer[1];
1625
1626 if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
1627 !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
1628 !hexToInt(&ptr, &length)
1629 ) {
1630 gdbstub_strcpy(output_buffer, "E01");
1631 break;
1632 }
1633
1634 /* only support software breakpoints */
1635 gdbstub_strcpy(output_buffer, "E03");
1636 if (loop != 0 ||
1637 length < 1 ||
1638 length > 7 ||
1639 (unsigned long) addr < 4096)
1640 break;
1641
1642 if (gdbstub_clear_breakpoint((u8 *) addr, length) < 0)
1643 break;
1644
1645 gdbstub_strcpy(output_buffer, "OK");
1646 break;
1647
1648 default:
1649 gdbstub_proto("### GDB Unsupported Cmd '%s'\n",
1650 input_buffer);
1651 break;
1652 }
1653
1654 /* reply to the request */
1655 putpacket(output_buffer);
1656 }
1657
1658done:
1659 /*
1660 * Need to flush the instruction cache here, as we may
1661 * have deposited a breakpoint, and the icache probably
1662 * has no way of knowing that a data ref to some location
1663 * may have changed something that is in the instruction
1664 * cache.
1665 * NB: We flush both caches, just to be sure...
1666 */
1667 if (gdbstub_flush_caches)
1668 debugger_local_cache_flushinv();
1669
1670 gdbstub_load_fpu();
1671 mn10300_set_gdbleds(0);
1672 if (excep == EXCEP_NMI)
1673 NMICR = NMICR_NMIF;
1674
1675 touch_softlockup_watchdog();
1676
1677 local_irq_restore(epsw);
1678 return 0;
1679}
1680
1681/*
1682 * Determine if we hit a debugger special breakpoint that needs skipping over
1683 * automatically.
1684 */
1685int at_debugger_breakpoint(struct pt_regs *regs)
1686{
1687 return 0;
1688}
1689
1690/*
1691 * handle event interception
1692 */
1693asmlinkage int debugger_intercept(enum exception_code excep,
1694 int signo, int si_code, struct pt_regs *regs)
1695{
1696 static u8 notfirst = 1;
1697 int ret;
1698
1699 if (gdbstub_busy)
1700 gdbstub_printk("--> gdbstub reentered itself\n");
1701 gdbstub_busy = 1;
1702
1703 if (notfirst) {
1704 unsigned long mdr;
1705 asm("mov mdr,%0" : "=d"(mdr));
1706
1707 gdbstub_entry(
1708 "--> debugger_intercept(%p,%04x) [MDR=%lx PC=%lx]\n",
1709 regs, excep, mdr, regs->pc);
1710
1711 gdbstub_entry(
1712 "PC: %08lx EPSW: %08lx SSP: %08lx mode: %s\n",
1713 regs->pc, regs->epsw, (unsigned long) &ret,
1714 user_mode(regs) ? "User" : "Super");
1715 gdbstub_entry(
1716 "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
1717 regs->d0, regs->d1, regs->d2, regs->d3);
1718 gdbstub_entry(
1719 "a0: %08lx a1: %08lx a2: %08lx a3: %08lx\n",
1720 regs->a0, regs->a1, regs->a2, regs->a3);
1721 gdbstub_entry(
1722 "e0: %08lx e1: %08lx e2: %08lx e3: %08lx\n",
1723 regs->e0, regs->e1, regs->e2, regs->e3);
1724 gdbstub_entry(
1725 "e4: %08lx e5: %08lx e6: %08lx e7: %08lx\n",
1726 regs->e4, regs->e5, regs->e6, regs->e7);
1727 gdbstub_entry(
1728 "lar: %08lx lir: %08lx mdr: %08lx usp: %08lx\n",
1729 regs->lar, regs->lir, regs->mdr, regs->sp);
1730 gdbstub_entry(
1731 "cvf: %08lx crl: %08lx crh: %08lx drq: %08lx\n",
1732 regs->mcvf, regs->mcrl, regs->mcrh, regs->mdrq);
1733 gdbstub_entry(
1734 "threadinfo=%p task=%p)\n",
1735 current_thread_info(), current);
1736 } else {
1737 notfirst = 1;
1738 }
1739
1740 ret = gdbstub(regs, excep);
1741
1742 gdbstub_entry("<-- debugger_intercept()\n");
1743 gdbstub_busy = 0;
1744 return ret;
1745}
1746
1747/*
1748 * handle the GDB stub itself causing an exception
1749 */
1750asmlinkage void gdbstub_exception(struct pt_regs *regs,
1751 enum exception_code excep)
1752{
1753 unsigned long mdr;
1754
1755 asm("mov mdr,%0" : "=d"(mdr));
1756 gdbstub_entry("--> gdbstub exception({%p},%04x) [MDR=%lx]\n",
1757 regs, excep, mdr);
1758
1759 while ((unsigned long) regs == 0xffffffff) {}
1760
1761 /* handle guarded memory accesses where we know it might fault */
1762 if (regs->pc == (unsigned) gdbstub_read_byte_guard) {
1763 regs->pc = (unsigned) gdbstub_read_byte_cont;
1764 goto fault;
1765 }
1766
1767 if (regs->pc == (unsigned) gdbstub_read_word_guard) {
1768 regs->pc = (unsigned) gdbstub_read_word_cont;
1769 goto fault;
1770 }
1771
1772 if (regs->pc == (unsigned) gdbstub_read_dword_guard) {
1773 regs->pc = (unsigned) gdbstub_read_dword_cont;
1774 goto fault;
1775 }
1776
1777 if (regs->pc == (unsigned) gdbstub_write_byte_guard) {
1778 regs->pc = (unsigned) gdbstub_write_byte_cont;
1779 goto fault;
1780 }
1781
1782 if (regs->pc == (unsigned) gdbstub_write_word_guard) {
1783 regs->pc = (unsigned) gdbstub_write_word_cont;
1784 goto fault;
1785 }
1786
1787 if (regs->pc == (unsigned) gdbstub_write_dword_guard) {
1788 regs->pc = (unsigned) gdbstub_write_dword_cont;
1789 goto fault;
1790 }
1791
1792 gdbstub_printk("\n### GDB stub caused an exception ###\n");
1793
1794 /* something went horribly wrong */
1795 console_verbose();
1796 show_registers(regs);
1797
1798 panic("GDB Stub caused an unexpected exception - can't continue\n");
1799
1800 /* we caught an attempt by the stub to access silly memory */
1801fault:
1802 gdbstub_entry("<-- gdbstub exception() = EFAULT\n");
1803 regs->d0 = -EFAULT;
1804 return;
1805}
1806
1807/*
1808 * send an exit message to GDB
1809 */
1810void gdbstub_exit(int status)
1811{
1812 unsigned char checksum;
1813 unsigned char ch;
1814 int count;
1815
1816 gdbstub_busy = 1;
1817 output_buffer[0] = 'W';
1818 output_buffer[1] = hex_asc_hi(status);
1819 output_buffer[2] = hex_asc_lo(status);
1820 output_buffer[3] = 0;
1821
1822 gdbstub_io_tx_char('$');
1823 checksum = 0;
1824 count = 0;
1825
1826 while ((ch = output_buffer[count]) != 0) {
1827 gdbstub_io_tx_char(ch);
1828 checksum += ch;
1829 count += 1;
1830 }
1831
1832 gdbstub_io_tx_char('#');
1833 gdbstub_io_tx_char(hex_asc_hi(checksum));
1834 gdbstub_io_tx_char(hex_asc_lo(checksum));
1835
1836 /* make sure the output is flushed, or else RedBoot might clobber it */
1837 gdbstub_io_tx_flush();
1838
1839 gdbstub_busy = 0;
1840}
1841
1842/*
1843 * initialise the GDB stub
1844 */
1845asmlinkage void __init gdbstub_init(void)
1846{
1847#ifdef CONFIG_GDBSTUB_IMMEDIATE
1848 unsigned char ch;
1849 int ret;
1850#endif
1851
1852 gdbstub_busy = 1;
1853
1854 printk(KERN_INFO "%s", gdbstub_banner);
1855
1856 gdbstub_io_init();
1857
1858 gdbstub_entry("--> gdbstub_init\n");
1859
1860 /* try to talk to GDB (or anyone insane enough to want to type GDB
1861 * protocol by hand) */
1862 gdbstub_io("### GDB Tx ACK\n");
1863 gdbstub_io_tx_char('+'); /* 'hello world' */
1864
1865#ifdef CONFIG_GDBSTUB_IMMEDIATE
1866 gdbstub_printk("GDB Stub waiting for packet\n");
1867
1868 /* in case GDB is started before us, ACK any packets that are already
1869 * sitting there (presumably "$?#xx")
1870 */
1871 do { gdbstub_io_rx_char(&ch, 0); } while (ch != '$');
1872 do { gdbstub_io_rx_char(&ch, 0); } while (ch != '#');
1873 /* eat first csum byte */
1874 do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
1875 /* eat second csum byte */
1876 do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
1877
1878 gdbstub_io("### GDB Tx NAK\n");
1879 gdbstub_io_tx_char('-'); /* NAK it */
1880
1881#else
1882 printk("GDB Stub ready\n");
1883#endif
1884
1885 gdbstub_busy = 0;
1886 gdbstub_entry("<-- gdbstub_init\n");
1887}
1888
1889/*
1890 * register the console at a more appropriate time
1891 */
1892#ifdef CONFIG_GDBSTUB_CONSOLE
1893static int __init gdbstub_postinit(void)
1894{
1895 printk(KERN_NOTICE "registering console\n");
1896 register_console(&gdbstub_console);
1897 return 0;
1898}
1899
1900__initcall(gdbstub_postinit);
1901#endif
1902
1903/*
1904 * handle character reception on GDB serial port
1905 * - jump into the GDB stub if BREAK is detected on the serial line
1906 */
1907asmlinkage void gdbstub_rx_irq(struct pt_regs *regs, enum exception_code excep)
1908{
1909 char ch;
1910 int ret;
1911
1912 gdbstub_entry("--> gdbstub_rx_irq\n");
1913
1914 do {
1915 ret = gdbstub_io_rx_char(&ch, 1);
1916 if (ret != -EIO && ret != -EAGAIN) {
1917 if (ret != -EINTR)
1918 gdbstub_rx_unget = ch;
1919 gdbstub(regs, excep);
1920 }
1921 } while (ret != -EAGAIN);
1922
1923 gdbstub_entry("<-- gdbstub_rx_irq\n");
1924}
diff --git a/arch/mn10300/kernel/head.S b/arch/mn10300/kernel/head.S
deleted file mode 100644
index 0b15f759e0d2..000000000000
--- a/arch/mn10300/kernel/head.S
+++ /dev/null
@@ -1,442 +0,0 @@
1/* Boot entry point for MN10300 kernel
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/threads.h>
14#include <linux/linkage.h>
15#include <linux/serial_reg.h>
16#include <asm/thread_info.h>
17#include <asm/page.h>
18#include <asm/pgtable.h>
19#include <asm/frame.inc>
20#include <asm/param.h>
21#include <unit/serial.h>
22#ifdef CONFIG_SMP
23#include <asm/smp.h>
24#include <asm/intctl-regs.h>
25#include <asm/cpu-regs.h>
26#include <proc/smp-regs.h>
27#endif /* CONFIG_SMP */
28
29 __HEAD
30
31###############################################################################
32#
33# bootloader entry point
34#
35###############################################################################
36 .globl _start
37 .type _start,@function
38_start:
39#ifdef CONFIG_SMP
40 #
41 # If this is a secondary CPU (AP), then deal with that elsewhere
42 #
43 mov (CPUID),d3
44 and CPUID_MASK,d3
45 bne startup_secondary
46
47 #
48 # We're dealing with the primary CPU (BP) here, then.
49 # Keep BP's D0,D1,D2 register for boot check.
50 #
51
52 # Set up the Boot IPI for each secondary CPU
53 mov 0x1,a0
54loop_set_secondary_icr:
55 mov a0,a1
56 asl CROSS_ICR_CPU_SHIFT,a1
57 add CROSS_GxICR(SMP_BOOT_IRQ,0),a1
58 movhu (a1),d3
59 or GxICR_ENABLE|GxICR_LEVEL_0,d3
60 movhu d3,(a1)
61 movhu (a1),d3 # flush
62 inc a0
63 cmp NR_CPUS,a0
64 bne loop_set_secondary_icr
65#endif /* CONFIG_SMP */
66
67 # save commandline pointer
68 mov d0,a3
69
70 # preload the PGD pointer register
71 mov swapper_pg_dir,d0
72 mov d0,(PTBR)
73 clr d0
74 movbu d0,(PIDR)
75
76 # turn on the TLBs
77 mov MMUCTR_IIV|MMUCTR_DIV,d0
78 mov d0,(MMUCTR)
79#ifdef CONFIG_AM34_2
80 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE|MMUCTR_WTE,d0
81#else
82 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
83#endif
84 mov d0,(MMUCTR)
85
86 # turn on AM33v2 exception handling mode and set the trap table base
87 movhu (CPUP),d0
88 or CPUP_EXM_AM33V2,d0
89 movhu d0,(CPUP)
90 mov CONFIG_INTERRUPT_VECTOR_BASE,d0
91 mov d0,(TBR)
92
93 # invalidate and enable both of the caches
94#ifdef CONFIG_SMP
95 mov ECHCTR,a0
96 clr d0
97 mov d0,(a0)
98#endif
99 mov CHCTR,a0
100 clr d0
101 movhu d0,(a0) # turn off first
102 mov CHCTR_ICINV|CHCTR_DCINV,d0
103 movhu d0,(a0)
104 setlb
105 mov (a0),d0
106 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
107 lne
108
109#ifdef CONFIG_MN10300_CACHE_ENABLED
110#ifdef CONFIG_MN10300_CACHE_WBACK
111#ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
112 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
113#else
114 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
115#endif /* NOWRALLOC */
116#else
117 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
118#endif /* WBACK */
119 movhu d0,(a0) # enable
120#endif /* ENABLED */
121
122 # turn on RTS on the debug serial port if applicable
123#ifdef CONFIG_MN10300_UNIT_ASB2305
124 bset UART_MCR_RTS,(ASB2305_DEBUG_MCR)
125#endif
126
127 # clear the BSS area
128 mov __bss_start,a0
129 mov __bss_stop,a1
130 clr d0
131bssclear:
132 cmp a1,a0
133 bge bssclear_end
134 mov d0,(a0)
135 inc4 a0
136 bra bssclear
137bssclear_end:
138
139 # retrieve the parameters (including command line) before we overwrite
140 # them
141 cmp 0xabadcafe,d1
142 bne __no_parameters
143
144__copy_parameters:
145 mov redboot_command_line,a0
146 mov a0,a1
147 add COMMAND_LINE_SIZE,a1
1481:
149 movbu (a3),d0
150 inc a3
151 movbu d0,(a0)
152 inc a0
153 cmp a1,a0
154 blt 1b
155
156 mov redboot_platform_name,a0
157 mov a0,a1
158 add COMMAND_LINE_SIZE,a1
159 mov d2,a3
1601:
161 movbu (a3),d0
162 inc a3
163 movbu d0,(a0)
164 inc a0
165 cmp a1,a0
166 blt 1b
167
168__no_parameters:
169
170 # set up the registers with recognisable rubbish in them
171 mov init_thread_union+THREAD_SIZE-12,sp
172
173 mov 0xea01eaea,d0
174 mov d0,(4,sp) # EPSW save area
175 mov 0xea02eaea,d0
176 mov d0,(8,sp) # PC save area
177
178 mov 0xeb0060ed,d0
179 mov d0,mdr
180 mov 0xeb0061ed,d0
181 mov d0,mdrq
182 mov 0xeb0062ed,d0
183 mov d0,mcrh
184 mov 0xeb0063ed,d0
185 mov d0,mcrl
186 mov 0xeb0064ed,d0
187 mov d0,mcvf
188 mov 0xed0065ed,a3
189 mov a3,usp
190
191 mov 0xed00e0ed,e0
192 mov 0xed00e1ed,e1
193 mov 0xed00e2ed,e2
194 mov 0xed00e3ed,e3
195 mov 0xed00e4ed,e4
196 mov 0xed00e5ed,e5
197 mov 0xed00e6ed,e6
198 mov 0xed00e7ed,e7
199
200 mov 0xed00d0ed,d0
201 mov 0xed00d1ed,d1
202 mov 0xed00d2ed,d2
203 mov 0xed00d3ed,d3
204 mov 0xed00a0ed,a0
205 mov 0xed00a1ed,a1
206 mov 0xed00a2ed,a2
207 mov 0,a3
208
209 # set up the initial kernel stack
210 SAVE_ALL
211 mov 0xffffffff,d0
212 mov d0,(REG_ORIG_D0,fp)
213
214 # put different recognisable rubbish in the regs
215 mov 0xfb0060ed,d0
216 mov d0,mdr
217 mov 0xfb0061ed,d0
218 mov d0,mdrq
219 mov 0xfb0062ed,d0
220 mov d0,mcrh
221 mov 0xfb0063ed,d0
222 mov d0,mcrl
223 mov 0xfb0064ed,d0
224 mov d0,mcvf
225 mov 0xfd0065ed,a0
226 mov a0,usp
227
228 mov 0xfd00e0ed,e0
229 mov 0xfd00e1ed,e1
230 mov 0xfd00e2ed,e2
231 mov 0xfd00e3ed,e3
232 mov 0xfd00e4ed,e4
233 mov 0xfd00e5ed,e5
234 mov 0xfd00e6ed,e6
235 mov 0xfd00e7ed,e7
236
237 mov 0xfd00d0ed,d0
238 mov 0xfd00d1ed,d1
239 mov 0xfd00d2ed,d2
240 mov 0xfd00d3ed,d3
241 mov 0xfd00a0ed,a0
242 mov 0xfd00a1ed,a1
243 mov 0xfd00a2ed,a2
244
245 # we may be holding current in E2
246#ifdef CONFIG_MN10300_CURRENT_IN_E2
247 mov init_task,e2
248#endif
249
250 # initialise the processor and the unit
251 call processor_init[],0
252 call unit_init[],0
253
254#ifdef CONFIG_SMP
255 # mark the primary CPU in cpu_boot_map
256 mov cpu_boot_map,a0
257 mov 0x1,d0
258 mov d0,(a0)
259
260 # signal each secondary CPU to begin booting
261 mov 0x1,d2 # CPU ID
262
263loop_request_boot_secondary:
264 mov d2,a0
265 # send SMP_BOOT_IPI to secondary CPU
266 asl CROSS_ICR_CPU_SHIFT,a0
267 add CROSS_GxICR(SMP_BOOT_IRQ,0),a0
268 movhu (a0),d0
269 or GxICR_REQUEST|GxICR_DETECT,d0
270 movhu d0,(a0)
271 movhu (a0),d0 # flush
272
273 # wait up to 100ms for AP's IPI to be received
274 clr d3
275wait_on_secondary_boot:
276 mov DELAY_TIME_BOOT_IPI,d0
277 call __delay[],0
278 inc d3
279 mov cpu_boot_map,a0
280 mov (a0),d0
281 lsr d2,d0
282 btst 0x1,d0
283 bne 1f
284 cmp TIME_OUT_COUNT_BOOT_IPI,d3
285 bne wait_on_secondary_boot
2861:
287 inc d2
288 cmp NR_CPUS,d2
289 bne loop_request_boot_secondary
290#endif /* CONFIG_SMP */
291
292#ifdef CONFIG_GDBSTUB
293 call gdbstub_init[],0
294
295#ifdef CONFIG_GDBSTUB_IMMEDIATE
296 .globl __gdbstub_pause
297__gdbstub_pause:
298 bra __gdbstub_pause
299#endif
300#endif
301
302 jmp start_kernel
303 .size _start,.-_start
304
305###############################################################################
306#
307# Secondary CPU boot point
308#
309###############################################################################
310#ifdef CONFIG_SMP
311startup_secondary:
312 # preload the PGD pointer register
313 mov swapper_pg_dir,d0
314 mov d0,(PTBR)
315 clr d0
316 movbu d0,(PIDR)
317
318 # turn on the TLBs
319 mov MMUCTR_IIV|MMUCTR_DIV,d0
320 mov d0,(MMUCTR)
321#ifdef CONFIG_AM34_2
322 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE|MMUCTR_WTE,d0
323#else
324 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
325#endif
326 mov d0,(MMUCTR)
327
328 # turn on AM33v2 exception handling mode and set the trap table base
329 movhu (CPUP),d0
330 or CPUP_EXM_AM33V2,d0
331 movhu d0,(CPUP)
332
333 # set the interrupt vector table
334 mov CONFIG_INTERRUPT_VECTOR_BASE,d0
335 mov d0,(TBR)
336
337 # invalidate and enable both of the caches
338 mov ECHCTR,a0
339 clr d0
340 mov d0,(a0)
341 mov CHCTR,a0
342 clr d0
343 movhu d0,(a0) # turn off first
344 mov CHCTR_ICINV|CHCTR_DCINV,d0
345 movhu d0,(a0)
346 setlb
347 mov (a0),d0
348 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy (use CPU loop buffer)
349 lne
350
351#ifdef CONFIG_MN10300_CACHE_ENABLED
352#ifdef CONFIG_MN10300_CACHE_WBACK
353#ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
354 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
355#else
356 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
357#endif /* !NOWRALLOC */
358#else
359 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
360#endif /* WBACK */
361 movhu d0,(a0) # enable
362#endif /* ENABLED */
363
364 # Clear the boot IPI interrupt for this CPU
365 movhu (GxICR(SMP_BOOT_IRQ)),d0
366 and ~GxICR_REQUEST,d0
367 movhu d0,(GxICR(SMP_BOOT_IRQ))
368 movhu (GxICR(SMP_BOOT_IRQ)),d0 # flush
369
370 /* get stack */
371 mov CONFIG_INTERRUPT_VECTOR_BASE + CONFIG_BOOT_STACK_OFFSET,a0
372 mov (CPUID),d0
373 and CPUID_MASK,d0
374 mulu CONFIG_BOOT_STACK_SIZE,d0
375 sub d0,a0
376 mov a0,sp
377
378 # init interrupt for AP
379 call smp_prepare_cpu_init[],0
380
381 # mark this secondary CPU in cpu_boot_map
382 mov (CPUID),d0
383 mov 0x1,d1
384 asl d0,d1
385 mov cpu_boot_map,a0
386 bset d1,(a0)
387
388 or EPSW_IE|EPSW_IM_1,epsw # permit level 0 interrupts
389 nop
390 nop
391#ifdef CONFIG_MN10300_CACHE_WBACK
392 # flush the local cache if it's in writeback mode
393 call mn10300_local_dcache_flush_inv[],0
394 setlb
395 mov (CHCTR),d0
396 btst CHCTR_DCBUSY,d0 # wait till not busy (use CPU loop buffer)
397 lne
398#endif
399
400 # now sleep waiting for further instructions
401secondary_sleep:
402 mov CPUM_SLEEP,d0
403 movhu d0,(CPUM)
404 nop
405 nop
406 bra secondary_sleep
407 .size startup_secondary,.-startup_secondary
408#endif /* CONFIG_SMP */
409
410###############################################################################
411#
412#
413#
414###############################################################################
415ENTRY(__head_end)
416
417/*
418 * This is initialized to disallow all access to the low 2G region
419 * - the high 2G region is managed directly by the MMU
420 * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC
421 */
422 .section .bss
423 .balign PAGE_SIZE
424ENTRY(swapper_pg_dir)
425 .space PTRS_PER_PGD*4
426
427/*
428 * The page tables are initialized to only 8MB here - the final page
429 * tables are set up later depending on memory size.
430 */
431
432 .balign PAGE_SIZE
433ENTRY(empty_zero_page)
434 .space PAGE_SIZE
435
436 .balign PAGE_SIZE
437ENTRY(large_page_table)
438 .space PAGE_SIZE
439
440 .balign PAGE_SIZE
441ENTRY(kernel_vmalloc_ptes)
442 .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
deleted file mode 100644
index 561785581f6c..000000000000
--- a/arch/mn10300/kernel/internal.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* Internal definitions for the arch part of the core kernel
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/irqreturn.h>
13
14struct clocksource;
15struct clock_event_device;
16
17/*
18 * entry.S
19 */
20extern void ret_from_fork(struct task_struct *) __attribute__((noreturn));
21extern void ret_from_kernel_thread(struct task_struct *) __attribute__((noreturn));
22
23/*
24 * smp-low.S
25 */
26#ifdef CONFIG_SMP
27extern void mn10300_low_ipi_handler(void);
28#endif
29
30/*
31 * smp.c
32 */
33#ifdef CONFIG_SMP
34extern void smp_jump_to_debugger(void);
35#endif
36
37/*
38 * time.c
39 */
40extern irqreturn_t local_timer_interrupt(void);
diff --git a/arch/mn10300/kernel/io.c b/arch/mn10300/kernel/io.c
deleted file mode 100644
index e96fdf6bb542..000000000000
--- a/arch/mn10300/kernel/io.c
+++ /dev/null
@@ -1,30 +0,0 @@
1/* MN10300 Misaligned multibyte-word I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/string.h>
13#include <linux/kernel.h>
14#include <asm/io.h>
15
16/*
17 * output data from a potentially misaligned buffer
18 */
19void __outsl(unsigned long addr, const void *buffer, int count)
20{
21 const unsigned char *buf = buffer;
22 unsigned long val;
23
24 while (count--) {
25 memcpy(&val, buf, 4);
26 outl(val, addr);
27 buf += 4;
28 }
29}
30EXPORT_SYMBOL(__outsl);
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
deleted file mode 100644
index c716437baa2c..000000000000
--- a/arch/mn10300/kernel/irq.c
+++ /dev/null
@@ -1,356 +0,0 @@
1/* MN10300 Arch-specific interrupt handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/interrupt.h>
13#include <linux/kernel_stat.h>
14#include <linux/seq_file.h>
15#include <linux/cpumask.h>
16#include <asm/setup.h>
17#include <asm/serial-regs.h>
18
19unsigned long __mn10300_irq_enabled_epsw[NR_CPUS] __cacheline_aligned_in_smp = {
20 [0 ... NR_CPUS - 1] = EPSW_IE | EPSW_IM_7
21};
22EXPORT_SYMBOL(__mn10300_irq_enabled_epsw);
23
24#ifdef CONFIG_SMP
25static char irq_affinity_online[NR_IRQS] = {
26 [0 ... NR_IRQS - 1] = 0
27};
28
29#define NR_IRQ_WORDS ((NR_IRQS + 31) / 32)
30static unsigned long irq_affinity_request[NR_IRQ_WORDS] = {
31 [0 ... NR_IRQ_WORDS - 1] = 0
32};
33#endif /* CONFIG_SMP */
34
35atomic_t irq_err_count;
36
37/*
38 * MN10300 interrupt controller operations
39 */
40static void mn10300_cpupic_ack(struct irq_data *d)
41{
42 unsigned int irq = d->irq;
43 unsigned long flags;
44 u16 tmp;
45
46 flags = arch_local_cli_save();
47 GxICR_u8(irq) = GxICR_DETECT;
48 tmp = GxICR(irq);
49 arch_local_irq_restore(flags);
50}
51
52static void __mask_and_set_icr(unsigned int irq,
53 unsigned int mask, unsigned int set)
54{
55 unsigned long flags;
56 u16 tmp;
57
58 flags = arch_local_cli_save();
59 tmp = GxICR(irq);
60 GxICR(irq) = (tmp & mask) | set;
61 tmp = GxICR(irq);
62 arch_local_irq_restore(flags);
63}
64
65static void mn10300_cpupic_mask(struct irq_data *d)
66{
67 __mask_and_set_icr(d->irq, GxICR_LEVEL, 0);
68}
69
70static void mn10300_cpupic_mask_ack(struct irq_data *d)
71{
72 unsigned int irq = d->irq;
73#ifdef CONFIG_SMP
74 unsigned long flags;
75 u16 tmp;
76
77 flags = arch_local_cli_save();
78
79 if (!test_and_clear_bit(irq, irq_affinity_request)) {
80 tmp = GxICR(irq);
81 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
82 tmp = GxICR(irq);
83 } else {
84 u16 tmp2;
85 tmp = GxICR(irq);
86 GxICR(irq) = (tmp & GxICR_LEVEL);
87 tmp2 = GxICR(irq);
88
89 irq_affinity_online[irq] =
90 cpumask_any_and(irq_data_get_affinity_mask(d),
91 cpu_online_mask);
92 CROSS_GxICR(irq, irq_affinity_online[irq]) =
93 (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT;
94 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
95 }
96
97 arch_local_irq_restore(flags);
98#else /* CONFIG_SMP */
99 __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_DETECT);
100#endif /* CONFIG_SMP */
101}
102
103static void mn10300_cpupic_unmask(struct irq_data *d)
104{
105 __mask_and_set_icr(d->irq, GxICR_LEVEL, GxICR_ENABLE);
106}
107
108static void mn10300_cpupic_unmask_clear(struct irq_data *d)
109{
110 unsigned int irq = d->irq;
111 /* the MN10300 PIC latches its interrupt request bit, even after the
112 * device has ceased to assert its interrupt line and the interrupt
113 * channel has been disabled in the PIC, so for level-triggered
114 * interrupts we need to clear the request bit when we re-enable */
115#ifdef CONFIG_SMP
116 unsigned long flags;
117 u16 tmp;
118
119 flags = arch_local_cli_save();
120
121 if (!test_and_clear_bit(irq, irq_affinity_request)) {
122 tmp = GxICR(irq);
123 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
124 tmp = GxICR(irq);
125 } else {
126 tmp = GxICR(irq);
127
128 irq_affinity_online[irq] = cpumask_any_and(irq_data_get_affinity_mask(d),
129 cpu_online_mask);
130 CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
131 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
132 }
133
134 arch_local_irq_restore(flags);
135#else /* CONFIG_SMP */
136 __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_ENABLE | GxICR_DETECT);
137#endif /* CONFIG_SMP */
138}
139
140#ifdef CONFIG_SMP
141static int
142mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask,
143 bool force)
144{
145 unsigned long flags;
146
147 flags = arch_local_cli_save();
148 set_bit(d->irq, irq_affinity_request);
149 arch_local_irq_restore(flags);
150 return 0;
151}
152#endif /* CONFIG_SMP */
153
154/*
155 * MN10300 PIC level-triggered IRQ handling.
156 *
157 * The PIC has no 'ACK' function per se. It is possible to clear individual
158 * channel latches, but each latch relatches whether or not the channel is
159 * masked, so we need to clear the latch when we unmask the channel.
160 *
161 * Also for this reason, we don't supply an ack() op (it's unused anyway if
162 * mask_ack() is provided), and mask_ack() just masks.
163 */
164static struct irq_chip mn10300_cpu_pic_level = {
165 .name = "cpu_l",
166 .irq_disable = mn10300_cpupic_mask,
167 .irq_enable = mn10300_cpupic_unmask_clear,
168 .irq_ack = NULL,
169 .irq_mask = mn10300_cpupic_mask,
170 .irq_mask_ack = mn10300_cpupic_mask,
171 .irq_unmask = mn10300_cpupic_unmask_clear,
172#ifdef CONFIG_SMP
173 .irq_set_affinity = mn10300_cpupic_setaffinity,
174#endif
175};
176
177/*
178 * MN10300 PIC edge-triggered IRQ handling.
179 *
180 * We use the latch clearing function of the PIC as the 'ACK' function.
181 */
182static struct irq_chip mn10300_cpu_pic_edge = {
183 .name = "cpu_e",
184 .irq_disable = mn10300_cpupic_mask,
185 .irq_enable = mn10300_cpupic_unmask,
186 .irq_ack = mn10300_cpupic_ack,
187 .irq_mask = mn10300_cpupic_mask,
188 .irq_mask_ack = mn10300_cpupic_mask_ack,
189 .irq_unmask = mn10300_cpupic_unmask,
190#ifdef CONFIG_SMP
191 .irq_set_affinity = mn10300_cpupic_setaffinity,
192#endif
193};
194
195/*
196 * 'what should we do if we get a hw irq event on an illegal vector'.
197 * each architecture has to answer this themselves.
198 */
199void ack_bad_irq(int irq)
200{
201 printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
202}
203
204/*
205 * change the level at which an IRQ executes
206 * - must not be called whilst interrupts are being processed!
207 */
208void set_intr_level(int irq, u16 level)
209{
210 BUG_ON(in_interrupt());
211
212 __mask_and_set_icr(irq, GxICR_ENABLE, level);
213}
214
215/*
216 * mark an interrupt to be ACK'd after interrupt handlers have been run rather
217 * than before
218 */
219void mn10300_set_lateack_irq_type(int irq)
220{
221 irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level,
222 handle_level_irq);
223}
224
225/*
226 * initialise the interrupt system
227 */
228void __init init_IRQ(void)
229{
230 int irq;
231
232 for (irq = 0; irq < NR_IRQS; irq++)
233 if (irq_get_chip(irq) == &no_irq_chip)
234 /* due to the PIC latching interrupt requests, even
235 * when the IRQ is disabled, IRQ_PENDING is superfluous
236 * and we can use handle_level_irq() for edge-triggered
237 * interrupts */
238 irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge,
239 handle_level_irq);
240
241 unit_init_IRQ();
242}
243
244/*
245 * handle normal device IRQs
246 */
247asmlinkage void do_IRQ(void)
248{
249 unsigned long sp, epsw, irq_disabled_epsw, old_irq_enabled_epsw;
250 unsigned int cpu_id = smp_processor_id();
251 int irq;
252
253 sp = current_stack_pointer();
254 BUG_ON(sp - (sp & ~(THREAD_SIZE - 1)) < STACK_WARN);
255
256 /* make sure local_irq_enable() doesn't muck up the interrupt priority
257 * setting in EPSW */
258 old_irq_enabled_epsw = __mn10300_irq_enabled_epsw[cpu_id];
259 local_save_flags(epsw);
260 __mn10300_irq_enabled_epsw[cpu_id] = EPSW_IE | (EPSW_IM & epsw);
261 irq_disabled_epsw = EPSW_IE | MN10300_CLI_LEVEL;
262
263#ifdef CONFIG_MN10300_WD_TIMER
264 __IRQ_STAT(cpu_id, __irq_count)++;
265#endif
266
267 irq_enter();
268
269 for (;;) {
270 /* ask the interrupt controller for the next IRQ to process
271 * - the result we get depends on EPSW.IM
272 */
273 irq = IAGR & IAGR_GN;
274 if (!irq)
275 break;
276
277 local_irq_restore(irq_disabled_epsw);
278
279 generic_handle_irq(irq >> 2);
280
281 /* restore IRQ controls for IAGR access */
282 local_irq_restore(epsw);
283 }
284
285 __mn10300_irq_enabled_epsw[cpu_id] = old_irq_enabled_epsw;
286
287 irq_exit();
288}
289
290/*
291 * Display interrupt management information through /proc/interrupts
292 */
293int arch_show_interrupts(struct seq_file *p, int prec)
294{
295#ifdef CONFIG_MN10300_WD_TIMER
296 int j;
297
298 seq_printf(p, "%*s: ", prec, "NMI");
299 for (j = 0; j < NR_CPUS; j++)
300 if (cpu_online(j))
301 seq_printf(p, "%10u ", nmi_count(j));
302 seq_putc(p, '\n');
303#endif
304
305 seq_printf(p, "%*s: ", prec, "ERR");
306 seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
307 return 0;
308}
309
310#ifdef CONFIG_HOTPLUG_CPU
311void migrate_irqs(void)
312{
313 int irq;
314 unsigned int self, new;
315 unsigned long flags;
316
317 self = smp_processor_id();
318 for (irq = 0; irq < NR_IRQS; irq++) {
319 struct irq_data *data = irq_get_irq_data(irq);
320 struct cpumask *mask = irq_data_get_affinity_mask(data);
321
322 if (irqd_is_per_cpu(data))
323 continue;
324
325 if (cpumask_test_cpu(self, mask) &&
326 !cpumask_intersects(&irq_affinity[irq], cpu_online_mask)) {
327 int cpu_id;
328 cpu_id = cpumask_first(cpu_online_mask);
329 cpumask_set_cpu(cpu_id, mask);
330 }
331 /* We need to operate irq_affinity_online atomically. */
332 arch_local_cli_save(flags);
333 if (irq_affinity_online[irq] == self) {
334 u16 x, tmp;
335
336 x = GxICR(irq);
337 GxICR(irq) = x & GxICR_LEVEL;
338 tmp = GxICR(irq);
339
340 new = cpumask_any_and(mask, cpu_online_mask);
341 irq_affinity_online[irq] = new;
342
343 CROSS_GxICR(irq, new) =
344 (x & GxICR_LEVEL) | GxICR_DETECT;
345 tmp = CROSS_GxICR(irq, new);
346
347 x &= GxICR_LEVEL | GxICR_ENABLE;
348 if (GxICR(irq) & GxICR_REQUEST)
349 x |= GxICR_REQUEST | GxICR_DETECT;
350 CROSS_GxICR(irq, new) = x;
351 tmp = CROSS_GxICR(irq, new);
352 }
353 arch_local_irq_restore(flags);
354 }
355}
356#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/mn10300/kernel/kgdb.c b/arch/mn10300/kernel/kgdb.c
deleted file mode 100644
index 2d7986c386fe..000000000000
--- a/arch/mn10300/kernel/kgdb.c
+++ /dev/null
@@ -1,502 +0,0 @@
1/* kgdb support for MN10300
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/slab.h>
13#include <linux/ptrace.h>
14#include <linux/kgdb.h>
15#include <linux/uaccess.h>
16#include <unit/leds.h>
17#include <unit/serial.h>
18#include <asm/debugger.h>
19#include <asm/serial-regs.h>
20#include "internal.h"
21
22/*
23 * Software single-stepping breakpoint save (used by __switch_to())
24 */
25static struct thread_info *kgdb_sstep_thread;
26u8 *kgdb_sstep_bp_addr[2];
27u8 kgdb_sstep_bp[2];
28
29/*
30 * Copy kernel exception frame registers to the GDB register file
31 */
32void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
33{
34 unsigned long ssp = (unsigned long) (regs + 1);
35
36 gdb_regs[GDB_FR_D0] = regs->d0;
37 gdb_regs[GDB_FR_D1] = regs->d1;
38 gdb_regs[GDB_FR_D2] = regs->d2;
39 gdb_regs[GDB_FR_D3] = regs->d3;
40 gdb_regs[GDB_FR_A0] = regs->a0;
41 gdb_regs[GDB_FR_A1] = regs->a1;
42 gdb_regs[GDB_FR_A2] = regs->a2;
43 gdb_regs[GDB_FR_A3] = regs->a3;
44 gdb_regs[GDB_FR_SP] = (regs->epsw & EPSW_nSL) ? regs->sp : ssp;
45 gdb_regs[GDB_FR_PC] = regs->pc;
46 gdb_regs[GDB_FR_MDR] = regs->mdr;
47 gdb_regs[GDB_FR_EPSW] = regs->epsw;
48 gdb_regs[GDB_FR_LIR] = regs->lir;
49 gdb_regs[GDB_FR_LAR] = regs->lar;
50 gdb_regs[GDB_FR_MDRQ] = regs->mdrq;
51 gdb_regs[GDB_FR_E0] = regs->e0;
52 gdb_regs[GDB_FR_E1] = regs->e1;
53 gdb_regs[GDB_FR_E2] = regs->e2;
54 gdb_regs[GDB_FR_E3] = regs->e3;
55 gdb_regs[GDB_FR_E4] = regs->e4;
56 gdb_regs[GDB_FR_E5] = regs->e5;
57 gdb_regs[GDB_FR_E6] = regs->e6;
58 gdb_regs[GDB_FR_E7] = regs->e7;
59 gdb_regs[GDB_FR_SSP] = ssp;
60 gdb_regs[GDB_FR_MSP] = 0;
61 gdb_regs[GDB_FR_USP] = regs->sp;
62 gdb_regs[GDB_FR_MCRH] = regs->mcrh;
63 gdb_regs[GDB_FR_MCRL] = regs->mcrl;
64 gdb_regs[GDB_FR_MCVF] = regs->mcvf;
65 gdb_regs[GDB_FR_DUMMY0] = 0;
66 gdb_regs[GDB_FR_DUMMY1] = 0;
67 gdb_regs[GDB_FR_FS0] = 0;
68}
69
70/*
71 * Extracts kernel SP/PC values understandable by gdb from the values
72 * saved by switch_to().
73 */
74void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
75{
76 gdb_regs[GDB_FR_SSP] = p->thread.sp;
77 gdb_regs[GDB_FR_PC] = p->thread.pc;
78 gdb_regs[GDB_FR_A3] = p->thread.a3;
79 gdb_regs[GDB_FR_USP] = p->thread.usp;
80 gdb_regs[GDB_FR_FPCR] = p->thread.fpu_state.fpcr;
81}
82
83/*
84 * Fill kernel exception frame registers from the GDB register file
85 */
86void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
87{
88 regs->d0 = gdb_regs[GDB_FR_D0];
89 regs->d1 = gdb_regs[GDB_FR_D1];
90 regs->d2 = gdb_regs[GDB_FR_D2];
91 regs->d3 = gdb_regs[GDB_FR_D3];
92 regs->a0 = gdb_regs[GDB_FR_A0];
93 regs->a1 = gdb_regs[GDB_FR_A1];
94 regs->a2 = gdb_regs[GDB_FR_A2];
95 regs->a3 = gdb_regs[GDB_FR_A3];
96 regs->sp = gdb_regs[GDB_FR_SP];
97 regs->pc = gdb_regs[GDB_FR_PC];
98 regs->mdr = gdb_regs[GDB_FR_MDR];
99 regs->epsw = gdb_regs[GDB_FR_EPSW];
100 regs->lir = gdb_regs[GDB_FR_LIR];
101 regs->lar = gdb_regs[GDB_FR_LAR];
102 regs->mdrq = gdb_regs[GDB_FR_MDRQ];
103 regs->e0 = gdb_regs[GDB_FR_E0];
104 regs->e1 = gdb_regs[GDB_FR_E1];
105 regs->e2 = gdb_regs[GDB_FR_E2];
106 regs->e3 = gdb_regs[GDB_FR_E3];
107 regs->e4 = gdb_regs[GDB_FR_E4];
108 regs->e5 = gdb_regs[GDB_FR_E5];
109 regs->e6 = gdb_regs[GDB_FR_E6];
110 regs->e7 = gdb_regs[GDB_FR_E7];
111 regs->sp = gdb_regs[GDB_FR_SSP];
112 /* gdb_regs[GDB_FR_MSP]; */
113 // regs->usp = gdb_regs[GDB_FR_USP];
114 regs->mcrh = gdb_regs[GDB_FR_MCRH];
115 regs->mcrl = gdb_regs[GDB_FR_MCRL];
116 regs->mcvf = gdb_regs[GDB_FR_MCVF];
117 /* gdb_regs[GDB_FR_DUMMY0]; */
118 /* gdb_regs[GDB_FR_DUMMY1]; */
119
120 // regs->fpcr = gdb_regs[GDB_FR_FPCR];
121 // regs->fs0 = gdb_regs[GDB_FR_FS0];
122}
123
124struct kgdb_arch arch_kgdb_ops = {
125 .gdb_bpt_instr = { 0xff },
126 .flags = KGDB_HW_BREAKPOINT,
127};
128
129static const unsigned char mn10300_kgdb_insn_sizes[256] =
130{
131 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
132 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
133 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
134 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
135 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
136 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
137 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
138 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
139 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
140 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
141 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
142 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
143 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
144 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
145 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
146 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
147 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
148};
149
150/*
151 * Attempt to emulate single stepping by means of breakpoint instructions.
152 * Although there is a single-step trace flag in EPSW, its use is not
153 * sufficiently documented and is only intended for use with the JTAG debugger.
154 */
155static int kgdb_arch_do_singlestep(struct pt_regs *regs)
156{
157 unsigned long arg;
158 unsigned size;
159 u8 *pc = (u8 *)regs->pc, *sp = (u8 *)(regs + 1), cur;
160 u8 *x = NULL, *y = NULL;
161 int ret;
162
163 ret = probe_kernel_read(&cur, pc, 1);
164 if (ret < 0)
165 return ret;
166
167 size = mn10300_kgdb_insn_sizes[cur];
168 if (size > 0) {
169 x = pc + size;
170 goto set_x;
171 }
172
173 switch (cur) {
174 /* Bxx (d8,PC) */
175 case 0xc0 ... 0xca:
176 ret = probe_kernel_read(&arg, pc + 1, 1);
177 if (ret < 0)
178 return ret;
179 x = pc + 2;
180 if (arg >= 0 && arg <= 2)
181 goto set_x;
182 y = pc + (s8)arg;
183 goto set_x_and_y;
184
185 /* LXX (d8,PC) */
186 case 0xd0 ... 0xda:
187 x = pc + 1;
188 if (regs->pc == regs->lar)
189 goto set_x;
190 y = (u8 *)regs->lar;
191 goto set_x_and_y;
192
193 /* SETLB - loads the next four bytes into the LIR register
194 * (which mustn't include a breakpoint instruction) */
195 case 0xdb:
196 x = pc + 5;
197 goto set_x;
198
199 /* JMP (d16,PC) or CALL (d16,PC) */
200 case 0xcc:
201 case 0xcd:
202 ret = probe_kernel_read(&arg, pc + 1, 2);
203 if (ret < 0)
204 return ret;
205 x = pc + (s16)arg;
206 goto set_x;
207
208 /* JMP (d32,PC) or CALL (d32,PC) */
209 case 0xdc:
210 case 0xdd:
211 ret = probe_kernel_read(&arg, pc + 1, 4);
212 if (ret < 0)
213 return ret;
214 x = pc + (s32)arg;
215 goto set_x;
216
217 /* RETF */
218 case 0xde:
219 x = (u8 *)regs->mdr;
220 goto set_x;
221
222 /* RET */
223 case 0xdf:
224 ret = probe_kernel_read(&arg, pc + 2, 1);
225 if (ret < 0)
226 return ret;
227 ret = probe_kernel_read(&x, sp + (s8)arg, 4);
228 if (ret < 0)
229 return ret;
230 goto set_x;
231
232 case 0xf0:
233 ret = probe_kernel_read(&cur, pc + 1, 1);
234 if (ret < 0)
235 return ret;
236
237 if (cur >= 0xf0 && cur <= 0xf7) {
238 /* JMP (An) / CALLS (An) */
239 switch (cur & 3) {
240 case 0: x = (u8 *)regs->a0; break;
241 case 1: x = (u8 *)regs->a1; break;
242 case 2: x = (u8 *)regs->a2; break;
243 case 3: x = (u8 *)regs->a3; break;
244 }
245 goto set_x;
246 } else if (cur == 0xfc) {
247 /* RETS */
248 ret = probe_kernel_read(&x, sp, 4);
249 if (ret < 0)
250 return ret;
251 goto set_x;
252 } else if (cur == 0xfd) {
253 /* RTI */
254 ret = probe_kernel_read(&x, sp + 4, 4);
255 if (ret < 0)
256 return ret;
257 goto set_x;
258 } else {
259 x = pc + 2;
260 goto set_x;
261 }
262 break;
263
264 /* potential 3-byte conditional branches */
265 case 0xf8:
266 ret = probe_kernel_read(&cur, pc + 1, 1);
267 if (ret < 0)
268 return ret;
269 x = pc + 3;
270
271 if (cur >= 0xe8 && cur <= 0xeb) {
272 ret = probe_kernel_read(&arg, pc + 2, 1);
273 if (ret < 0)
274 return ret;
275 if (arg >= 0 && arg <= 3)
276 goto set_x;
277 y = pc + (s8)arg;
278 goto set_x_and_y;
279 }
280 goto set_x;
281
282 case 0xfa:
283 ret = probe_kernel_read(&cur, pc + 1, 1);
284 if (ret < 0)
285 return ret;
286
287 if (cur == 0xff) {
288 /* CALLS (d16,PC) */
289 ret = probe_kernel_read(&arg, pc + 2, 2);
290 if (ret < 0)
291 return ret;
292 x = pc + (s16)arg;
293 goto set_x;
294 }
295
296 x = pc + 4;
297 goto set_x;
298
299 case 0xfc:
300 ret = probe_kernel_read(&cur, pc + 1, 1);
301 if (ret < 0)
302 return ret;
303
304 if (cur == 0xff) {
305 /* CALLS (d32,PC) */
306 ret = probe_kernel_read(&arg, pc + 2, 4);
307 if (ret < 0)
308 return ret;
309 x = pc + (s32)arg;
310 goto set_x;
311 }
312
313 x = pc + 6;
314 goto set_x;
315 }
316
317 return 0;
318
319set_x:
320 kgdb_sstep_bp_addr[0] = x;
321 kgdb_sstep_bp_addr[1] = NULL;
322 ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1);
323 if (ret < 0)
324 return ret;
325 ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1);
326 if (ret < 0)
327 return ret;
328 kgdb_sstep_thread = current_thread_info();
329 debugger_local_cache_flushinv_one(x);
330 return ret;
331
332set_x_and_y:
333 kgdb_sstep_bp_addr[0] = x;
334 kgdb_sstep_bp_addr[1] = y;
335 ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1);
336 if (ret < 0)
337 return ret;
338 ret = probe_kernel_read(&kgdb_sstep_bp[1], y, 1);
339 if (ret < 0)
340 return ret;
341 ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1);
342 if (ret < 0)
343 return ret;
344 ret = probe_kernel_write(y, &arch_kgdb_ops.gdb_bpt_instr, 1);
345 if (ret < 0) {
346 probe_kernel_write(kgdb_sstep_bp_addr[0],
347 &kgdb_sstep_bp[0], 1);
348 } else {
349 kgdb_sstep_thread = current_thread_info();
350 }
351 debugger_local_cache_flushinv_one(x);
352 debugger_local_cache_flushinv_one(y);
353 return ret;
354}
355
356/*
357 * Remove emplaced single-step breakpoints, returning true if we hit one of
358 * them.
359 */
360static bool kgdb_arch_undo_singlestep(struct pt_regs *regs)
361{
362 bool hit = false;
363 u8 *x = kgdb_sstep_bp_addr[0], *y = kgdb_sstep_bp_addr[1];
364 u8 opcode;
365
366 if (kgdb_sstep_thread == current_thread_info()) {
367 if (x) {
368 if (x == (u8 *)regs->pc)
369 hit = true;
370 if (probe_kernel_read(&opcode, x,
371 1) < 0 ||
372 opcode != 0xff)
373 BUG();
374 probe_kernel_write(x, &kgdb_sstep_bp[0], 1);
375 debugger_local_cache_flushinv_one(x);
376 }
377 if (y) {
378 if (y == (u8 *)regs->pc)
379 hit = true;
380 if (probe_kernel_read(&opcode, y,
381 1) < 0 ||
382 opcode != 0xff)
383 BUG();
384 probe_kernel_write(y, &kgdb_sstep_bp[1], 1);
385 debugger_local_cache_flushinv_one(y);
386 }
387 }
388
389 kgdb_sstep_bp_addr[0] = NULL;
390 kgdb_sstep_bp_addr[1] = NULL;
391 kgdb_sstep_thread = NULL;
392 return hit;
393}
394
395/*
396 * Catch a single-step-pending thread being deleted and make sure the global
397 * single-step state is cleared. At this point the breakpoints should have
398 * been removed by __switch_to().
399 */
400void arch_release_thread_stack(unsigned long *stack)
401{
402 struct thread_info *ti = (void *)stack;
403 if (kgdb_sstep_thread == ti) {
404 kgdb_sstep_thread = NULL;
405
406 /* However, we may now be running in degraded mode, with most
407 * of the CPUs disabled until such a time as KGDB is reentered,
408 * so force immediate reentry */
409 kgdb_breakpoint();
410 }
411}
412
413/*
414 * Handle unknown packets and [CcsDk] packets
415 * - at this point breakpoints have been installed
416 */
417int kgdb_arch_handle_exception(int vector, int signo, int err_code,
418 char *remcom_in_buffer, char *remcom_out_buffer,
419 struct pt_regs *regs)
420{
421 long addr;
422 char *ptr;
423
424 switch (remcom_in_buffer[0]) {
425 case 'c':
426 case 's':
427 /* try to read optional parameter, pc unchanged if no parm */
428 ptr = &remcom_in_buffer[1];
429 if (kgdb_hex2long(&ptr, &addr))
430 regs->pc = addr;
431 case 'D':
432 case 'k':
433 atomic_set(&kgdb_cpu_doing_single_step, -1);
434
435 if (remcom_in_buffer[0] == 's') {
436 kgdb_arch_do_singlestep(regs);
437 kgdb_single_step = 1;
438 atomic_set(&kgdb_cpu_doing_single_step,
439 raw_smp_processor_id());
440 }
441 return 0;
442 }
443 return -1; /* this means that we do not want to exit from the handler */
444}
445
446/*
447 * Handle event interception
448 * - returns 0 if the exception should be skipped, -ERROR otherwise.
449 */
450int debugger_intercept(enum exception_code excep, int signo, int si_code,
451 struct pt_regs *regs)
452{
453 int ret;
454
455 if (kgdb_arch_undo_singlestep(regs)) {
456 excep = EXCEP_TRAP;
457 signo = SIGTRAP;
458 si_code = TRAP_TRACE;
459 }
460
461 ret = kgdb_handle_exception(excep, signo, si_code, regs);
462
463 debugger_local_cache_flushinv();
464
465 return ret;
466}
467
468/*
469 * Determine if we've hit a debugger special breakpoint
470 */
471int at_debugger_breakpoint(struct pt_regs *regs)
472{
473 return regs->pc == (unsigned long)&__arch_kgdb_breakpoint;
474}
475
476/*
477 * Initialise kgdb
478 */
479int kgdb_arch_init(void)
480{
481 return 0;
482}
483
484/*
485 * Do something, perhaps, but don't know what.
486 */
487void kgdb_arch_exit(void)
488{
489}
490
491#ifdef CONFIG_SMP
492void debugger_nmi_interrupt(struct pt_regs *regs, enum exception_code code)
493{
494 kgdb_nmicallback(arch_smp_processor_id(), regs);
495 debugger_local_cache_flushinv();
496}
497
498void kgdb_roundup_cpus(unsigned long flags)
499{
500 smp_jump_to_debugger();
501}
502#endif
diff --git a/arch/mn10300/kernel/kprobes.c b/arch/mn10300/kernel/kprobes.c
deleted file mode 100644
index 0311a7fcea16..000000000000
--- a/arch/mn10300/kernel/kprobes.c
+++ /dev/null
@@ -1,656 +0,0 @@
1/* MN10300 Kernel probes implementation
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20#include <linux/kprobes.h>
21#include <linux/ptrace.h>
22#include <linux/spinlock.h>
23#include <linux/preempt.h>
24#include <linux/kdebug.h>
25#include <asm/cacheflush.h>
26
27struct kretprobe_blackpoint kretprobe_blacklist[] = { { NULL, NULL } };
28const int kretprobe_blacklist_size = ARRAY_SIZE(kretprobe_blacklist);
29
30/* kprobe_status settings */
31#define KPROBE_HIT_ACTIVE 0x00000001
32#define KPROBE_HIT_SS 0x00000002
33
34static struct kprobe *cur_kprobe;
35static unsigned long cur_kprobe_orig_pc;
36static unsigned long cur_kprobe_next_pc;
37static int cur_kprobe_ss_flags;
38static unsigned long kprobe_status;
39static kprobe_opcode_t cur_kprobe_ss_buf[MAX_INSN_SIZE + 2];
40static unsigned long cur_kprobe_bp_addr;
41
42DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
43
44
45/* singlestep flag bits */
46#define SINGLESTEP_BRANCH 1
47#define SINGLESTEP_PCREL 2
48
49#define READ_BYTE(p, valp) \
50 do { *(u8 *)(valp) = *(u8 *)(p); } while (0)
51
52#define READ_WORD16(p, valp) \
53 do { \
54 READ_BYTE((p), (valp)); \
55 READ_BYTE((u8 *)(p) + 1, (u8 *)(valp) + 1); \
56 } while (0)
57
58#define READ_WORD32(p, valp) \
59 do { \
60 READ_BYTE((p), (valp)); \
61 READ_BYTE((u8 *)(p) + 1, (u8 *)(valp) + 1); \
62 READ_BYTE((u8 *)(p) + 2, (u8 *)(valp) + 2); \
63 READ_BYTE((u8 *)(p) + 3, (u8 *)(valp) + 3); \
64 } while (0)
65
66
67static const u8 mn10300_insn_sizes[256] =
68{
69 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
70 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
71 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
72 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
73 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
74 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
75 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
76 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
77 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
78 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
79 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
80 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
81 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
82 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
83 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
84 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
85 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
86};
87
88#define LT (1 << 0)
89#define GT (1 << 1)
90#define GE (1 << 2)
91#define LE (1 << 3)
92#define CS (1 << 4)
93#define HI (1 << 5)
94#define CC (1 << 6)
95#define LS (1 << 7)
96#define EQ (1 << 8)
97#define NE (1 << 9)
98#define RA (1 << 10)
99#define VC (1 << 11)
100#define VS (1 << 12)
101#define NC (1 << 13)
102#define NS (1 << 14)
103
104static const u16 cond_table[] = {
105 /* V C N Z */
106 /* 0 0 0 0 */ (NE | NC | CC | VC | GE | GT | HI),
107 /* 0 0 0 1 */ (EQ | NC | CC | VC | GE | LE | LS),
108 /* 0 0 1 0 */ (NE | NS | CC | VC | LT | LE | HI),
109 /* 0 0 1 1 */ (EQ | NS | CC | VC | LT | LE | LS),
110 /* 0 1 0 0 */ (NE | NC | CS | VC | GE | GT | LS),
111 /* 0 1 0 1 */ (EQ | NC | CS | VC | GE | LE | LS),
112 /* 0 1 1 0 */ (NE | NS | CS | VC | LT | LE | LS),
113 /* 0 1 1 1 */ (EQ | NS | CS | VC | LT | LE | LS),
114 /* 1 0 0 0 */ (NE | NC | CC | VS | LT | LE | HI),
115 /* 1 0 0 1 */ (EQ | NC | CC | VS | LT | LE | LS),
116 /* 1 0 1 0 */ (NE | NS | CC | VS | GE | GT | HI),
117 /* 1 0 1 1 */ (EQ | NS | CC | VS | GE | LE | LS),
118 /* 1 1 0 0 */ (NE | NC | CS | VS | LT | LE | LS),
119 /* 1 1 0 1 */ (EQ | NC | CS | VS | LT | LE | LS),
120 /* 1 1 1 0 */ (NE | NS | CS | VS | GE | GT | LS),
121 /* 1 1 1 1 */ (EQ | NS | CS | VS | GE | LE | LS),
122};
123
124/*
125 * Calculate what the PC will be after executing next instruction
126 */
127static unsigned find_nextpc(struct pt_regs *regs, int *flags)
128{
129 unsigned size;
130 s8 x8;
131 s16 x16;
132 s32 x32;
133 u8 opc, *pc, *sp, *next;
134
135 next = 0;
136 *flags = SINGLESTEP_PCREL;
137
138 pc = (u8 *) regs->pc;
139 sp = (u8 *) (regs + 1);
140 opc = *pc;
141
142 size = mn10300_insn_sizes[opc];
143 if (size > 0) {
144 next = pc + size;
145 } else {
146 switch (opc) {
147 /* Bxx (d8,PC) */
148 case 0xc0 ... 0xca:
149 x8 = 2;
150 if (cond_table[regs->epsw & 0xf] & (1 << (opc & 0xf)))
151 x8 = (s8)pc[1];
152 next = pc + x8;
153 *flags |= SINGLESTEP_BRANCH;
154 break;
155
156 /* JMP (d16,PC) or CALL (d16,PC) */
157 case 0xcc:
158 case 0xcd:
159 READ_WORD16(pc + 1, &x16);
160 next = pc + x16;
161 *flags |= SINGLESTEP_BRANCH;
162 break;
163
164 /* JMP (d32,PC) or CALL (d32,PC) */
165 case 0xdc:
166 case 0xdd:
167 READ_WORD32(pc + 1, &x32);
168 next = pc + x32;
169 *flags |= SINGLESTEP_BRANCH;
170 break;
171
172 /* RETF */
173 case 0xde:
174 next = (u8 *)regs->mdr;
175 *flags &= ~SINGLESTEP_PCREL;
176 *flags |= SINGLESTEP_BRANCH;
177 break;
178
179 /* RET */
180 case 0xdf:
181 sp += pc[2];
182 READ_WORD32(sp, &x32);
183 next = (u8 *)x32;
184 *flags &= ~SINGLESTEP_PCREL;
185 *flags |= SINGLESTEP_BRANCH;
186 break;
187
188 case 0xf0:
189 next = pc + 2;
190 opc = pc[1];
191 if (opc >= 0xf0 && opc <= 0xf7) {
192 /* JMP (An) / CALLS (An) */
193 switch (opc & 3) {
194 case 0:
195 next = (u8 *)regs->a0;
196 break;
197 case 1:
198 next = (u8 *)regs->a1;
199 break;
200 case 2:
201 next = (u8 *)regs->a2;
202 break;
203 case 3:
204 next = (u8 *)regs->a3;
205 break;
206 }
207 *flags &= ~SINGLESTEP_PCREL;
208 *flags |= SINGLESTEP_BRANCH;
209 } else if (opc == 0xfc) {
210 /* RETS */
211 READ_WORD32(sp, &x32);
212 next = (u8 *)x32;
213 *flags &= ~SINGLESTEP_PCREL;
214 *flags |= SINGLESTEP_BRANCH;
215 } else if (opc == 0xfd) {
216 /* RTI */
217 READ_WORD32(sp + 4, &x32);
218 next = (u8 *)x32;
219 *flags &= ~SINGLESTEP_PCREL;
220 *flags |= SINGLESTEP_BRANCH;
221 }
222 break;
223
224 /* potential 3-byte conditional branches */
225 case 0xf8:
226 next = pc + 3;
227 opc = pc[1];
228 if (opc >= 0xe8 && opc <= 0xeb &&
229 (cond_table[regs->epsw & 0xf] &
230 (1 << ((opc & 0xf) + 3)))
231 ) {
232 READ_BYTE(pc+2, &x8);
233 next = pc + x8;
234 *flags |= SINGLESTEP_BRANCH;
235 }
236 break;
237
238 case 0xfa:
239 if (pc[1] == 0xff) {
240 /* CALLS (d16,PC) */
241 READ_WORD16(pc + 2, &x16);
242 next = pc + x16;
243 } else
244 next = pc + 4;
245 *flags |= SINGLESTEP_BRANCH;
246 break;
247
248 case 0xfc:
249 x32 = 6;
250 if (pc[1] == 0xff) {
251 /* CALLS (d32,PC) */
252 READ_WORD32(pc + 2, &x32);
253 }
254 next = pc + x32;
255 *flags |= SINGLESTEP_BRANCH;
256 break;
257 /* LXX (d8,PC) */
258 /* SETLB - loads the next four bytes into the LIR reg */
259 case 0xd0 ... 0xda:
260 case 0xdb:
261 panic("Can't singlestep Lxx/SETLB\n");
262 break;
263 }
264 }
265 return (unsigned)next;
266
267}
268
269/*
270 * set up out of place singlestep of some branching instructions
271 */
272static unsigned __kprobes singlestep_branch_setup(struct pt_regs *regs)
273{
274 u8 opc, *pc, *sp, *next;
275
276 next = NULL;
277 pc = (u8 *) regs->pc;
278 sp = (u8 *) (regs + 1);
279
280 switch (pc[0]) {
281 case 0xc0 ... 0xca: /* Bxx (d8,PC) */
282 case 0xcc: /* JMP (d16,PC) */
283 case 0xdc: /* JMP (d32,PC) */
284 case 0xf8: /* Bxx (d8,PC) 3-byte version */
285 /* don't really need to do anything except cause trap */
286 next = pc;
287 break;
288
289 case 0xcd: /* CALL (d16,PC) */
290 pc[1] = 5;
291 pc[2] = 0;
292 next = pc + 5;
293 break;
294
295 case 0xdd: /* CALL (d32,PC) */
296 pc[1] = 7;
297 pc[2] = 0;
298 pc[3] = 0;
299 pc[4] = 0;
300 next = pc + 7;
301 break;
302
303 case 0xde: /* RETF */
304 next = pc + 3;
305 regs->mdr = (unsigned) next;
306 break;
307
308 case 0xdf: /* RET */
309 sp += pc[2];
310 next = pc + 3;
311 *(unsigned *)sp = (unsigned) next;
312 break;
313
314 case 0xf0:
315 next = pc + 2;
316 opc = pc[1];
317 if (opc >= 0xf0 && opc <= 0xf3) {
318 /* CALLS (An) */
319 /* use CALLS (d16,PC) to avoid mucking with An */
320 pc[0] = 0xfa;
321 pc[1] = 0xff;
322 pc[2] = 4;
323 pc[3] = 0;
324 next = pc + 4;
325 } else if (opc >= 0xf4 && opc <= 0xf7) {
326 /* JMP (An) */
327 next = pc;
328 } else if (opc == 0xfc) {
329 /* RETS */
330 next = pc + 2;
331 *(unsigned *) sp = (unsigned) next;
332 } else if (opc == 0xfd) {
333 /* RTI */
334 next = pc + 2;
335 *(unsigned *)(sp + 4) = (unsigned) next;
336 }
337 break;
338
339 case 0xfa: /* CALLS (d16,PC) */
340 pc[2] = 4;
341 pc[3] = 0;
342 next = pc + 4;
343 break;
344
345 case 0xfc: /* CALLS (d32,PC) */
346 pc[2] = 6;
347 pc[3] = 0;
348 pc[4] = 0;
349 pc[5] = 0;
350 next = pc + 6;
351 break;
352
353 case 0xd0 ... 0xda: /* LXX (d8,PC) */
354 case 0xdb: /* SETLB */
355 panic("Can't singlestep Lxx/SETLB\n");
356 }
357
358 return (unsigned) next;
359}
360
361int __kprobes arch_prepare_kprobe(struct kprobe *p)
362{
363 return 0;
364}
365
366void __kprobes arch_copy_kprobe(struct kprobe *p)
367{
368 memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE);
369}
370
371void __kprobes arch_arm_kprobe(struct kprobe *p)
372{
373 *p->addr = BREAKPOINT_INSTRUCTION;
374 flush_icache_range((unsigned long) p->addr,
375 (unsigned long) p->addr + sizeof(kprobe_opcode_t));
376}
377
378void __kprobes arch_disarm_kprobe(struct kprobe *p)
379{
380#ifndef CONFIG_MN10300_CACHE_SNOOP
381 mn10300_dcache_flush();
382 mn10300_icache_inv();
383#endif
384}
385
386void arch_remove_kprobe(struct kprobe *p)
387{
388}
389
390static inline
391void __kprobes disarm_kprobe(struct kprobe *p, struct pt_regs *regs)
392{
393 *p->addr = p->opcode;
394 regs->pc = (unsigned long) p->addr;
395#ifndef CONFIG_MN10300_CACHE_SNOOP
396 mn10300_dcache_flush();
397 mn10300_icache_inv();
398#endif
399}
400
401static inline
402void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
403{
404 unsigned long nextpc;
405
406 cur_kprobe_orig_pc = regs->pc;
407 memcpy(cur_kprobe_ss_buf, &p->ainsn.insn[0], MAX_INSN_SIZE);
408 regs->pc = (unsigned long) cur_kprobe_ss_buf;
409
410 nextpc = find_nextpc(regs, &cur_kprobe_ss_flags);
411 if (cur_kprobe_ss_flags & SINGLESTEP_PCREL)
412 cur_kprobe_next_pc = cur_kprobe_orig_pc + (nextpc - regs->pc);
413 else
414 cur_kprobe_next_pc = nextpc;
415
416 /* branching instructions need special handling */
417 if (cur_kprobe_ss_flags & SINGLESTEP_BRANCH)
418 nextpc = singlestep_branch_setup(regs);
419
420 cur_kprobe_bp_addr = nextpc;
421
422 *(u8 *) nextpc = BREAKPOINT_INSTRUCTION;
423 mn10300_dcache_flush_range2((unsigned) cur_kprobe_ss_buf,
424 sizeof(cur_kprobe_ss_buf));
425 mn10300_icache_inv();
426}
427
428static inline int __kprobes kprobe_handler(struct pt_regs *regs)
429{
430 struct kprobe *p;
431 int ret = 0;
432 unsigned int *addr = (unsigned int *) regs->pc;
433
434 /* We're in an interrupt, but this is clear and BUG()-safe. */
435 preempt_disable();
436
437 /* Check we're not actually recursing */
438 if (kprobe_running()) {
439 /* We *are* holding lock here, so this is safe.
440 Disarm the probe we just hit, and ignore it. */
441 p = get_kprobe(addr);
442 if (p) {
443 disarm_kprobe(p, regs);
444 ret = 1;
445 } else {
446 p = cur_kprobe;
447 if (p->break_handler && p->break_handler(p, regs))
448 goto ss_probe;
449 }
450 /* If it's not ours, can't be delete race, (we hold lock). */
451 goto no_kprobe;
452 }
453
454 p = get_kprobe(addr);
455 if (!p) {
456 if (*addr != BREAKPOINT_INSTRUCTION) {
457 /* The breakpoint instruction was removed right after
458 * we hit it. Another cpu has removed either a
459 * probepoint or a debugger breakpoint at this address.
460 * In either case, no further handling of this
461 * interrupt is appropriate.
462 */
463 ret = 1;
464 }
465 /* Not one of ours: let kernel handle it */
466 goto no_kprobe;
467 }
468
469 kprobe_status = KPROBE_HIT_ACTIVE;
470 cur_kprobe = p;
471 if (p->pre_handler(p, regs)) {
472 /* handler has already set things up, so skip ss setup */
473 return 1;
474 }
475
476ss_probe:
477 prepare_singlestep(p, regs);
478 kprobe_status = KPROBE_HIT_SS;
479 return 1;
480
481no_kprobe:
482 preempt_enable_no_resched();
483 return ret;
484}
485
486/*
487 * Called after single-stepping. p->addr is the address of the
488 * instruction whose first byte has been replaced by the "breakpoint"
489 * instruction. To avoid the SMP problems that can occur when we
490 * temporarily put back the original opcode to single-step, we
491 * single-stepped a copy of the instruction. The address of this
492 * copy is p->ainsn.insn.
493 */
494static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
495{
496 /* we may need to fixup regs/stack after singlestepping a call insn */
497 if (cur_kprobe_ss_flags & SINGLESTEP_BRANCH) {
498 regs->pc = cur_kprobe_orig_pc;
499 switch (p->ainsn.insn[0]) {
500 case 0xcd: /* CALL (d16,PC) */
501 *(unsigned *) regs->sp = regs->mdr = regs->pc + 5;
502 break;
503 case 0xdd: /* CALL (d32,PC) */
504 /* fixup mdr and return address on stack */
505 *(unsigned *) regs->sp = regs->mdr = regs->pc + 7;
506 break;
507 case 0xf0:
508 if (p->ainsn.insn[1] >= 0xf0 &&
509 p->ainsn.insn[1] <= 0xf3) {
510 /* CALLS (An) */
511 /* fixup MDR and return address on stack */
512 regs->mdr = regs->pc + 2;
513 *(unsigned *) regs->sp = regs->mdr;
514 }
515 break;
516
517 case 0xfa: /* CALLS (d16,PC) */
518 /* fixup MDR and return address on stack */
519 *(unsigned *) regs->sp = regs->mdr = regs->pc + 4;
520 break;
521
522 case 0xfc: /* CALLS (d32,PC) */
523 /* fixup MDR and return address on stack */
524 *(unsigned *) regs->sp = regs->mdr = regs->pc + 6;
525 break;
526 }
527 }
528
529 regs->pc = cur_kprobe_next_pc;
530 cur_kprobe_bp_addr = 0;
531}
532
533static inline int __kprobes post_kprobe_handler(struct pt_regs *regs)
534{
535 if (!kprobe_running())
536 return 0;
537
538 if (cur_kprobe->post_handler)
539 cur_kprobe->post_handler(cur_kprobe, regs, 0);
540
541 resume_execution(cur_kprobe, regs);
542 reset_current_kprobe();
543 preempt_enable_no_resched();
544 return 1;
545}
546
547/* Interrupts disabled, kprobe_lock held. */
548static inline
549int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
550{
551 if (cur_kprobe->fault_handler &&
552 cur_kprobe->fault_handler(cur_kprobe, regs, trapnr))
553 return 1;
554
555 if (kprobe_status & KPROBE_HIT_SS) {
556 resume_execution(cur_kprobe, regs);
557 reset_current_kprobe();
558 preempt_enable_no_resched();
559 }
560 return 0;
561}
562
563/*
564 * Wrapper routine to for handling exceptions.
565 */
566int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
567 unsigned long val, void *data)
568{
569 struct die_args *args = data;
570
571 switch (val) {
572 case DIE_BREAKPOINT:
573 if (cur_kprobe_bp_addr != args->regs->pc) {
574 if (kprobe_handler(args->regs))
575 return NOTIFY_STOP;
576 } else {
577 if (post_kprobe_handler(args->regs))
578 return NOTIFY_STOP;
579 }
580 break;
581 case DIE_GPF:
582 if (kprobe_running() &&
583 kprobe_fault_handler(args->regs, args->trapnr))
584 return NOTIFY_STOP;
585 break;
586 default:
587 break;
588 }
589 return NOTIFY_DONE;
590}
591
592/* Jprobes support. */
593static struct pt_regs jprobe_saved_regs;
594static struct pt_regs *jprobe_saved_regs_location;
595static kprobe_opcode_t jprobe_saved_stack[MAX_STACK_SIZE];
596
597int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
598{
599 struct jprobe *jp = container_of(p, struct jprobe, kp);
600
601 jprobe_saved_regs_location = regs;
602 memcpy(&jprobe_saved_regs, regs, sizeof(struct pt_regs));
603
604 /* Save a whole stack frame, this gets arguments
605 * pushed onto the stack after using up all the
606 * arg registers.
607 */
608 memcpy(&jprobe_saved_stack, regs + 1, sizeof(jprobe_saved_stack));
609
610 /* setup return addr to the jprobe handler routine */
611 regs->pc = (unsigned long) jp->entry;
612 return 1;
613}
614
615void __kprobes jprobe_return(void)
616{
617 void *orig_sp = jprobe_saved_regs_location + 1;
618
619 preempt_enable_no_resched();
620 asm volatile(" mov %0,sp\n"
621 ".globl jprobe_return_bp_addr\n"
622 "jprobe_return_bp_addr:\n\t"
623 " .byte 0xff\n"
624 : : "d" (orig_sp));
625}
626
627extern void jprobe_return_bp_addr(void);
628
629int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
630{
631 u8 *addr = (u8 *) regs->pc;
632
633 if (addr == (u8 *) jprobe_return_bp_addr) {
634 if (jprobe_saved_regs_location != regs) {
635 printk(KERN_ERR"JPROBE:"
636 " Current regs (%p) does not match saved regs"
637 " (%p).\n",
638 regs, jprobe_saved_regs_location);
639 BUG();
640 }
641
642 /* Restore old register state.
643 */
644 memcpy(regs, &jprobe_saved_regs, sizeof(struct pt_regs));
645
646 memcpy(regs + 1, &jprobe_saved_stack,
647 sizeof(jprobe_saved_stack));
648 return 1;
649 }
650 return 0;
651}
652
653int __init arch_init_kprobes(void)
654{
655 return 0;
656}
diff --git a/arch/mn10300/kernel/mn10300-debug.c b/arch/mn10300/kernel/mn10300-debug.c
deleted file mode 100644
index bd8196478cbc..000000000000
--- a/arch/mn10300/kernel/mn10300-debug.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/* Debugging stuff for the MN10300-based processors
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <asm/serial-regs.h>
13
14#undef MN10300_CONSOLE_ON_SERIO
15
16/*
17 * write a string directly through one of the serial ports on-board the MN10300
18 */
19#ifdef MN10300_CONSOLE_ON_SERIO
20void debug_to_serial_mnser(const char *p, int n)
21{
22 char ch;
23
24 for (; n > 0; n--) {
25 ch = *p++;
26
27#if MN10300_CONSOLE_ON_SERIO == 0
28 while (SC0STR & (SC01STR_TBF)) continue;
29 SC0TXB = ch;
30 while (SC0STR & (SC01STR_TBF)) continue;
31 if (ch == 0x0a) {
32 SC0TXB = 0x0d;
33 while (SC0STR & (SC01STR_TBF)) continue;
34 }
35
36#elif MN10300_CONSOLE_ON_SERIO == 1
37 while (SC1STR & (SC01STR_TBF)) continue;
38 SC1TXB = ch;
39 while (SC1STR & (SC01STR_TBF)) continue;
40 if (ch == 0x0a) {
41 SC1TXB = 0x0d;
42 while (SC1STR & (SC01STR_TBF)) continue;
43 }
44
45#elif MN10300_CONSOLE_ON_SERIO == 2
46 while (SC2STR & (SC2STR_TBF)) continue;
47 SC2TXB = ch;
48 while (SC2STR & (SC2STR_TBF)) continue;
49 if (ch == 0x0a) {
50 SC2TXB = 0x0d;
51 while (SC2STR & (SC2STR_TBF)) continue;
52 }
53
54#endif
55 }
56}
57#endif
58
diff --git a/arch/mn10300/kernel/mn10300-serial-low.S b/arch/mn10300/kernel/mn10300-serial-low.S
deleted file mode 100644
index b95e76caf4fa..000000000000
--- a/arch/mn10300/kernel/mn10300-serial-low.S
+++ /dev/null
@@ -1,194 +0,0 @@
1###############################################################################
2#
3# Virtual DMA driver for MN10300 serial ports
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/page.h>
17#include <asm/smp.h>
18#include <asm/cpu-regs.h>
19#include <asm/frame.inc>
20#include <asm/timer-regs.h>
21#include <proc/cache.h>
22#include <unit/timex.h>
23#include "mn10300-serial.h"
24
25#define SCxCTR 0x00
26#define SCxICR 0x04
27#define SCxTXB 0x08
28#define SCxRXB 0x09
29#define SCxSTR 0x0c
30#define SCxTIM 0x0d
31
32 .text
33
34###############################################################################
35#
36# serial port interrupt virtual DMA entry point
37# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
38#
39###############################################################################
40 .balign L1_CACHE_BYTES
41ENTRY(mn10300_serial_vdma_interrupt)
42# or EPSW_IE,psw # permit overriding by
43 # debugging interrupts
44 movm [d2,d3,a2,a3,exreg0],(sp)
45
46 movhu (IAGR),a2 # see if which interrupt is
47 # pending
48 and IAGR_GN,a2
49 add a2,a2
50 add mn10300_serial_int_tbl,a2
51
52 mov (a2+),a3
53 mov (__iobase,a3),e2
54 mov (a2),a2
55 jmp (a2)
56
57###############################################################################
58#
59# serial port receive interrupt virtual DMA entry point
60# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
61# - stores data/status byte pairs in the ring buffer
62# - induces a scheduler tick timer interrupt when done, which we then subvert
63# on entry:
64# A3 struct mn10300_serial_port *
65# E2 I/O port base
66#
67###############################################################################
68ENTRY(mn10300_serial_vdma_rx_handler)
69 mov (__rx_icr,a3),e3
70 mov GxICR_DETECT,d2
71 movbu d2,(e3) # ACK the interrupt
72 movhu (e3),d2 # flush
73
74 mov (__rx_inp,a3),d3
75 mov d3,a2
76 add 2,d3
77 and MNSC_BUFFER_SIZE-1,d3
78 mov (__rx_outp,a3),d2
79 cmp d3,d2
80 beq mnsc_vdma_rx_overflow
81
82 mov (__rx_buffer,a3),d2
83 add d2,a2
84 movhu (SCxSTR,e2),d2
85 movbu d2,(1,a2)
86 movbu (SCxRXB,e2),d2
87 movbu d2,(a2)
88 mov d3,(__rx_inp,a3)
89 bset MNSCx_RX_AVAIL,(__intr_flags,a3)
90
91mnsc_vdma_rx_done:
92 mov (__tm_icr,a3),a2
93 mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
94 movhu d2,(a2) # request a slow interrupt
95 movhu (a2),d2 # flush
96
97 movm (sp),[d2,d3,a2,a3,exreg0]
98 rti
99
100mnsc_vdma_rx_overflow:
101 bset MNSCx_RX_OVERF,(__intr_flags,a3)
102 bra mnsc_vdma_rx_done
103
104###############################################################################
105#
106# serial port transmit interrupt virtual DMA entry point
107# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
108# - retrieves data bytes from the ring buffer and passes them to the serial port
109# - induces a scheduler tick timer interrupt when done, which we then subvert
110# A3 struct mn10300_serial_port *
111# E2 I/O port base
112#
113###############################################################################
114 .balign L1_CACHE_BYTES
115ENTRY(mn10300_serial_vdma_tx_handler)
116 mov (__tx_icr,a3),e3
117 mov GxICR_DETECT,d2
118 movbu d2,(e3) # ACK the interrupt
119 movhu (e3),d2 # flush
120
121 btst 0xFF,(__tx_flags,a3) # handle transmit flags
122 bne mnsc_vdma_tx_flags
123
124 movbu (SCxSTR,e2),d2 # don't try and transmit a char if the
125 # buffer is not empty
126 btst SC01STR_TBF,d2 # (may have tried to jumpstart)
127 bne mnsc_vdma_tx_noint
128
129 movbu (__tx_xchar,a3),d2 # handle hi-pri XON/XOFF
130 or d2,d2
131 bne mnsc_vdma_tx_xchar
132
133 mov (__uart_state,a3),a2 # see if the TTY Tx queue has anything in it
134 mov (__xmit_tail,a2),d3
135 mov (__xmit_head,a2),d2
136 cmp d3,d2
137 beq mnsc_vdma_tx_empty
138
139 mov (__xmit_buffer,a2),d2 # get a char from the buffer and
140 # transmit it
141 movbu (d3,d2),d2
142 movbu d2,(SCxTXB,e2) # Tx
143
144 inc d3 # advance the buffer pointer
145 and __UART_XMIT_SIZE-1,d3
146 mov (__xmit_head,a2),d2
147 mov d3,(__xmit_tail,a2)
148
149 sub d3,d2 # see if we've written everything
150 beq mnsc_vdma_tx_empty
151
152 and __UART_XMIT_SIZE-1,d2 # see if we just made a hole
153 cmp __UART_XMIT_SIZE-2,d2
154 beq mnsc_vdma_tx_made_hole
155
156mnsc_vdma_tx_done:
157 mov (__tm_icr,a3),a2
158 mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
159 movhu d2,(a2) # request a slow interrupt
160 movhu (a2),d2 # flush
161
162mnsc_vdma_tx_noint:
163 movm (sp),[d2,d3,a2,a3,exreg0]
164 rti
165
166mnsc_vdma_tx_empty:
167 mov +(NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)|GxICR_DETECT),d2
168 movhu d2,(e3) # disable the interrupt
169 movhu (e3),d2 # flush
170
171 bset MNSCx_TX_EMPTY,(__intr_flags,a3)
172 bra mnsc_vdma_tx_done
173
174mnsc_vdma_tx_flags:
175 btst MNSCx_TX_STOP,(__tx_flags,a3)
176 bne mnsc_vdma_tx_stop
177 movhu (SCxCTR,e2),d2 # turn on break mode
178 or SC01CTR_BKE,d2
179 movhu d2,(SCxCTR,e2)
180mnsc_vdma_tx_stop:
181 mov +(NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)|GxICR_DETECT),d2
182 movhu d2,(e3) # disable transmit interrupts on this
183 # channel
184 movhu (e3),d2 # flush
185 bra mnsc_vdma_tx_noint
186
187mnsc_vdma_tx_xchar:
188 bclr 0xff,(__tx_xchar,a3)
189 movbu d2,(SCxTXB,e2)
190 bra mnsc_vdma_tx_done
191
192mnsc_vdma_tx_made_hole:
193 bset MNSCx_TX_SPACE,(__intr_flags,a3)
194 bra mnsc_vdma_tx_done
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
deleted file mode 100644
index 4994b570dfd9..000000000000
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ /dev/null
@@ -1,1790 +0,0 @@
1/* MN10300 On-chip serial port UART driver
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12static const char serial_name[] = "MN10300 Serial driver";
13static const char serial_version[] = "mn10300_serial-1.0";
14static const char serial_revdate[] = "2007-11-06";
15
16#if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
17#define SUPPORT_SYSRQ
18#endif
19
20#include <linux/module.h>
21#include <linux/serial.h>
22#include <linux/circ_buf.h>
23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/major.h>
31#include <linux/string.h>
32#include <linux/ioport.h>
33#include <linux/mm.h>
34#include <linux/slab.h>
35#include <linux/init.h>
36#include <linux/console.h>
37#include <linux/sysrq.h>
38
39#include <asm/io.h>
40#include <asm/irq.h>
41#include <asm/bitops.h>
42#include <asm/serial-regs.h>
43#include <unit/timex.h>
44#include "mn10300-serial.h"
45
46#ifdef CONFIG_SMP
47#undef GxICR
48#define GxICR(X) CROSS_GxICR(X, 0)
49#endif /* CONFIG_SMP */
50
51#define kenter(FMT, ...) \
52 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
53#define _enter(FMT, ...) \
54 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
55#define kdebug(FMT, ...) \
56 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
57#define _debug(FMT, ...) \
58 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
59#define kproto(FMT, ...) \
60 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
61#define _proto(FMT, ...) \
62 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
63
64#ifndef CODMSB
65/* c_cflag bit meaning */
66#define CODMSB 004000000000 /* change Transfer bit-order */
67#endif
68
69#define NR_UARTS 3
70
71#ifdef CONFIG_MN10300_TTYSM_CONSOLE
72static void mn10300_serial_console_write(struct console *co,
73 const char *s, unsigned count);
74static int __init mn10300_serial_console_setup(struct console *co,
75 char *options);
76
77static struct uart_driver mn10300_serial_driver;
78static struct console mn10300_serial_console = {
79 .name = "ttySM",
80 .write = mn10300_serial_console_write,
81 .device = uart_console_device,
82 .setup = mn10300_serial_console_setup,
83 .flags = CON_PRINTBUFFER,
84 .index = -1,
85 .data = &mn10300_serial_driver,
86};
87#endif
88
89static struct uart_driver mn10300_serial_driver = {
90 .owner = NULL,
91 .driver_name = "mn10300-serial",
92 .dev_name = "ttySM",
93 .major = TTY_MAJOR,
94 .minor = 128,
95 .nr = NR_UARTS,
96#ifdef CONFIG_MN10300_TTYSM_CONSOLE
97 .cons = &mn10300_serial_console,
98#endif
99};
100
101static unsigned int mn10300_serial_tx_empty(struct uart_port *);
102static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
103static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
104static void mn10300_serial_stop_tx(struct uart_port *);
105static void mn10300_serial_start_tx(struct uart_port *);
106static void mn10300_serial_send_xchar(struct uart_port *, char ch);
107static void mn10300_serial_stop_rx(struct uart_port *);
108static void mn10300_serial_enable_ms(struct uart_port *);
109static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
110static int mn10300_serial_startup(struct uart_port *);
111static void mn10300_serial_shutdown(struct uart_port *);
112static void mn10300_serial_set_termios(struct uart_port *,
113 struct ktermios *new,
114 struct ktermios *old);
115static const char *mn10300_serial_type(struct uart_port *);
116static void mn10300_serial_release_port(struct uart_port *);
117static int mn10300_serial_request_port(struct uart_port *);
118static void mn10300_serial_config_port(struct uart_port *, int);
119static int mn10300_serial_verify_port(struct uart_port *,
120 struct serial_struct *);
121#ifdef CONFIG_CONSOLE_POLL
122static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char);
123static int mn10300_serial_poll_get_char(struct uart_port *);
124#endif
125
126static const struct uart_ops mn10300_serial_ops = {
127 .tx_empty = mn10300_serial_tx_empty,
128 .set_mctrl = mn10300_serial_set_mctrl,
129 .get_mctrl = mn10300_serial_get_mctrl,
130 .stop_tx = mn10300_serial_stop_tx,
131 .start_tx = mn10300_serial_start_tx,
132 .send_xchar = mn10300_serial_send_xchar,
133 .stop_rx = mn10300_serial_stop_rx,
134 .enable_ms = mn10300_serial_enable_ms,
135 .break_ctl = mn10300_serial_break_ctl,
136 .startup = mn10300_serial_startup,
137 .shutdown = mn10300_serial_shutdown,
138 .set_termios = mn10300_serial_set_termios,
139 .type = mn10300_serial_type,
140 .release_port = mn10300_serial_release_port,
141 .request_port = mn10300_serial_request_port,
142 .config_port = mn10300_serial_config_port,
143 .verify_port = mn10300_serial_verify_port,
144#ifdef CONFIG_CONSOLE_POLL
145 .poll_put_char = mn10300_serial_poll_put_char,
146 .poll_get_char = mn10300_serial_poll_get_char,
147#endif
148};
149
150static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
151
152/*
153 * the first on-chip serial port: ttySM0 (aka SIF0)
154 */
155#ifdef CONFIG_MN10300_TTYSM0
156struct mn10300_serial_port mn10300_serial_port_sif0 = {
157 .uart.ops = &mn10300_serial_ops,
158 .uart.membase = (void __iomem *) &SC0CTR,
159 .uart.mapbase = (unsigned long) &SC0CTR,
160 .uart.iotype = UPIO_MEM,
161 .uart.irq = 0,
162 .uart.uartclk = 0, /* MN10300_IOCLK, */
163 .uart.fifosize = 1,
164 .uart.flags = UPF_BOOT_AUTOCONF,
165 .uart.line = 0,
166 .uart.type = PORT_MN10300,
167 .uart.lock =
168 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
169 .name = "ttySM0",
170 ._iobase = &SC0CTR,
171 ._control = &SC0CTR,
172 ._status = (volatile u8 *)&SC0STR,
173 ._intr = &SC0ICR,
174 ._rxb = &SC0RXB,
175 ._txb = &SC0TXB,
176 .rx_name = "ttySM0:Rx",
177 .tx_name = "ttySM0:Tx",
178#if defined(CONFIG_MN10300_TTYSM0_TIMER8)
179 .tm_name = "ttySM0:Timer8",
180 ._tmxmd = &TM8MD,
181 ._tmxbr = &TM8BR,
182 ._tmicr = &TM8ICR,
183 .tm_irq = TM8IRQ,
184 .div_timer = MNSCx_DIV_TIMER_16BIT,
185#elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
186 .tm_name = "ttySM0:Timer0",
187 ._tmxmd = &TM0MD,
188 ._tmxbr = (volatile u16 *)&TM0BR,
189 ._tmicr = &TM0ICR,
190 .tm_irq = TM0IRQ,
191 .div_timer = MNSCx_DIV_TIMER_8BIT,
192#elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
193 .tm_name = "ttySM0:Timer2",
194 ._tmxmd = &TM2MD,
195 ._tmxbr = (volatile u16 *)&TM2BR,
196 ._tmicr = &TM2ICR,
197 .tm_irq = TM2IRQ,
198 .div_timer = MNSCx_DIV_TIMER_8BIT,
199#else
200#error "Unknown config for ttySM0"
201#endif
202 .rx_irq = SC0RXIRQ,
203 .tx_irq = SC0TXIRQ,
204 .rx_icr = &GxICR(SC0RXIRQ),
205 .tx_icr = &GxICR(SC0TXIRQ),
206 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
207 .options = 0,
208#ifdef CONFIG_GDBSTUB_ON_TTYSM0
209 .gdbstub = 1,
210#endif
211};
212#endif /* CONFIG_MN10300_TTYSM0 */
213
214/*
215 * the second on-chip serial port: ttySM1 (aka SIF1)
216 */
217#ifdef CONFIG_MN10300_TTYSM1
218struct mn10300_serial_port mn10300_serial_port_sif1 = {
219 .uart.ops = &mn10300_serial_ops,
220 .uart.membase = (void __iomem *) &SC1CTR,
221 .uart.mapbase = (unsigned long) &SC1CTR,
222 .uart.iotype = UPIO_MEM,
223 .uart.irq = 0,
224 .uart.uartclk = 0, /* MN10300_IOCLK, */
225 .uart.fifosize = 1,
226 .uart.flags = UPF_BOOT_AUTOCONF,
227 .uart.line = 1,
228 .uart.type = PORT_MN10300,
229 .uart.lock =
230 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
231 .name = "ttySM1",
232 ._iobase = &SC1CTR,
233 ._control = &SC1CTR,
234 ._status = (volatile u8 *)&SC1STR,
235 ._intr = &SC1ICR,
236 ._rxb = &SC1RXB,
237 ._txb = &SC1TXB,
238 .rx_name = "ttySM1:Rx",
239 .tx_name = "ttySM1:Tx",
240#if defined(CONFIG_MN10300_TTYSM1_TIMER9)
241 .tm_name = "ttySM1:Timer9",
242 ._tmxmd = &TM9MD,
243 ._tmxbr = &TM9BR,
244 ._tmicr = &TM9ICR,
245 .tm_irq = TM9IRQ,
246 .div_timer = MNSCx_DIV_TIMER_16BIT,
247#elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
248 .tm_name = "ttySM1:Timer3",
249 ._tmxmd = &TM3MD,
250 ._tmxbr = (volatile u16 *)&TM3BR,
251 ._tmicr = &TM3ICR,
252 .tm_irq = TM3IRQ,
253 .div_timer = MNSCx_DIV_TIMER_8BIT,
254#elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
255 .tm_name = "ttySM1/Timer12",
256 ._tmxmd = &TM12MD,
257 ._tmxbr = &TM12BR,
258 ._tmicr = &TM12ICR,
259 .tm_irq = TM12IRQ,
260 .div_timer = MNSCx_DIV_TIMER_16BIT,
261#else
262#error "Unknown config for ttySM1"
263#endif
264 .rx_irq = SC1RXIRQ,
265 .tx_irq = SC1TXIRQ,
266 .rx_icr = &GxICR(SC1RXIRQ),
267 .tx_icr = &GxICR(SC1TXIRQ),
268 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
269 .options = 0,
270#ifdef CONFIG_GDBSTUB_ON_TTYSM1
271 .gdbstub = 1,
272#endif
273};
274#endif /* CONFIG_MN10300_TTYSM1 */
275
276/*
277 * the third on-chip serial port: ttySM2 (aka SIF2)
278 */
279#ifdef CONFIG_MN10300_TTYSM2
280struct mn10300_serial_port mn10300_serial_port_sif2 = {
281 .uart.ops = &mn10300_serial_ops,
282 .uart.membase = (void __iomem *) &SC2CTR,
283 .uart.mapbase = (unsigned long) &SC2CTR,
284 .uart.iotype = UPIO_MEM,
285 .uart.irq = 0,
286 .uart.uartclk = 0, /* MN10300_IOCLK, */
287 .uart.fifosize = 1,
288 .uart.flags = UPF_BOOT_AUTOCONF,
289 .uart.line = 2,
290#ifdef CONFIG_MN10300_TTYSM2_CTS
291 .uart.type = PORT_MN10300_CTS,
292#else
293 .uart.type = PORT_MN10300,
294#endif
295 .uart.lock =
296 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
297 .name = "ttySM2",
298 ._iobase = &SC2CTR,
299 ._control = &SC2CTR,
300 ._status = (volatile u8 *)&SC2STR,
301 ._intr = &SC2ICR,
302 ._rxb = &SC2RXB,
303 ._txb = &SC2TXB,
304 .rx_name = "ttySM2:Rx",
305 .tx_name = "ttySM2:Tx",
306#if defined(CONFIG_MN10300_TTYSM2_TIMER10)
307 .tm_name = "ttySM2/Timer10",
308 ._tmxmd = &TM10MD,
309 ._tmxbr = &TM10BR,
310 ._tmicr = &TM10ICR,
311 .tm_irq = TM10IRQ,
312 .div_timer = MNSCx_DIV_TIMER_16BIT,
313#elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
314 .tm_name = "ttySM2/Timer9",
315 ._tmxmd = &TM9MD,
316 ._tmxbr = &TM9BR,
317 ._tmicr = &TM9ICR,
318 .tm_irq = TM9IRQ,
319 .div_timer = MNSCx_DIV_TIMER_16BIT,
320#elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
321 .tm_name = "ttySM2/Timer1",
322 ._tmxmd = &TM1MD,
323 ._tmxbr = (volatile u16 *)&TM1BR,
324 ._tmicr = &TM1ICR,
325 .tm_irq = TM1IRQ,
326 .div_timer = MNSCx_DIV_TIMER_8BIT,
327#elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
328 .tm_name = "ttySM2/Timer3",
329 ._tmxmd = &TM3MD,
330 ._tmxbr = (volatile u16 *)&TM3BR,
331 ._tmicr = &TM3ICR,
332 .tm_irq = TM3IRQ,
333 .div_timer = MNSCx_DIV_TIMER_8BIT,
334#else
335#error "Unknown config for ttySM2"
336#endif
337 .rx_irq = SC2RXIRQ,
338 .tx_irq = SC2TXIRQ,
339 .rx_icr = &GxICR(SC2RXIRQ),
340 .tx_icr = &GxICR(SC2TXIRQ),
341 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
342#ifdef CONFIG_MN10300_TTYSM2_CTS
343 .options = MNSCx_OPT_CTS,
344#else
345 .options = 0,
346#endif
347#ifdef CONFIG_GDBSTUB_ON_TTYSM2
348 .gdbstub = 1,
349#endif
350};
351#endif /* CONFIG_MN10300_TTYSM2 */
352
353
354/*
355 * list of available serial ports
356 */
357struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
358#ifdef CONFIG_MN10300_TTYSM0
359 [0] = &mn10300_serial_port_sif0,
360#endif
361#ifdef CONFIG_MN10300_TTYSM1
362 [1] = &mn10300_serial_port_sif1,
363#endif
364#ifdef CONFIG_MN10300_TTYSM2
365 [2] = &mn10300_serial_port_sif2,
366#endif
367 [NR_UARTS] = NULL,
368};
369
370
371/*
372 * we abuse the serial ports' baud timers' interrupt lines to get the ability
373 * to deliver interrupts to userspace as we use the ports' interrupt lines to
374 * do virtual DMA on account of the ports having no hardware FIFOs
375 *
376 * we can generate an interrupt manually in the assembly stubs by writing to
377 * the enable and detect bits in the interrupt control register, so all we need
378 * to do here is disable the interrupt line
379 *
380 * note that we can't just leave the line enabled as the baud rate timer *also*
381 * generates interrupts
382 */
383static void mn10300_serial_mask_ack(unsigned int irq)
384{
385 unsigned long flags;
386 u16 tmp;
387
388 flags = arch_local_cli_save();
389 GxICR(irq) = GxICR_LEVEL_6;
390 tmp = GxICR(irq); /* flush write buffer */
391 arch_local_irq_restore(flags);
392}
393
394static void mn10300_serial_chip_mask_ack(struct irq_data *d)
395{
396 mn10300_serial_mask_ack(d->irq);
397}
398
399static void mn10300_serial_nop(struct irq_data *d)
400{
401}
402
403static struct irq_chip mn10300_serial_pic = {
404 .name = "mnserial",
405 .irq_ack = mn10300_serial_chip_mask_ack,
406 .irq_mask = mn10300_serial_chip_mask_ack,
407 .irq_mask_ack = mn10300_serial_chip_mask_ack,
408 .irq_unmask = mn10300_serial_nop,
409};
410
411static void mn10300_serial_low_mask(struct irq_data *d)
412{
413 unsigned long flags;
414 u16 tmp;
415
416 flags = arch_local_cli_save();
417 GxICR(d->irq) = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
418 tmp = GxICR(d->irq); /* flush write buffer */
419 arch_local_irq_restore(flags);
420}
421
422static void mn10300_serial_low_unmask(struct irq_data *d)
423{
424 unsigned long flags;
425 u16 tmp;
426
427 flags = arch_local_cli_save();
428 GxICR(d->irq) =
429 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
430 tmp = GxICR(d->irq); /* flush write buffer */
431 arch_local_irq_restore(flags);
432}
433
434static struct irq_chip mn10300_serial_low_pic = {
435 .name = "mnserial-low",
436 .irq_mask = mn10300_serial_low_mask,
437 .irq_unmask = mn10300_serial_low_unmask,
438};
439
440/*
441 * serial virtual DMA interrupt jump table
442 */
443struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
444
445static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
446{
447 int retries = 100;
448 u16 x;
449
450 /* nothing to do if irq isn't set up */
451 if (!mn10300_serial_int_tbl[port->tx_irq].port)
452 return;
453
454 port->tx_flags |= MNSCx_TX_STOP;
455 mb();
456
457 /*
458 * Here we wait for the irq to be disabled. Either it already is
459 * disabled or we wait some number of retries for the VDMA handler
460 * to disable it. The retries give the VDMA handler enough time to
461 * run to completion if it was already in progress. If the VDMA IRQ
462 * is enabled but the handler is not yet running when arrive here,
463 * the STOP flag will prevent the handler from conflicting with the
464 * driver code following this loop.
465 */
466 while ((*port->tx_icr & GxICR_ENABLE) && retries-- > 0)
467 ;
468 if (retries <= 0) {
469 *port->tx_icr =
470 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
471 x = *port->tx_icr;
472 }
473}
474
475static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
476{
477 u16 x;
478
479 /* nothing to do if irq isn't set up */
480 if (!mn10300_serial_int_tbl[port->tx_irq].port)
481 return;
482
483 /* stop vdma irq if not already stopped */
484 if (!(port->tx_flags & MNSCx_TX_STOP))
485 mn10300_serial_dis_tx_intr(port);
486
487 port->tx_flags &= ~MNSCx_TX_STOP;
488 mb();
489
490 *port->tx_icr =
491 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) |
492 GxICR_ENABLE | GxICR_REQUEST | GxICR_DETECT;
493 x = *port->tx_icr;
494}
495
496static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
497{
498 unsigned long flags;
499 u16 x;
500
501 flags = arch_local_cli_save();
502 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
503 x = *port->rx_icr;
504 arch_local_irq_restore(flags);
505}
506
507/*
508 * multi-bit equivalent of test_and_clear_bit()
509 */
510static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
511{
512 u32 epsw;
513 asm volatile(" bclr %1,(%2) \n"
514 " mov epsw,%0 \n"
515 : "=d"(epsw) : "d"(mask), "a"(ptr)
516 : "cc", "memory");
517 return !(epsw & EPSW_FLAG_Z);
518}
519
520/*
521 * receive chars from the ring buffer for this serial port
522 * - must do break detection here (not done in the UART)
523 */
524static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
525{
526 struct uart_icount *icount = &port->uart.icount;
527 struct tty_port *tport = &port->uart.state->port;
528 unsigned ix;
529 int count;
530 u8 st, ch, push, status, overrun;
531
532 _enter("%s", port->name);
533
534 push = 0;
535
536 count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
537 count = tty_buffer_request_room(tport, count);
538 if (count == 0) {
539 if (!tport->low_latency)
540 tty_flip_buffer_push(tport);
541 return;
542 }
543
544try_again:
545 /* pull chars out of the hat */
546 ix = READ_ONCE(port->rx_outp);
547 if (CIRC_CNT(port->rx_inp, ix, MNSC_BUFFER_SIZE) == 0) {
548 if (push && !tport->low_latency)
549 tty_flip_buffer_push(tport);
550 return;
551 }
552
553 /* READ_ONCE() enforces dependency, but dangerous through integer!!! */
554 ch = port->rx_buffer[ix++];
555 st = port->rx_buffer[ix++];
556 smp_mb();
557 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
558 port->uart.icount.rx++;
559
560 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
561 status = 0;
562 overrun = 0;
563
564 /* the UART doesn't detect BREAK, so we have to do that ourselves
565 * - it starts as a framing error on a NUL character
566 * - then we count another two NUL characters before issuing TTY_BREAK
567 * - then we end on a normal char or one that has all the bottom bits
568 * zero and the top bits set
569 */
570 switch (port->rx_brk) {
571 case 0:
572 /* not breaking at the moment */
573 break;
574
575 case 1:
576 if (st & SC01STR_FEF && ch == 0) {
577 port->rx_brk = 2;
578 goto try_again;
579 }
580 goto not_break;
581
582 case 2:
583 if (st & SC01STR_FEF && ch == 0) {
584 port->rx_brk = 3;
585 _proto("Rx Break Detected");
586 icount->brk++;
587 if (uart_handle_break(&port->uart))
588 goto ignore_char;
589 status |= 1 << TTY_BREAK;
590 goto insert;
591 }
592 goto not_break;
593
594 default:
595 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
596 goto try_again; /* still breaking */
597
598 port->rx_brk = 0; /* end of the break */
599
600 switch (ch) {
601 case 0xFF:
602 case 0xFE:
603 case 0xFC:
604 case 0xF8:
605 case 0xF0:
606 case 0xE0:
607 case 0xC0:
608 case 0x80:
609 case 0x00:
610 /* discard char at probable break end */
611 goto try_again;
612 }
613 break;
614 }
615
616process_errors:
617 /* handle framing error */
618 if (st & SC01STR_FEF) {
619 if (ch == 0) {
620 /* framing error with NUL char is probably a BREAK */
621 port->rx_brk = 1;
622 goto try_again;
623 }
624
625 _proto("Rx Framing Error");
626 icount->frame++;
627 status |= 1 << TTY_FRAME;
628 }
629
630 /* handle parity error */
631 if (st & SC01STR_PEF) {
632 _proto("Rx Parity Error");
633 icount->parity++;
634 status = TTY_PARITY;
635 }
636
637 /* handle normal char */
638 if (status == 0) {
639 if (uart_handle_sysrq_char(&port->uart, ch))
640 goto ignore_char;
641 status = (1 << TTY_NORMAL);
642 }
643
644 /* handle overrun error */
645 if (st & SC01STR_OEF) {
646 if (port->rx_brk)
647 goto try_again;
648
649 _proto("Rx Overrun Error");
650 icount->overrun++;
651 overrun = 1;
652 }
653
654insert:
655 status &= port->uart.read_status_mask;
656
657 if (!overrun && !(status & port->uart.ignore_status_mask)) {
658 int flag;
659
660 if (status & (1 << TTY_BREAK))
661 flag = TTY_BREAK;
662 else if (status & (1 << TTY_PARITY))
663 flag = TTY_PARITY;
664 else if (status & (1 << TTY_FRAME))
665 flag = TTY_FRAME;
666 else
667 flag = TTY_NORMAL;
668
669 tty_insert_flip_char(tport, ch, flag);
670 }
671
672 /* overrun is special, since it's reported immediately, and doesn't
673 * affect the current character
674 */
675 if (overrun)
676 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
677
678 count--;
679 if (count <= 0) {
680 if (!tport->low_latency)
681 tty_flip_buffer_push(tport);
682 return;
683 }
684
685ignore_char:
686 push = 1;
687 goto try_again;
688
689not_break:
690 port->rx_brk = 0;
691 goto process_errors;
692}
693
694/*
695 * handle an interrupt from the serial transmission "virtual DMA" driver
696 * - note: the interrupt routine will disable its own interrupts when the Tx
697 * buffer is empty
698 */
699static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
700{
701 _enter("%s", port->name);
702
703 if (!port->uart.state || !port->uart.state->port.tty) {
704 mn10300_serial_dis_tx_intr(port);
705 return;
706 }
707
708 if (uart_tx_stopped(&port->uart) ||
709 uart_circ_empty(&port->uart.state->xmit))
710 mn10300_serial_dis_tx_intr(port);
711
712 if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
713 uart_write_wakeup(&port->uart);
714}
715
716/*
717 * deal with a change in the status of the CTS line
718 */
719static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
720{
721 u16 ctr;
722
723 port->tx_cts = st;
724 port->uart.icount.cts++;
725
726 /* flip the CTS state selector flag to interrupt when it changes
727 * back */
728 ctr = *port->_control;
729 ctr ^= SC2CTR_TWS;
730 *port->_control = ctr;
731
732 uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
733 wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
734}
735
736/*
737 * handle a virtual interrupt generated by the lower level "virtual DMA"
738 * routines (irq is the baud timer interrupt)
739 */
740static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
741{
742 struct mn10300_serial_port *port = dev_id;
743 u8 st;
744
745 spin_lock(&port->uart.lock);
746
747 if (port->intr_flags) {
748 _debug("INT %s: %x", port->name, port->intr_flags);
749
750 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
751 mn10300_serial_receive_interrupt(port);
752
753 if (mask_test_and_clear(&port->intr_flags,
754 MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
755 mn10300_serial_transmit_interrupt(port);
756 }
757
758 /* the only modem control line amongst the whole lot is CTS on
759 * serial port 2 */
760 if (port->type == PORT_MN10300_CTS) {
761 st = *port->_status;
762 if ((port->tx_cts ^ st) & SC2STR_CTS)
763 mn10300_serial_cts_changed(port, st);
764 }
765
766 spin_unlock(&port->uart.lock);
767
768 return IRQ_HANDLED;
769}
770
771/*
772 * return indication of whether the hardware transmit buffer is empty
773 */
774static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
775{
776 struct mn10300_serial_port *port =
777 container_of(_port, struct mn10300_serial_port, uart);
778
779 _enter("%s", port->name);
780
781 return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
782 0 : TIOCSER_TEMT;
783}
784
785/*
786 * set the modem control lines (we don't have any)
787 */
788static void mn10300_serial_set_mctrl(struct uart_port *_port,
789 unsigned int mctrl)
790{
791 struct mn10300_serial_port *port __attribute__ ((unused)) =
792 container_of(_port, struct mn10300_serial_port, uart);
793
794 _enter("%s,%x", port->name, mctrl);
795}
796
797/*
798 * get the modem control line statuses
799 */
800static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
801{
802 struct mn10300_serial_port *port =
803 container_of(_port, struct mn10300_serial_port, uart);
804
805 _enter("%s", port->name);
806
807 if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
808 return TIOCM_CAR | TIOCM_DSR;
809
810 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
811}
812
813/*
814 * stop transmitting characters
815 */
816static void mn10300_serial_stop_tx(struct uart_port *_port)
817{
818 struct mn10300_serial_port *port =
819 container_of(_port, struct mn10300_serial_port, uart);
820
821 _enter("%s", port->name);
822
823 /* disable the virtual DMA */
824 mn10300_serial_dis_tx_intr(port);
825}
826
827/*
828 * start transmitting characters
829 * - jump-start transmission if it has stalled
830 * - enable the serial Tx interrupt (used by the virtual DMA controller)
831 * - force an interrupt to happen if necessary
832 */
833static void mn10300_serial_start_tx(struct uart_port *_port)
834{
835 struct mn10300_serial_port *port =
836 container_of(_port, struct mn10300_serial_port, uart);
837
838 _enter("%s{%lu}",
839 port->name,
840 CIRC_CNT(&port->uart.state->xmit.head,
841 &port->uart.state->xmit.tail,
842 UART_XMIT_SIZE));
843
844 /* kick the virtual DMA controller */
845 mn10300_serial_en_tx_intr(port);
846
847 _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
848 *port->_control, *port->_intr, *port->_status,
849 *port->_tmxmd,
850 (port->div_timer == MNSCx_DIV_TIMER_8BIT) ?
851 *(volatile u8 *)port->_tmxbr : *port->_tmxbr,
852 *port->tx_icr);
853}
854
855/*
856 * transmit a high-priority XON/XOFF character
857 */
858static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
859{
860 struct mn10300_serial_port *port =
861 container_of(_port, struct mn10300_serial_port, uart);
862 unsigned long flags;
863
864 _enter("%s,%02x", port->name, ch);
865
866 if (likely(port->gdbstub)) {
867 port->tx_xchar = ch;
868 if (ch) {
869 spin_lock_irqsave(&port->uart.lock, flags);
870 mn10300_serial_en_tx_intr(port);
871 spin_unlock_irqrestore(&port->uart.lock, flags);
872 }
873 }
874}
875
876/*
877 * stop receiving characters
878 * - called whilst the port is being closed
879 */
880static void mn10300_serial_stop_rx(struct uart_port *_port)
881{
882 struct mn10300_serial_port *port =
883 container_of(_port, struct mn10300_serial_port, uart);
884
885 u16 ctr;
886
887 _enter("%s", port->name);
888
889 ctr = *port->_control;
890 ctr &= ~SC01CTR_RXE;
891 *port->_control = ctr;
892
893 mn10300_serial_dis_rx_intr(port);
894}
895
896/*
897 * enable modem status interrupts
898 */
899static void mn10300_serial_enable_ms(struct uart_port *_port)
900{
901 struct mn10300_serial_port *port =
902 container_of(_port, struct mn10300_serial_port, uart);
903
904 u16 ctr, cts;
905
906 _enter("%s", port->name);
907
908 if (port->type == PORT_MN10300_CTS) {
909 /* want to interrupt when CTS goes low if CTS is now high and
910 * vice versa
911 */
912 port->tx_cts = *port->_status;
913
914 cts = (port->tx_cts & SC2STR_CTS) ?
915 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
916
917 ctr = *port->_control;
918 ctr &= ~SC2CTR_TWS;
919 ctr |= cts;
920 *port->_control = ctr;
921
922 mn10300_serial_en_tx_intr(port);
923 }
924}
925
926/*
927 * transmit or cease transmitting a break signal
928 */
929static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
930{
931 struct mn10300_serial_port *port =
932 container_of(_port, struct mn10300_serial_port, uart);
933 unsigned long flags;
934
935 _enter("%s,%d", port->name, ctl);
936
937 spin_lock_irqsave(&port->uart.lock, flags);
938 if (ctl) {
939 /* tell the virtual DMA handler to assert BREAK */
940 port->tx_flags |= MNSCx_TX_BREAK;
941 mn10300_serial_en_tx_intr(port);
942 } else {
943 port->tx_flags &= ~MNSCx_TX_BREAK;
944 *port->_control &= ~SC01CTR_BKE;
945 mn10300_serial_en_tx_intr(port);
946 }
947 spin_unlock_irqrestore(&port->uart.lock, flags);
948}
949
950/*
951 * grab the interrupts and enable the port for reception
952 */
953static int mn10300_serial_startup(struct uart_port *_port)
954{
955 struct mn10300_serial_port *port =
956 container_of(_port, struct mn10300_serial_port, uart);
957 struct mn10300_serial_int *pint;
958
959 _enter("%s{%d}", port->name, port->gdbstub);
960
961 if (unlikely(port->gdbstub))
962 return -EBUSY;
963
964 /* allocate an Rx buffer for the virtual DMA handler */
965 port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
966 if (!port->rx_buffer)
967 return -ENOMEM;
968
969 port->rx_inp = port->rx_outp = 0;
970 port->tx_flags = 0;
971
972 /* finally, enable the device */
973 *port->_intr = SC01ICR_TI;
974 *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
975
976 pint = &mn10300_serial_int_tbl[port->rx_irq];
977 pint->port = port;
978 pint->vdma = mn10300_serial_vdma_rx_handler;
979 pint = &mn10300_serial_int_tbl[port->tx_irq];
980 pint->port = port;
981 pint->vdma = mn10300_serial_vdma_tx_handler;
982
983 irq_set_chip(port->rx_irq, &mn10300_serial_low_pic);
984 irq_set_chip(port->tx_irq, &mn10300_serial_low_pic);
985 irq_set_chip(port->tm_irq, &mn10300_serial_pic);
986
987 if (request_irq(port->rx_irq, mn10300_serial_interrupt,
988 IRQF_NOBALANCING,
989 port->rx_name, port) < 0)
990 goto error;
991
992 if (request_irq(port->tx_irq, mn10300_serial_interrupt,
993 IRQF_NOBALANCING,
994 port->tx_name, port) < 0)
995 goto error2;
996
997 if (request_irq(port->tm_irq, mn10300_serial_interrupt,
998 IRQF_NOBALANCING,
999 port->tm_name, port) < 0)
1000 goto error3;
1001 mn10300_serial_mask_ack(port->tm_irq);
1002
1003 return 0;
1004
1005error3:
1006 free_irq(port->tx_irq, port);
1007error2:
1008 free_irq(port->rx_irq, port);
1009error:
1010 kfree(port->rx_buffer);
1011 port->rx_buffer = NULL;
1012 return -EBUSY;
1013}
1014
1015/*
1016 * shutdown the port and release interrupts
1017 */
1018static void mn10300_serial_shutdown(struct uart_port *_port)
1019{
1020 unsigned long flags;
1021 u16 x;
1022 struct mn10300_serial_port *port =
1023 container_of(_port, struct mn10300_serial_port, uart);
1024
1025 _enter("%s", port->name);
1026
1027 spin_lock_irqsave(&_port->lock, flags);
1028 mn10300_serial_dis_tx_intr(port);
1029
1030 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1031 x = *port->rx_icr;
1032 port->tx_flags = 0;
1033 spin_unlock_irqrestore(&_port->lock, flags);
1034
1035 /* disable the serial port and its baud rate timer */
1036 *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1037 *port->_tmxmd = 0;
1038
1039 if (port->rx_buffer) {
1040 void *buf = port->rx_buffer;
1041 port->rx_buffer = NULL;
1042 kfree(buf);
1043 }
1044
1045 /* disable all intrs */
1046 free_irq(port->tm_irq, port);
1047 free_irq(port->rx_irq, port);
1048 free_irq(port->tx_irq, port);
1049
1050 mn10300_serial_int_tbl[port->tx_irq].port = NULL;
1051 mn10300_serial_int_tbl[port->rx_irq].port = NULL;
1052}
1053
1054/*
1055 * this routine is called to set the UART divisor registers to match the
1056 * specified baud rate for a serial port.
1057 */
1058static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
1059 struct ktermios *new,
1060 struct ktermios *old)
1061{
1062 unsigned long flags;
1063 unsigned long ioclk = port->ioclk;
1064 unsigned cflag;
1065 int baud, bits, xdiv, tmp;
1066 u16 tmxbr, scxctr;
1067 u8 tmxmd, battempt;
1068 u8 div_timer = port->div_timer;
1069
1070 _enter("%s{%lu}", port->name, ioclk);
1071
1072 /* byte size and parity */
1073 cflag = new->c_cflag;
1074 switch (cflag & CSIZE) {
1075 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
1076 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1077 default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1078 }
1079
1080 if (cflag & CSTOPB) {
1081 scxctr |= SC01CTR_STB_2BIT;
1082 bits++;
1083 }
1084
1085 if (cflag & PARENB) {
1086 bits++;
1087 if (cflag & PARODD)
1088 scxctr |= SC01CTR_PB_ODD;
1089#ifdef CMSPAR
1090 else if (cflag & CMSPAR)
1091 scxctr |= SC01CTR_PB_FIXED0;
1092#endif
1093 else
1094 scxctr |= SC01CTR_PB_EVEN;
1095 }
1096
1097 /* Determine divisor based on baud rate */
1098 battempt = 0;
1099
1100 switch (port->uart.line) {
1101#ifdef CONFIG_MN10300_TTYSM0
1102 case 0: /* ttySM0 */
1103#if defined(CONFIG_MN10300_TTYSM0_TIMER8)
1104 scxctr |= SC0CTR_CK_TM8UFLOW_8;
1105#elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
1106 scxctr |= SC0CTR_CK_TM0UFLOW_8;
1107#elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
1108 scxctr |= SC0CTR_CK_TM2UFLOW_8;
1109#else
1110#error "Unknown config for ttySM0"
1111#endif
1112 break;
1113#endif /* CONFIG_MN10300_TTYSM0 */
1114
1115#ifdef CONFIG_MN10300_TTYSM1
1116 case 1: /* ttySM1 */
1117#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
1118#if defined(CONFIG_MN10300_TTYSM1_TIMER9)
1119 scxctr |= SC1CTR_CK_TM9UFLOW_8;
1120#elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
1121 scxctr |= SC1CTR_CK_TM3UFLOW_8;
1122#else
1123#error "Unknown config for ttySM1"
1124#endif
1125#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1126#if defined(CONFIG_MN10300_TTYSM1_TIMER12)
1127 scxctr |= SC1CTR_CK_TM12UFLOW_8;
1128#else
1129#error "Unknown config for ttySM1"
1130#endif
1131#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1132 break;
1133#endif /* CONFIG_MN10300_TTYSM1 */
1134
1135#ifdef CONFIG_MN10300_TTYSM2
1136 case 2: /* ttySM2 */
1137#if defined(CONFIG_AM33_2)
1138#if defined(CONFIG_MN10300_TTYSM2_TIMER10)
1139 scxctr |= SC2CTR_CK_TM10UFLOW;
1140#else
1141#error "Unknown config for ttySM2"
1142#endif
1143#else /* CONFIG_AM33_2 */
1144#if defined(CONFIG_MN10300_TTYSM2_TIMER9)
1145 scxctr |= SC2CTR_CK_TM9UFLOW_8;
1146#elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
1147 scxctr |= SC2CTR_CK_TM1UFLOW_8;
1148#elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
1149 scxctr |= SC2CTR_CK_TM3UFLOW_8;
1150#else
1151#error "Unknown config for ttySM2"
1152#endif
1153#endif /* CONFIG_AM33_2 */
1154 break;
1155#endif /* CONFIG_MN10300_TTYSM2 */
1156
1157 default:
1158 break;
1159 }
1160
1161try_alternative:
1162 baud = uart_get_baud_rate(&port->uart, new, old, 0,
1163 port->ioclk / 8);
1164
1165 _debug("ALT %d [baud %d]", battempt, baud);
1166
1167 if (!baud)
1168 baud = 9600; /* B0 transition handled in rs_set_termios */
1169 xdiv = 1;
1170 if (baud == 134) {
1171 baud = 269; /* 134 is really 134.5 */
1172 xdiv = 2;
1173 }
1174
1175 if (baud == 38400 &&
1176 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
1177 ) {
1178 _debug("CUSTOM %u", port->uart.custom_divisor);
1179
1180 if (div_timer == MNSCx_DIV_TIMER_16BIT) {
1181 if (port->uart.custom_divisor <= 65535) {
1182 tmxmd = TM8MD_SRC_IOCLK;
1183 tmxbr = port->uart.custom_divisor;
1184 port->uart.uartclk = ioclk;
1185 goto timer_okay;
1186 }
1187 if (port->uart.custom_divisor / 8 <= 65535) {
1188 tmxmd = TM8MD_SRC_IOCLK_8;
1189 tmxbr = port->uart.custom_divisor / 8;
1190 port->uart.custom_divisor = tmxbr * 8;
1191 port->uart.uartclk = ioclk / 8;
1192 goto timer_okay;
1193 }
1194 if (port->uart.custom_divisor / 32 <= 65535) {
1195 tmxmd = TM8MD_SRC_IOCLK_32;
1196 tmxbr = port->uart.custom_divisor / 32;
1197 port->uart.custom_divisor = tmxbr * 32;
1198 port->uart.uartclk = ioclk / 32;
1199 goto timer_okay;
1200 }
1201
1202 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
1203 if (port->uart.custom_divisor <= 255) {
1204 tmxmd = TM2MD_SRC_IOCLK;
1205 tmxbr = port->uart.custom_divisor;
1206 port->uart.uartclk = ioclk;
1207 goto timer_okay;
1208 }
1209 if (port->uart.custom_divisor / 8 <= 255) {
1210 tmxmd = TM2MD_SRC_IOCLK_8;
1211 tmxbr = port->uart.custom_divisor / 8;
1212 port->uart.custom_divisor = tmxbr * 8;
1213 port->uart.uartclk = ioclk / 8;
1214 goto timer_okay;
1215 }
1216 if (port->uart.custom_divisor / 32 <= 255) {
1217 tmxmd = TM2MD_SRC_IOCLK_32;
1218 tmxbr = port->uart.custom_divisor / 32;
1219 port->uart.custom_divisor = tmxbr * 32;
1220 port->uart.uartclk = ioclk / 32;
1221 goto timer_okay;
1222 }
1223 }
1224 }
1225
1226 switch (div_timer) {
1227 case MNSCx_DIV_TIMER_16BIT:
1228 port->uart.uartclk = ioclk;
1229 tmxmd = TM8MD_SRC_IOCLK;
1230 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1231 if (tmp > 0 && tmp <= 65535)
1232 goto timer_okay;
1233
1234 port->uart.uartclk = ioclk / 8;
1235 tmxmd = TM8MD_SRC_IOCLK_8;
1236 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1237 if (tmp > 0 && tmp <= 65535)
1238 goto timer_okay;
1239
1240 port->uart.uartclk = ioclk / 32;
1241 tmxmd = TM8MD_SRC_IOCLK_32;
1242 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1243 if (tmp > 0 && tmp <= 65535)
1244 goto timer_okay;
1245 break;
1246
1247 case MNSCx_DIV_TIMER_8BIT:
1248 port->uart.uartclk = ioclk;
1249 tmxmd = TM2MD_SRC_IOCLK;
1250 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1251 if (tmp > 0 && tmp <= 255)
1252 goto timer_okay;
1253
1254 port->uart.uartclk = ioclk / 8;
1255 tmxmd = TM2MD_SRC_IOCLK_8;
1256 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1257 if (tmp > 0 && tmp <= 255)
1258 goto timer_okay;
1259
1260 port->uart.uartclk = ioclk / 32;
1261 tmxmd = TM2MD_SRC_IOCLK_32;
1262 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1263 if (tmp > 0 && tmp <= 255)
1264 goto timer_okay;
1265 break;
1266
1267 default:
1268 BUG();
1269 return;
1270 }
1271
1272 /* refuse to change to a baud rate we can't support */
1273 _debug("CAN'T SUPPORT");
1274
1275 switch (battempt) {
1276 case 0:
1277 if (old) {
1278 new->c_cflag &= ~CBAUD;
1279 new->c_cflag |= (old->c_cflag & CBAUD);
1280 battempt = 1;
1281 goto try_alternative;
1282 }
1283
1284 case 1:
1285 /* as a last resort, if the quotient is zero, default to 9600
1286 * bps */
1287 new->c_cflag &= ~CBAUD;
1288 new->c_cflag |= B9600;
1289 battempt = 2;
1290 goto try_alternative;
1291
1292 default:
1293 /* hmmm... can't seem to support 9600 either
1294 * - we could try iterating through the speeds we know about to
1295 * find the lowest
1296 */
1297 new->c_cflag &= ~CBAUD;
1298 new->c_cflag |= B0;
1299
1300 if (div_timer == MNSCx_DIV_TIMER_16BIT)
1301 tmxmd = TM8MD_SRC_IOCLK_32;
1302 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
1303 tmxmd = TM2MD_SRC_IOCLK_32;
1304 tmxbr = 1;
1305
1306 port->uart.uartclk = ioclk / 32;
1307 break;
1308 }
1309timer_okay:
1310
1311 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
1312
1313 /* make the changes */
1314 spin_lock_irqsave(&port->uart.lock, flags);
1315
1316 uart_update_timeout(&port->uart, new->c_cflag, baud);
1317
1318 /* set the timer to produce the required baud rate */
1319 switch (div_timer) {
1320 case MNSCx_DIV_TIMER_16BIT:
1321 *port->_tmxmd = 0;
1322 *port->_tmxbr = tmxbr;
1323 *port->_tmxmd = TM8MD_INIT_COUNTER;
1324 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1325 break;
1326
1327 case MNSCx_DIV_TIMER_8BIT:
1328 *port->_tmxmd = 0;
1329 *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
1330 *port->_tmxmd = TM2MD_INIT_COUNTER;
1331 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1332 break;
1333 }
1334
1335 /* CTS flow control flag and modem status interrupts */
1336 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1337
1338 if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
1339 /* want to interrupt when CTS goes low if CTS is now
1340 * high and vice versa
1341 */
1342 port->tx_cts = *port->_status;
1343
1344 if (port->tx_cts & SC2STR_CTS)
1345 scxctr |= SC2CTR_TWE;
1346 else
1347 scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1348 }
1349
1350 /* set up parity check flag */
1351 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
1352 if (new->c_iflag & INPCK)
1353 port->uart.read_status_mask |=
1354 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1355 if (new->c_iflag & (BRKINT | PARMRK))
1356 port->uart.read_status_mask |= (1 << TTY_BREAK);
1357
1358 /* characters to ignore */
1359 port->uart.ignore_status_mask = 0;
1360 if (new->c_iflag & IGNPAR)
1361 port->uart.ignore_status_mask |=
1362 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1363 if (new->c_iflag & IGNBRK) {
1364 port->uart.ignore_status_mask |= (1 << TTY_BREAK);
1365 /*
1366 * If we're ignoring parity and break indicators,
1367 * ignore overruns to (for real raw support).
1368 */
1369 if (new->c_iflag & IGNPAR)
1370 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
1371 }
1372
1373 /* Ignore all characters if CREAD is not set */
1374 if ((new->c_cflag & CREAD) == 0)
1375 port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
1376
1377 scxctr |= SC01CTR_TXE | SC01CTR_RXE;
1378 scxctr |= *port->_control & SC01CTR_BKE;
1379 *port->_control = scxctr;
1380
1381 spin_unlock_irqrestore(&port->uart.lock, flags);
1382}
1383
1384/*
1385 * set the terminal I/O parameters
1386 */
1387static void mn10300_serial_set_termios(struct uart_port *_port,
1388 struct ktermios *new,
1389 struct ktermios *old)
1390{
1391 struct mn10300_serial_port *port =
1392 container_of(_port, struct mn10300_serial_port, uart);
1393
1394 _enter("%s,%p,%p", port->name, new, old);
1395
1396 mn10300_serial_change_speed(port, new, old);
1397
1398 /* handle turning off CRTSCTS */
1399 if (!(new->c_cflag & CRTSCTS)) {
1400 u16 ctr = *port->_control;
1401 ctr &= ~SC2CTR_TWE;
1402 *port->_control = ctr;
1403 }
1404
1405 /* change Transfer bit-order (LSB/MSB) */
1406 if (new->c_cflag & CODMSB)
1407 *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */
1408 else
1409 *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */
1410}
1411
1412/*
1413 * return description of port type
1414 */
1415static const char *mn10300_serial_type(struct uart_port *_port)
1416{
1417 struct mn10300_serial_port *port =
1418 container_of(_port, struct mn10300_serial_port, uart);
1419
1420 if (port->uart.type == PORT_MN10300_CTS)
1421 return "MN10300 SIF_CTS";
1422
1423 return "MN10300 SIF";
1424}
1425
1426/*
1427 * release I/O and memory regions in use by port
1428 */
1429static void mn10300_serial_release_port(struct uart_port *_port)
1430{
1431 struct mn10300_serial_port *port =
1432 container_of(_port, struct mn10300_serial_port, uart);
1433
1434 _enter("%s", port->name);
1435
1436 release_mem_region((unsigned long) port->_iobase, 16);
1437}
1438
1439/*
1440 * request I/O and memory regions for port
1441 */
1442static int mn10300_serial_request_port(struct uart_port *_port)
1443{
1444 struct mn10300_serial_port *port =
1445 container_of(_port, struct mn10300_serial_port, uart);
1446
1447 _enter("%s", port->name);
1448
1449 request_mem_region((unsigned long) port->_iobase, 16, port->name);
1450 return 0;
1451}
1452
1453/*
1454 * configure the type and reserve the ports
1455 */
1456static void mn10300_serial_config_port(struct uart_port *_port, int type)
1457{
1458 struct mn10300_serial_port *port =
1459 container_of(_port, struct mn10300_serial_port, uart);
1460
1461 _enter("%s", port->name);
1462
1463 port->uart.type = PORT_MN10300;
1464
1465 if (port->options & MNSCx_OPT_CTS)
1466 port->uart.type = PORT_MN10300_CTS;
1467
1468 mn10300_serial_request_port(_port);
1469}
1470
1471/*
1472 * verify serial parameters are suitable for this port type
1473 */
1474static int mn10300_serial_verify_port(struct uart_port *_port,
1475 struct serial_struct *ss)
1476{
1477 struct mn10300_serial_port *port =
1478 container_of(_port, struct mn10300_serial_port, uart);
1479 void *mapbase = (void *) (unsigned long) port->uart.mapbase;
1480
1481 _enter("%s", port->name);
1482
1483 /* these things may not be changed */
1484 if (ss->irq != port->uart.irq ||
1485 ss->port != port->uart.iobase ||
1486 ss->io_type != port->uart.iotype ||
1487 ss->iomem_base != mapbase ||
1488 ss->iomem_reg_shift != port->uart.regshift ||
1489 ss->hub6 != port->uart.hub6 ||
1490 ss->xmit_fifo_size != port->uart.fifosize)
1491 return -EINVAL;
1492
1493 /* type may be changed on a port that supports CTS */
1494 if (ss->type != port->uart.type) {
1495 if (!(port->options & MNSCx_OPT_CTS))
1496 return -EINVAL;
1497
1498 if (ss->type != PORT_MN10300 &&
1499 ss->type != PORT_MN10300_CTS)
1500 return -EINVAL;
1501 }
1502
1503 return 0;
1504}
1505
1506/*
1507 * initialise the MN10300 on-chip UARTs
1508 */
1509static int __init mn10300_serial_init(void)
1510{
1511 struct mn10300_serial_port *port;
1512 int ret, i;
1513
1514 printk(KERN_INFO "%s version %s (%s)\n",
1515 serial_name, serial_version, serial_revdate);
1516
1517#if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
1518 {
1519 int tmp;
1520 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
1521 tmp = SC2TIM;
1522 }
1523#endif
1524
1525 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL),
1526 mn10300_serial_vdma_interrupt);
1527
1528 ret = uart_register_driver(&mn10300_serial_driver);
1529 if (!ret) {
1530 for (i = 0 ; i < NR_PORTS ; i++) {
1531 port = mn10300_serial_ports[i];
1532 if (!port || port->gdbstub)
1533 continue;
1534
1535 switch (port->clock_src) {
1536 case MNSCx_CLOCK_SRC_IOCLK:
1537 port->ioclk = MN10300_IOCLK;
1538 break;
1539
1540#ifdef MN10300_IOBCLK
1541 case MNSCx_CLOCK_SRC_IOBCLK:
1542 port->ioclk = MN10300_IOBCLK;
1543 break;
1544#endif
1545 default:
1546 BUG();
1547 }
1548
1549 ret = uart_add_one_port(&mn10300_serial_driver,
1550 &port->uart);
1551
1552 if (ret < 0) {
1553 _debug("ERROR %d", -ret);
1554 break;
1555 }
1556 }
1557
1558 if (ret)
1559 uart_unregister_driver(&mn10300_serial_driver);
1560 }
1561
1562 return ret;
1563}
1564
1565__initcall(mn10300_serial_init);
1566
1567
1568#ifdef CONFIG_MN10300_TTYSM_CONSOLE
1569
1570/*
1571 * print a string to the serial port without disturbing the real user of the
1572 * port too much
1573 * - the console must be locked by the caller
1574 */
1575static void mn10300_serial_console_write(struct console *co,
1576 const char *s, unsigned count)
1577{
1578 struct mn10300_serial_port *port;
1579 unsigned i;
1580 u16 scxctr;
1581 u8 tmxmd;
1582 unsigned long flags;
1583 int locked = 1;
1584
1585 port = mn10300_serial_ports[co->index];
1586
1587 local_irq_save(flags);
1588 if (port->uart.sysrq) {
1589 /* mn10300_serial_interrupt() already took the lock */
1590 locked = 0;
1591 } else if (oops_in_progress) {
1592 locked = spin_trylock(&port->uart.lock);
1593 } else
1594 spin_lock(&port->uart.lock);
1595
1596 /* firstly hijack the serial port from the "virtual DMA" controller */
1597 mn10300_serial_dis_tx_intr(port);
1598
1599 /* the transmitter may be disabled */
1600 scxctr = *port->_control;
1601 if (!(scxctr & SC01CTR_TXE)) {
1602 /* restart the UART clock */
1603 tmxmd = *port->_tmxmd;
1604
1605 switch (port->div_timer) {
1606 case MNSCx_DIV_TIMER_16BIT:
1607 *port->_tmxmd = 0;
1608 *port->_tmxmd = TM8MD_INIT_COUNTER;
1609 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1610 break;
1611
1612 case MNSCx_DIV_TIMER_8BIT:
1613 *port->_tmxmd = 0;
1614 *port->_tmxmd = TM2MD_INIT_COUNTER;
1615 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1616 break;
1617 }
1618
1619 /* enable the transmitter */
1620 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1621
1622 } else if (scxctr & SC01CTR_BKE) {
1623 /* stop transmitting BREAK */
1624 *port->_control = (scxctr & ~SC01CTR_BKE);
1625 }
1626
1627 /* send the chars into the serial port (with LF -> LFCR conversion) */
1628 for (i = 0; i < count; i++) {
1629 char ch = *s++;
1630
1631 while (*port->_status & SC01STR_TBF)
1632 continue;
1633 *port->_txb = ch;
1634
1635 if (ch == 0x0a) {
1636 while (*port->_status & SC01STR_TBF)
1637 continue;
1638 *port->_txb = 0xd;
1639 }
1640 }
1641
1642 /* can't let the transmitter be turned off if it's actually
1643 * transmitting */
1644 while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
1645 continue;
1646
1647 /* disable the transmitter if we re-enabled it */
1648 if (!(scxctr & SC01CTR_TXE))
1649 *port->_control = scxctr;
1650
1651 mn10300_serial_en_tx_intr(port);
1652
1653 if (locked)
1654 spin_unlock(&port->uart.lock);
1655 local_irq_restore(flags);
1656}
1657
1658/*
1659 * set up a serial port as a console
1660 * - construct a cflag setting for the first rs_open()
1661 * - initialize the serial port
1662 * - return non-zero if we didn't find a serial port.
1663 */
1664static int __init mn10300_serial_console_setup(struct console *co,
1665 char *options)
1666{
1667 struct mn10300_serial_port *port;
1668 int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
1669
1670 for (i = 0 ; i < NR_PORTS ; i++) {
1671 port = mn10300_serial_ports[i];
1672 if (port && !port->gdbstub && port->uart.line == co->index)
1673 goto found_device;
1674 }
1675
1676 return -ENODEV;
1677
1678found_device:
1679 switch (port->clock_src) {
1680 case MNSCx_CLOCK_SRC_IOCLK:
1681 port->ioclk = MN10300_IOCLK;
1682 break;
1683
1684#ifdef MN10300_IOBCLK
1685 case MNSCx_CLOCK_SRC_IOBCLK:
1686 port->ioclk = MN10300_IOBCLK;
1687 break;
1688#endif
1689 default:
1690 BUG();
1691 }
1692
1693 if (options)
1694 uart_parse_options(options, &baud, &parity, &bits, &flow);
1695
1696 return uart_set_options(&port->uart, co, baud, parity, bits, flow);
1697}
1698
1699/*
1700 * register console
1701 */
1702static int __init mn10300_serial_console_init(void)
1703{
1704 register_console(&mn10300_serial_console);
1705 return 0;
1706}
1707
1708console_initcall(mn10300_serial_console_init);
1709#endif
1710
1711#ifdef CONFIG_CONSOLE_POLL
1712/*
1713 * Polled character reception for the kernel debugger
1714 */
1715static int mn10300_serial_poll_get_char(struct uart_port *_port)
1716{
1717 struct mn10300_serial_port *port =
1718 container_of(_port, struct mn10300_serial_port, uart);
1719 unsigned ix;
1720 u8 st, ch;
1721
1722 _enter("%s", port->name);
1723
1724 if (mn10300_serial_int_tbl[port->rx_irq].port != NULL) {
1725 do {
1726 /* pull chars out of the hat */
1727 ix = READ_ONCE(port->rx_outp);
1728 if (CIRC_CNT(port->rx_inp, ix, MNSC_BUFFER_SIZE) == 0)
1729 return NO_POLL_CHAR;
1730
1731 /*
1732 * READ_ONCE() enforces dependency, but dangerous
1733 * through integer!!!
1734 */
1735 ch = port->rx_buffer[ix++];
1736 st = port->rx_buffer[ix++];
1737 smp_mb();
1738 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
1739
1740 } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
1741 } else {
1742 do {
1743 st = *port->_status;
1744 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
1745 continue;
1746 } while (!(st & SC01STR_RBF));
1747
1748 ch = *port->_rxb;
1749 }
1750
1751 return ch;
1752}
1753
1754
1755/*
1756 * Polled character transmission for the kernel debugger
1757 */
1758static void mn10300_serial_poll_put_char(struct uart_port *_port,
1759 unsigned char ch)
1760{
1761 struct mn10300_serial_port *port =
1762 container_of(_port, struct mn10300_serial_port, uart);
1763 u8 intr, tmp;
1764
1765 /* wait for the transmitter to finish anything it might be doing (and
1766 * this includes the virtual DMA handler, so it might take a while) */
1767 while (*port->_status & (SC01STR_TBF | SC01STR_TXF))
1768 continue;
1769
1770 /* disable the Tx ready interrupt */
1771 intr = *port->_intr;
1772 *port->_intr = intr & ~SC01ICR_TI;
1773 tmp = *port->_intr;
1774
1775 if (ch == 0x0a) {
1776 *port->_txb = 0x0d;
1777 while (*port->_status & SC01STR_TBF)
1778 continue;
1779 }
1780
1781 *port->_txb = ch;
1782 while (*port->_status & SC01STR_TBF)
1783 continue;
1784
1785 /* restore the Tx interrupt flag */
1786 *port->_intr = intr;
1787 tmp = *port->_intr;
1788}
1789
1790#endif /* CONFIG_CONSOLE_POLL */
diff --git a/arch/mn10300/kernel/mn10300-serial.h b/arch/mn10300/kernel/mn10300-serial.h
deleted file mode 100644
index 01791c68ea1f..000000000000
--- a/arch/mn10300/kernel/mn10300-serial.h
+++ /dev/null
@@ -1,130 +0,0 @@
1/* MN10300 On-chip serial port driver definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _MN10300_SERIAL_H
12#define _MN10300_SERIAL_H
13
14#ifndef __ASSEMBLY__
15#include <linux/serial_core.h>
16#include <linux/termios.h>
17#endif
18
19#include <asm/page.h>
20#include <asm/serial-regs.h>
21
22#define NR_PORTS 3 /* should be set 3 or 9 or 16 */
23
24#define MNSC_BUFFER_SIZE +(PAGE_SIZE / 2)
25
26/* intr_flags bits */
27#define MNSCx_RX_AVAIL 0x01
28#define MNSCx_RX_OVERF 0x02
29#define MNSCx_TX_SPACE 0x04
30#define MNSCx_TX_EMPTY 0x08
31
32/* tx_flags bits */
33#define MNSCx_TX_BREAK 0x01
34#define MNSCx_TX_STOP 0x02
35
36#ifndef __ASSEMBLY__
37
38struct mn10300_serial_port {
39 char *rx_buffer; /* reception buffer base */
40 unsigned rx_inp; /* pointer to rx input offset */
41 unsigned rx_outp; /* pointer to rx output offset */
42 u8 tx_xchar; /* high-priority XON/XOFF buffer */
43 u8 tx_flags; /* transmit break/stop request */
44 u8 intr_flags; /* interrupt flags */
45 volatile u16 *rx_icr; /* Rx interrupt control register */
46 volatile u16 *tx_icr; /* Tx interrupt control register */
47 int rx_irq; /* reception IRQ */
48 int tx_irq; /* transmission IRQ */
49 int tm_irq; /* timer IRQ */
50
51 const char *name; /* name of serial port */
52 const char *rx_name; /* Rx interrupt handler name of serial port */
53 const char *tx_name; /* Tx interrupt handler name of serial port */
54 const char *tm_name; /* Timer interrupt handler name */
55 unsigned short type; /* type of serial port */
56 unsigned char isconsole; /* T if it's a console */
57 volatile void *_iobase; /* pointer to base of I/O control regs */
58 volatile u16 *_control; /* control register pointer */
59 volatile u8 *_status; /* status register pointer */
60 volatile u8 *_intr; /* interrupt register pointer */
61 volatile u8 *_rxb; /* receive buffer register pointer */
62 volatile u8 *_txb; /* transmit buffer register pointer */
63 volatile u16 *_tmicr; /* timer interrupt control register */
64 volatile u8 *_tmxmd; /* baud rate timer mode register */
65 volatile u16 *_tmxbr; /* baud rate timer base register */
66
67 /* this must come down here so that assembly can use BSET to access the
68 * above fields */
69 struct uart_port uart;
70
71 unsigned short rx_brk; /* current break reception status */
72 u16 tx_cts; /* current CTS status */
73 int gdbstub; /* preemptively stolen by GDB stub */
74
75 u8 clock_src; /* clock source */
76#define MNSCx_CLOCK_SRC_IOCLK 0
77#define MNSCx_CLOCK_SRC_IOBCLK 1
78
79 u8 div_timer; /* timer used as divisor */
80#define MNSCx_DIV_TIMER_16BIT 0
81#define MNSCx_DIV_TIMER_8BIT 1
82
83 u16 options; /* options */
84#define MNSCx_OPT_CTS 0x0001
85
86 unsigned long ioclk; /* base clock rate */
87};
88
89#ifdef CONFIG_MN10300_TTYSM0
90extern struct mn10300_serial_port mn10300_serial_port_sif0;
91#endif
92
93#ifdef CONFIG_MN10300_TTYSM1
94extern struct mn10300_serial_port mn10300_serial_port_sif1;
95#endif
96
97#ifdef CONFIG_MN10300_TTYSM2
98extern struct mn10300_serial_port mn10300_serial_port_sif2;
99#endif
100
101extern struct mn10300_serial_port *mn10300_serial_ports[];
102
103struct mn10300_serial_int {
104 struct mn10300_serial_port *port;
105 asmlinkage void (*vdma)(void);
106};
107
108extern struct mn10300_serial_int mn10300_serial_int_tbl[];
109
110extern asmlinkage void mn10300_serial_vdma_interrupt(void);
111extern asmlinkage void mn10300_serial_vdma_rx_handler(void);
112extern asmlinkage void mn10300_serial_vdma_tx_handler(void);
113
114#endif /* __ASSEMBLY__ */
115
116#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
117#define SCgSTR SC0STR
118#define SCgRXB SC0RXB
119#define SCgRXIRQ SC0RXIRQ
120#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
121#define SCgSTR SC1STR
122#define SCgRXB SC1RXB
123#define SCgRXIRQ SC1RXIRQ
124#elif defined(CONFIG_GDBSTUB_ON_TTYSM2)
125#define SCgSTR SC2STR
126#define SCgRXB SC2RXB
127#define SCgRXIRQ SC2RXIRQ
128#endif
129
130#endif /* _MN10300_SERIAL_H */
diff --git a/arch/mn10300/kernel/mn10300-watchdog-low.S b/arch/mn10300/kernel/mn10300-watchdog-low.S
deleted file mode 100644
index 34f8773de7d0..000000000000
--- a/arch/mn10300/kernel/mn10300-watchdog-low.S
+++ /dev/null
@@ -1,66 +0,0 @@
1###############################################################################
2#
3# MN10300 Watchdog interrupt handler
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/intctl-regs.h>
17#include <asm/timer-regs.h>
18#include <asm/frame.inc>
19#include <linux/threads.h>
20
21 .text
22
23###############################################################################
24#
25# Watchdog handler entry point
26# - special non-maskable interrupt
27#
28###############################################################################
29 .globl watchdog_handler
30 .type watchdog_handler,@function
31watchdog_handler:
32 add -4,sp
33 SAVE_ALL
34
35 mov 0xffffffff,d0
36 mov d0,(REG_ORIG_D0,fp)
37
38 mov fp,d0
39 lsr 2,d1
40 call watchdog_interrupt[],0 # watchdog_interrupt(regs,irq)
41
42 jmp ret_from_intr
43
44 .size watchdog_handler,.-watchdog_handler
45
46###############################################################################
47#
48# Watchdog touch entry point
49# - kept to absolute minimum (unfortunately, it's prototyped in linux/nmi.h so
50# we can't inline it)
51#
52###############################################################################
53 .globl arch_touch_nmi_watchdog
54 .type arch_touch_nmi_watchdog,@function
55arch_touch_nmi_watchdog:
56 clr d0
57 clr d1
58 mov watchdog_alert_counter, a0
59 setlb
60 mov d0, (a0+)
61 inc d1
62 cmp NR_CPUS, d1
63 lne
64 ret [],0
65
66 .size arch_touch_nmi_watchdog,.-arch_touch_nmi_watchdog
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
deleted file mode 100644
index 0d5641beadf5..000000000000
--- a/arch/mn10300/kernel/mn10300-watchdog.c
+++ /dev/null
@@ -1,205 +0,0 @@
1/* MN10300 Watchdog timer
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/nmi.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/interrupt.h>
18#include <linux/kernel_stat.h>
19#include <linux/nmi.h>
20#include <asm/processor.h>
21#include <linux/atomic.h>
22#include <asm/intctl-regs.h>
23#include <asm/rtc-regs.h>
24#include <asm/div64.h>
25#include <asm/smp.h>
26#include <asm/gdb-stub.h>
27#include <proc/clock.h>
28
29static DEFINE_SPINLOCK(watchdog_print_lock);
30static unsigned int watchdog;
31static unsigned int watchdog_hz = 1;
32unsigned int watchdog_alert_counter[NR_CPUS];
33
34EXPORT_SYMBOL(arch_touch_nmi_watchdog);
35
36/*
37 * the best way to detect whether a CPU has a 'hard lockup' problem
38 * is to check its timer makes IRQ counts. If they are not
39 * changing then that CPU has some problem.
40 *
41 * since NMIs dont listen to _any_ locks, we have to be extremely
42 * careful not to rely on unsafe variables. The printk might lock
43 * up though, so we have to break up any console locks first ...
44 * [when there will be more tty-related locks, break them up
45 * here too!]
46 */
47static unsigned int last_irq_sums[NR_CPUS];
48
49int __init check_watchdog(void)
50{
51 irq_cpustat_t tmp[1];
52
53 printk(KERN_INFO "Testing Watchdog... ");
54
55 memcpy(tmp, irq_stat, sizeof(tmp));
56 local_irq_enable();
57 mdelay((10 * 1000) / watchdog_hz); /* wait 10 ticks */
58 local_irq_disable();
59
60 if (nmi_count(0) - tmp[0].__nmi_count <= 5) {
61 printk(KERN_WARNING "CPU#%d: Watchdog appears to be stuck!\n",
62 0);
63 return -1;
64 }
65
66 printk(KERN_INFO "OK.\n");
67
68 /* now that we know it works we can reduce NMI frequency to something
69 * more reasonable; makes a difference in some configs
70 */
71 watchdog_hz = 1;
72
73 return 0;
74}
75
76static int __init setup_watchdog(char *str)
77{
78 unsigned tmp;
79 int opt;
80 u8 ctr;
81
82 get_option(&str, &opt);
83 if (opt != 1)
84 return 0;
85
86 watchdog = opt;
87 if (watchdog) {
88 set_intr_stub(EXCEP_WDT, watchdog_handler);
89 ctr = WDCTR_WDCK_65536th;
90 WDCTR = WDCTR_WDRST | ctr;
91 WDCTR = ctr;
92 tmp = WDCTR;
93
94 tmp = __muldiv64u(1 << (16 + ctr * 2), 1000000, MN10300_WDCLK);
95 tmp = 1000000000 / tmp;
96 watchdog_hz = (tmp + 500) / 1000;
97 }
98
99 return 1;
100}
101
102__setup("watchdog=", setup_watchdog);
103
104void __init watchdog_go(void)
105{
106 u8 wdt;
107
108 if (watchdog) {
109 printk(KERN_INFO "Watchdog: running at %uHz\n", watchdog_hz);
110 wdt = WDCTR & ~WDCTR_WDCNE;
111 WDCTR = wdt | WDCTR_WDRST;
112 wdt = WDCTR;
113 WDCTR = wdt | WDCTR_WDCNE;
114 wdt = WDCTR;
115
116 check_watchdog();
117 }
118}
119
120#ifdef CONFIG_SMP
121static void watchdog_dump_register(void *dummy)
122{
123 printk(KERN_ERR "--- Register Dump (CPU%d) ---\n", CPUID);
124 show_registers(current_frame());
125}
126#endif
127
128asmlinkage
129void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
130{
131 /*
132 * Since current-> is always on the stack, and we always switch
133 * the stack NMI-atomically, it's safe to use smp_processor_id().
134 */
135 int sum, cpu;
136 int irq = NMIIRQ;
137 u8 wdt, tmp;
138
139 wdt = WDCTR & ~WDCTR_WDCNE;
140 WDCTR = wdt;
141 tmp = WDCTR;
142 NMICR = NMICR_WDIF;
143
144 nmi_count(smp_processor_id())++;
145 kstat_incr_irq_this_cpu(irq);
146
147 for_each_online_cpu(cpu) {
148
149 sum = irq_stat[cpu].__irq_count;
150
151 if ((last_irq_sums[cpu] == sum)
152#if defined(CONFIG_GDBSTUB) && defined(CONFIG_SMP)
153 && !(CHK_GDBSTUB_BUSY()
154 || atomic_read(&cpu_doing_single_step))
155#endif
156 ) {
157 /*
158 * Ayiee, looks like this CPU is stuck ...
159 * wait a few IRQs (5 seconds) before doing the oops ...
160 */
161 watchdog_alert_counter[cpu]++;
162 if (watchdog_alert_counter[cpu] == 5 * watchdog_hz) {
163 spin_lock(&watchdog_print_lock);
164 /*
165 * We are in trouble anyway, lets at least try
166 * to get a message out.
167 */
168 bust_spinlocks(1);
169 printk(KERN_ERR
170 "NMI Watchdog detected LOCKUP on CPU%d,"
171 " pc %08lx, registers:\n",
172 cpu, regs->pc);
173#ifdef CONFIG_SMP
174 printk(KERN_ERR
175 "--- Register Dump (CPU%d) ---\n",
176 CPUID);
177#endif
178 show_registers(regs);
179#ifdef CONFIG_SMP
180 smp_nmi_call_function(watchdog_dump_register,
181 NULL, 1);
182#endif
183 printk(KERN_NOTICE "console shuts up ...\n");
184 console_silent();
185 spin_unlock(&watchdog_print_lock);
186 bust_spinlocks(0);
187#ifdef CONFIG_GDBSTUB
188 if (CHK_GDBSTUB_BUSY_AND_ACTIVE())
189 gdbstub_exception(regs, excep);
190 else
191 gdbstub_intercept(regs, excep);
192#endif
193 do_exit(SIGSEGV);
194 }
195 } else {
196 last_irq_sums[cpu] = sum;
197 watchdog_alert_counter[cpu] = 0;
198 }
199 }
200
201 WDCTR = wdt | WDCTR_WDRST;
202 tmp = WDCTR;
203 WDCTR = wdt | WDCTR_WDCNE;
204 tmp = WDCTR;
205}
diff --git a/arch/mn10300/kernel/mn10300_ksyms.c b/arch/mn10300/kernel/mn10300_ksyms.c
deleted file mode 100644
index 66fb68d0ca8a..000000000000
--- a/arch/mn10300/kernel/mn10300_ksyms.c
+++ /dev/null
@@ -1,39 +0,0 @@
1/* MN10300 Miscellaneous and library kernel exports
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/uaccess.h>
13#include <asm/pgtable.h>
14
15
16EXPORT_SYMBOL(empty_zero_page);
17
18EXPORT_SYMBOL(change_bit);
19EXPORT_SYMBOL(test_and_change_bit);
20
21EXPORT_SYMBOL(memcpy);
22EXPORT_SYMBOL(memmove);
23EXPORT_SYMBOL(memset);
24
25EXPORT_SYMBOL(strncpy_from_user);
26EXPORT_SYMBOL(clear_user);
27EXPORT_SYMBOL(__clear_user);
28EXPORT_SYMBOL(strnlen_user);
29
30extern u64 __ashrdi3(u64, unsigned);
31extern u64 __ashldi3(u64, unsigned);
32extern u64 __lshrdi3(u64, unsigned);
33extern s64 __negdi2(s64);
34extern int __ucmpdi2(u64, u64);
35EXPORT_SYMBOL(__ashrdi3);
36EXPORT_SYMBOL(__ashldi3);
37EXPORT_SYMBOL(__lshrdi3);
38EXPORT_SYMBOL(__negdi2);
39EXPORT_SYMBOL(__ucmpdi2);
diff --git a/arch/mn10300/kernel/module.c b/arch/mn10300/kernel/module.c
deleted file mode 100644
index 216ad23c9570..000000000000
--- a/arch/mn10300/kernel/module.c
+++ /dev/null
@@ -1,156 +0,0 @@
1/* MN10300 Kernel module helper routines
2 *
3 * Copyright (C) 2007, 2008, 2009 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * - Derived from arch/i386/kernel/module.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public Licence as published by
9 * the Free Software Foundation; either version 2 of the Licence, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public Licence for more details.
16 *
17 * You should have received a copy of the GNU General Public Licence
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/moduleloader.h>
22#include <linux/elf.h>
23#include <linux/vmalloc.h>
24#include <linux/fs.h>
25#include <linux/string.h>
26#include <linux/kernel.h>
27#include <linux/bug.h>
28
29#if 0
30#define DEBUGP printk
31#else
32#define DEBUGP(fmt, ...)
33#endif
34
35static void reloc_put16(uint8_t *p, uint32_t val)
36{
37 p[0] = val & 0xff;
38 p[1] = (val >> 8) & 0xff;
39}
40
41static void reloc_put24(uint8_t *p, uint32_t val)
42{
43 reloc_put16(p, val);
44 p[2] = (val >> 16) & 0xff;
45}
46
47static void reloc_put32(uint8_t *p, uint32_t val)
48{
49 reloc_put16(p, val);
50 reloc_put16(p+2, val >> 16);
51}
52
53/*
54 * apply a RELA relocation
55 */
56int apply_relocate_add(Elf32_Shdr *sechdrs,
57 const char *strtab,
58 unsigned int symindex,
59 unsigned int relsec,
60 struct module *me)
61{
62 unsigned int i, sym_diff_seen = 0;
63 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
64 Elf32_Sym *sym;
65 Elf32_Addr relocation, sym_diff_val = 0;
66 uint8_t *location;
67 uint32_t value;
68
69 DEBUGP("Applying relocate section %u to %u\n",
70 relsec, sechdrs[relsec].sh_info);
71
72 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
73 /* this is where to make the change */
74 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
75 + rel[i].r_offset;
76
77 /* this is the symbol the relocation is referring to (note that
78 * all undefined symbols have been resolved by the caller) */
79 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
80 + ELF32_R_SYM(rel[i].r_info);
81
82 /* this is the adjustment to be made */
83 relocation = sym->st_value + rel[i].r_addend;
84
85 if (sym_diff_seen) {
86 switch (ELF32_R_TYPE(rel[i].r_info)) {
87 case R_MN10300_32:
88 case R_MN10300_24:
89 case R_MN10300_16:
90 case R_MN10300_8:
91 relocation -= sym_diff_val;
92 sym_diff_seen = 0;
93 break;
94 default:
95 printk(KERN_ERR "module %s: Unexpected SYM_DIFF relocation: %u\n",
96 me->name, ELF32_R_TYPE(rel[i].r_info));
97 return -ENOEXEC;
98 }
99 }
100
101 switch (ELF32_R_TYPE(rel[i].r_info)) {
102 /* for the first four relocation types, we simply
103 * store the adjustment at the location given */
104 case R_MN10300_32:
105 reloc_put32(location, relocation);
106 break;
107 case R_MN10300_24:
108 reloc_put24(location, relocation);
109 break;
110 case R_MN10300_16:
111 reloc_put16(location, relocation);
112 break;
113 case R_MN10300_8:
114 *location = relocation;
115 break;
116
117 /* for the next three relocation types, we write the
118 * adjustment with the address subtracted over the
119 * value at the location given */
120 case R_MN10300_PCREL32:
121 value = relocation - (uint32_t) location;
122 reloc_put32(location, value);
123 break;
124 case R_MN10300_PCREL16:
125 value = relocation - (uint32_t) location;
126 reloc_put16(location, value);
127 break;
128 case R_MN10300_PCREL8:
129 *location = relocation - (uint32_t) location;
130 break;
131
132 case R_MN10300_SYM_DIFF:
133 /* This is used to adjust the next reloc as required
134 * by relaxation. */
135 sym_diff_seen = 1;
136 sym_diff_val = sym->st_value;
137 break;
138
139 case R_MN10300_ALIGN:
140 /* Just ignore the ALIGN relocs.
141 * Only interesting if kernel performed relaxation. */
142 continue;
143
144 default:
145 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
146 me->name, ELF32_R_TYPE(rel[i].r_info));
147 return -ENOEXEC;
148 }
149 }
150 if (sym_diff_seen) {
151 printk(KERN_ERR "module %s: Nothing follows SYM_DIFF relocation: %u\n",
152 me->name, ELF32_R_TYPE(rel[i].r_info));
153 return -ENOEXEC;
154 }
155 return 0;
156}
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
deleted file mode 100644
index 7c475fd99c46..000000000000
--- a/arch/mn10300/kernel/process.c
+++ /dev/null
@@ -1,175 +0,0 @@
1/* MN10300 Process handling code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/errno.h>
13#include <linux/sched.h>
14#include <linux/sched/debug.h>
15#include <linux/sched/task.h>
16#include <linux/sched/task_stack.h>
17#include <linux/kernel.h>
18#include <linux/mm.h>
19#include <linux/smp.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/ptrace.h>
23#include <linux/user.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/reboot.h>
27#include <linux/percpu.h>
28#include <linux/err.h>
29#include <linux/fs.h>
30#include <linux/slab.h>
31#include <linux/rcupdate.h>
32#include <linux/uaccess.h>
33#include <asm/pgtable.h>
34#include <asm/io.h>
35#include <asm/processor.h>
36#include <asm/mmu_context.h>
37#include <asm/fpu.h>
38#include <asm/reset-regs.h>
39#include <asm/gdb-stub.h>
40#include "internal.h"
41
42/*
43 * power off function, if any
44 */
45void (*pm_power_off)(void);
46EXPORT_SYMBOL(pm_power_off);
47
48/*
49 * On SMP it's slightly faster (but much more power-consuming!)
50 * to poll the ->work.need_resched flag instead of waiting for the
51 * cross-CPU IPI to arrive. Use this option with caution.
52 *
53 * tglx: No idea why this depends on HOTPLUG_CPU !?!
54 */
55#if !defined(CONFIG_SMP) || defined(CONFIG_HOTPLUG_CPU)
56void arch_cpu_idle(void)
57{
58 safe_halt();
59}
60#endif
61
62void machine_restart(char *cmd)
63{
64#ifdef CONFIG_KERNEL_DEBUGGER
65 gdbstub_exit(0);
66#endif
67
68#ifdef mn10300_unit_hard_reset
69 mn10300_unit_hard_reset();
70#else
71 mn10300_proc_hard_reset();
72#endif
73}
74
75void machine_halt(void)
76{
77#ifdef CONFIG_KERNEL_DEBUGGER
78 gdbstub_exit(0);
79#endif
80}
81
82void machine_power_off(void)
83{
84#ifdef CONFIG_KERNEL_DEBUGGER
85 gdbstub_exit(0);
86#endif
87}
88
89void show_regs(struct pt_regs *regs)
90{
91 show_regs_print_info(KERN_DEFAULT);
92}
93
94/*
95 * free current thread data structures etc..
96 */
97void exit_thread(struct task_struct *tsk)
98{
99 exit_fpu(tsk);
100}
101
102void flush_thread(void)
103{
104 flush_fpu();
105}
106
107void release_thread(struct task_struct *dead_task)
108{
109}
110
111/*
112 * this gets called so that we can store lazy state into memory and copy the
113 * current task into the new thread.
114 */
115int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
116{
117 unlazy_fpu(src);
118 *dst = *src;
119 return 0;
120}
121
122/*
123 * set up the kernel stack for a new thread and copy arch-specific thread
124 * control information
125 */
126int copy_thread(unsigned long clone_flags,
127 unsigned long c_usp, unsigned long ustk_size,
128 struct task_struct *p)
129{
130 struct thread_info *ti = task_thread_info(p);
131 struct pt_regs *c_regs;
132 unsigned long c_ksp;
133
134 c_ksp = (unsigned long) task_stack_page(p) + THREAD_SIZE;
135
136 /* allocate the userspace exception frame and set it up */
137 c_ksp -= sizeof(struct pt_regs);
138 c_regs = (struct pt_regs *) c_ksp;
139 c_ksp -= 12; /* allocate function call ABI slack */
140
141 /* set up things up so the scheduler can start the new task */
142 p->thread.uregs = c_regs;
143 ti->frame = c_regs;
144 p->thread.a3 = (unsigned long) c_regs;
145 p->thread.sp = c_ksp;
146 p->thread.wchan = p->thread.pc;
147 p->thread.usp = c_usp;
148
149 if (unlikely(p->flags & PF_KTHREAD)) {
150 memset(c_regs, 0, sizeof(struct pt_regs));
151 c_regs->a0 = c_usp; /* function */
152 c_regs->d0 = ustk_size; /* argument */
153 local_save_flags(c_regs->epsw);
154 c_regs->epsw |= EPSW_IE | EPSW_IM_7;
155 p->thread.pc = (unsigned long) ret_from_kernel_thread;
156 return 0;
157 }
158 *c_regs = *current_pt_regs();
159 if (c_usp)
160 c_regs->sp = c_usp;
161 c_regs->epsw &= ~EPSW_FE; /* my FPU */
162
163 /* the new TLS pointer is passed in as arg #5 to sys_clone() */
164 if (clone_flags & CLONE_SETTLS)
165 c_regs->e2 = current_frame()->d3;
166
167 p->thread.pc = (unsigned long) ret_from_fork;
168
169 return 0;
170}
171
172unsigned long get_wchan(struct task_struct *p)
173{
174 return p->thread.wchan;
175}
diff --git a/arch/mn10300/kernel/profile-low.S b/arch/mn10300/kernel/profile-low.S
deleted file mode 100644
index 94ffac12d02d..000000000000
--- a/arch/mn10300/kernel/profile-low.S
+++ /dev/null
@@ -1,72 +0,0 @@
1###############################################################################
2#
3# Fast profiling interrupt handler
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/segment.h>
17#include <asm/smp.h>
18#include <asm/intctl-regs.h>
19#include <asm/timer-regs.h>
20
21#define pi break
22
23 .balign 4
24counter:
25 .long -1
26
27###############################################################################
28#
29# Profiling interrupt entry point
30# - intended to run at interrupt priority 1
31#
32###############################################################################
33ENTRY(profile_handler)
34 movm [d2,d3,a2],(sp)
35
36 # ignore userspace
37 mov (12,sp),d2
38 and EPSW_nSL,d2
39 bne out
40
41 # do nothing if there's no buffer
42 mov (prof_buffer),a2
43 and a2,a2
44 beq out
45 or 0x20000000,a2
46
47 # calculate relative position in text segment
48 mov (16,sp),d2
49 sub _stext,d2
50 mov (prof_shift),d3
51 lsr d3,d2
52 mov (prof_len),d3
53 cmp d3,d2
54 bcc outside_text
55
56 # increment the appropriate profile bucket
57do_inc:
58 asl2 d2
59 mov (a2,d2),d3
60 inc d3
61 mov d3,(a2,d2)
62out:
63 mov GxICR_DETECT,d2
64 movbu d2,(TM11ICR) # ACK the interrupt
65 movbu (TM11ICR),d2
66 movm (sp),[d2,d3,a2]
67 rti
68
69outside_text:
70 sub 1,d3
71 mov d3,d2
72 bra do_inc
diff --git a/arch/mn10300/kernel/profile.c b/arch/mn10300/kernel/profile.c
deleted file mode 100644
index 4f342f75d00c..000000000000
--- a/arch/mn10300/kernel/profile.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/* MN10300 Profiling setup
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * initialise the profiling if enabled
14 * - using with gdbstub will give anomalous results
15 * - can't be used with gdbstub if running at IRQ priority 0
16 */
17static __init int profile_init(void)
18{
19 u16 tmp;
20
21 if (!prof_buffer)
22 return 0;
23
24 /* use timer 11 to drive the profiling interrupts */
25 set_intr_stub(EXCEP_IRQ_LEVEL0, profile_handler);
26
27 /* set IRQ priority at which to run */
28 set_intr_level(TM11IRQ, GxICR_LEVEL_0);
29
30 /* set up timer 11
31 * - source: (IOCLK 33MHz)*2 = 66MHz
32 * - frequency: (33330000*2) / 8 / 20625 = 202Hz
33 */
34 TM11BR = 20625 - 1;
35 TM11MD = TM8MD_SRC_IOCLK_8;
36 TM11MD |= TM8MD_INIT_COUNTER;
37 TM11MD &= ~TM8MD_INIT_COUNTER;
38 TM11MD |= TM8MD_COUNT_ENABLE;
39
40 TM11ICR |= GxICR_ENABLE;
41 tmp = TM11ICR;
42
43 printk(KERN_INFO "Profiling initiated on timer 11, priority 0, %uHz\n",
44 MN10300_IOCLK / 8 / (TM11BR + 1));
45 printk(KERN_INFO "Profile histogram stored %p-%p\n",
46 prof_buffer, (u8 *)(prof_buffer + prof_len) - 1);
47
48 return 0;
49}
50
51__initcall(profile_init);
diff --git a/arch/mn10300/kernel/ptrace.c b/arch/mn10300/kernel/ptrace.c
deleted file mode 100644
index 8009876a7ac4..000000000000
--- a/arch/mn10300/kernel/ptrace.c
+++ /dev/null
@@ -1,386 +0,0 @@
1/* MN10300 Process tracing
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/sched/task_stack.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/regset.h>
21#include <linux/elf.h>
22#include <linux/tracehook.h>
23#include <linux/uaccess.h>
24#include <asm/pgtable.h>
25#include <asm/processor.h>
26#include <asm/cacheflush.h>
27#include <asm/fpu.h>
28#include <asm/asm-offsets.h>
29
30/*
31 * translate ptrace register IDs into struct pt_regs offsets
32 */
33static const u8 ptrace_regid_to_frame[] = {
34 [PT_A3 << 2] = REG_A3,
35 [PT_A2 << 2] = REG_A2,
36 [PT_D3 << 2] = REG_D3,
37 [PT_D2 << 2] = REG_D2,
38 [PT_MCVF << 2] = REG_MCVF,
39 [PT_MCRL << 2] = REG_MCRL,
40 [PT_MCRH << 2] = REG_MCRH,
41 [PT_MDRQ << 2] = REG_MDRQ,
42 [PT_E1 << 2] = REG_E1,
43 [PT_E0 << 2] = REG_E0,
44 [PT_E7 << 2] = REG_E7,
45 [PT_E6 << 2] = REG_E6,
46 [PT_E5 << 2] = REG_E5,
47 [PT_E4 << 2] = REG_E4,
48 [PT_E3 << 2] = REG_E3,
49 [PT_E2 << 2] = REG_E2,
50 [PT_SP << 2] = REG_SP,
51 [PT_LAR << 2] = REG_LAR,
52 [PT_LIR << 2] = REG_LIR,
53 [PT_MDR << 2] = REG_MDR,
54 [PT_A1 << 2] = REG_A1,
55 [PT_A0 << 2] = REG_A0,
56 [PT_D1 << 2] = REG_D1,
57 [PT_D0 << 2] = REG_D0,
58 [PT_ORIG_D0 << 2] = REG_ORIG_D0,
59 [PT_EPSW << 2] = REG_EPSW,
60 [PT_PC << 2] = REG_PC,
61};
62
63static inline int get_stack_long(struct task_struct *task, int offset)
64{
65 return *(unsigned long *)
66 ((unsigned long) task->thread.uregs + offset);
67}
68
69static inline
70int put_stack_long(struct task_struct *task, int offset, unsigned long data)
71{
72 unsigned long stack;
73
74 stack = (unsigned long) task->thread.uregs + offset;
75 *(unsigned long *) stack = data;
76 return 0;
77}
78
79/*
80 * retrieve the contents of MN10300 userspace general registers
81 */
82static int genregs_get(struct task_struct *target,
83 const struct user_regset *regset,
84 unsigned int pos, unsigned int count,
85 void *kbuf, void __user *ubuf)
86{
87 const struct pt_regs *regs = task_pt_regs(target);
88 int ret;
89
90 /* we need to skip regs->next */
91 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
92 regs, 0, PT_ORIG_D0 * sizeof(long));
93 if (ret < 0)
94 return ret;
95
96 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
97 &regs->orig_d0, PT_ORIG_D0 * sizeof(long),
98 NR_PTREGS * sizeof(long));
99 if (ret < 0)
100 return ret;
101
102 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
103 NR_PTREGS * sizeof(long), -1);
104}
105
106/*
107 * update the contents of the MN10300 userspace general registers
108 */
109static int genregs_set(struct task_struct *target,
110 const struct user_regset *regset,
111 unsigned int pos, unsigned int count,
112 const void *kbuf, const void __user *ubuf)
113{
114 struct pt_regs *regs = task_pt_regs(target);
115 unsigned long tmp;
116 int ret;
117
118 /* we need to skip regs->next */
119 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
120 regs, 0, PT_ORIG_D0 * sizeof(long));
121 if (ret < 0)
122 return ret;
123
124 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
125 &regs->orig_d0, PT_ORIG_D0 * sizeof(long),
126 PT_EPSW * sizeof(long));
127 if (ret < 0)
128 return ret;
129
130 /* we need to mask off changes to EPSW */
131 tmp = regs->epsw;
132 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
133 &tmp, PT_EPSW * sizeof(long),
134 PT_PC * sizeof(long));
135 tmp &= EPSW_FLAG_V | EPSW_FLAG_C | EPSW_FLAG_N | EPSW_FLAG_Z;
136 tmp |= regs->epsw & ~(EPSW_FLAG_V | EPSW_FLAG_C | EPSW_FLAG_N |
137 EPSW_FLAG_Z);
138 regs->epsw = tmp;
139
140 if (ret < 0)
141 return ret;
142
143 /* and finally load the PC */
144 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
145 &regs->pc, PT_PC * sizeof(long),
146 NR_PTREGS * sizeof(long));
147
148 if (ret < 0)
149 return ret;
150
151 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
152 NR_PTREGS * sizeof(long), -1);
153}
154
155/*
156 * retrieve the contents of MN10300 userspace FPU registers
157 */
158static int fpuregs_get(struct task_struct *target,
159 const struct user_regset *regset,
160 unsigned int pos, unsigned int count,
161 void *kbuf, void __user *ubuf)
162{
163 const struct fpu_state_struct *fpregs = &target->thread.fpu_state;
164 int ret;
165
166 unlazy_fpu(target);
167
168 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
169 fpregs, 0, sizeof(*fpregs));
170 if (ret < 0)
171 return ret;
172
173 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
174 sizeof(*fpregs), -1);
175}
176
177/*
178 * update the contents of the MN10300 userspace FPU registers
179 */
180static int fpuregs_set(struct task_struct *target,
181 const struct user_regset *regset,
182 unsigned int pos, unsigned int count,
183 const void *kbuf, const void __user *ubuf)
184{
185 struct fpu_state_struct fpu_state = target->thread.fpu_state;
186 int ret;
187
188 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
189 &fpu_state, 0, sizeof(fpu_state));
190 if (ret < 0)
191 return ret;
192
193 fpu_kill_state(target);
194 target->thread.fpu_state = fpu_state;
195 set_using_fpu(target);
196
197 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
198 sizeof(fpu_state), -1);
199}
200
201/*
202 * determine if the FPU registers have actually been used
203 */
204static int fpuregs_active(struct task_struct *target,
205 const struct user_regset *regset)
206{
207 return is_using_fpu(target) ? regset->n : 0;
208}
209
210/*
211 * Define the register sets available on the MN10300 under Linux
212 */
213enum mn10300_regset {
214 REGSET_GENERAL,
215 REGSET_FPU,
216};
217
218static const struct user_regset mn10300_regsets[] = {
219 /*
220 * General register format is:
221 * A3, A2, D3, D2, MCVF, MCRL, MCRH, MDRQ
222 * E1, E0, E7...E2, SP, LAR, LIR, MDR
223 * A1, A0, D1, D0, ORIG_D0, EPSW, PC
224 */
225 [REGSET_GENERAL] = {
226 .core_note_type = NT_PRSTATUS,
227 .n = ELF_NGREG,
228 .size = sizeof(long),
229 .align = sizeof(long),
230 .get = genregs_get,
231 .set = genregs_set,
232 },
233 /*
234 * FPU register format is:
235 * FS0-31, FPCR
236 */
237 [REGSET_FPU] = {
238 .core_note_type = NT_PRFPREG,
239 .n = sizeof(struct fpu_state_struct) / sizeof(long),
240 .size = sizeof(long),
241 .align = sizeof(long),
242 .get = fpuregs_get,
243 .set = fpuregs_set,
244 .active = fpuregs_active,
245 },
246};
247
248static const struct user_regset_view user_mn10300_native_view = {
249 .name = "mn10300",
250 .e_machine = EM_MN10300,
251 .regsets = mn10300_regsets,
252 .n = ARRAY_SIZE(mn10300_regsets),
253};
254
255const struct user_regset_view *task_user_regset_view(struct task_struct *task)
256{
257 return &user_mn10300_native_view;
258}
259
260/*
261 * set the single-step bit
262 */
263void user_enable_single_step(struct task_struct *child)
264{
265#ifndef CONFIG_MN10300_USING_JTAG
266 struct user *dummy = NULL;
267 long tmp;
268
269 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
270 tmp |= EPSW_T;
271 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
272#endif
273}
274
275/*
276 * make sure the single-step bit is not set
277 */
278void user_disable_single_step(struct task_struct *child)
279{
280#ifndef CONFIG_MN10300_USING_JTAG
281 struct user *dummy = NULL;
282 long tmp;
283
284 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
285 tmp &= ~EPSW_T;
286 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
287#endif
288}
289
290void ptrace_disable(struct task_struct *child)
291{
292 user_disable_single_step(child);
293}
294
295/*
296 * handle the arch-specific side of process tracing
297 */
298long arch_ptrace(struct task_struct *child, long request,
299 unsigned long addr, unsigned long data)
300{
301 unsigned long tmp;
302 int ret;
303 unsigned long __user *datap = (unsigned long __user *) data;
304
305 switch (request) {
306 /* read the word at location addr in the USER area. */
307 case PTRACE_PEEKUSR:
308 ret = -EIO;
309 if ((addr & 3) || addr > sizeof(struct user) - 3)
310 break;
311
312 tmp = 0; /* Default return condition */
313 if (addr < NR_PTREGS << 2)
314 tmp = get_stack_long(child,
315 ptrace_regid_to_frame[addr]);
316 ret = put_user(tmp, datap);
317 break;
318
319 /* write the word at location addr in the USER area */
320 case PTRACE_POKEUSR:
321 ret = -EIO;
322 if ((addr & 3) || addr > sizeof(struct user) - 3)
323 break;
324
325 ret = 0;
326 if (addr < NR_PTREGS << 2)
327 ret = put_stack_long(child, ptrace_regid_to_frame[addr],
328 data);
329 break;
330
331 case PTRACE_GETREGS: /* Get all integer regs from the child. */
332 return copy_regset_to_user(child, &user_mn10300_native_view,
333 REGSET_GENERAL,
334 0, NR_PTREGS * sizeof(long),
335 datap);
336
337 case PTRACE_SETREGS: /* Set all integer regs in the child. */
338 return copy_regset_from_user(child, &user_mn10300_native_view,
339 REGSET_GENERAL,
340 0, NR_PTREGS * sizeof(long),
341 datap);
342
343 case PTRACE_GETFPREGS: /* Get the child FPU state. */
344 return copy_regset_to_user(child, &user_mn10300_native_view,
345 REGSET_FPU,
346 0, sizeof(struct fpu_state_struct),
347 datap);
348
349 case PTRACE_SETFPREGS: /* Set the child FPU state. */
350 return copy_regset_from_user(child, &user_mn10300_native_view,
351 REGSET_FPU,
352 0, sizeof(struct fpu_state_struct),
353 datap);
354
355 default:
356 ret = ptrace_request(child, request, addr, data);
357 break;
358 }
359
360 return ret;
361}
362
363/*
364 * handle tracing of system call entry
365 * - return the revised system call number or ULONG_MAX to cause ENOSYS
366 */
367asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs)
368{
369 if (tracehook_report_syscall_entry(regs))
370 /* tracing decided this syscall should not happen, so
371 * We'll return a bogus call number to get an ENOSYS
372 * error, but leave the original number in
373 * regs->orig_d0
374 */
375 return ULONG_MAX;
376
377 return regs->orig_d0;
378}
379
380/*
381 * handle tracing of system call exit
382 */
383asmlinkage void syscall_trace_exit(struct pt_regs *regs)
384{
385 tracehook_report_syscall_exit(regs, 0);
386}
diff --git a/arch/mn10300/kernel/rtc.c b/arch/mn10300/kernel/rtc.c
deleted file mode 100644
index f81f37025072..000000000000
--- a/arch/mn10300/kernel/rtc.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/* MN10300 RTC management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/mc146818rtc.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17
18#include <asm/rtc-regs.h>
19#include <asm/rtc.h>
20
21DEFINE_SPINLOCK(rtc_lock);
22EXPORT_SYMBOL(rtc_lock);
23
24static const __initdata struct resource res[] = {
25 DEFINE_RES_IO(RTC_PORT(0), RTC_IO_EXTENT),
26 DEFINE_RES_IRQ(RTC_IRQ),
27};
28
29/*
30 * calibrate the TSC clock against the RTC
31 */
32void __init calibrate_clock(void)
33{
34 unsigned char status;
35
36 /* make sure the RTC is running and is set to operate in 24hr mode */
37 status = RTSRC;
38 RTCRB |= RTCRB_SET;
39 RTCRB |= RTCRB_TM_24HR;
40 RTCRB &= ~RTCRB_DM_BINARY;
41 RTCRA |= RTCRA_DVR;
42 RTCRA &= ~RTCRA_DVR;
43 RTCRB &= ~RTCRB_SET;
44
45 platform_device_register_simple("rtc_cmos", -1, res, ARRAY_SIZE(res));
46}
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
deleted file mode 100644
index 1b3d80d8a171..000000000000
--- a/arch/mn10300/kernel/setup.c
+++ /dev/null
@@ -1,283 +0,0 @@
1/* MN10300 Arch-specific initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/mm.h>
15#include <linux/stddef.h>
16#include <linux/unistd.h>
17#include <linux/ptrace.h>
18#include <linux/user.h>
19#include <linux/tty.h>
20#include <linux/ioport.h>
21#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/bootmem.h>
24#include <linux/seq_file.h>
25#include <linux/cpu.h>
26#include <asm/processor.h>
27#include <linux/console.h>
28#include <linux/uaccess.h>
29#include <asm/setup.h>
30#include <asm/io.h>
31#include <asm/smp.h>
32#include <proc/proc.h>
33#include <asm/fpu.h>
34#include <asm/sections.h>
35
36struct mn10300_cpuinfo boot_cpu_data;
37
38static char __initdata cmd_line[COMMAND_LINE_SIZE];
39char redboot_command_line[COMMAND_LINE_SIZE] =
40 "console=ttyS0,115200 root=/dev/mtdblock3 rw";
41
42char __initdata redboot_platform_name[COMMAND_LINE_SIZE];
43
44static struct resource code_resource = {
45 .start = 0x100000,
46 .end = 0,
47 .name = "Kernel code",
48};
49
50static struct resource data_resource = {
51 .start = 0,
52 .end = 0,
53 .name = "Kernel data",
54};
55
56static unsigned long __initdata phys_memory_base;
57static unsigned long __initdata phys_memory_end;
58static unsigned long __initdata memory_end;
59unsigned long memory_size;
60
61struct thread_info *__current_ti = &init_thread_union.thread_info;
62struct task_struct *__current = &init_task;
63
64#define mn10300_known_cpus 5
65static const char *const mn10300_cputypes[] = {
66 "am33-1",
67 "am33-2",
68 "am34-1",
69 "am33-3",
70 "am34-2",
71 "unknown"
72};
73
74/*
75 * Pick out the memory size. We look for mem=size,
76 * where size is "size[KkMm]"
77 */
78static int __init early_mem(char *p)
79{
80 memory_size = memparse(p, &p);
81
82 if (memory_size == 0)
83 panic("Memory size not known\n");
84
85 return 0;
86}
87early_param("mem", early_mem);
88
89/*
90 * architecture specific setup
91 */
92void __init setup_arch(char **cmdline_p)
93{
94 unsigned long bootmap_size;
95 unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn;
96
97 cpu_init();
98 unit_setup();
99 smp_init_cpus();
100
101 /* save unparsed command line copy for /proc/cmdline */
102 strlcpy(boot_command_line, redboot_command_line, COMMAND_LINE_SIZE);
103
104 /* populate cmd_line too for later use, preserving boot_command_line */
105 strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
106 *cmdline_p = cmd_line;
107
108 parse_early_param();
109
110 memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS +
111 memory_size;
112 if (memory_end > phys_memory_end)
113 memory_end = phys_memory_end;
114
115 init_mm.start_code = (unsigned long)&_text;
116 init_mm.end_code = (unsigned long) &_etext;
117 init_mm.end_data = (unsigned long) &_edata;
118 init_mm.brk = (unsigned long) &_end;
119
120 code_resource.start = virt_to_bus(&_text);
121 code_resource.end = virt_to_bus(&_etext)-1;
122 data_resource.start = virt_to_bus(&_etext);
123 data_resource.end = virt_to_bus(&_edata)-1;
124
125 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
126 kstart_pfn = PFN_UP(__pa(&_text));
127 free_pfn = PFN_UP(__pa(&_end));
128 end_pfn = PFN_DOWN(__pa(memory_end));
129
130 bootmap_size = init_bootmem_node(&contig_page_data,
131 free_pfn,
132 start_pfn,
133 end_pfn);
134
135 if (kstart_pfn > start_pfn)
136 free_bootmem(PFN_PHYS(start_pfn),
137 PFN_PHYS(kstart_pfn - start_pfn));
138
139 free_bootmem(PFN_PHYS(free_pfn),
140 PFN_PHYS(end_pfn - free_pfn));
141
142 /* If interrupt vector table is in main ram, then we need to
143 reserve the page it is occupying. */
144 if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS &&
145 CONFIG_INTERRUPT_VECTOR_BASE < memory_end)
146 reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, PAGE_SIZE,
147 BOOTMEM_DEFAULT);
148
149 reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size,
150 BOOTMEM_DEFAULT);
151
152#ifdef CONFIG_VT
153#if defined(CONFIG_VGA_CONSOLE)
154 conswitchp = &vga_con;
155#elif defined(CONFIG_DUMMY_CONSOLE)
156 conswitchp = &dummy_con;
157#endif
158#endif
159
160 paging_init();
161}
162
163/*
164 * perform CPU initialisation
165 */
166void __init cpu_init(void)
167{
168 unsigned long cpurev = CPUREV, type;
169
170 type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
171 if (type > mn10300_known_cpus)
172 type = mn10300_known_cpus;
173
174 printk(KERN_INFO "Panasonic %s, rev %ld\n",
175 mn10300_cputypes[type],
176 (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S);
177
178 get_mem_info(&phys_memory_base, &memory_size);
179 phys_memory_end = phys_memory_base + memory_size;
180
181 fpu_init_state();
182}
183
184static struct cpu cpu_devices[NR_CPUS];
185
186static int __init topology_init(void)
187{
188 int i;
189
190 for_each_present_cpu(i)
191 register_cpu(&cpu_devices[i], i);
192
193 return 0;
194}
195
196subsys_initcall(topology_init);
197
198/*
199 * Get CPU information for use by the procfs.
200 */
201static int show_cpuinfo(struct seq_file *m, void *v)
202{
203#ifdef CONFIG_SMP
204 struct mn10300_cpuinfo *c = v;
205 unsigned long cpu_id = c - cpu_data;
206 unsigned long cpurev = c->type, type, icachesz, dcachesz;
207#else /* CONFIG_SMP */
208 unsigned long cpu_id = 0;
209 unsigned long cpurev = CPUREV, type, icachesz, dcachesz;
210#endif /* CONFIG_SMP */
211
212#ifdef CONFIG_SMP
213 if (!cpu_online(cpu_id))
214 return 0;
215#endif
216
217 type = (cpurev & CPUREV_TYPE) >> CPUREV_TYPE_S;
218 if (type > mn10300_known_cpus)
219 type = mn10300_known_cpus;
220
221 icachesz =
222 ((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S) *
223 ((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) *
224 1024;
225
226 dcachesz =
227 ((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S) *
228 ((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) *
229 1024;
230
231 seq_printf(m,
232 "processor : %ld\n"
233 "vendor_id : " PROCESSOR_VENDOR_NAME "\n"
234 "cpu core : %s\n"
235 "cpu rev : %lu\n"
236 "model name : " PROCESSOR_MODEL_NAME "\n"
237 "icache size: %lu\n"
238 "dcache size: %lu\n",
239 cpu_id,
240 mn10300_cputypes[type],
241 (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S,
242 icachesz,
243 dcachesz
244 );
245
246 seq_printf(m,
247 "ioclk speed: %lu.%02luMHz\n"
248 "bogomips : %lu.%02lu\n\n",
249 MN10300_IOCLK / 1000000,
250 (MN10300_IOCLK / 10000) % 100,
251#ifdef CONFIG_SMP
252 c->loops_per_jiffy / (500000 / HZ),
253 (c->loops_per_jiffy / (5000 / HZ)) % 100
254#else /* CONFIG_SMP */
255 loops_per_jiffy / (500000 / HZ),
256 (loops_per_jiffy / (5000 / HZ)) % 100
257#endif /* CONFIG_SMP */
258 );
259
260 return 0;
261}
262
263static void *c_start(struct seq_file *m, loff_t *pos)
264{
265 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
266}
267
268static void *c_next(struct seq_file *m, void *v, loff_t *pos)
269{
270 ++*pos;
271 return c_start(m, pos);
272}
273
274static void c_stop(struct seq_file *m, void *v)
275{
276}
277
278const struct seq_operations cpuinfo_op = {
279 .start = c_start,
280 .next = c_next,
281 .stop = c_stop,
282 .show = show_cpuinfo,
283};
diff --git a/arch/mn10300/kernel/sigframe.h b/arch/mn10300/kernel/sigframe.h
deleted file mode 100644
index 0decba28ae84..000000000000
--- a/arch/mn10300/kernel/sigframe.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* MN10300 Signal frame definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12struct sigframe
13{
14 void (*pretcode)(void);
15 int sig;
16 struct sigcontext *psc;
17 struct sigcontext sc;
18 struct fpucontext fpuctx;
19 unsigned long extramask[_NSIG_WORDS-1];
20 char retcode[8];
21};
22
23struct rt_sigframe
24{
25 void (*pretcode)(void);
26 int sig;
27 struct siginfo *pinfo;
28 void *puc;
29 struct siginfo info;
30 struct ucontext uc;
31 struct fpucontext fpuctx;
32 char retcode[8];
33};
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
deleted file mode 100644
index 2f3cb5734235..000000000000
--- a/arch/mn10300/kernel/signal.c
+++ /dev/null
@@ -1,431 +0,0 @@
1/* MN10300 Signal handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/smp.h>
15#include <linux/kernel.h>
16#include <linux/signal.h>
17#include <linux/errno.h>
18#include <linux/wait.h>
19#include <linux/ptrace.h>
20#include <linux/unistd.h>
21#include <linux/stddef.h>
22#include <linux/tty.h>
23#include <linux/personality.h>
24#include <linux/suspend.h>
25#include <linux/tracehook.h>
26#include <asm/cacheflush.h>
27#include <asm/ucontext.h>
28#include <linux/uaccess.h>
29#include <asm/fpu.h>
30#include "sigframe.h"
31
32#define DEBUG_SIG 0
33
34/*
35 * do a signal return; undo the signal stack.
36 */
37static int restore_sigcontext(struct pt_regs *regs,
38 struct sigcontext __user *sc, long *_d0)
39{
40 unsigned int err = 0;
41
42 /* Always make any pending restarted system calls return -EINTR */
43 current->restart_block.fn = do_no_restart_syscall;
44
45 if (is_using_fpu(current))
46 fpu_kill_state(current);
47
48#define COPY(x) err |= __get_user(regs->x, &sc->x)
49 COPY(d1); COPY(d2); COPY(d3);
50 COPY(a0); COPY(a1); COPY(a2); COPY(a3);
51 COPY(e0); COPY(e1); COPY(e2); COPY(e3);
52 COPY(e4); COPY(e5); COPY(e6); COPY(e7);
53 COPY(lar); COPY(lir);
54 COPY(mdr); COPY(mdrq);
55 COPY(mcvf); COPY(mcrl); COPY(mcrh);
56 COPY(sp); COPY(pc);
57#undef COPY
58
59 {
60 unsigned int tmpflags;
61#ifndef CONFIG_MN10300_USING_JTAG
62#define USER_EPSW (EPSW_FLAG_Z | EPSW_FLAG_N | EPSW_FLAG_C | EPSW_FLAG_V | \
63 EPSW_T | EPSW_nAR)
64#else
65#define USER_EPSW (EPSW_FLAG_Z | EPSW_FLAG_N | EPSW_FLAG_C | EPSW_FLAG_V | \
66 EPSW_nAR)
67#endif
68 err |= __get_user(tmpflags, &sc->epsw);
69 regs->epsw = (regs->epsw & ~USER_EPSW) |
70 (tmpflags & USER_EPSW);
71 regs->orig_d0 = -1; /* disable syscall checks */
72 }
73
74 {
75 struct fpucontext *buf;
76 err |= __get_user(buf, &sc->fpucontext);
77 if (buf) {
78 if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
79 goto badframe;
80 err |= fpu_restore_sigcontext(buf);
81 }
82 }
83
84 err |= __get_user(*_d0, &sc->d0);
85 return err;
86
87badframe:
88 return 1;
89}
90
91/*
92 * standard signal return syscall
93 */
94asmlinkage long sys_sigreturn(void)
95{
96 struct sigframe __user *frame;
97 sigset_t set;
98 long d0;
99
100 frame = (struct sigframe __user *) current_frame()->sp;
101 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
102 goto badframe;
103 if (__get_user(set.sig[0], &frame->sc.oldmask))
104 goto badframe;
105
106 if (_NSIG_WORDS > 1 &&
107 __copy_from_user(&set.sig[1], &frame->extramask,
108 sizeof(frame->extramask)))
109 goto badframe;
110
111 set_current_blocked(&set);
112
113 if (restore_sigcontext(current_frame(), &frame->sc, &d0))
114 goto badframe;
115
116 return d0;
117
118badframe:
119 force_sig(SIGSEGV, current);
120 return 0;
121}
122
123/*
124 * realtime signal return syscall
125 */
126asmlinkage long sys_rt_sigreturn(void)
127{
128 struct rt_sigframe __user *frame;
129 sigset_t set;
130 long d0;
131
132 frame = (struct rt_sigframe __user *) current_frame()->sp;
133 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
134 goto badframe;
135 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
136 goto badframe;
137
138 set_current_blocked(&set);
139
140 if (restore_sigcontext(current_frame(), &frame->uc.uc_mcontext, &d0))
141 goto badframe;
142
143 if (restore_altstack(&frame->uc.uc_stack))
144 goto badframe;
145
146 return d0;
147
148badframe:
149 force_sig(SIGSEGV, current);
150 return 0;
151}
152
153/*
154 * store the userspace context into a signal frame
155 */
156static int setup_sigcontext(struct sigcontext __user *sc,
157 struct fpucontext *fpuctx,
158 struct pt_regs *regs,
159 unsigned long mask)
160{
161 int tmp, err = 0;
162
163#define COPY(x) err |= __put_user(regs->x, &sc->x)
164 COPY(d0); COPY(d1); COPY(d2); COPY(d3);
165 COPY(a0); COPY(a1); COPY(a2); COPY(a3);
166 COPY(e0); COPY(e1); COPY(e2); COPY(e3);
167 COPY(e4); COPY(e5); COPY(e6); COPY(e7);
168 COPY(lar); COPY(lir);
169 COPY(mdr); COPY(mdrq);
170 COPY(mcvf); COPY(mcrl); COPY(mcrh);
171 COPY(sp); COPY(epsw); COPY(pc);
172#undef COPY
173
174 tmp = fpu_setup_sigcontext(fpuctx);
175 if (tmp < 0)
176 err = 1;
177 else
178 err |= __put_user(tmp ? fpuctx : NULL, &sc->fpucontext);
179
180 /* non-iBCS2 extensions.. */
181 err |= __put_user(mask, &sc->oldmask);
182
183 return err;
184}
185
186/*
187 * determine which stack to use..
188 */
189static inline void __user *get_sigframe(struct ksignal *ksig,
190 struct pt_regs *regs,
191 size_t frame_size)
192{
193 unsigned long sp = sigsp(regs->sp, ksig);
194
195 return (void __user *) ((sp - frame_size) & ~7UL);
196}
197
198/*
199 * set up a normal signal frame
200 */
201static int setup_frame(struct ksignal *ksig, sigset_t *set,
202 struct pt_regs *regs)
203{
204 struct sigframe __user *frame;
205 int sig = ksig->sig;
206
207 frame = get_sigframe(ksig, regs, sizeof(*frame));
208
209 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
210 return -EFAULT;
211
212 if (__put_user(sig, &frame->sig) < 0 ||
213 __put_user(&frame->sc, &frame->psc) < 0)
214 return -EFAULT;
215
216 if (setup_sigcontext(&frame->sc, &frame->fpuctx, regs, set->sig[0]))
217 return -EFAULT;
218
219 if (_NSIG_WORDS > 1) {
220 if (__copy_to_user(frame->extramask, &set->sig[1],
221 sizeof(frame->extramask)))
222 return -EFAULT;
223 }
224
225 /* set up to return from userspace. If provided, use a stub already in
226 * userspace */
227 if (ksig->ka.sa.sa_flags & SA_RESTORER) {
228 if (__put_user(ksig->ka.sa.sa_restorer, &frame->pretcode))
229 return -EFAULT;
230 } else {
231 if (__put_user((void (*)(void))frame->retcode,
232 &frame->pretcode))
233 return -EFAULT;
234 /* this is mov $,d0; syscall 0 */
235 if (__put_user(0x2c, (char *)(frame->retcode + 0)) ||
236 __put_user(__NR_sigreturn, (char *)(frame->retcode + 1)) ||
237 __put_user(0x00, (char *)(frame->retcode + 2)) ||
238 __put_user(0xf0, (char *)(frame->retcode + 3)) ||
239 __put_user(0xe0, (char *)(frame->retcode + 4)))
240 return -EFAULT;
241 flush_icache_range((unsigned long) frame->retcode,
242 (unsigned long) frame->retcode + 5);
243 }
244
245 /* set up registers for signal handler */
246 regs->sp = (unsigned long) frame;
247 regs->pc = (unsigned long) ksig->ka.sa.sa_handler;
248 regs->d0 = sig;
249 regs->d1 = (unsigned long) &frame->sc;
250
251#if DEBUG_SIG
252 printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
253 sig, current->comm, current->pid, frame, regs->pc,
254 frame->pretcode);
255#endif
256
257 return 0;
258}
259
260/*
261 * set up a realtime signal frame
262 */
263static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
264 struct pt_regs *regs)
265{
266 struct rt_sigframe __user *frame;
267 int sig = ksig->sig;
268
269 frame = get_sigframe(ksig, regs, sizeof(*frame));
270
271 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
272 return -EFAULT;
273
274 if (__put_user(sig, &frame->sig) ||
275 __put_user(&frame->info, &frame->pinfo) ||
276 __put_user(&frame->uc, &frame->puc) ||
277 copy_siginfo_to_user(&frame->info, &ksig->info))
278 return -EFAULT;
279
280 /* create the ucontext. */
281 if (__put_user(0, &frame->uc.uc_flags) ||
282 __put_user(0, &frame->uc.uc_link) ||
283 __save_altstack(&frame->uc.uc_stack, regs->sp) ||
284 setup_sigcontext(&frame->uc.uc_mcontext,
285 &frame->fpuctx, regs, set->sig[0]) ||
286 __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)))
287 return -EFAULT;
288
289 /* set up to return from userspace. If provided, use a stub already in
290 * userspace */
291 if (ksig->ka.sa.sa_flags & SA_RESTORER) {
292 if (__put_user(ksig->ka.sa.sa_restorer, &frame->pretcode))
293 return -EFAULT;
294
295 } else {
296 if (__put_user((void(*)(void))frame->retcode,
297 &frame->pretcode) ||
298 /* This is mov $,d0; syscall 0 */
299 __put_user(0x2c, (char *)(frame->retcode + 0)) ||
300 __put_user(__NR_rt_sigreturn,
301 (char *)(frame->retcode + 1)) ||
302 __put_user(0x00, (char *)(frame->retcode + 2)) ||
303 __put_user(0xf0, (char *)(frame->retcode + 3)) ||
304 __put_user(0xe0, (char *)(frame->retcode + 4)))
305 return -EFAULT;
306
307 flush_icache_range((u_long) frame->retcode,
308 (u_long) frame->retcode + 5);
309 }
310
311 /* Set up registers for signal handler */
312 regs->sp = (unsigned long) frame;
313 regs->pc = (unsigned long) ksig->ka.sa.sa_handler;
314 regs->d0 = sig;
315 regs->d1 = (long) &frame->info;
316
317#if DEBUG_SIG
318 printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
319 sig, current->comm, current->pid, frame, regs->pc,
320 frame->pretcode);
321#endif
322
323 return 0;
324}
325
326static inline void stepback(struct pt_regs *regs)
327{
328 regs->pc -= 2;
329 regs->orig_d0 = -1;
330}
331
332/*
333 * handle the actual delivery of a signal to userspace
334 */
335static int handle_signal(struct ksignal *ksig, struct pt_regs *regs)
336{
337 sigset_t *oldset = sigmask_to_save();
338 int ret;
339
340 /* Are we from a system call? */
341 if (regs->orig_d0 >= 0) {
342 /* If so, check system call restarting.. */
343 switch (regs->d0) {
344 case -ERESTART_RESTARTBLOCK:
345 case -ERESTARTNOHAND:
346 regs->d0 = -EINTR;
347 break;
348
349 case -ERESTARTSYS:
350 if (!(ksig->ka.sa.sa_flags & SA_RESTART)) {
351 regs->d0 = -EINTR;
352 break;
353 }
354
355 /* fallthrough */
356 case -ERESTARTNOINTR:
357 regs->d0 = regs->orig_d0;
358 stepback(regs);
359 }
360 }
361
362 /* Set up the stack frame */
363 if (ksig->ka.sa.sa_flags & SA_SIGINFO)
364 ret = setup_rt_frame(ksig, oldset, regs);
365 else
366 ret = setup_frame(ksig, oldset, regs);
367
368 signal_setup_done(ret, ksig, test_thread_flag(TIF_SINGLESTEP));
369 return 0;
370}
371
372/*
373 * handle a potential signal
374 */
375static void do_signal(struct pt_regs *regs)
376{
377 struct ksignal ksig;
378
379 if (get_signal(&ksig)) {
380 handle_signal(&ksig, regs);
381 return;
382 }
383
384 /* did we come from a system call? */
385 if (regs->orig_d0 >= 0) {
386 /* restart the system call - no handlers present */
387 switch (regs->d0) {
388 case -ERESTARTNOHAND:
389 case -ERESTARTSYS:
390 case -ERESTARTNOINTR:
391 regs->d0 = regs->orig_d0;
392 stepback(regs);
393 break;
394
395 case -ERESTART_RESTARTBLOCK:
396 regs->d0 = __NR_restart_syscall;
397 stepback(regs);
398 break;
399 }
400 }
401
402 /* if there's no signal to deliver, we just put the saved sigmask
403 * back */
404 restore_saved_sigmask();
405}
406
407/*
408 * notification of userspace execution resumption
409 * - triggered by current->work.notify_resume
410 */
411asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)
412{
413 /* Pending single-step? */
414 if (thread_info_flags & _TIF_SINGLESTEP) {
415#ifndef CONFIG_MN10300_USING_JTAG
416 regs->epsw |= EPSW_T;
417 clear_thread_flag(TIF_SINGLESTEP);
418#else
419 BUG(); /* no h/w single-step if using JTAG unit */
420#endif
421 }
422
423 /* deal with pending signal delivery */
424 if (thread_info_flags & _TIF_SIGPENDING)
425 do_signal(regs);
426
427 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
428 clear_thread_flag(TIF_NOTIFY_RESUME);
429 tracehook_notify_resume(current_frame());
430 }
431}
diff --git a/arch/mn10300/kernel/smp-low.S b/arch/mn10300/kernel/smp-low.S
deleted file mode 100644
index 71f1b2faaa0b..000000000000
--- a/arch/mn10300/kernel/smp-low.S
+++ /dev/null
@@ -1,97 +0,0 @@
1/* SMP IPI low-level handler
2 *
3 * Copyright (C) 2006-2007 Matsushita Electric Industrial Co., Ltd.
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <asm/smp.h>
16#include <asm/thread_info.h>
17#include <asm/cpu-regs.h>
18#include <asm/intctl-regs.h>
19#include <proc/smp-regs.h>
20#include <asm/asm-offsets.h>
21#include <asm/frame.inc>
22
23 .am33_2
24
25###############################################################################
26#
27# IPI interrupt handler
28#
29###############################################################################
30 .globl mn10300_low_ipi_handler
31mn10300_low_ipi_handler:
32 add -4,sp
33 mov d0,(sp)
34 movhu (IAGR),d0
35 and IAGR_GN,d0
36 lsr 0x2,d0
37#ifdef CONFIG_MN10300_CACHE_ENABLED
38 cmp FLUSH_CACHE_IPI,d0
39 beq mn10300_flush_cache_ipi
40#endif
41 cmp SMP_BOOT_IRQ,d0
42 beq mn10300_smp_boot_ipi
43 /* OTHERS */
44 mov (sp),d0
45 add 4,sp
46#ifdef CONFIG_GDBSTUB
47 jmp gdbstub_io_rx_handler
48#else
49 jmp end
50#endif
51
52###############################################################################
53#
54# Cache flush IPI interrupt handler
55#
56###############################################################################
57#ifdef CONFIG_MN10300_CACHE_ENABLED
58mn10300_flush_cache_ipi:
59 mov (sp),d0
60 add 4,sp
61
62 /* FLUSH_CACHE_IPI */
63 add -4,sp
64 SAVE_ALL
65 mov GxICR_DETECT,d2
66 movbu d2,(GxICR(FLUSH_CACHE_IPI)) # ACK the interrupt
67 movhu (GxICR(FLUSH_CACHE_IPI)),d2
68 call smp_cache_interrupt[],0
69 RESTORE_ALL
70 jmp end
71#endif
72
73###############################################################################
74#
75# SMP boot CPU IPI interrupt handler
76#
77###############################################################################
78mn10300_smp_boot_ipi:
79 /* clear interrupt */
80 movhu (GxICR(SMP_BOOT_IRQ)),d0
81 and ~GxICR_REQUEST,d0
82 movhu d0,(GxICR(SMP_BOOT_IRQ))
83 mov (sp),d0
84 add 4,sp
85
86 # get stack
87 mov (CPUID),a0
88 add -1,a0
89 add a0,a0
90 add a0,a0
91 mov (start_stack,a0),a0
92 mov a0,sp
93 jmp initialize_secondary
94
95
96# Jump here after RTI to suppress the icache lookahead
97end:
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
deleted file mode 100644
index 35d2c3fe6f76..000000000000
--- a/arch/mn10300/kernel/smp.c
+++ /dev/null
@@ -1,1186 +0,0 @@
1/* SMP support routines.
2 *
3 * Copyright (C) 2006-2008 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/interrupt.h>
17#include <linux/spinlock.h>
18#include <linux/init.h>
19#include <linux/jiffies.h>
20#include <linux/cpumask.h>
21#include <linux/err.h>
22#include <linux/kernel.h>
23#include <linux/delay.h>
24#include <linux/sched/mm.h>
25#include <linux/sched/task.h>
26#include <linux/profile.h>
27#include <linux/smp.h>
28#include <linux/cpu.h>
29#include <asm/tlbflush.h>
30#include <asm/bitops.h>
31#include <asm/processor.h>
32#include <asm/bug.h>
33#include <asm/exceptions.h>
34#include <asm/hardirq.h>
35#include <asm/fpu.h>
36#include <asm/mmu_context.h>
37#include <asm/thread_info.h>
38#include <asm/cpu-regs.h>
39#include <asm/intctl-regs.h>
40#include "internal.h"
41
42#ifdef CONFIG_HOTPLUG_CPU
43#include <asm/cacheflush.h>
44
45static unsigned long sleep_mode[NR_CPUS];
46
47static void run_sleep_cpu(unsigned int cpu);
48static void run_wakeup_cpu(unsigned int cpu);
49#endif /* CONFIG_HOTPLUG_CPU */
50
51/*
52 * Debug Message function
53 */
54
55#undef DEBUG_SMP
56#ifdef DEBUG_SMP
57#define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
58#else
59#define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
60#endif
61
62/* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
63#define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
64
65/*
66 * Structure and data for smp_nmi_call_function().
67 */
68struct nmi_call_data_struct {
69 smp_call_func_t func;
70 void *info;
71 cpumask_t started;
72 cpumask_t finished;
73 int wait;
74 char size_alignment[0]
75 __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
76} __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
77
78static DEFINE_SPINLOCK(smp_nmi_call_lock);
79static struct nmi_call_data_struct *nmi_call_data;
80
81/*
82 * Data structures and variables
83 */
84static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
85static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
86cpumask_t cpu_boot_map; /* Bitmask of boot APs */
87unsigned long start_stack[NR_CPUS - 1];
88
89/*
90 * Per CPU parameters
91 */
92struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
93
94static int cpucount; /* The count of boot CPUs */
95static cpumask_t smp_commenced_mask;
96cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
97
98/*
99 * Function Prototypes
100 */
101static int do_boot_cpu(int);
102static void smp_show_cpu_info(int cpu_id);
103static void smp_callin(void);
104static void smp_online(void);
105static void smp_store_cpu_info(int);
106static void smp_cpu_init(void);
107static void smp_tune_scheduling(void);
108static void send_IPI_mask(const cpumask_t *cpumask, int irq);
109static void init_ipi(void);
110
111/*
112 * IPI Initialization interrupt definitions
113 */
114static void mn10300_ipi_disable(unsigned int irq);
115static void mn10300_ipi_enable(unsigned int irq);
116static void mn10300_ipi_chip_disable(struct irq_data *d);
117static void mn10300_ipi_chip_enable(struct irq_data *d);
118static void mn10300_ipi_ack(struct irq_data *d);
119static void mn10300_ipi_nop(struct irq_data *d);
120
121static struct irq_chip mn10300_ipi_type = {
122 .name = "cpu_ipi",
123 .irq_disable = mn10300_ipi_chip_disable,
124 .irq_enable = mn10300_ipi_chip_enable,
125 .irq_ack = mn10300_ipi_ack,
126 .irq_eoi = mn10300_ipi_nop
127};
128
129static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
130static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
131
132static struct irqaction reschedule_ipi = {
133 .handler = smp_reschedule_interrupt,
134 .flags = IRQF_NOBALANCING,
135 .name = "smp reschedule IPI"
136};
137static struct irqaction call_function_ipi = {
138 .handler = smp_call_function_interrupt,
139 .flags = IRQF_NOBALANCING,
140 .name = "smp call function IPI"
141};
142
143#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
144static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
145static struct irqaction local_timer_ipi = {
146 .handler = smp_ipi_timer_interrupt,
147 .flags = IRQF_NOBALANCING,
148 .name = "smp local timer IPI"
149};
150#endif
151
152/**
153 * init_ipi - Initialise the IPI mechanism
154 */
155static void init_ipi(void)
156{
157 unsigned long flags;
158 u16 tmp16;
159
160 /* set up the reschedule IPI */
161 irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
162 handle_percpu_irq);
163 setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
164 set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
165 mn10300_ipi_enable(RESCHEDULE_IPI);
166
167 /* set up the call function IPI */
168 irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
169 handle_percpu_irq);
170 setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
171 set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
172 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
173
174 /* set up the local timer IPI */
175#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
176 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
177 irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
178 handle_percpu_irq);
179 setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
180 set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
181 mn10300_ipi_enable(LOCAL_TIMER_IPI);
182#endif
183
184#ifdef CONFIG_MN10300_CACHE_ENABLED
185 /* set up the cache flush IPI */
186 irq_set_chip(FLUSH_CACHE_IPI, &mn10300_ipi_type);
187 flags = arch_local_cli_save();
188 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
189 mn10300_low_ipi_handler);
190 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
191 mn10300_ipi_enable(FLUSH_CACHE_IPI);
192 arch_local_irq_restore(flags);
193#endif
194
195 /* set up the NMI call function IPI */
196 irq_set_chip(CALL_FUNCTION_NMI_IPI, &mn10300_ipi_type);
197 flags = arch_local_cli_save();
198 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
199 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
200 arch_local_irq_restore(flags);
201
202 /* set up the SMP boot IPI */
203 flags = arch_local_cli_save();
204 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
205 mn10300_low_ipi_handler);
206 arch_local_irq_restore(flags);
207
208#ifdef CONFIG_KERNEL_DEBUGGER
209 irq_set_chip(DEBUGGER_NMI_IPI, &mn10300_ipi_type);
210#endif
211}
212
213/**
214 * mn10300_ipi_shutdown - Shut down handling of an IPI
215 * @irq: The IPI to be shut down.
216 */
217static void mn10300_ipi_shutdown(unsigned int irq)
218{
219 unsigned long flags;
220 u16 tmp;
221
222 flags = arch_local_cli_save();
223
224 tmp = GxICR(irq);
225 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
226 tmp = GxICR(irq);
227
228 arch_local_irq_restore(flags);
229}
230
231/**
232 * mn10300_ipi_enable - Enable an IPI
233 * @irq: The IPI to be enabled.
234 */
235static void mn10300_ipi_enable(unsigned int irq)
236{
237 unsigned long flags;
238 u16 tmp;
239
240 flags = arch_local_cli_save();
241
242 tmp = GxICR(irq);
243 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
244 tmp = GxICR(irq);
245
246 arch_local_irq_restore(flags);
247}
248
249static void mn10300_ipi_chip_enable(struct irq_data *d)
250{
251 mn10300_ipi_enable(d->irq);
252}
253
254/**
255 * mn10300_ipi_disable - Disable an IPI
256 * @irq: The IPI to be disabled.
257 */
258static void mn10300_ipi_disable(unsigned int irq)
259{
260 unsigned long flags;
261 u16 tmp;
262
263 flags = arch_local_cli_save();
264
265 tmp = GxICR(irq);
266 GxICR(irq) = tmp & GxICR_LEVEL;
267 tmp = GxICR(irq);
268
269 arch_local_irq_restore(flags);
270}
271
272static void mn10300_ipi_chip_disable(struct irq_data *d)
273{
274 mn10300_ipi_disable(d->irq);
275}
276
277
278/**
279 * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
280 * @irq: The IPI to be acknowledged.
281 *
282 * Clear the interrupt detection flag for the IPI on the appropriate interrupt
283 * channel in the PIC.
284 */
285static void mn10300_ipi_ack(struct irq_data *d)
286{
287 unsigned int irq = d->irq;
288 unsigned long flags;
289 u16 tmp;
290
291 flags = arch_local_cli_save();
292 GxICR_u8(irq) = GxICR_DETECT;
293 tmp = GxICR(irq);
294 arch_local_irq_restore(flags);
295}
296
297/**
298 * mn10300_ipi_nop - Dummy IPI action
299 * @irq: The IPI to be acted upon.
300 */
301static void mn10300_ipi_nop(struct irq_data *d)
302{
303}
304
305/**
306 * send_IPI_mask - Send IPIs to all CPUs in list
307 * @cpumask: The list of CPUs to target.
308 * @irq: The IPI request to be sent.
309 *
310 * Send the specified IPI to all the CPUs in the list, not waiting for them to
311 * finish before returning. The caller is responsible for synchronisation if
312 * that is needed.
313 */
314static void send_IPI_mask(const cpumask_t *cpumask, int irq)
315{
316 int i;
317 u16 tmp;
318
319 for (i = 0; i < NR_CPUS; i++) {
320 if (cpumask_test_cpu(i, cpumask)) {
321 /* send IPI */
322 tmp = CROSS_GxICR(irq, i);
323 CROSS_GxICR(irq, i) =
324 tmp | GxICR_REQUEST | GxICR_DETECT;
325 tmp = CROSS_GxICR(irq, i); /* flush write buffer */
326 }
327 }
328}
329
330/**
331 * send_IPI_self - Send an IPI to this CPU.
332 * @irq: The IPI request to be sent.
333 *
334 * Send the specified IPI to the current CPU.
335 */
336void send_IPI_self(int irq)
337{
338 send_IPI_mask(cpumask_of(smp_processor_id()), irq);
339}
340
341/**
342 * send_IPI_allbutself - Send IPIs to all the other CPUs.
343 * @irq: The IPI request to be sent.
344 *
345 * Send the specified IPI to all CPUs in the system barring the current one,
346 * not waiting for them to finish before returning. The caller is responsible
347 * for synchronisation if that is needed.
348 */
349void send_IPI_allbutself(int irq)
350{
351 cpumask_t cpumask;
352
353 cpumask_copy(&cpumask, cpu_online_mask);
354 cpumask_clear_cpu(smp_processor_id(), &cpumask);
355 send_IPI_mask(&cpumask, irq);
356}
357
358void arch_send_call_function_ipi_mask(const struct cpumask *mask)
359{
360 BUG();
361 /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
362}
363
364void arch_send_call_function_single_ipi(int cpu)
365{
366 send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
367}
368
369/**
370 * smp_send_reschedule - Send reschedule IPI to a CPU
371 * @cpu: The CPU to target.
372 */
373void smp_send_reschedule(int cpu)
374{
375 send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
376}
377
378/**
379 * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
380 * @func: The function to ask to be run.
381 * @info: The context data to pass to that function.
382 * @wait: If true, wait (atomically) until function is run on all CPUs.
383 *
384 * Send a non-maskable request to all CPUs in the system, requesting them to
385 * run the specified function with the given context data, and, potentially, to
386 * wait for completion of that function on all CPUs.
387 *
388 * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
389 * timeout.
390 */
391int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
392{
393 struct nmi_call_data_struct data;
394 unsigned long flags;
395 unsigned int cnt;
396 int cpus, ret = 0;
397
398 cpus = num_online_cpus() - 1;
399 if (cpus < 1)
400 return 0;
401
402 data.func = func;
403 data.info = info;
404 cpumask_copy(&data.started, cpu_online_mask);
405 cpumask_clear_cpu(smp_processor_id(), &data.started);
406 data.wait = wait;
407 if (wait)
408 data.finished = data.started;
409
410 spin_lock_irqsave(&smp_nmi_call_lock, flags);
411 nmi_call_data = &data;
412 smp_mb();
413
414 /* Send a message to all other CPUs and wait for them to respond */
415 send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
416
417 /* Wait for response */
418 if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
419 for (cnt = 0;
420 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
421 !cpumask_empty(&data.started);
422 cnt++)
423 mdelay(1);
424
425 if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
426 for (cnt = 0;
427 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
428 !cpumask_empty(&data.finished);
429 cnt++)
430 mdelay(1);
431 }
432
433 if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
434 ret = -ETIMEDOUT;
435
436 } else {
437 /* If timeout value is zero, wait until cpumask has been
438 * cleared */
439 while (!cpumask_empty(&data.started))
440 barrier();
441 if (wait)
442 while (!cpumask_empty(&data.finished))
443 barrier();
444 }
445
446 spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
447 return ret;
448}
449
450/**
451 * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
452 *
453 * Send a non-maskable request to all other CPUs in the system, instructing
454 * them to jump into the debugger. The caller is responsible for checking that
455 * the other CPUs responded to the instruction.
456 *
457 * The caller should make sure that this CPU's debugger IPI is disabled.
458 */
459void smp_jump_to_debugger(void)
460{
461 if (num_online_cpus() > 1)
462 /* Send a message to all other CPUs */
463 send_IPI_allbutself(DEBUGGER_NMI_IPI);
464}
465
466/**
467 * stop_this_cpu - Callback to stop a CPU.
468 * @unused: Callback context (ignored).
469 */
470void stop_this_cpu(void *unused)
471{
472 static volatile int stopflag;
473 unsigned long flags;
474
475#ifdef CONFIG_GDBSTUB
476 /* In case of single stepping smp_send_stop by other CPU,
477 * clear procindebug to avoid deadlock.
478 */
479 atomic_set(&procindebug[smp_processor_id()], 0);
480#endif /* CONFIG_GDBSTUB */
481
482 flags = arch_local_cli_save();
483 set_cpu_online(smp_processor_id(), false);
484
485 while (!stopflag)
486 cpu_relax();
487
488 set_cpu_online(smp_processor_id(), true);
489 arch_local_irq_restore(flags);
490}
491
492/**
493 * smp_send_stop - Send a stop request to all CPUs.
494 */
495void smp_send_stop(void)
496{
497 smp_nmi_call_function(stop_this_cpu, NULL, 0);
498}
499
500/**
501 * smp_reschedule_interrupt - Reschedule IPI handler
502 * @irq: The interrupt number.
503 * @dev_id: The device ID.
504 *
505 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
506 */
507static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
508{
509 scheduler_ipi();
510 return IRQ_HANDLED;
511}
512
513/**
514 * smp_call_function_interrupt - Call function IPI handler
515 * @irq: The interrupt number.
516 * @dev_id: The device ID.
517 *
518 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
519 */
520static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
521{
522 /* generic_smp_call_function_interrupt(); */
523 generic_smp_call_function_single_interrupt();
524 return IRQ_HANDLED;
525}
526
527/**
528 * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
529 */
530void smp_nmi_call_function_interrupt(void)
531{
532 smp_call_func_t func = nmi_call_data->func;
533 void *info = nmi_call_data->info;
534 int wait = nmi_call_data->wait;
535
536 /* Notify the initiating CPU that I've grabbed the data and am about to
537 * execute the function
538 */
539 smp_mb();
540 cpumask_clear_cpu(smp_processor_id(), &nmi_call_data->started);
541 (*func)(info);
542
543 if (wait) {
544 smp_mb();
545 cpumask_clear_cpu(smp_processor_id(),
546 &nmi_call_data->finished);
547 }
548}
549
550#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
551 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
552/**
553 * smp_ipi_timer_interrupt - Local timer IPI handler
554 * @irq: The interrupt number.
555 * @dev_id: The device ID.
556 *
557 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
558 */
559static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
560{
561 return local_timer_interrupt();
562}
563#endif
564
565void __init smp_init_cpus(void)
566{
567 int i;
568 for (i = 0; i < NR_CPUS; i++) {
569 set_cpu_possible(i, true);
570 set_cpu_present(i, true);
571 }
572}
573
574/**
575 * smp_cpu_init - Initialise AP in start_secondary.
576 *
577 * For this Application Processor, set up init_mm, initialise FPU and set
578 * interrupt level 0-6 setting.
579 */
580static void __init smp_cpu_init(void)
581{
582 unsigned long flags;
583 int cpu_id = smp_processor_id();
584 u16 tmp16;
585
586 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
587 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
588 for (;;)
589 local_irq_enable();
590 }
591 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
592
593 mmgrab(&init_mm);
594 current->active_mm = &init_mm;
595 BUG_ON(current->mm);
596
597 enter_lazy_tlb(&init_mm, current);
598
599 /* Force FPU initialization */
600 clear_using_fpu(current);
601
602 GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
603 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
604
605 GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
606 mn10300_ipi_enable(LOCAL_TIMER_IPI);
607
608 GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
609 mn10300_ipi_enable(RESCHEDULE_IPI);
610
611#ifdef CONFIG_MN10300_CACHE_ENABLED
612 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
613 mn10300_ipi_enable(FLUSH_CACHE_IPI);
614#endif
615
616 mn10300_ipi_shutdown(SMP_BOOT_IRQ);
617
618 /* Set up the non-maskable call function IPI */
619 flags = arch_local_cli_save();
620 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
621 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
622 arch_local_irq_restore(flags);
623}
624
625/**
626 * smp_prepare_cpu_init - Initialise CPU in startup_secondary
627 *
628 * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
629 */
630void smp_prepare_cpu_init(void)
631{
632 int loop;
633
634 /* Set the interrupt vector registers */
635 IVAR0 = EXCEP_IRQ_LEVEL0;
636 IVAR1 = EXCEP_IRQ_LEVEL1;
637 IVAR2 = EXCEP_IRQ_LEVEL2;
638 IVAR3 = EXCEP_IRQ_LEVEL3;
639 IVAR4 = EXCEP_IRQ_LEVEL4;
640 IVAR5 = EXCEP_IRQ_LEVEL5;
641 IVAR6 = EXCEP_IRQ_LEVEL6;
642
643 /* Disable all interrupts and set to priority 6 (lowest) */
644 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
645 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
646
647#ifdef CONFIG_KERNEL_DEBUGGER
648 /* initialise the kernel debugger interrupt */
649 do {
650 unsigned long flags;
651 u16 tmp16;
652
653 flags = arch_local_cli_save();
654 GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
655 tmp16 = GxICR(DEBUGGER_NMI_IPI);
656 arch_local_irq_restore(flags);
657 } while (0);
658#endif
659}
660
661/**
662 * start_secondary - Activate a secondary CPU (AP)
663 * @unused: Thread parameter (ignored).
664 */
665int __init start_secondary(void *unused)
666{
667 smp_cpu_init();
668 smp_callin();
669 while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask))
670 cpu_relax();
671
672 local_flush_tlb();
673 preempt_disable();
674 smp_online();
675
676#ifdef CONFIG_GENERIC_CLOCKEVENTS
677 init_clockevents();
678#endif
679 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
680 return 0;
681}
682
683/**
684 * smp_prepare_cpus - Boot up secondary CPUs (APs)
685 * @max_cpus: Maximum number of CPUs to boot.
686 *
687 * Call do_boot_cpu, and boot up APs.
688 */
689void __init smp_prepare_cpus(unsigned int max_cpus)
690{
691 int phy_id;
692
693 /* Setup boot CPU information */
694 smp_store_cpu_info(0);
695 smp_tune_scheduling();
696
697 init_ipi();
698
699 /* If SMP should be disabled, then finish */
700 if (max_cpus == 0) {
701 printk(KERN_INFO "SMP mode deactivated.\n");
702 goto smp_done;
703 }
704
705 /* Boot secondary CPUs (for which phy_id > 0) */
706 for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
707 /* Don't boot primary CPU */
708 if (max_cpus <= cpucount + 1)
709 continue;
710 if (phy_id != 0)
711 do_boot_cpu(phy_id);
712 set_cpu_possible(phy_id, true);
713 smp_show_cpu_info(phy_id);
714 }
715
716smp_done:
717 Dprintk("Boot done.\n");
718}
719
720/**
721 * smp_store_cpu_info - Save a CPU's information
722 * @cpu: The CPU to save for.
723 *
724 * Save boot_cpu_data and jiffy for the specified CPU.
725 */
726static void __init smp_store_cpu_info(int cpu)
727{
728 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
729
730 *ci = boot_cpu_data;
731 ci->loops_per_jiffy = loops_per_jiffy;
732 ci->type = CPUREV;
733}
734
735/**
736 * smp_tune_scheduling - Set time slice value
737 *
738 * Nothing to do here.
739 */
740static void __init smp_tune_scheduling(void)
741{
742}
743
744/**
745 * do_boot_cpu: Boot up one CPU
746 * @phy_id: Physical ID of CPU to boot.
747 *
748 * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
749 * otherwise.
750 */
751static int __init do_boot_cpu(int phy_id)
752{
753 struct task_struct *idle;
754 unsigned long send_status, callin_status;
755 int timeout, cpu_id;
756
757 send_status = GxICR_REQUEST;
758 callin_status = 0;
759 timeout = 0;
760 cpu_id = phy_id;
761
762 cpucount++;
763
764 /* Create idle thread for this CPU */
765 idle = fork_idle(cpu_id);
766 if (IS_ERR(idle))
767 panic("Failed fork for CPU#%d.", cpu_id);
768
769 idle->thread.pc = (unsigned long)start_secondary;
770
771 printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
772 start_stack[cpu_id - 1] = idle->thread.sp;
773
774 task_thread_info(idle)->cpu = cpu_id;
775
776 /* Send boot IPI to AP */
777 send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
778
779 Dprintk("Waiting for send to finish...\n");
780
781 /* Wait for AP's IPI receive in 100[ms] */
782 do {
783 udelay(1000);
784 send_status =
785 CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
786 } while (send_status == GxICR_REQUEST && timeout++ < 100);
787
788 Dprintk("Waiting for cpu_callin_map.\n");
789
790 if (send_status == 0) {
791 /* Allow AP to start initializing */
792 cpumask_set_cpu(cpu_id, &cpu_callout_map);
793
794 /* Wait for setting cpu_callin_map */
795 timeout = 0;
796 do {
797 udelay(1000);
798 callin_status = cpumask_test_cpu(cpu_id,
799 &cpu_callin_map);
800 } while (callin_status == 0 && timeout++ < 5000);
801
802 if (callin_status == 0)
803 Dprintk("Not responding.\n");
804 } else {
805 printk(KERN_WARNING "IPI not delivered.\n");
806 }
807
808 if (send_status == GxICR_REQUEST || callin_status == 0) {
809 cpumask_clear_cpu(cpu_id, &cpu_callout_map);
810 cpumask_clear_cpu(cpu_id, &cpu_callin_map);
811 cpumask_clear_cpu(cpu_id, &cpu_initialized);
812 cpucount--;
813 return 1;
814 }
815 return 0;
816}
817
818/**
819 * smp_show_cpu_info - Show SMP CPU information
820 * @cpu: The CPU of interest.
821 */
822static void __init smp_show_cpu_info(int cpu)
823{
824 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
825
826 printk(KERN_INFO
827 "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
828 cpu,
829 MN10300_IOCLK / 1000000,
830 (MN10300_IOCLK / 10000) % 100,
831 ci->loops_per_jiffy / (500000 / HZ),
832 (ci->loops_per_jiffy / (5000 / HZ)) % 100);
833}
834
835/**
836 * smp_callin - Set cpu_callin_map of the current CPU ID
837 */
838static void __init smp_callin(void)
839{
840 unsigned long timeout;
841 int cpu;
842
843 cpu = smp_processor_id();
844 timeout = jiffies + (2 * HZ);
845
846 if (cpumask_test_cpu(cpu, &cpu_callin_map)) {
847 printk(KERN_ERR "CPU#%d already present.\n", cpu);
848 BUG();
849 }
850 Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
851
852 /* Wait for AP startup 2s total */
853 while (time_before(jiffies, timeout)) {
854 if (cpumask_test_cpu(cpu, &cpu_callout_map))
855 break;
856 cpu_relax();
857 }
858
859 if (!time_before(jiffies, timeout)) {
860 printk(KERN_ERR
861 "BUG: CPU#%d started up but did not get a callout!\n",
862 cpu);
863 BUG();
864 }
865
866#ifdef CONFIG_CALIBRATE_DELAY
867 calibrate_delay(); /* Get our bogomips */
868#endif
869
870 /* Save our processor parameters */
871 smp_store_cpu_info(cpu);
872
873 /* Allow the boot processor to continue */
874 cpumask_set_cpu(cpu, &cpu_callin_map);
875}
876
877/**
878 * smp_online - Set cpu_online_mask
879 */
880static void __init smp_online(void)
881{
882 int cpu;
883
884 cpu = smp_processor_id();
885
886 notify_cpu_starting(cpu);
887
888 set_cpu_online(cpu, true);
889
890 local_irq_enable();
891}
892
893/**
894 * smp_cpus_done -
895 * @max_cpus: Maximum CPU count.
896 *
897 * Do nothing.
898 */
899void __init smp_cpus_done(unsigned int max_cpus)
900{
901}
902
903/*
904 * smp_prepare_boot_cpu - Set up stuff for the boot processor.
905 *
906 * Set up the cpu_online_mask, cpu_callout_map and cpu_callin_map of the boot
907 * processor (CPU 0).
908 */
909void smp_prepare_boot_cpu(void)
910{
911 cpumask_set_cpu(0, &cpu_callout_map);
912 cpumask_set_cpu(0, &cpu_callin_map);
913 current_thread_info()->cpu = 0;
914}
915
916/*
917 * initialize_secondary - Initialise a secondary CPU (Application Processor).
918 *
919 * Set SP register and jump to thread's PC address.
920 */
921void initialize_secondary(void)
922{
923 asm volatile (
924 "mov %0,sp \n"
925 "jmp (%1) \n"
926 :
927 : "a"(current->thread.sp), "a"(current->thread.pc));
928}
929
930/**
931 * __cpu_up - Set smp_commenced_mask for the nominated CPU
932 * @cpu: The target CPU.
933 */
934int __cpu_up(unsigned int cpu, struct task_struct *tidle)
935{
936 int timeout;
937
938#ifdef CONFIG_HOTPLUG_CPU
939 if (sleep_mode[cpu])
940 run_wakeup_cpu(cpu);
941#endif /* CONFIG_HOTPLUG_CPU */
942
943 cpumask_set_cpu(cpu, &smp_commenced_mask);
944
945 /* Wait 5s total for a response */
946 for (timeout = 0 ; timeout < 5000 ; timeout++) {
947 if (cpu_online(cpu))
948 break;
949 udelay(1000);
950 }
951
952 BUG_ON(!cpu_online(cpu));
953 return 0;
954}
955
956/**
957 * setup_profiling_timer - Set up the profiling timer
958 * @multiplier - The frequency multiplier to use
959 *
960 * The frequency of the profiling timer can be changed by writing a multiplier
961 * value into /proc/profile.
962 */
963int setup_profiling_timer(unsigned int multiplier)
964{
965 return -EINVAL;
966}
967
968/*
969 * CPU hotplug routines
970 */
971#ifdef CONFIG_HOTPLUG_CPU
972
973static DEFINE_PER_CPU(struct cpu, cpu_devices);
974
975static int __init topology_init(void)
976{
977 int cpu, ret;
978
979 for_each_cpu(cpu) {
980 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
981 if (ret)
982 printk(KERN_WARNING
983 "topology_init: register_cpu %d failed (%d)\n",
984 cpu, ret);
985 }
986 return 0;
987}
988
989subsys_initcall(topology_init);
990
991int __cpu_disable(void)
992{
993 int cpu = smp_processor_id();
994 if (cpu == 0)
995 return -EBUSY;
996
997 migrate_irqs();
998 cpumask_clear_cpu(cpu, &mm_cpumask(current->active_mm));
999 return 0;
1000}
1001
1002void __cpu_die(unsigned int cpu)
1003{
1004 run_sleep_cpu(cpu);
1005}
1006
1007#ifdef CONFIG_MN10300_CACHE_ENABLED
1008static inline void hotplug_cpu_disable_cache(void)
1009{
1010 int tmp;
1011 asm volatile(
1012 " movhu (%1),%0 \n"
1013 " and %2,%0 \n"
1014 " movhu %0,(%1) \n"
1015 "1: movhu (%1),%0 \n"
1016 " btst %3,%0 \n"
1017 " bne 1b \n"
1018 : "=&r"(tmp)
1019 : "a"(&CHCTR),
1020 "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
1021 "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
1022 : "memory", "cc");
1023}
1024
1025static inline void hotplug_cpu_enable_cache(void)
1026{
1027 int tmp;
1028 asm volatile(
1029 "movhu (%1),%0 \n"
1030 "or %2,%0 \n"
1031 "movhu %0,(%1) \n"
1032 : "=&r"(tmp)
1033 : "a"(&CHCTR),
1034 "i"(CHCTR_ICEN | CHCTR_DCEN)
1035 : "memory", "cc");
1036}
1037
1038static inline void hotplug_cpu_invalidate_cache(void)
1039{
1040 int tmp;
1041 asm volatile (
1042 "movhu (%1),%0 \n"
1043 "or %2,%0 \n"
1044 "movhu %0,(%1) \n"
1045 : "=&r"(tmp)
1046 : "a"(&CHCTR),
1047 "i"(CHCTR_ICINV | CHCTR_DCINV)
1048 : "cc");
1049}
1050
1051#else /* CONFIG_MN10300_CACHE_ENABLED */
1052#define hotplug_cpu_disable_cache() do {} while (0)
1053#define hotplug_cpu_enable_cache() do {} while (0)
1054#define hotplug_cpu_invalidate_cache() do {} while (0)
1055#endif /* CONFIG_MN10300_CACHE_ENABLED */
1056
1057/**
1058 * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
1059 * @cpumask: List of target CPUs.
1060 * @func: The function to call on those CPUs.
1061 * @info: The context data for the function to be called.
1062 * @wait: Whether to wait for the calls to complete.
1063 *
1064 * Non-maskably call a function on another CPU for hotplug purposes.
1065 *
1066 * This function must be called with maskable interrupts disabled.
1067 */
1068static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
1069 smp_call_func_t func, void *info,
1070 int wait)
1071{
1072 /*
1073 * The address and the size of nmi_call_func_mask_data
1074 * need to be aligned on L1_CACHE_BYTES.
1075 */
1076 static struct nmi_call_data_struct nmi_call_func_mask_data
1077 __cacheline_aligned;
1078 unsigned long start, end;
1079
1080 start = (unsigned long)&nmi_call_func_mask_data;
1081 end = start + sizeof(struct nmi_call_data_struct);
1082
1083 nmi_call_func_mask_data.func = func;
1084 nmi_call_func_mask_data.info = info;
1085 nmi_call_func_mask_data.started = cpumask;
1086 nmi_call_func_mask_data.wait = wait;
1087 if (wait)
1088 nmi_call_func_mask_data.finished = cpumask;
1089
1090 spin_lock(&smp_nmi_call_lock);
1091 nmi_call_data = &nmi_call_func_mask_data;
1092 mn10300_local_dcache_flush_range(start, end);
1093 smp_wmb();
1094
1095 send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
1096
1097 do {
1098 mn10300_local_dcache_inv_range(start, end);
1099 barrier();
1100 } while (!cpumask_empty(&nmi_call_func_mask_data.started));
1101
1102 if (wait) {
1103 do {
1104 mn10300_local_dcache_inv_range(start, end);
1105 barrier();
1106 } while (!cpumask_empty(&nmi_call_func_mask_data.finished));
1107 }
1108
1109 spin_unlock(&smp_nmi_call_lock);
1110 return 0;
1111}
1112
1113static void restart_wakeup_cpu(void)
1114{
1115 unsigned int cpu = smp_processor_id();
1116
1117 cpumask_set_cpu(cpu, &cpu_callin_map);
1118 local_flush_tlb();
1119 set_cpu_online(cpu, true);
1120 smp_wmb();
1121}
1122
1123static void prepare_sleep_cpu(void *unused)
1124{
1125 sleep_mode[smp_processor_id()] = 1;
1126 smp_mb();
1127 mn10300_local_dcache_flush_inv();
1128 hotplug_cpu_disable_cache();
1129 hotplug_cpu_invalidate_cache();
1130}
1131
1132/* when this function called, IE=0, NMID=0. */
1133static void sleep_cpu(void *unused)
1134{
1135 unsigned int cpu_id = smp_processor_id();
1136 /*
1137 * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
1138 * before this cpu goes in SLEEP mode.
1139 */
1140 do {
1141 smp_mb();
1142 __sleep_cpu();
1143 } while (sleep_mode[cpu_id]);
1144 restart_wakeup_cpu();
1145}
1146
1147static void run_sleep_cpu(unsigned int cpu)
1148{
1149 unsigned long flags;
1150 cpumask_t cpumask;
1151
1152 cpumask_copy(&cpumask, &cpumask_of(cpu));
1153 flags = arch_local_cli_save();
1154 hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
1155 hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
1156 udelay(1); /* delay for the cpu to sleep. */
1157 arch_local_irq_restore(flags);
1158}
1159
1160static void wakeup_cpu(void)
1161{
1162 hotplug_cpu_invalidate_cache();
1163 hotplug_cpu_enable_cache();
1164 smp_mb();
1165 sleep_mode[smp_processor_id()] = 0;
1166}
1167
1168static void run_wakeup_cpu(unsigned int cpu)
1169{
1170 unsigned long flags;
1171
1172 flags = arch_local_cli_save();
1173#if NR_CPUS == 2
1174 mn10300_local_dcache_flush_inv();
1175#else
1176 /*
1177 * Before waking up the cpu,
1178 * all online cpus should stop and flush D-Cache for global data.
1179 */
1180#error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
1181#endif
1182 hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
1183 arch_local_irq_restore(flags);
1184}
1185
1186#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/mn10300/kernel/switch_to.S b/arch/mn10300/kernel/switch_to.S
deleted file mode 100644
index de3e74fc9ea0..000000000000
--- a/arch/mn10300/kernel/switch_to.S
+++ /dev/null
@@ -1,179 +0,0 @@
1###############################################################################
2#
3# MN10300 Context switch operation
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/thread_info.h>
17#include <asm/cpu-regs.h>
18#ifdef CONFIG_SMP
19#include <proc/smp-regs.h>
20#endif /* CONFIG_SMP */
21
22 .text
23
24###############################################################################
25#
26# struct task_struct *__switch_to(struct thread_struct *prev,
27# struct thread_struct *next,
28# struct task_struct *prev_task)
29#
30###############################################################################
31ENTRY(__switch_to)
32 movm [d2,d3,a2,a3,exreg1],(sp)
33 or EPSW_NMID,epsw
34
35 mov (44,sp),d2
36
37 mov d0,a0
38 mov d1,a1
39
40 # save prev context
41 mov __switch_back,d0
42 mov sp,a2
43 mov a2,(THREAD_SP,a0)
44 mov a3,(THREAD_A3,a0)
45
46#ifdef CONFIG_KGDB
47 btst 0xff,(kgdb_single_step)
48 bne __switch_to__lift_sstep_bp
49__switch_to__continue:
50#endif
51 mov d0,(THREAD_PC,a0)
52
53 mov (THREAD_A3,a1),a3
54 mov (THREAD_SP,a1),a2
55
56 # switch
57 mov a2,sp
58
59 # load next context
60 GET_THREAD_INFO a2
61 mov a2,(__current_ti)
62 mov (TI_task,a2),a2
63 mov a2,(__current)
64#ifdef CONFIG_MN10300_CURRENT_IN_E2
65 mov a2,e2
66#endif
67
68 mov (THREAD_PC,a1),a2
69 mov d2,d0 # for ret_from_fork
70 mov d0,a0 # for __switch_to
71
72 jmp (a2)
73
74__switch_back:
75 and ~EPSW_NMID,epsw
76 ret [d2,d3,a2,a3,exreg1],32
77
78#ifdef CONFIG_KGDB
79###############################################################################
80#
81# Lift the single-step breakpoints when the task being traced is switched out
82# A0 = prev
83# A1 = next
84#
85###############################################################################
86__switch_to__lift_sstep_bp:
87 add -12,sp
88 mov a0,e4
89 mov a1,e5
90
91 # Clear the single-step flag to prevent us coming this way until we get
92 # switched back in
93 bclr 0xff,(kgdb_single_step)
94
95 # Remove first breakpoint
96 mov (kgdb_sstep_bp_addr),a2
97 cmp 0,a2
98 beq 1f
99 movbu (kgdb_sstep_bp),d0
100 movbu d0,(a2)
101#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
102 mov a2,d0
103 mov a2,d1
104 add 1,d1
105 calls flush_icache_range
106#endif
1071:
108
109 # Remove second breakpoint
110 mov (kgdb_sstep_bp_addr+4),a2
111 cmp 0,a2
112 beq 2f
113 movbu (kgdb_sstep_bp+1),d0
114 movbu d0,(a2)
115#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
116 mov a2,d0
117 mov a2,d1
118 add 1,d1
119 calls flush_icache_range
120#endif
1212:
122
123 # Change the resumption address and return
124 mov __switch_back__reinstall_sstep_bp,d0
125 mov e4,a0
126 mov e5,a1
127 add 12,sp
128 bra __switch_to__continue
129
130###############################################################################
131#
132# Reinstall the single-step breakpoints when the task being traced is switched
133# back in (A1 points to the new thread_struct).
134#
135###############################################################################
136__switch_back__reinstall_sstep_bp:
137 add -12,sp
138 mov a0,e4 # save the return value
139 mov 0xff,d3
140
141 # Reinstall first breakpoint
142 mov (kgdb_sstep_bp_addr),a2
143 cmp 0,a2
144 beq 1f
145 movbu (a2),d0
146 movbu d0,(kgdb_sstep_bp)
147 movbu d3,(a2)
148#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
149 mov a2,d0
150 mov a2,d1
151 add 1,d1
152 calls flush_icache_range
153#endif
1541:
155
156 # Reinstall second breakpoint
157 mov (kgdb_sstep_bp_addr+4),a2
158 cmp 0,a2
159 beq 2f
160 movbu (a2),d0
161 movbu d0,(kgdb_sstep_bp+1)
162 movbu d3,(a2)
163#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE)
164 mov a2,d0
165 mov a2,d1
166 add 1,d1
167 calls flush_icache_range
168#endif
1692:
170
171 mov d3,(kgdb_single_step)
172
173 # Restore the return value (the previous thread_struct pointer)
174 mov e4,a0
175 mov a0,d0
176 add 12,sp
177 bra __switch_back
178
179#endif /* CONFIG_KGDB */
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
deleted file mode 100644
index f999981e55c0..000000000000
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/* MN10300 Weird system calls
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/syscalls.h>
14#include <linux/mm.h>
15#include <linux/smp.h>
16#include <linux/sem.h>
17#include <linux/msg.h>
18#include <linux/shm.h>
19#include <linux/stat.h>
20#include <linux/mman.h>
21#include <linux/file.h>
22#include <linux/tty.h>
23
24#include <linux/uaccess.h>
25
26asmlinkage long old_mmap(unsigned long addr, unsigned long len,
27 unsigned long prot, unsigned long flags,
28 unsigned long fd, unsigned long offset)
29{
30 if (offset & ~PAGE_MASK)
31 return -EINVAL;
32 return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
33}
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
deleted file mode 100644
index 06b83b17c5f1..000000000000
--- a/arch/mn10300/kernel/time.c
+++ /dev/null
@@ -1,125 +0,0 @@
1/* MN10300 Low level time management
2 *
3 * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/time.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/sched/clock.h>
14#include <linux/kernel.h>
15#include <linux/interrupt.h>
16#include <linux/time.h>
17#include <linux/init.h>
18#include <linux/smp.h>
19#include <linux/profile.h>
20#include <linux/cnt32_to_63.h>
21#include <linux/clocksource.h>
22#include <linux/clockchips.h>
23#include <asm/irq.h>
24#include <asm/div64.h>
25#include <asm/processor.h>
26#include <asm/intctl-regs.h>
27#include <asm/rtc.h>
28#include "internal.h"
29
30static unsigned long mn10300_last_tsc; /* time-stamp counter at last time
31 * interrupt occurred */
32
33static unsigned long sched_clock_multiplier;
34
35/*
36 * scheduler clock - returns current time in nanosec units.
37 */
38unsigned long long sched_clock(void)
39{
40 union {
41 unsigned long long ll;
42 unsigned l[2];
43 } tsc64, result;
44 unsigned long tmp;
45 unsigned product[3]; /* 96-bit intermediate value */
46
47 /* cnt32_to_63() is not safe with preemption */
48 preempt_disable();
49
50 /* expand the tsc to 64-bits.
51 * - sched_clock() must be called once a minute or better or the
52 * following will go horribly wrong - see cnt32_to_63()
53 */
54 tsc64.ll = cnt32_to_63(get_cycles()) & 0x7fffffffffffffffULL;
55
56 preempt_enable();
57
58 /* scale the 64-bit TSC value to a nanosecond value via a 96-bit
59 * intermediate
60 */
61 asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */
62 "mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */
63 "add %3,%1 \n"
64 "addc 0,%2 \n" /* result in %2:%1:%0 */
65 : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)
66 : "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier)
67 : "cc");
68
69 result.l[0] = product[1] << 16 | product[0] >> 16;
70 result.l[1] = product[2] << 16 | product[1] >> 16;
71
72 return result.ll;
73}
74
75/*
76 * initialise the scheduler clock
77 */
78static void __init mn10300_sched_clock_init(void)
79{
80 sched_clock_multiplier =
81 __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);
82}
83
84/**
85 * local_timer_interrupt - Local timer interrupt handler
86 *
87 * Handle local timer interrupts for this CPU. They may have been propagated
88 * to this CPU from the CPU that actually gets them by way of an IPI.
89 */
90irqreturn_t local_timer_interrupt(void)
91{
92 profile_tick(CPU_PROFILING);
93 update_process_times(user_mode(get_irq_regs()));
94 return IRQ_HANDLED;
95}
96
97/*
98 * initialise the various timers used by the main part of the kernel
99 */
100void __init time_init(void)
101{
102 /* we need the prescalar running to be able to use IOCLK/8
103 * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock
104 * - IOCLK runs at Fosc rate (crystal speed)
105 */
106 TMPSCNT |= TMPSCNT_ENABLE;
107
108 init_clocksource();
109
110 printk(KERN_INFO
111 "timestamp counter I/O clock running at %lu.%02lu"
112 " (calibrated against RTC)\n",
113 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
114
115 mn10300_last_tsc = read_timestamp_counter();
116
117 init_clockevents();
118
119#ifdef CONFIG_MN10300_WD_TIMER
120 /* start the watchdog timer */
121 watchdog_go();
122#endif
123
124 mn10300_sched_clock_init();
125}
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
deleted file mode 100644
index 72d1015b2ae7..000000000000
--- a/arch/mn10300/kernel/traps.c
+++ /dev/null
@@ -1,615 +0,0 @@
1/* MN10300 Exception handling
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/sched/debug.h>
14#include <linux/kernel.h>
15#include <linux/string.h>
16#include <linux/errno.h>
17#include <linux/ptrace.h>
18#include <linux/timer.h>
19#include <linux/mm.h>
20#include <linux/smp.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/interrupt.h>
25#include <linux/pci.h>
26#include <linux/kdebug.h>
27#include <linux/bug.h>
28#include <linux/irq.h>
29#include <linux/export.h>
30#include <asm/processor.h>
31#include <linux/uaccess.h>
32#include <asm/io.h>
33#include <linux/atomic.h>
34#include <asm/smp.h>
35#include <asm/pgalloc.h>
36#include <asm/cacheflush.h>
37#include <asm/cpu-regs.h>
38#include <asm/busctl-regs.h>
39#include <unit/leds.h>
40#include <asm/fpu.h>
41#include <asm/sections.h>
42#include <asm/debugger.h>
43#include "internal.h"
44
45#if (CONFIG_INTERRUPT_VECTOR_BASE & 0xffffff)
46#error "INTERRUPT_VECTOR_BASE not aligned to 16MiB boundary!"
47#endif
48
49int kstack_depth_to_print = 24;
50
51spinlock_t die_lock = __SPIN_LOCK_UNLOCKED(die_lock);
52
53struct exception_to_signal_map {
54 u8 signo;
55 u32 si_code;
56};
57
58static const struct exception_to_signal_map exception_to_signal_map[256] = {
59 /* MMU exceptions */
60 [EXCEP_ITLBMISS >> 3] = { 0, 0 },
61 [EXCEP_DTLBMISS >> 3] = { 0, 0 },
62 [EXCEP_IAERROR >> 3] = { 0, 0 },
63 [EXCEP_DAERROR >> 3] = { 0, 0 },
64
65 /* system exceptions */
66 [EXCEP_TRAP >> 3] = { SIGTRAP, TRAP_BRKPT },
67 [EXCEP_ISTEP >> 3] = { SIGTRAP, TRAP_TRACE }, /* Monitor */
68 [EXCEP_IBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */
69 [EXCEP_OBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */
70 [EXCEP_PRIVINS >> 3] = { SIGILL, ILL_PRVOPC },
71 [EXCEP_UNIMPINS >> 3] = { SIGILL, ILL_ILLOPC },
72 [EXCEP_UNIMPEXINS >> 3] = { SIGILL, ILL_ILLOPC },
73 [EXCEP_MEMERR >> 3] = { SIGSEGV, SEGV_ACCERR },
74 [EXCEP_MISALIGN >> 3] = { SIGBUS, BUS_ADRALN },
75 [EXCEP_BUSERROR >> 3] = { SIGBUS, BUS_ADRERR },
76 [EXCEP_ILLINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
77 [EXCEP_ILLDATACC >> 3] = { SIGSEGV, SEGV_ACCERR },
78 [EXCEP_IOINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
79 [EXCEP_PRIVINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */
80 [EXCEP_PRIVDATACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */
81 [EXCEP_DATINSACC >> 3] = { SIGSEGV, SEGV_ACCERR },
82 [EXCEP_DOUBLE_FAULT >> 3] = { SIGILL, ILL_BADSTK },
83
84 /* FPU exceptions */
85 [EXCEP_FPU_DISABLED >> 3] = { SIGILL, ILL_COPROC },
86 [EXCEP_FPU_UNIMPINS >> 3] = { SIGILL, ILL_COPROC },
87 [EXCEP_FPU_OPERATION >> 3] = { SIGFPE, FPE_INTDIV },
88
89 /* interrupts */
90 [EXCEP_WDT >> 3] = { SIGALRM, 0 },
91 [EXCEP_NMI >> 3] = { SIGQUIT, 0 },
92 [EXCEP_IRQ_LEVEL0 >> 3] = { SIGINT, 0 },
93 [EXCEP_IRQ_LEVEL1 >> 3] = { 0, 0 },
94 [EXCEP_IRQ_LEVEL2 >> 3] = { 0, 0 },
95 [EXCEP_IRQ_LEVEL3 >> 3] = { 0, 0 },
96 [EXCEP_IRQ_LEVEL4 >> 3] = { 0, 0 },
97 [EXCEP_IRQ_LEVEL5 >> 3] = { 0, 0 },
98 [EXCEP_IRQ_LEVEL6 >> 3] = { 0, 0 },
99
100 /* system calls */
101 [EXCEP_SYSCALL0 >> 3] = { 0, 0 },
102 [EXCEP_SYSCALL1 >> 3] = { SIGILL, ILL_ILLTRP },
103 [EXCEP_SYSCALL2 >> 3] = { SIGILL, ILL_ILLTRP },
104 [EXCEP_SYSCALL3 >> 3] = { SIGILL, ILL_ILLTRP },
105 [EXCEP_SYSCALL4 >> 3] = { SIGILL, ILL_ILLTRP },
106 [EXCEP_SYSCALL5 >> 3] = { SIGILL, ILL_ILLTRP },
107 [EXCEP_SYSCALL6 >> 3] = { SIGILL, ILL_ILLTRP },
108 [EXCEP_SYSCALL7 >> 3] = { SIGILL, ILL_ILLTRP },
109 [EXCEP_SYSCALL8 >> 3] = { SIGILL, ILL_ILLTRP },
110 [EXCEP_SYSCALL9 >> 3] = { SIGILL, ILL_ILLTRP },
111 [EXCEP_SYSCALL10 >> 3] = { SIGILL, ILL_ILLTRP },
112 [EXCEP_SYSCALL11 >> 3] = { SIGILL, ILL_ILLTRP },
113 [EXCEP_SYSCALL12 >> 3] = { SIGILL, ILL_ILLTRP },
114 [EXCEP_SYSCALL13 >> 3] = { SIGILL, ILL_ILLTRP },
115 [EXCEP_SYSCALL14 >> 3] = { SIGILL, ILL_ILLTRP },
116 [EXCEP_SYSCALL15 >> 3] = { SIGABRT, 0 },
117};
118
119/*
120 * Handle kernel exceptions.
121 *
122 * See if there's a fixup handler we can force a jump to when an exception
123 * happens due to something kernel code did
124 */
125int die_if_no_fixup(const char *str, struct pt_regs *regs,
126 enum exception_code code)
127{
128 u8 opcode;
129 int signo, si_code;
130
131 if (user_mode(regs))
132 return 0;
133
134 peripheral_leds_display_exception(code);
135
136 signo = exception_to_signal_map[code >> 3].signo;
137 si_code = exception_to_signal_map[code >> 3].si_code;
138
139 switch (code) {
140 /* see if we can fixup the kernel accessing memory */
141 case EXCEP_ITLBMISS:
142 case EXCEP_DTLBMISS:
143 case EXCEP_IAERROR:
144 case EXCEP_DAERROR:
145 case EXCEP_MEMERR:
146 case EXCEP_MISALIGN:
147 case EXCEP_BUSERROR:
148 case EXCEP_ILLDATACC:
149 case EXCEP_IOINSACC:
150 case EXCEP_PRIVINSACC:
151 case EXCEP_PRIVDATACC:
152 case EXCEP_DATINSACC:
153 if (fixup_exception(regs))
154 return 1;
155 break;
156
157 case EXCEP_TRAP:
158 case EXCEP_UNIMPINS:
159 if (probe_kernel_read(&opcode, (u8 *)regs->pc, 1) < 0)
160 break;
161 if (opcode == 0xff) {
162 if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0))
163 return 1;
164 if (at_debugger_breakpoint(regs))
165 regs->pc++;
166 signo = SIGTRAP;
167 si_code = TRAP_BRKPT;
168 }
169 break;
170
171 case EXCEP_SYSCALL1 ... EXCEP_SYSCALL14:
172 /* syscall return addr is _after_ the instruction */
173 regs->pc -= 2;
174 break;
175
176 case EXCEP_SYSCALL15:
177 if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_WARN)
178 return 1;
179
180 /* syscall return addr is _after_ the instruction */
181 regs->pc -= 2;
182 break;
183
184 default:
185 break;
186 }
187
188 if (debugger_intercept(code, signo, si_code, regs) == 0)
189 return 1;
190
191 if (notify_die(DIE_GPF, str, regs, code, 0, 0))
192 return 1;
193
194 /* make the process die as the last resort */
195 die(str, regs, code);
196}
197
198/*
199 * General exception handler
200 */
201asmlinkage void handle_exception(struct pt_regs *regs, u32 intcode)
202{
203 siginfo_t info;
204
205 /* deal with kernel exceptions here */
206 if (die_if_no_fixup(NULL, regs, intcode))
207 return;
208
209 /* otherwise it's a userspace exception */
210 info.si_signo = exception_to_signal_map[intcode >> 3].signo;
211 info.si_code = exception_to_signal_map[intcode >> 3].si_code;
212 info.si_errno = 0;
213 info.si_addr = (void *) regs->pc;
214 force_sig_info(info.si_signo, &info, current);
215}
216
217/*
218 * handle NMI
219 */
220asmlinkage void nmi(struct pt_regs *regs, enum exception_code code)
221{
222 /* see if gdbstub wants to deal with it */
223 if (debugger_intercept(code, SIGQUIT, 0, regs))
224 return;
225
226 printk(KERN_WARNING "--- Register Dump ---\n");
227 show_registers(regs);
228 printk(KERN_WARNING "---------------------\n");
229}
230
231/*
232 * show a stack trace from the specified stack pointer
233 */
234void show_trace(unsigned long *sp)
235{
236 unsigned long bottom, stack, addr, fp, raslot;
237
238 printk(KERN_EMERG "\nCall Trace:\n");
239
240 //stack = (unsigned long)sp;
241 asm("mov sp,%0" : "=a"(stack));
242 asm("mov a3,%0" : "=r"(fp));
243
244 raslot = ULONG_MAX;
245 bottom = (stack + THREAD_SIZE) & ~(THREAD_SIZE - 1);
246 for (; stack < bottom; stack += sizeof(addr)) {
247 addr = *(unsigned long *)stack;
248 if (stack == fp) {
249 if (addr > stack && addr < bottom) {
250 fp = addr;
251 raslot = stack + sizeof(addr);
252 continue;
253 }
254 fp = 0;
255 raslot = ULONG_MAX;
256 }
257
258 if (__kernel_text_address(addr)) {
259 printk(" [<%08lx>]", addr);
260 if (stack >= raslot)
261 raslot = ULONG_MAX;
262 else
263 printk(" ?");
264 printk(" %pS\n", (void *)addr);
265 }
266 }
267
268 printk("\n");
269}
270
271/*
272 * show the raw stack from the specified stack pointer
273 */
274void show_stack(struct task_struct *task, unsigned long *sp)
275{
276 unsigned long *stack;
277 int i;
278
279 if (!sp)
280 sp = (unsigned long *) &sp;
281
282 stack = sp;
283 printk(KERN_EMERG "Stack:");
284 for (i = 0; i < kstack_depth_to_print; i++) {
285 if (((long) stack & (THREAD_SIZE - 1)) == 0)
286 break;
287 if ((i % 8) == 0)
288 printk(KERN_EMERG " ");
289 printk("%08lx ", *stack++);
290 }
291
292 show_trace(sp);
293}
294
295/*
296 * dump the register file in the specified exception frame
297 */
298void show_registers_only(struct pt_regs *regs)
299{
300 unsigned long ssp;
301
302 ssp = (unsigned long) regs + sizeof(*regs);
303
304 printk(KERN_EMERG "PC: %08lx EPSW: %08lx SSP: %08lx mode: %s\n",
305 regs->pc, regs->epsw, ssp, user_mode(regs) ? "User" : "Super");
306 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
307 regs->d0, regs->d1, regs->d2, regs->d3);
308 printk(KERN_EMERG "a0: %08lx a1: %08lx a2: %08lx a3: %08lx\n",
309 regs->a0, regs->a1, regs->a2, regs->a3);
310 printk(KERN_EMERG "e0: %08lx e1: %08lx e2: %08lx e3: %08lx\n",
311 regs->e0, regs->e1, regs->e2, regs->e3);
312 printk(KERN_EMERG "e4: %08lx e5: %08lx e6: %08lx e7: %08lx\n",
313 regs->e4, regs->e5, regs->e6, regs->e7);
314 printk(KERN_EMERG "lar: %08lx lir: %08lx mdr: %08lx usp: %08lx\n",
315 regs->lar, regs->lir, regs->mdr, regs->sp);
316 printk(KERN_EMERG "cvf: %08lx crl: %08lx crh: %08lx drq: %08lx\n",
317 regs->mcvf, regs->mcrl, regs->mcrh, regs->mdrq);
318 printk(KERN_EMERG "threadinfo=%p task=%p)\n",
319 current_thread_info(), current);
320
321 if ((unsigned long) current >= PAGE_OFFSET &&
322 (unsigned long) current < (unsigned long)high_memory)
323 printk(KERN_EMERG "Process %s (pid: %d)\n",
324 current->comm, current->pid);
325
326#ifdef CONFIG_SMP
327 printk(KERN_EMERG "CPUID: %08x\n", CPUID);
328#endif
329 printk(KERN_EMERG "CPUP: %04hx\n", CPUP);
330 printk(KERN_EMERG "TBR: %08x\n", TBR);
331 printk(KERN_EMERG "DEAR: %08x\n", DEAR);
332 printk(KERN_EMERG "sISR: %08x\n", sISR);
333 printk(KERN_EMERG "NMICR: %04hx\n", NMICR);
334 printk(KERN_EMERG "BCBERR: %08x\n", BCBERR);
335 printk(KERN_EMERG "BCBEAR: %08x\n", BCBEAR);
336 printk(KERN_EMERG "MMUFCR: %08x\n", MMUFCR);
337 printk(KERN_EMERG "IPTEU : %08x IPTEL2: %08x\n", IPTEU, IPTEL2);
338 printk(KERN_EMERG "DPTEU: %08x DPTEL2: %08x\n", DPTEU, DPTEL2);
339}
340
341/*
342 * dump the registers and the stack
343 */
344void show_registers(struct pt_regs *regs)
345{
346 unsigned long sp;
347 int i;
348
349 show_registers_only(regs);
350
351 if (!user_mode(regs))
352 sp = (unsigned long) regs + sizeof(*regs);
353 else
354 sp = regs->sp;
355
356 /* when in-kernel, we also print out the stack and code at the
357 * time of the fault..
358 */
359 if (!user_mode(regs)) {
360 printk(KERN_EMERG "\n");
361 show_stack(current, (unsigned long *) sp);
362
363#if 0
364 printk(KERN_EMERG "\nCode: ");
365 if (regs->pc < PAGE_OFFSET)
366 goto bad;
367
368 for (i = 0; i < 20; i++) {
369 unsigned char c;
370 if (__get_user(c, &((unsigned char *) regs->pc)[i]))
371 goto bad;
372 printk("%02x ", c);
373 }
374#else
375 i = 0;
376#endif
377 }
378
379 printk("\n");
380 return;
381
382#if 0
383bad:
384 printk(KERN_EMERG " Bad PC value.");
385 break;
386#endif
387}
388
389/*
390 *
391 */
392void show_trace_task(struct task_struct *tsk)
393{
394 unsigned long sp = tsk->thread.sp;
395
396 /* User space on another CPU? */
397 if ((sp ^ (unsigned long) tsk) & (PAGE_MASK << 1))
398 return;
399
400 show_trace((unsigned long *) sp);
401}
402
403/*
404 * note the untimely death of part of the kernel
405 */
406void die(const char *str, struct pt_regs *regs, enum exception_code code)
407{
408 console_verbose();
409 spin_lock_irq(&die_lock);
410 printk(KERN_EMERG "\n%s: %04x\n",
411 str, code & 0xffff);
412 show_registers(regs);
413
414 if (regs->pc >= 0x02000000 && regs->pc < 0x04000000 &&
415 (regs->epsw & (EPSW_IM | EPSW_IE)) != (EPSW_IM | EPSW_IE)) {
416 printk(KERN_EMERG "Exception in usermode interrupt handler\n");
417 printk(KERN_EMERG "\nPlease connect to kernel debugger !!\n");
418 asm volatile ("0: bra 0b");
419 }
420
421 spin_unlock_irq(&die_lock);
422 do_exit(SIGSEGV);
423}
424
425/*
426 * display the register file when the stack pointer gets clobbered
427 */
428asmlinkage void do_double_fault(struct pt_regs *regs)
429{
430 struct task_struct *tsk = current;
431
432 strcpy(tsk->comm, "emergency tsk");
433 tsk->pid = 0;
434 console_verbose();
435 printk(KERN_EMERG "--- double fault ---\n");
436 show_registers(regs);
437}
438
439/*
440 * asynchronous bus error (external, usually I/O DMA)
441 */
442asmlinkage void io_bus_error(u32 bcberr, u32 bcbear, struct pt_regs *regs)
443{
444 console_verbose();
445
446 printk(KERN_EMERG "Asynchronous I/O Bus Error\n");
447 printk(KERN_EMERG "==========================\n");
448
449 if (bcberr & BCBERR_BEME)
450 printk(KERN_EMERG "- Multiple recorded errors\n");
451
452 printk(KERN_EMERG "- Faulting Buses:%s%s%s\n",
453 bcberr & BCBERR_BEMR_CI ? " CPU-Ins-Fetch" : "",
454 bcberr & BCBERR_BEMR_CD ? " CPU-Data" : "",
455 bcberr & BCBERR_BEMR_DMA ? " DMA" : "");
456
457 printk(KERN_EMERG "- %s %s access made to %s at address %08x\n",
458 bcberr & BCBERR_BEBST ? "Burst" : "Single",
459 bcberr & BCBERR_BERW ? "Read" : "Write",
460 bcberr & BCBERR_BESB_MON ? "Monitor Space" :
461 bcberr & BCBERR_BESB_IO ? "Internal CPU I/O Space" :
462 bcberr & BCBERR_BESB_EX ? "External I/O Bus" :
463 bcberr & BCBERR_BESB_OPEX ? "External Memory Bus" :
464 "On Chip Memory",
465 bcbear
466 );
467
468 printk(KERN_EMERG "- Detected by the %s\n",
469 bcberr&BCBERR_BESD ? "Bus Control Unit" : "Slave Bus");
470
471#ifdef CONFIG_PCI
472#define BRIDGEREGB(X) (*(volatile __u8 *)(0xBE040000 + (X)))
473#define BRIDGEREGW(X) (*(volatile __u16 *)(0xBE040000 + (X)))
474#define BRIDGEREGL(X) (*(volatile __u32 *)(0xBE040000 + (X)))
475
476 printk(KERN_EMERG "- PCI Memory Paging Reg: %08x\n",
477 *(volatile __u32 *) (0xBFFFFFF4));
478 printk(KERN_EMERG "- PCI Bridge Base Address 0: %08x\n",
479 BRIDGEREGL(PCI_BASE_ADDRESS_0));
480 printk(KERN_EMERG "- PCI Bridge AMPCI Base Address: %08x\n",
481 BRIDGEREGL(0x48));
482 printk(KERN_EMERG "- PCI Bridge Command: %04hx\n",
483 BRIDGEREGW(PCI_COMMAND));
484 printk(KERN_EMERG "- PCI Bridge Status: %04hx\n",
485 BRIDGEREGW(PCI_STATUS));
486 printk(KERN_EMERG "- PCI Bridge Int Status: %08hx\n",
487 BRIDGEREGL(0x4c));
488#endif
489
490 printk(KERN_EMERG "\n");
491 show_registers(regs);
492
493 panic("Halted due to asynchronous I/O Bus Error\n");
494}
495
496/*
497 * handle an exception for which a handler has not yet been installed
498 */
499asmlinkage void uninitialised_exception(struct pt_regs *regs,
500 enum exception_code code)
501{
502
503 /* see if gdbstub wants to deal with it */
504 if (debugger_intercept(code, SIGSYS, 0, regs) == 0)
505 return;
506
507 peripheral_leds_display_exception(code);
508 printk(KERN_EMERG "Uninitialised Exception 0x%04x\n", code & 0xFFFF);
509 show_registers(regs);
510
511 for (;;)
512 continue;
513}
514
515/*
516 * set an interrupt stub to jump to a handler
517 * ! NOTE: this does *not* flush the caches
518 */
519void __init __set_intr_stub(enum exception_code code, void *handler)
520{
521 unsigned long addr;
522 u8 *vector = (u8 *)(CONFIG_INTERRUPT_VECTOR_BASE + code);
523
524 addr = (unsigned long) handler - (unsigned long) vector;
525 vector[0] = 0xdc; /* JMP handler */
526 vector[1] = addr;
527 vector[2] = addr >> 8;
528 vector[3] = addr >> 16;
529 vector[4] = addr >> 24;
530 vector[5] = 0xcb;
531 vector[6] = 0xcb;
532 vector[7] = 0xcb;
533}
534
535/*
536 * set an interrupt stub to jump to a handler
537 */
538void __init set_intr_stub(enum exception_code code, void *handler)
539{
540 unsigned long addr;
541 u8 *vector = (u8 *)(CONFIG_INTERRUPT_VECTOR_BASE + code);
542 unsigned long flags;
543
544 addr = (unsigned long) handler - (unsigned long) vector;
545
546 flags = arch_local_cli_save();
547
548 vector[0] = 0xdc; /* JMP handler */
549 vector[1] = addr;
550 vector[2] = addr >> 8;
551 vector[3] = addr >> 16;
552 vector[4] = addr >> 24;
553 vector[5] = 0xcb;
554 vector[6] = 0xcb;
555 vector[7] = 0xcb;
556
557 arch_local_irq_restore(flags);
558
559#ifndef CONFIG_MN10300_CACHE_SNOOP
560 mn10300_dcache_flush_inv();
561 mn10300_icache_inv();
562#endif
563}
564
565/*
566 * initialise the exception table
567 */
568void __init trap_init(void)
569{
570 set_excp_vector(EXCEP_TRAP, handle_exception);
571 set_excp_vector(EXCEP_ISTEP, handle_exception);
572 set_excp_vector(EXCEP_IBREAK, handle_exception);
573 set_excp_vector(EXCEP_OBREAK, handle_exception);
574
575 set_excp_vector(EXCEP_PRIVINS, handle_exception);
576 set_excp_vector(EXCEP_UNIMPINS, handle_exception);
577 set_excp_vector(EXCEP_UNIMPEXINS, handle_exception);
578 set_excp_vector(EXCEP_MEMERR, handle_exception);
579 set_excp_vector(EXCEP_MISALIGN, misalignment);
580 set_excp_vector(EXCEP_BUSERROR, handle_exception);
581 set_excp_vector(EXCEP_ILLINSACC, handle_exception);
582 set_excp_vector(EXCEP_ILLDATACC, handle_exception);
583 set_excp_vector(EXCEP_IOINSACC, handle_exception);
584 set_excp_vector(EXCEP_PRIVINSACC, handle_exception);
585 set_excp_vector(EXCEP_PRIVDATACC, handle_exception);
586 set_excp_vector(EXCEP_DATINSACC, handle_exception);
587 set_excp_vector(EXCEP_FPU_UNIMPINS, handle_exception);
588 set_excp_vector(EXCEP_FPU_OPERATION, fpu_exception);
589
590 set_excp_vector(EXCEP_NMI, nmi);
591
592 set_excp_vector(EXCEP_SYSCALL1, handle_exception);
593 set_excp_vector(EXCEP_SYSCALL2, handle_exception);
594 set_excp_vector(EXCEP_SYSCALL3, handle_exception);
595 set_excp_vector(EXCEP_SYSCALL4, handle_exception);
596 set_excp_vector(EXCEP_SYSCALL5, handle_exception);
597 set_excp_vector(EXCEP_SYSCALL6, handle_exception);
598 set_excp_vector(EXCEP_SYSCALL7, handle_exception);
599 set_excp_vector(EXCEP_SYSCALL8, handle_exception);
600 set_excp_vector(EXCEP_SYSCALL9, handle_exception);
601 set_excp_vector(EXCEP_SYSCALL10, handle_exception);
602 set_excp_vector(EXCEP_SYSCALL11, handle_exception);
603 set_excp_vector(EXCEP_SYSCALL12, handle_exception);
604 set_excp_vector(EXCEP_SYSCALL13, handle_exception);
605 set_excp_vector(EXCEP_SYSCALL14, handle_exception);
606 set_excp_vector(EXCEP_SYSCALL15, handle_exception);
607}
608
609/*
610 * determine if a program counter value is a valid bug address
611 */
612int is_valid_bugaddr(unsigned long pc)
613{
614 return pc >= PAGE_OFFSET;
615}
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S
deleted file mode 100644
index 2d5f1c3f1afb..000000000000
--- a/arch/mn10300/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,94 +0,0 @@
1/* MN10300 Main kernel linker script
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#define __VMLINUX_LDS__
12#include <asm-generic/vmlinux.lds.h>
13#include <asm/thread_info.h>
14#include <asm/page.h>
15
16OUTPUT_FORMAT("elf32-am33lin", "elf32-am33lin", "elf32-am33lin")
17OUTPUT_ARCH(mn10300)
18ENTRY(_start)
19jiffies = jiffies_64;
20#ifndef CONFIG_MN10300_CURRENT_IN_E2
21current = __current;
22#endif
23SECTIONS
24{
25 . = CONFIG_KERNEL_TEXT_ADDRESS;
26 /* read-only */
27 _stext = .;
28 _text = .; /* Text and read-only data */
29 .text : {
30 HEAD_TEXT
31 TEXT_TEXT
32 SCHED_TEXT
33 CPUIDLE_TEXT
34 LOCK_TEXT
35 KPROBES_TEXT
36 *(.fixup)
37 *(.gnu.warning)
38 } = 0xcb
39
40 _etext = .; /* End of text section */
41
42 EXCEPTION_TABLE(16)
43 BUG_TABLE
44
45 RO_DATA(PAGE_SIZE)
46
47 /* writeable */
48 _sdata = .; /* Start of rw data section */
49 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
50 _edata = .;
51
52 /* might get freed after init */
53 . = ALIGN(PAGE_SIZE);
54 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
55 __smp_locks = .;
56 *(.smp_locks)
57 __smp_locks_end = .;
58 }
59
60 /* will be freed after init */
61 . = ALIGN(PAGE_SIZE); /* Init code and data */
62 __init_begin = .;
63 INIT_TEXT_SECTION(PAGE_SIZE)
64 INIT_DATA_SECTION(16)
65 . = ALIGN(4);
66 __alt_instructions = .;
67 .altinstructions : { *(.altinstructions) }
68 __alt_instructions_end = .;
69 .altinstr_replacement : { *(.altinstr_replacement) }
70 /* .exit.text is discard at runtime, not link time, to deal with references
71 from .altinstructions and .eh_frame */
72 .exit.text : { EXIT_TEXT; }
73 .exit.data : { EXIT_DATA; }
74
75 PERCPU_SECTION(32)
76 . = ALIGN(PAGE_SIZE);
77 __init_end = .;
78 /* freed after init ends here */
79
80 BSS_SECTION(0, PAGE_SIZE, 4)
81
82 _end = . ;
83
84 /* This is where the kernel creates the early boot page tables */
85 . = ALIGN(PAGE_SIZE);
86 pg0 = .;
87
88 STABS_DEBUG
89
90 DWARF_DEBUG
91
92 /* Sections to be discarded */
93 DISCARDS
94}
diff --git a/arch/mn10300/lib/Makefile b/arch/mn10300/lib/Makefile
deleted file mode 100644
index 0cd2346f4c13..000000000000
--- a/arch/mn10300/lib/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the MN10300-specific library files..
3#
4
5lib-y = delay.o usercopy.o checksum.o bitops.o memcpy.o memmove.o memset.o
6lib-y += do_csum.o
7lib-y += __ashldi3.o __ashrdi3.o __lshrdi3.o negdi2.o __ucmpdi2.o
diff --git a/arch/mn10300/lib/__ashldi3.S b/arch/mn10300/lib/__ashldi3.S
deleted file mode 100644
index a51a9506f00c..000000000000
--- a/arch/mn10300/lib/__ashldi3.S
+++ /dev/null
@@ -1,51 +0,0 @@
1/* MN10300 64-bit arithmetic left shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned long long __ashldi3(unsigned long long value [D1:D0],
19# unsigned by [(12,SP)])
20#
21###############################################################################
22 .globl __ashldi3
23 .type __ashldi3,@function
24__ashldi3:
25 mov (12,sp),a0
26 and +63,a0
27 beq __ashldi3_zero
28
29 cmp +31,a0
30 bhi __ashldi3_32plus
31
32 # the count is in the range 1-31
33 asl a0,d1
34
35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 lsr a1,d0,a1 # get overflow from LSW -> MSW
38
39 or_asl a1,d1,a0,d0 # insert overflow into MSW and
40 # shift the LSW
41 rets
42
43 .balign L1_CACHE_BYTES
44 # the count is in the range 32-63
45__ashldi3_32plus:
46 asl a0,d0,d1
47 clr d0
48__ashldi3_zero:
49 rets
50
51 .size __ashldi3, .-__ashldi3
diff --git a/arch/mn10300/lib/__ashrdi3.S b/arch/mn10300/lib/__ashrdi3.S
deleted file mode 100644
index 6f42382728cb..000000000000
--- a/arch/mn10300/lib/__ashrdi3.S
+++ /dev/null
@@ -1,52 +0,0 @@
1/* MN10300 64-bit arithmetic right shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned long long __ashrdi3(unsigned long long value [D1:D0],
19# unsigned by [(12,SP)])
20#
21###############################################################################
22 .globl __ashrdi3
23 .type __ashrdi3,@function
24__ashrdi3:
25 mov (12,sp),a0
26 and +63,a0
27 beq __ashrdi3_zero
28
29 cmp +31,a0
30 bhi __ashrdi3_32plus
31
32 # the count is in the range 1-31
33 lsr a0,d0
34
35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 asl a1,d1,a1 # get underflow from MSW -> LSW
38
39 or_asr a1,d0,a0,d1 # insert underflow into LSW and
40 # shift the MSW
41 rets
42
43 .balign L1_CACHE_BYTES
44 # the count is in the range 32-63
45__ashrdi3_32plus:
46 asr a0,d1,d0
47 ext d0 # sign-extend result through MDR
48 mov mdr,d1
49__ashrdi3_zero:
50 rets
51
52 .size __ashrdi3, .-__ashrdi3
diff --git a/arch/mn10300/lib/__lshrdi3.S b/arch/mn10300/lib/__lshrdi3.S
deleted file mode 100644
index a686aef31e90..000000000000
--- a/arch/mn10300/lib/__lshrdi3.S
+++ /dev/null
@@ -1,52 +0,0 @@
1/* MN10300 64-bit logical right shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <asm/cache.h>
13
14 .text
15 .balign L1_CACHE_BYTES
16
17###############################################################################
18#
19# unsigned long long __lshrdi3(unsigned long long value [D1:D0],
20# unsigned by [(12,SP)])
21#
22###############################################################################
23 .globl __lshrdi3
24 .type __lshrdi3,@function
25__lshrdi3:
26 mov (12,sp),a0
27 and +63,a0
28 beq __lshrdi3_zero
29
30 cmp +31,a0
31 bhi __lshrdi3_32plus
32
33 # the count is in the range 1-31
34 lsr a0,d0
35
36 mov +32,a1
37 sub a0,a1,a1 # a1 = 32 - count
38 asl a1,d1,a1 # get underflow from MSW -> LSW
39
40 or_lsr a1,d0,a0,d1 # insert underflow into LSW and
41 # shift the MSW
42 rets
43
44 .balign L1_CACHE_BYTES
45 # the count is in the range 32-63
46__lshrdi3_32plus:
47 lsr a0,d1,d0
48 clr d1
49__lshrdi3_zero:
50 rets
51
52 .size __lshrdi3, .-__lshrdi3
diff --git a/arch/mn10300/lib/__ucmpdi2.S b/arch/mn10300/lib/__ucmpdi2.S
deleted file mode 100644
index 60dcbdfe386c..000000000000
--- a/arch/mn10300/lib/__ucmpdi2.S
+++ /dev/null
@@ -1,43 +0,0 @@
1/* __ucmpdi2.S: 64-bit unsigned compare
2 *
3 * Copyright (C) 2008 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12
13 .text
14 .p2align 4
15
16###############################################################################
17#
18# int __ucmpdi2(unsigned long long a [D0:D1],
19# unsigned long long b [(SP,12),(SP,16)])
20#
21# - returns 0, 1, or 2 as a <, =, > b respectively.
22#
23###############################################################################
24 .globl __ucmpdi2
25 .type __ucmpdi2,@function
26__ucmpdi2:
27 mov (12,sp),a0 # b.lsw
28 mov (16,sp),a1 # b.msw
29
30 sub a0,d0
31 subc a1,d1 # may clear Z, never sets it
32 bne __ucmpdi2_differ # a.msw != b.msw
33 mov +1,d0
34 rets
35
36__ucmpdi2_differ:
37 # C flag is set if LE, clear if GE
38 subc d0,d0 # -1 if LE, 0 if GE
39 add +1,d0 # 0 if LE, 1 if GE
40 add d0,d0 # 0 if LE, 2 if GE
41 rets
42
43 .size __ucmpdi2, .-__ucmpdi2
diff --git a/arch/mn10300/lib/ashrdi3.c b/arch/mn10300/lib/ashrdi3.c
deleted file mode 100644
index c54f61ddf0b5..000000000000
--- a/arch/mn10300/lib/ashrdi3.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public Licence as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public Licence for more details.
15
16You should have received a copy of the GNU General Public Licence
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__((mode(SI)));
24typedef unsigned int USItype __attribute__((mode(SI)));
25typedef int DItype __attribute__((mode(DI)));
26typedef int word_type __attribute__((mode(__word__)));
27
28struct DIstruct {
29 SItype low;
30 SItype high;
31};
32
33union DIunion {
34 struct DIstruct s;
35 DItype ll;
36};
37
38DItype __ashrdi3(DItype u, word_type b)
39{
40 union DIunion w;
41 union DIunion uu;
42 word_type bm;
43
44 if (b == 0)
45 return u;
46
47 uu.ll = u;
48
49 bm = (sizeof(SItype) * BITS_PER_UNIT) - b;
50 if (bm <= 0) {
51 /* w.s.high = 1..1 or 0..0 */
52 w.s.high = uu.s.high >> (sizeof(SItype) * BITS_PER_UNIT - 1);
53 w.s.low = uu.s.high >> -bm;
54 } else {
55 USItype carries = (USItype)uu.s.high << bm;
56 w.s.high = uu.s.high >> b;
57 w.s.low = ((USItype)uu.s.low >> b) | carries;
58 }
59
60 return w.ll;
61}
diff --git a/arch/mn10300/lib/bitops.c b/arch/mn10300/lib/bitops.c
deleted file mode 100644
index 37309cdb7584..000000000000
--- a/arch/mn10300/lib/bitops.c
+++ /dev/null
@@ -1,50 +0,0 @@
1/* MN10300 Non-trivial bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <asm/bitops.h>
13
14/*
15 * try flipping a bit using BSET and BCLR
16 */
17void change_bit(unsigned long nr, volatile void *addr)
18{
19 if (test_bit(nr, addr))
20 goto try_clear_bit;
21
22try_set_bit:
23 if (!test_and_set_bit(nr, addr))
24 return;
25
26try_clear_bit:
27 if (test_and_clear_bit(nr, addr))
28 return;
29
30 goto try_set_bit;
31}
32
33/*
34 * try flipping a bit using BSET and BCLR and returning the old value
35 */
36int test_and_change_bit(unsigned long nr, volatile void *addr)
37{
38 if (test_bit(nr, addr))
39 goto try_clear_bit;
40
41try_set_bit:
42 if (!test_and_set_bit(nr, addr))
43 return 0;
44
45try_clear_bit:
46 if (test_and_clear_bit(nr, addr))
47 return 1;
48
49 goto try_set_bit;
50}
diff --git a/arch/mn10300/lib/checksum.c b/arch/mn10300/lib/checksum.c
deleted file mode 100644
index 0f569151ef11..000000000000
--- a/arch/mn10300/lib/checksum.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/* MN10300 Optimised checksumming wrappers
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/errno.h>
14#include <asm/byteorder.h>
15#include <linux/uaccess.h>
16#include <asm/checksum.h>
17#include "internal.h"
18
19static inline unsigned short from32to16(__wsum sum)
20{
21 asm(" add %1,%0 \n"
22 " addc 0xffff,%0 \n"
23 : "=r" (sum)
24 : "r" (sum << 16), "0" (sum & 0xffff0000)
25 : "cc"
26 );
27 return sum >> 16;
28}
29
30__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
31{
32 return ~do_csum(iph, ihl * 4);
33}
34EXPORT_SYMBOL(ip_fast_csum);
35
36__wsum csum_partial(const void *buff, int len, __wsum sum)
37{
38 __wsum result;
39
40 result = do_csum(buff, len);
41 result += sum;
42 if (sum > result)
43 result++;
44 return result;
45}
46EXPORT_SYMBOL(csum_partial);
47
48__sum16 ip_compute_csum(const void *buff, int len)
49{
50 return ~from32to16(do_csum(buff, len));
51}
52EXPORT_SYMBOL(ip_compute_csum);
53
54__wsum csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
55{
56 copy_from_user(dst, src, len);
57 return csum_partial(dst, len, sum);
58}
59EXPORT_SYMBOL(csum_partial_copy);
60
61__wsum csum_partial_copy_nocheck(const void *src, void *dst,
62 int len, __wsum sum)
63{
64 sum = csum_partial(src, len, sum);
65 memcpy(dst, src, len);
66 return sum;
67}
68EXPORT_SYMBOL(csum_partial_copy_nocheck);
69
70__wsum csum_partial_copy_from_user(const void *src, void *dst,
71 int len, __wsum sum,
72 int *err_ptr)
73{
74 int missing;
75
76 missing = copy_from_user(dst, src, len);
77 if (missing) {
78 memset(dst + len - missing, 0, missing);
79 *err_ptr = -EFAULT;
80 }
81
82 return csum_partial(dst, len, sum);
83}
84EXPORT_SYMBOL(csum_partial_copy_from_user);
85
86__wsum csum_and_copy_to_user(const void *src, void *dst,
87 int len, __wsum sum,
88 int *err_ptr)
89{
90 int missing;
91
92 missing = copy_to_user(dst, src, len);
93 if (missing) {
94 memset(dst + len - missing, 0, missing);
95 *err_ptr = -EFAULT;
96 }
97
98 return csum_partial(src, len, sum);
99}
100EXPORT_SYMBOL(csum_and_copy_to_user);
diff --git a/arch/mn10300/lib/delay.c b/arch/mn10300/lib/delay.c
deleted file mode 100644
index 8e7ceb8ba33d..000000000000
--- a/arch/mn10300/lib/delay.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/* MN10300 Short delay interpolation routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/delay.h>
14#include <asm/div64.h>
15
16/*
17 * basic delay loop
18 */
19void __delay(unsigned long loops)
20{
21 int d0;
22
23 asm volatile(
24 " bra 1f \n"
25 " .align 4 \n"
26 "1: bra 2f \n"
27 " .align 4 \n"
28 "2: add -1,%0 \n"
29 " bne 2b \n"
30 : "=&d" (d0)
31 : "0" (loops)
32 : "cc");
33}
34EXPORT_SYMBOL(__delay);
35
36/*
37 * handle a delay specified in terms of microseconds
38 */
39void __udelay(unsigned long usecs)
40{
41 unsigned long start, stop, cnt;
42
43 /* usecs * CLK / 1E6 */
44 stop = __muldiv64u(usecs, MN10300_TSCCLK, 1000000);
45 start = TMTSCBC;
46
47 do {
48 cnt = start - TMTSCBC;
49 } while (cnt < stop);
50}
51EXPORT_SYMBOL(__udelay);
diff --git a/arch/mn10300/lib/do_csum.S b/arch/mn10300/lib/do_csum.S
deleted file mode 100644
index 1d27bba0cd8f..000000000000
--- a/arch/mn10300/lib/do_csum.S
+++ /dev/null
@@ -1,157 +0,0 @@
1/* Optimised simple memory checksum
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned int do_csum(const unsigned char *buff, int len)
19#
20###############################################################################
21 .globl do_csum
22 .type do_csum,@function
23do_csum:
24 movm [d2,d3],(sp)
25 mov d1,d2 # count
26 mov d0,a0 # buff
27 mov a0,a1
28 clr d1 # accumulator
29
30 cmp +0,d2
31 ble do_csum_done # check for zero length or negative
32
33 # 4-byte align the buffer pointer
34 btst +3,a0
35 beq do_csum_now_4b_aligned
36
37 btst +1,a0
38 beq do_csum_addr_not_odd
39 movbu (a0),d0
40 inc a0
41 asl +8,d0
42 add d0,d1
43 add -1,d2
44
45do_csum_addr_not_odd:
46 cmp +2,d2
47 bcs do_csum_fewer_than_4
48 btst +2,a0
49 beq do_csum_now_4b_aligned
50 movhu (a0+),d0
51 add d0,d1
52 add -2,d2
53 cmp +4,d2
54 bcs do_csum_fewer_than_4
55
56do_csum_now_4b_aligned:
57 # we want to checksum as much as we can in chunks of 32 bytes
58 cmp +31,d2
59 bls do_csum_remainder # 4-byte aligned remainder
60
61 add -32,d2
62 mov +32,d3
63
64do_csum_loop:
65 mov (a0+),d0
66 mov (a0+),e0
67 mov (a0+),e1
68 mov (a0+),e3
69 add d0,d1
70 addc e0,d1
71 addc e1,d1
72 addc e3,d1
73 mov (a0+),d0
74 mov (a0+),e0
75 mov (a0+),e1
76 mov (a0+),e3
77 addc d0,d1
78 addc e0,d1
79 addc e1,d1
80 addc e3,d1
81 addc +0,d1
82
83 sub d3,d2
84 bcc do_csum_loop
85
86 add d3,d2
87 beq do_csum_done
88
89do_csum_remainder:
90 # cut 16-31 bytes down to 0-15
91 cmp +16,d2
92 bcs do_csum_fewer_than_16
93 mov (a0+),d0
94 mov (a0+),e0
95 mov (a0+),e1
96 mov (a0+),e3
97 add d0,d1
98 addc e0,d1
99 addc e1,d1
100 addc e3,d1
101 addc +0,d1
102 add -16,d2
103 beq do_csum_done
104
105do_csum_fewer_than_16:
106 # copy the remaining whole words
107 cmp +4,d2
108 bcs do_csum_fewer_than_4
109 cmp +8,d2
110 bcs do_csum_one_word
111 cmp +12,d2
112 bcs do_csum_two_words
113 mov (a0+),d0
114 add d0,d1
115 addc +0,d1
116do_csum_two_words:
117 mov (a0+),d0
118 add d0,d1
119 addc +0,d1
120do_csum_one_word:
121 mov (a0+),d0
122 add d0,d1
123 addc +0,d1
124
125do_csum_fewer_than_4:
126 and +3,d2
127 beq do_csum_done
128 xor_cmp d0,d0,+2,d2
129 bcs do_csum_fewer_than_2
130 movhu (a0+),d0
131 and +1,d2
132 beq do_csum_add_last_bit
133do_csum_fewer_than_2:
134 movbu (a0),d3
135 add d3,d0
136do_csum_add_last_bit:
137 add d0,d1
138 addc +0,d1
139
140do_csum_done:
141 # compress the checksum down to 16 bits
142 mov +0xffff0000,d0
143 and d1,d0
144 asl +16,d1
145 add d1,d0
146 addc +0xffff,d0
147 lsr +16,d0
148
149 # flip the halves of the word result if the buffer was oddly aligned
150 and +1,a1
151 beq do_csum_not_oddly_aligned
152 swaph d0,d0 # exchange bits 15:8 with 7:0
153
154do_csum_not_oddly_aligned:
155 ret [d2,d3],8
156
157 .size do_csum, .-do_csum
diff --git a/arch/mn10300/lib/internal.h b/arch/mn10300/lib/internal.h
deleted file mode 100644
index 0014eee5f04f..000000000000
--- a/arch/mn10300/lib/internal.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/* Internal definitions for the arch part of the kernel library
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * do_csum.S
14 */
15extern unsigned int do_csum(const unsigned char *, size_t);
diff --git a/arch/mn10300/lib/lshrdi3.c b/arch/mn10300/lib/lshrdi3.c
deleted file mode 100644
index e05e64e9ce96..000000000000
--- a/arch/mn10300/lib/lshrdi3.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public Licence as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public Licence for more details.
15
16You should have received a copy of the GNU General Public Licence
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__((mode(SI)));
24typedef unsigned int USItype __attribute__((mode(SI)));
25typedef int DItype __attribute__((mode(DI)));
26typedef int word_type __attribute__((mode(__word__)));
27
28struct DIstruct {
29 SItype low;
30 SItype high;
31};
32
33union DIunion {
34 struct DIstruct s;
35 DItype ll;
36};
37
38DItype __lshrdi3(DItype u, word_type b)
39{
40 union DIunion w;
41 word_type bm;
42 union DIunion uu;
43
44 if (b == 0)
45 return u;
46
47 uu.ll = u;
48
49 bm = (sizeof(SItype) * BITS_PER_UNIT) - b;
50 if (bm <= 0) {
51 w.s.high = 0;
52 w.s.low = (USItype) uu.s.high >> -bm;
53 } else {
54 USItype carries = (USItype) uu.s.high << bm;
55 w.s.high = (USItype) uu.s.high >> b;
56 w.s.low = ((USItype) uu.s.low >> b) | carries;
57 }
58
59 return w.ll;
60}
diff --git a/arch/mn10300/lib/memcpy.S b/arch/mn10300/lib/memcpy.S
deleted file mode 100644
index 25fb9bb2604f..000000000000
--- a/arch/mn10300/lib/memcpy.S
+++ /dev/null
@@ -1,135 +0,0 @@
1/* MN10300 Optimised simple memory to memory copy
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# void *memcpy(void *dst, const void *src, size_t n)
19#
20###############################################################################
21 .globl memcpy
22 .type memcpy,@function
23memcpy:
24 movm [d2,d3],(sp)
25 mov d0,(12,sp)
26 mov d1,(16,sp)
27 mov (20,sp),d2 # count
28 mov d0,a0 # dst
29 mov d1,a1 # src
30 mov d0,e3 # the return value
31
32 cmp +0,d2
33 beq memcpy_done # return if zero-length copy
34
35 # see if the three parameters are all four-byte aligned
36 or d0,d1,d3
37 or d2,d3
38 and +3,d3
39 bne memcpy_1 # jump if not
40
41 # we want to transfer as much as we can in chunks of 32 bytes
42 cmp +31,d2
43 bls memcpy_4_remainder # 4-byte aligned remainder
44
45 movm [exreg1],(sp)
46 add -32,d2
47 mov +32,d3
48
49memcpy_4_loop:
50 mov (a1+),d0
51 mov (a1+),d1
52 mov (a1+),e0
53 mov (a1+),e1
54 mov (a1+),e4
55 mov (a1+),e5
56 mov (a1+),e6
57 mov (a1+),e7
58 mov d0,(a0+)
59 mov d1,(a0+)
60 mov e0,(a0+)
61 mov e1,(a0+)
62 mov e4,(a0+)
63 mov e5,(a0+)
64 mov e6,(a0+)
65 mov e7,(a0+)
66
67 sub d3,d2
68 bcc memcpy_4_loop
69
70 movm (sp),[exreg1]
71 add d3,d2
72 beq memcpy_4_no_remainder
73
74memcpy_4_remainder:
75 # cut 4-7 words down to 0-3
76 cmp +16,d2
77 bcs memcpy_4_three_or_fewer_words
78 mov (a1+),d0
79 mov (a1+),d1
80 mov (a1+),e0
81 mov (a1+),e1
82 mov d0,(a0+)
83 mov d1,(a0+)
84 mov e0,(a0+)
85 mov e1,(a0+)
86 add -16,d2
87 beq memcpy_4_no_remainder
88
89 # copy the remaining 1, 2 or 3 words
90memcpy_4_three_or_fewer_words:
91 cmp +8,d2
92 bcs memcpy_4_one_word
93 beq memcpy_4_two_words
94 mov (a1+),d0
95 mov d0,(a0+)
96memcpy_4_two_words:
97 mov (a1+),d0
98 mov d0,(a0+)
99memcpy_4_one_word:
100 mov (a1+),d0
101 mov d0,(a0+)
102
103memcpy_4_no_remainder:
104 # check we copied the correct amount
105 # TODO: REMOVE CHECK
106 sub e3,a0,d2
107 mov (20,sp),d1
108 cmp d2,d1
109 beq memcpy_done
110 break
111 break
112 break
113
114memcpy_done:
115 mov e3,a0
116 ret [d2,d3],8
117
118 # handle misaligned copying
119memcpy_1:
120 add -1,d2
121 mov +1,d3
122 setlb # setlb requires the next insns
123 # to occupy exactly 4 bytes
124
125 sub d3,d2
126 movbu (a1),d0
127 movbu d0,(a0)
128 add_add d3,a1,d3,a0
129 lcc
130
131 mov e3,a0
132 ret [d2,d3],8
133
134memcpy_end:
135 .size memcpy, memcpy_end-memcpy
diff --git a/arch/mn10300/lib/memmove.S b/arch/mn10300/lib/memmove.S
deleted file mode 100644
index 20b07b62b77c..000000000000
--- a/arch/mn10300/lib/memmove.S
+++ /dev/null
@@ -1,160 +0,0 @@
1/* MN10300 Optimised simple memory to memory copy, with support for overlapping
2 * regions
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <asm/cache.h>
13
14 .section .text
15 .balign L1_CACHE_BYTES
16
17###############################################################################
18#
19# void *memmove(void *dst, const void *src, size_t n)
20#
21###############################################################################
22 .globl memmove
23 .type memmove,@function
24memmove:
25 # fall back to memcpy if dst < src to work bottom up
26 cmp d1,d0
27 bcs memmove_memcpy
28
29 # work top down
30 movm [d2,d3],(sp)
31 mov d0,(12,sp)
32 mov d1,(16,sp)
33 mov (20,sp),d2 # count
34 add d0,d2,a0 # dst end
35 add d1,d2,a1 # src end
36 mov d0,e3 # the return value
37
38 cmp +0,d2
39 beq memmove_done # return if zero-length copy
40
41 # see if the three parameters are all four-byte aligned
42 or d0,d1,d3
43 or d2,d3
44 and +3,d3
45 bne memmove_1 # jump if not
46
47 # we want to transfer as much as we can in chunks of 32 bytes
48 add -4,a1
49 cmp +31,d2
50 bls memmove_4_remainder # 4-byte aligned remainder
51
52 add -32,d2
53 mov +32,d3
54
55memmove_4_loop:
56 mov (a1),d0
57 sub_sub +4,a1,+4,a0
58 mov d0,(a0)
59 mov (a1),d1
60 sub_sub +4,a1,+4,a0
61 mov d1,(a0)
62
63 mov (a1),d0
64 sub_sub +4,a1,+4,a0
65 mov d0,(a0)
66 mov (a1),d1
67 sub_sub +4,a1,+4,a0
68 mov d1,(a0)
69
70 mov (a1),d0
71 sub_sub +4,a1,+4,a0
72 mov d0,(a0)
73 mov (a1),d1
74 sub_sub +4,a1,+4,a0
75 mov d1,(a0)
76
77 mov (a1),d0
78 sub_sub +4,a1,+4,a0
79 mov d0,(a0)
80 mov (a1),d1
81 sub_sub +4,a1,+4,a0
82 mov d1,(a0)
83
84 sub d3,d2
85 bcc memmove_4_loop
86
87 add d3,d2
88 beq memmove_4_no_remainder
89
90memmove_4_remainder:
91 # cut 4-7 words down to 0-3
92 cmp +16,d2
93 bcs memmove_4_three_or_fewer_words
94 mov (a1),d0
95 sub_sub +4,a1,+4,a0
96 mov d0,(a0)
97 mov (a1),d1
98 sub_sub +4,a1,+4,a0
99 mov d1,(a0)
100 mov (a1),e0
101 sub_sub +4,a1,+4,a0
102 mov e0,(a0)
103 mov (a1),e1
104 sub_sub +4,a1,+4,a0
105 mov e1,(a0)
106 add -16,d2
107 beq memmove_4_no_remainder
108
109 # copy the remaining 1, 2 or 3 words
110memmove_4_three_or_fewer_words:
111 cmp +8,d2
112 bcs memmove_4_one_word
113 beq memmove_4_two_words
114 mov (a1),d0
115 sub_sub +4,a1,+4,a0
116 mov d0,(a0)
117memmove_4_two_words:
118 mov (a1),d0
119 sub_sub +4,a1,+4,a0
120 mov d0,(a0)
121memmove_4_one_word:
122 mov (a1),d0
123 sub_sub +4,a1,+4,a0
124 mov d0,(a0)
125
126memmove_4_no_remainder:
127 # check we copied the correct amount
128 # TODO: REMOVE CHECK
129 sub e3,a0,d2
130 beq memmove_done
131 break
132 break
133 break
134
135memmove_done:
136 mov e3,a0
137 ret [d2,d3],8
138
139 # handle misaligned copying
140memmove_1:
141 add -1,a1
142 add -1,d2
143 mov +1,d3
144 setlb # setlb requires the next insns
145 # to occupy exactly 4 bytes
146
147 sub d3,d2
148 movbu (a1),d0
149 sub_sub d3,a1,d3,a0
150 movbu d0,(a0)
151 lcc
152
153 mov e3,a0
154 ret [d2,d3],8
155
156memmove_memcpy:
157 jmp memcpy
158
159memmove_end:
160 .size memmove, memmove_end-memmove
diff --git a/arch/mn10300/lib/memset.S b/arch/mn10300/lib/memset.S
deleted file mode 100644
index bc02e39629b7..000000000000
--- a/arch/mn10300/lib/memset.S
+++ /dev/null
@@ -1,121 +0,0 @@
1/* Optimised simple memory fill
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# void *memset(void *dst, int c, size_t n)
19#
20###############################################################################
21 .globl memset
22 .type memset,@function
23memset:
24 movm [d2,d3],(sp)
25 mov d0,(12,sp)
26 mov d1,(16,sp)
27 mov (20,sp),d2 # count
28 mov d0,a0 # dst
29 mov d0,e3 # the return value
30
31 cmp +0,d2
32 beq memset_done # return if zero-length fill
33
34 # see if the region parameters are four-byte aligned
35 or d0,d2,d3
36 and +3,d3
37 bne memset_1 # jump if not
38
39 extbu d1
40 mov_asl d1,d3,8,d1
41 or_asl d1,d3,8,d1
42 or_asl d1,d3,8,d1
43 or d3,d1
44
45 # we want to transfer as much as we can in chunks of 32 bytes
46 cmp +31,d2
47 bls memset_4_remainder # 4-byte aligned remainder
48
49 add -32,d2
50 mov +32,d3
51
52memset_4_loop:
53 mov d1,(a0+)
54 mov d1,(a0+)
55 mov d1,(a0+)
56 mov d1,(a0+)
57 mov d1,(a0+)
58 mov d1,(a0+)
59 mov d1,(a0+)
60 mov d1,(a0+)
61
62 sub d3,d2
63 bcc memset_4_loop
64
65 add d3,d2
66 beq memset_4_no_remainder
67
68memset_4_remainder:
69 # cut 4-7 words down to 0-3
70 cmp +16,d2
71 bcs memset_4_three_or_fewer_words
72 mov d1,(a0+)
73 mov d1,(a0+)
74 mov d1,(a0+)
75 mov d1,(a0+)
76 add -16,d2
77 beq memset_4_no_remainder
78
79 # copy the remaining 1, 2 or 3 words
80memset_4_three_or_fewer_words:
81 cmp +8,d2
82 bcs memset_4_one_word
83 beq memset_4_two_words
84 mov d1,(a0+)
85memset_4_two_words:
86 mov d1,(a0+)
87memset_4_one_word:
88 mov d1,(a0+)
89
90memset_4_no_remainder:
91 # check we set the correct amount
92 # TODO: REMOVE CHECK
93 sub e3,a0,d2
94 mov (20,sp),d1
95 cmp d2,d1
96 beq memset_done
97 break
98 break
99 break
100
101memset_done:
102 mov e3,a0
103 ret [d2,d3],8
104
105 # handle misaligned copying
106memset_1:
107 add -1,d2
108 mov +1,d3
109 setlb # setlb requires the next insns
110 # to occupy exactly 4 bytes
111
112 sub d3,d2
113 movbu d1,(a0)
114 inc a0
115 lcc
116
117 mov e3,a0
118 ret [d2,d3],8
119
120memset_end:
121 .size memset, memset_end-memset
diff --git a/arch/mn10300/lib/negdi2.c b/arch/mn10300/lib/negdi2.c
deleted file mode 100644
index eae4ecdd5f69..000000000000
--- a/arch/mn10300/lib/negdi2.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/* More subroutines needed by GCC output code on some machines. */
2/* Compile this one with gcc. */
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2000, 2001 Free Software Foundation, Inc.
5
6This file is part of GNU CC.
7
8GNU CC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public Licence as published by
10the Free Software Foundation; either version 2, or (at your option)
11any later version.
12
13In addition to the permissions in the GNU General Public Licence, the
14Free Software Foundation gives you unlimited permission to link the
15compiled version of this file into combinations with other programs,
16and to distribute those combinations without any restriction coming
17from the use of this file. (The General Public Licence restrictions
18do apply in other respects; for example, they cover modification of
19the file, and distribution when not linked into a combine
20executable.)
21
22GNU CC is distributed in the hope that it will be useful,
23but WITHOUT ANY WARRANTY; without even the implied warranty of
24MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25GNU General Public Licence for more details.
26
27You should have received a copy of the GNU General Public Licence
28along with GNU CC; see the file COPYING. If not, write to
29the Free Software Foundation, 59 Temple Place - Suite 330,
30Boston, MA 02111-1307, USA. */
31
32/* It is incorrect to include config.h here, because this file is being
33 compiled for the target, and hence definitions concerning only the host
34 do not apply. */
35
36#include <linux/types.h>
37
38union DWunion {
39 s64 ll;
40 struct {
41 s32 low;
42 s32 high;
43 } s;
44};
45
46s64 __negdi2(s64 u)
47{
48 union DWunion w;
49 union DWunion uu;
50
51 uu.ll = u;
52
53 w.s.low = -uu.s.low;
54 w.s.high = -uu.s.high - ((u32) w.s.low > 0);
55
56 return w.ll;
57}
diff --git a/arch/mn10300/lib/usercopy.c b/arch/mn10300/lib/usercopy.c
deleted file mode 100644
index 39626912de98..000000000000
--- a/arch/mn10300/lib/usercopy.c
+++ /dev/null
@@ -1,142 +0,0 @@
1/* MN10300 Userspace accessor functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/uaccess.h>
13
14/*
15 * Copy a null terminated string from userspace.
16 */
17#define __do_strncpy_from_user(dst, src, count, res) \
18do { \
19 int w; \
20 asm volatile( \
21 " mov %1,%0\n" \
22 " cmp 0,%1\n" \
23 " beq 2f\n" \
24 "0:\n" \
25 " movbu (%5),%2\n" \
26 "1:\n" \
27 " movbu %2,(%6)\n" \
28 " inc %5\n" \
29 " inc %6\n" \
30 " cmp 0,%2\n" \
31 " beq 2f\n" \
32 " add -1,%1\n" \
33 " bne 0b\n" \
34 "2:\n" \
35 " sub %1,%0\n" \
36 "3:\n" \
37 " .section .fixup,\"ax\"\n" \
38 "4:\n" \
39 " mov %3,%0\n" \
40 " jmp 3b\n" \
41 " .previous\n" \
42 " .section __ex_table,\"a\"\n" \
43 " .balign 4\n" \
44 " .long 0b,4b\n" \
45 " .long 1b,4b\n" \
46 " .previous" \
47 :"=&r"(res), "=r"(count), "=&r"(w) \
48 :"i"(-EFAULT), "1"(count), "a"(src), "a"(dst) \
49 : "memory", "cc"); \
50} while (0)
51
52long
53strncpy_from_user(char *dst, const char *src, long count)
54{
55 long res = -EFAULT;
56 if (access_ok(VERIFY_READ, src, 1))
57 __do_strncpy_from_user(dst, src, count, res);
58 return res;
59}
60
61
62/*
63 * Clear a userspace memory
64 */
65#define __do_clear_user(addr, size) \
66do { \
67 int w; \
68 asm volatile( \
69 " cmp 0,%0\n" \
70 " beq 1f\n" \
71 " clr %1\n" \
72 "0: movbu %1,(%3,%2)\n" \
73 " inc %3\n" \
74 " cmp %0,%3\n" \
75 " bne 0b\n" \
76 "1:\n" \
77 " sub %3,%0\n" \
78 "2:\n" \
79 ".section .fixup,\"ax\"\n" \
80 "3: jmp 2b\n" \
81 ".previous\n" \
82 ".section __ex_table,\"a\"\n" \
83 " .balign 4\n" \
84 " .long 0b,3b\n" \
85 ".previous\n" \
86 : "+r"(size), "=&r"(w) \
87 : "a"(addr), "d"(0) \
88 : "memory", "cc"); \
89} while (0)
90
91unsigned long
92__clear_user(void *to, unsigned long n)
93{
94 __do_clear_user(to, n);
95 return n;
96}
97
98unsigned long
99clear_user(void *to, unsigned long n)
100{
101 if (access_ok(VERIFY_WRITE, to, n))
102 __do_clear_user(to, n);
103 return n;
104}
105
106/*
107 * Return the size of a string (including the ending 0)
108 *
109 * Return 0 on exception, a value greater than N if too long
110 */
111long strnlen_user(const char *s, long n)
112{
113 unsigned long res, w;
114
115 if (!__addr_ok(s))
116 return 0;
117
118 if (n < 0 || n + (u_long) s > current_thread_info()->addr_limit.seg)
119 n = current_thread_info()->addr_limit.seg - (u_long)s;
120
121 asm volatile(
122 "0: cmp %4,%0\n"
123 " beq 2f\n"
124 "1: movbu (%0,%3),%1\n"
125 " inc %0\n"
126 " cmp 0,%1\n"
127 " beq 3f\n"
128 " bra 0b\n"
129 "2: clr %0\n"
130 "3:\n"
131 ".section .fixup,\"ax\"\n"
132 "4: jmp 2b\n"
133 ".previous\n"
134 ".section __ex_table,\"a\"\n"
135 " .balign 4\n"
136 " .long 1b,4b\n"
137 ".previous\n"
138 :"=d"(res), "=&r"(w)
139 :"0"(0), "a"(s), "r"(n)
140 : "memory", "cc");
141 return res;
142}
diff --git a/arch/mn10300/mm/Kconfig.cache b/arch/mn10300/mm/Kconfig.cache
deleted file mode 100644
index 8cc5d9ec3b6c..000000000000
--- a/arch/mn10300/mm/Kconfig.cache
+++ /dev/null
@@ -1,148 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2#
3# MN10300 CPU cache options
4#
5
6choice
7 prompt "CPU Caching mode"
8 default MN10300_CACHE_WBACK
9 help
10 This option determines the caching mode for the kernel.
11
12 Write-Back caching mode involves the all reads and writes causing
13 the affected cacheline to be read into the cache first before being
14 operated upon. Memory is not then updated by a write until the cache
15 is filled and a cacheline needs to be displaced from the cache to
16 make room. Only at that point is it written back.
17
18 Write-Through caching only fetches cachelines from memory on a
19 read. Writes always get written directly to memory. If the affected
20 cacheline is also in cache, it will be updated too.
21
22 The final option is to turn of caching entirely.
23
24config MN10300_CACHE_WBACK
25 bool "Write-Back"
26 help
27 The dcache operates in delayed write-back mode. It must be manually
28 flushed if writes are made that subsequently need to be executed or
29 to be DMA'd by a device.
30
31config MN10300_CACHE_WTHRU
32 bool "Write-Through"
33 help
34 The dcache operates in immediate write-through mode. Writes are
35 committed to RAM immediately in addition to being stored in the
36 cache. This means that the written data is immediately available for
37 execution or DMA.
38
39 This is not available for use with an SMP kernel if cache flushing
40 and invalidation by automatic purge register is not selected.
41
42config MN10300_CACHE_DISABLED
43 bool "Disabled"
44 help
45 The icache and dcache are disabled.
46
47endchoice
48
49config MN10300_CACHE_ENABLED
50 def_bool y if !MN10300_CACHE_DISABLED
51
52
53choice
54 prompt "CPU cache flush/invalidate method"
55 default MN10300_CACHE_MANAGE_BY_TAG if !AM34_2
56 default MN10300_CACHE_MANAGE_BY_REG if AM34_2
57 depends on MN10300_CACHE_ENABLED
58 help
59 This determines the method by which CPU cache flushing and
60 invalidation is performed.
61
62config MN10300_CACHE_MANAGE_BY_TAG
63 bool "Use the cache tag registers directly"
64 depends on !(SMP && MN10300_CACHE_WTHRU)
65
66config MN10300_CACHE_MANAGE_BY_REG
67 bool "Flush areas by way of automatic purge registers (AM34 only)"
68 depends on AM34_2
69
70endchoice
71
72config MN10300_CACHE_INV_BY_TAG
73 def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_ENABLED
74
75config MN10300_CACHE_INV_BY_REG
76 def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_ENABLED
77
78config MN10300_CACHE_FLUSH_BY_TAG
79 def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_WBACK
80
81config MN10300_CACHE_FLUSH_BY_REG
82 def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_WBACK
83
84
85config MN10300_HAS_CACHE_SNOOP
86 def_bool n
87
88config MN10300_CACHE_SNOOP
89 bool "Use CPU Cache Snooping"
90 depends on MN10300_CACHE_ENABLED && MN10300_HAS_CACHE_SNOOP
91 default y
92
93config MN10300_CACHE_FLUSH_ICACHE
94 def_bool y if MN10300_CACHE_WBACK && !MN10300_CACHE_SNOOP
95 help
96 Set if we need the dcache flushing before the icache is invalidated.
97
98config MN10300_CACHE_INV_ICACHE
99 def_bool y if MN10300_CACHE_WTHRU && !MN10300_CACHE_SNOOP
100 help
101 Set if we need the icache to be invalidated, even if the dcache is in
102 write-through mode and doesn't need flushing.
103
104#
105# The kernel debugger gets its own separate cache flushing functions
106#
107config MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG
108 def_bool y if KERNEL_DEBUGGER && \
109 MN10300_CACHE_WBACK && \
110 !MN10300_CACHE_SNOOP && \
111 MN10300_CACHE_MANAGE_BY_TAG
112 help
113 Set if the debugger needs to flush the dcache and invalidate the
114 icache using the cache tag registers to make breakpoints work.
115
116config MN10300_DEBUGGER_CACHE_FLUSH_BY_REG
117 def_bool y if KERNEL_DEBUGGER && \
118 MN10300_CACHE_WBACK && \
119 !MN10300_CACHE_SNOOP && \
120 MN10300_CACHE_MANAGE_BY_REG
121 help
122 Set if the debugger needs to flush the dcache and invalidate the
123 icache using automatic purge registers to make breakpoints work.
124
125config MN10300_DEBUGGER_CACHE_INV_BY_TAG
126 def_bool y if KERNEL_DEBUGGER && \
127 MN10300_CACHE_WTHRU && \
128 !MN10300_CACHE_SNOOP && \
129 MN10300_CACHE_MANAGE_BY_TAG
130 help
131 Set if the debugger needs to invalidate the icache using the cache
132 tag registers to make breakpoints work.
133
134config MN10300_DEBUGGER_CACHE_INV_BY_REG
135 def_bool y if KERNEL_DEBUGGER && \
136 MN10300_CACHE_WTHRU && \
137 !MN10300_CACHE_SNOOP && \
138 MN10300_CACHE_MANAGE_BY_REG
139 help
140 Set if the debugger needs to invalidate the icache using automatic
141 purge registers to make breakpoints work.
142
143config MN10300_DEBUGGER_CACHE_NO_FLUSH
144 def_bool y if KERNEL_DEBUGGER && \
145 (MN10300_CACHE_DISABLED || MN10300_CACHE_SNOOP)
146 help
147 Set if the debugger does not need to flush the dcache and/or
148 invalidate the icache to make breakpoints work.
diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile
deleted file mode 100644
index 048ba6f67f9a..000000000000
--- a/arch/mn10300/mm/Makefile
+++ /dev/null
@@ -1,32 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the MN10300-specific memory management code
4#
5
6cache-smp-wback-$(CONFIG_MN10300_CACHE_WBACK) := cache-smp-flush.o
7
8cacheflush-y := cache.o
9cacheflush-$(CONFIG_SMP) += cache-smp.o cache-smp-inv.o $(cache-smp-wback-y)
10cacheflush-$(CONFIG_MN10300_CACHE_INV_ICACHE) += cache-inv-icache.o
11cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_ICACHE) += cache-flush-icache.o
12cacheflush-$(CONFIG_MN10300_CACHE_INV_BY_TAG) += cache-inv-by-tag.o
13cacheflush-$(CONFIG_MN10300_CACHE_INV_BY_REG) += cache-inv-by-reg.o
14cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_TAG) += cache-flush-by-tag.o
15cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_REG) += cache-flush-by-reg.o
16
17cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG) += \
18 cache-dbg-flush-by-tag.o cache-dbg-inv-by-tag.o
19cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_REG) += \
20 cache-dbg-flush-by-reg.o
21cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG) += \
22 cache-dbg-inv-by-tag.o cache-dbg-inv.o
23cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_REG) += \
24 cache-dbg-inv-by-reg.o cache-dbg-inv.o
25
26cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o
27
28obj-y := \
29 init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \
30 misalignment.o dma-alloc.o $(cacheflush-y)
31
32obj-$(CONFIG_SMP) += tlb-smp.o
diff --git a/arch/mn10300/mm/cache-dbg-flush-by-reg.S b/arch/mn10300/mm/cache-dbg-flush-by-reg.S
deleted file mode 100644
index a775ea5d7cee..000000000000
--- a/arch/mn10300/mm/cache-dbg-flush-by-reg.S
+++ /dev/null
@@ -1,160 +0,0 @@
1/* MN10300 CPU cache invalidation routines, using automatic purge registers
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv(void)
25# Flush the entire data cache back to RAM and invalidate the icache
26#
27###############################################################################
28 ALIGN
29 .globl debugger_local_cache_flushinv
30 .type debugger_local_cache_flushinv,@function
31debugger_local_cache_flushinv:
32 #
33 # firstly flush the dcache
34 #
35 movhu (CHCTR),d0
36 btst CHCTR_DCEN|CHCTR_ICEN,d0
37 beq debugger_local_cache_flushinv_end
38
39 mov DCPGCR,a0
40
41 mov epsw,d1
42 and ~EPSW_IE,epsw
43 or EPSW_NMID,epsw
44 nop
45
46 btst CHCTR_DCEN,d0
47 beq debugger_local_cache_flushinv_no_dcache
48
49 # wait for busy bit of area purge
50 setlb
51 mov (a0),d0
52 btst DCPGCR_DCPGBSY,d0
53 lne
54
55 # set mask
56 clr d0
57 mov d0,(DCPGMR)
58
59 # area purge
60 #
61 # DCPGCR = DCPGCR_DCP
62 #
63 mov DCPGCR_DCP,d0
64 mov d0,(a0)
65
66 # wait for busy bit of area purge
67 setlb
68 mov (a0),d0
69 btst DCPGCR_DCPGBSY,d0
70 lne
71
72debugger_local_cache_flushinv_no_dcache:
73 #
74 # secondly, invalidate the icache if it is enabled
75 #
76 mov CHCTR,a0
77 movhu (a0),d0
78 btst CHCTR_ICEN,d0
79 beq debugger_local_cache_flushinv_done
80
81 invalidate_icache 0
82
83debugger_local_cache_flushinv_done:
84 mov d1,epsw
85
86debugger_local_cache_flushinv_end:
87 ret [],0
88 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
89
90###############################################################################
91#
92# void debugger_local_cache_flushinv_one(u8 *addr)
93#
94# Invalidate one particular cacheline if it's in the icache
95#
96###############################################################################
97 ALIGN
98 .globl debugger_local_cache_flushinv_one
99 .type debugger_local_cache_flushinv_one,@function
100debugger_local_cache_flushinv_one:
101 movhu (CHCTR),d1
102 btst CHCTR_DCEN|CHCTR_ICEN,d1
103 beq debugger_local_cache_flushinv_one_end
104 btst CHCTR_DCEN,d1
105 beq debugger_local_cache_flushinv_one_no_dcache
106
107 # round cacheline addr down
108 and L1_CACHE_TAG_MASK,d0
109 mov d0,a1
110 mov d0,d1
111
112 # determine the dcache purge control reg address
113 mov DCACHE_PURGE(0,0),a0
114 and L1_CACHE_TAG_ENTRY,d0
115 add d0,a0
116
117 # retain valid entries in the cache
118 or L1_CACHE_TAG_VALID,d1
119
120 # conditionally purge this line in all ways
121 mov d1,(L1_CACHE_WAYDISP*0,a0)
122
123debugger_local_cache_flushinv_one_no_dcache:
124 #
125 # now try to flush the icache
126 #
127 mov CHCTR,a0
128 movhu (a0),d0
129 btst CHCTR_ICEN,d0
130 beq debugger_local_cache_flushinv_one_end
131
132 LOCAL_CLI_SAVE(d1)
133
134 mov ICIVCR,a0
135
136 # wait for the invalidator to quiesce
137 setlb
138 mov (a0),d0
139 btst ICIVCR_ICIVBSY,d0
140 lne
141
142 # set the mask
143 mov L1_CACHE_TAG_MASK,d0
144 mov d0,(ICIVMR)
145
146 # invalidate the cache line at the given address
147 or ICIVCR_ICI,a1
148 mov a1,(a0)
149
150 # wait for the invalidator to quiesce again
151 setlb
152 mov (a0),d0
153 btst ICIVCR_ICIVBSY,d0
154 lne
155
156 LOCAL_IRQ_RESTORE(d1)
157
158debugger_local_cache_flushinv_one_end:
159 ret [],0
160 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-flush-by-tag.S b/arch/mn10300/mm/cache-dbg-flush-by-tag.S
deleted file mode 100644
index bf56930e6e70..000000000000
--- a/arch/mn10300/mm/cache-dbg-flush-by-tag.S
+++ /dev/null
@@ -1,114 +0,0 @@
1/* MN10300 CPU cache invalidation routines, using direct tag flushing
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv(void)
25#
26# Flush the entire data cache back to RAM and invalidate the icache
27#
28###############################################################################
29 ALIGN
30 .globl debugger_local_cache_flushinv
31 .type debugger_local_cache_flushinv,@function
32debugger_local_cache_flushinv:
33 #
34 # firstly flush the dcache
35 #
36 movhu (CHCTR),d0
37 btst CHCTR_DCEN|CHCTR_ICEN,d0
38 beq debugger_local_cache_flushinv_end
39
40 btst CHCTR_DCEN,d0
41 beq debugger_local_cache_flushinv_no_dcache
42
43 # read the addresses tagged in the cache's tag RAM and attempt to flush
44 # those addresses specifically
45 # - we rely on the hardware to filter out invalid tag entry addresses
46 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
47 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
48 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,e0 # total number of entries
49
50mn10300_local_dcache_flush_loop:
51 mov (a0),d0
52 and L1_CACHE_TAG_MASK,d0
53 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
54 # cache
55 mov d0,(a1) # conditional purge
56
57 add L1_CACHE_BYTES,a0
58 add L1_CACHE_BYTES,a1
59 add -1,e0
60 bne mn10300_local_dcache_flush_loop
61
62debugger_local_cache_flushinv_no_dcache:
63 #
64 # secondly, invalidate the icache if it is enabled
65 #
66 mov CHCTR,a0
67 movhu (a0),d0
68 btst CHCTR_ICEN,d0
69 beq debugger_local_cache_flushinv_end
70
71 invalidate_icache 1
72
73debugger_local_cache_flushinv_end:
74 ret [],0
75 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
76
77###############################################################################
78#
79# void debugger_local_cache_flushinv_one(u8 *addr)
80#
81# Invalidate one particular cacheline if it's in the icache
82#
83###############################################################################
84 ALIGN
85 .globl debugger_local_cache_flushinv_one
86 .type debugger_local_cache_flushinv_one,@function
87debugger_local_cache_flushinv_one:
88 movhu (CHCTR),d1
89 btst CHCTR_DCEN|CHCTR_ICEN,d1
90 beq debugger_local_cache_flushinv_one_end
91 btst CHCTR_DCEN,d1
92 beq debugger_local_cache_flushinv_one_icache
93
94 # round cacheline addr down
95 and L1_CACHE_TAG_MASK,d0
96 mov d0,a1
97
98 # determine the dcache purge control reg address
99 mov DCACHE_PURGE(0,0),a0
100 and L1_CACHE_TAG_ENTRY,d0
101 add d0,a0
102
103 # retain valid entries in the cache
104 or L1_CACHE_TAG_VALID,a1
105
106 # conditionally purge this line in all ways
107 mov a1,(L1_CACHE_WAYDISP*0,a0)
108
109 # now go and do the icache
110 bra debugger_local_cache_flushinv_one_icache
111
112debugger_local_cache_flushinv_one_end:
113 ret [],0
114 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-inv-by-reg.S b/arch/mn10300/mm/cache-dbg-inv-by-reg.S
deleted file mode 100644
index c4e6252941b1..000000000000
--- a/arch/mn10300/mm/cache-dbg-inv-by-reg.S
+++ /dev/null
@@ -1,69 +0,0 @@
1/* MN10300 CPU cache invalidation routines, using automatic purge registers
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/cache.h>
14#include <asm/irqflags.h>
15#include <asm/cacheflush.h>
16#include "cache.inc"
17
18 .am33_2
19
20 .globl debugger_local_cache_flushinv_one
21
22###############################################################################
23#
24# void debugger_local_cache_flushinv_one(u8 *addr)
25#
26# Invalidate one particular cacheline if it's in the icache
27#
28###############################################################################
29 ALIGN
30 .globl debugger_local_cache_flushinv_one
31 .type debugger_local_cache_flushinv_one,@function
32debugger_local_cache_flushinv_one:
33 mov d0,a1
34
35 mov CHCTR,a0
36 movhu (a0),d0
37 btst CHCTR_ICEN,d0
38 beq mn10300_local_icache_inv_range_reg_end
39
40 LOCAL_CLI_SAVE(d1)
41
42 mov ICIVCR,a0
43
44 # wait for the invalidator to quiesce
45 setlb
46 mov (a0),d0
47 btst ICIVCR_ICIVBSY,d0
48 lne
49
50 # set the mask
51 mov ~L1_CACHE_TAG_MASK,d0
52 mov d0,(ICIVMR)
53
54 # invalidate the cache line at the given address
55 and ~L1_CACHE_TAG_MASK,a1
56 or ICIVCR_ICI,a1
57 mov a1,(a0)
58
59 # wait for the invalidator to quiesce again
60 setlb
61 mov (a0),d0
62 btst ICIVCR_ICIVBSY,d0
63 lne
64
65 LOCAL_IRQ_RESTORE(d1)
66
67mn10300_local_icache_inv_range_reg_end:
68 ret [],0
69 .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
diff --git a/arch/mn10300/mm/cache-dbg-inv-by-tag.S b/arch/mn10300/mm/cache-dbg-inv-by-tag.S
deleted file mode 100644
index d8ec821e5f88..000000000000
--- a/arch/mn10300/mm/cache-dbg-inv-by-tag.S
+++ /dev/null
@@ -1,120 +0,0 @@
1/* MN10300 CPU cache invalidation routines, using direct tag flushing
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22 .globl debugger_local_cache_flushinv_one_icache
23
24###############################################################################
25#
26# void debugger_local_cache_flushinv_one(u8 *addr)
27#
28# Invalidate one particular cacheline if it's in the icache
29#
30###############################################################################
31 ALIGN
32 .globl debugger_local_cache_flushinv_one_icache
33 .type debugger_local_cache_flushinv_one_icache,@function
34debugger_local_cache_flushinv_one_icache:
35 movm [d3,a2],(sp)
36
37 mov CHCTR,a2
38 movhu (a2),d0
39 btst CHCTR_ICEN,d0
40 beq debugger_local_cache_flushinv_one_icache_end
41
42 mov d0,a1
43 and L1_CACHE_TAG_MASK,a1
44
45 # read the tags from the tag RAM, and if they indicate a matching valid
46 # cache line then we invalidate that line
47 mov ICACHE_TAG(0,0),a0
48 mov a1,d0
49 and L1_CACHE_TAG_ENTRY,d0
50 add d0,a0 # starting icache tag RAM
51 # access address
52
53 and ~(L1_CACHE_DISPARITY-1),a1 # determine comparator base
54 or L1_CACHE_TAG_VALID,a1
55 mov L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_VALID,d1
56
57 LOCAL_CLI_SAVE(d3)
58
59 # disable the icache
60 movhu (a2),d0
61 and ~CHCTR_ICEN,d0
62 movhu d0,(a2)
63
64 # and wait for it to calm down
65 setlb
66 movhu (a2),d0
67 btst CHCTR_ICBUSY,d0
68 lne
69
70 # check all the way tags for this cache entry
71 mov (a0),d0 # read the tag in the way 0 slot
72 xor a1,d0
73 and d1,d0
74 beq debugger_local_icache_kill # jump if matched
75
76 add L1_CACHE_WAYDISP,a0
77 mov (a0),d0 # read the tag in the way 1 slot
78 xor a1,d0
79 and d1,d0
80 beq debugger_local_icache_kill # jump if matched
81
82 add L1_CACHE_WAYDISP,a0
83 mov (a0),d0 # read the tag in the way 2 slot
84 xor a1,d0
85 and d1,d0
86 beq debugger_local_icache_kill # jump if matched
87
88 add L1_CACHE_WAYDISP,a0
89 mov (a0),d0 # read the tag in the way 3 slot
90 xor a1,d0
91 and d1,d0
92 bne debugger_local_icache_finish # jump if not matched
93
94debugger_local_icache_kill:
95 mov d0,(a0) # kill the tag (D0 is 0 at this point)
96
97debugger_local_icache_finish:
98 # wait for the cache to finish what it's doing
99 setlb
100 movhu (a2),d0
101 btst CHCTR_ICBUSY,d0
102 lne
103
104 # and reenable it
105 or CHCTR_ICEN,d0
106 movhu d0,(a2)
107 movhu (a2),d0
108
109 # re-enable interrupts
110 LOCAL_IRQ_RESTORE(d3)
111
112debugger_local_cache_flushinv_one_icache_end:
113 ret [d3,a2],8
114 .size debugger_local_cache_flushinv_one_icache,.-debugger_local_cache_flushinv_one_icache
115
116#ifdef CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG
117 .globl debugger_local_cache_flushinv_one
118 .type debugger_local_cache_flushinv_one,@function
119debugger_local_cache_flushinv_one = debugger_local_cache_flushinv_one_icache
120#endif
diff --git a/arch/mn10300/mm/cache-dbg-inv.S b/arch/mn10300/mm/cache-dbg-inv.S
deleted file mode 100644
index eba2d6dca066..000000000000
--- a/arch/mn10300/mm/cache-dbg-inv.S
+++ /dev/null
@@ -1,47 +0,0 @@
1/* MN10300 CPU cache invalidation routines
2 *
3 * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20 .am33_2
21
22 .globl debugger_local_cache_flushinv
23
24###############################################################################
25#
26# void debugger_local_cache_flushinv(void)
27#
28# Invalidate the entire icache
29#
30###############################################################################
31 ALIGN
32 .globl debugger_local_cache_flushinv
33 .type debugger_local_cache_flushinv,@function
34debugger_local_cache_flushinv:
35 #
36 # we only need to invalidate the icache in this cache mode
37 #
38 mov CHCTR,a0
39 movhu (a0),d0
40 btst CHCTR_ICEN,d0
41 beq debugger_local_cache_flushinv_end
42
43 invalidate_icache 1
44
45debugger_local_cache_flushinv_end:
46 ret [],0
47 .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv
diff --git a/arch/mn10300/mm/cache-disabled.c b/arch/mn10300/mm/cache-disabled.c
deleted file mode 100644
index f669ea42aba6..000000000000
--- a/arch/mn10300/mm/cache-disabled.c
+++ /dev/null
@@ -1,21 +0,0 @@
1/* Handle the cache being disabled
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/mm.h>
12
13/*
14 * allow userspace to flush the instruction cache
15 */
16asmlinkage long sys_cacheflush(unsigned long start, unsigned long end)
17{
18 if (end < start)
19 return -EINVAL;
20 return 0;
21}
diff --git a/arch/mn10300/mm/cache-flush-by-reg.S b/arch/mn10300/mm/cache-flush-by-reg.S
deleted file mode 100644
index 1dcae0211671..000000000000
--- a/arch/mn10300/mm/cache-flush-by-reg.S
+++ /dev/null
@@ -1,308 +0,0 @@
1/* MN10300 CPU core caching routines, using indirect regs on cache controller
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <asm/smp.h>
15#include <asm/page.h>
16#include <asm/cache.h>
17#include <asm/irqflags.h>
18
19 .am33_2
20
21#ifndef CONFIG_SMP
22 .globl mn10300_dcache_flush
23 .globl mn10300_dcache_flush_page
24 .globl mn10300_dcache_flush_range
25 .globl mn10300_dcache_flush_range2
26 .globl mn10300_dcache_flush_inv
27 .globl mn10300_dcache_flush_inv_page
28 .globl mn10300_dcache_flush_inv_range
29 .globl mn10300_dcache_flush_inv_range2
30
31mn10300_dcache_flush = mn10300_local_dcache_flush
32mn10300_dcache_flush_page = mn10300_local_dcache_flush_page
33mn10300_dcache_flush_range = mn10300_local_dcache_flush_range
34mn10300_dcache_flush_range2 = mn10300_local_dcache_flush_range2
35mn10300_dcache_flush_inv = mn10300_local_dcache_flush_inv
36mn10300_dcache_flush_inv_page = mn10300_local_dcache_flush_inv_page
37mn10300_dcache_flush_inv_range = mn10300_local_dcache_flush_inv_range
38mn10300_dcache_flush_inv_range2 = mn10300_local_dcache_flush_inv_range2
39
40#endif /* !CONFIG_SMP */
41
42###############################################################################
43#
44# void mn10300_local_dcache_flush(void)
45# Flush the entire data cache back to RAM
46#
47###############################################################################
48 ALIGN
49 .globl mn10300_local_dcache_flush
50 .type mn10300_local_dcache_flush,@function
51mn10300_local_dcache_flush:
52 movhu (CHCTR),d0
53 btst CHCTR_DCEN,d0
54 beq mn10300_local_dcache_flush_end
55
56 mov DCPGCR,a0
57
58 LOCAL_CLI_SAVE(d1)
59
60 # wait for busy bit of area purge
61 setlb
62 mov (a0),d0
63 btst DCPGCR_DCPGBSY,d0
64 lne
65
66 # set mask
67 clr d0
68 mov d0,(DCPGMR)
69
70 # area purge
71 #
72 # DCPGCR = DCPGCR_DCP
73 #
74 mov DCPGCR_DCP,d0
75 mov d0,(a0)
76
77 # wait for busy bit of area purge
78 setlb
79 mov (a0),d0
80 btst DCPGCR_DCPGBSY,d0
81 lne
82
83 LOCAL_IRQ_RESTORE(d1)
84
85mn10300_local_dcache_flush_end:
86 ret [],0
87 .size mn10300_local_dcache_flush,.-mn10300_local_dcache_flush
88
89###############################################################################
90#
91# void mn10300_local_dcache_flush_page(unsigned long start)
92# void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end)
93# void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size)
94# Flush a range of addresses on a page in the dcache
95#
96###############################################################################
97 ALIGN
98 .globl mn10300_local_dcache_flush_page
99 .globl mn10300_local_dcache_flush_range
100 .globl mn10300_local_dcache_flush_range2
101 .type mn10300_local_dcache_flush_page,@function
102 .type mn10300_local_dcache_flush_range,@function
103 .type mn10300_local_dcache_flush_range2,@function
104mn10300_local_dcache_flush_page:
105 and ~(PAGE_SIZE-1),d0
106 mov PAGE_SIZE,d1
107mn10300_local_dcache_flush_range2:
108 add d0,d1
109mn10300_local_dcache_flush_range:
110 movm [d2,d3,a2],(sp)
111
112 movhu (CHCTR),d2
113 btst CHCTR_DCEN,d2
114 beq mn10300_local_dcache_flush_range_end
115
116 # calculate alignsize
117 #
118 # alignsize = L1_CACHE_BYTES;
119 # for (i = (end - start - 1) / L1_CACHE_BYTES ; i > 0; i >>= 1)
120 # alignsize <<= 1;
121 # d2 = alignsize;
122 #
123 mov L1_CACHE_BYTES,d2
124 sub d0,d1,d3
125 add -1,d3
126 lsr L1_CACHE_SHIFT,d3
127 beq 2f
1281:
129 add d2,d2
130 lsr 1,d3
131 bne 1b
1322:
133 mov d1,a1 # a1 = end
134
135 LOCAL_CLI_SAVE(d3)
136 mov DCPGCR,a0
137
138 # wait for busy bit of area purge
139 setlb
140 mov (a0),d1
141 btst DCPGCR_DCPGBSY,d1
142 lne
143
144 # determine the mask
145 mov d2,d1
146 add -1,d1
147 not d1 # d1 = mask = ~(alignsize-1)
148 mov d1,(DCPGMR)
149
150 and d1,d0,a2 # a2 = mask & start
151
152dcpgloop:
153 # area purge
154 mov a2,d0
155 or DCPGCR_DCP,d0
156 mov d0,(a0) # DCPGCR = (mask & start) | DCPGCR_DCP
157
158 # wait for busy bit of area purge
159 setlb
160 mov (a0),d1
161 btst DCPGCR_DCPGBSY,d1
162 lne
163
164 # check purge of end address
165 add d2,a2 # a2 += alignsize
166 cmp a1,a2 # if (a2 < end) goto dcpgloop
167 bns dcpgloop
168
169 LOCAL_IRQ_RESTORE(d3)
170
171mn10300_local_dcache_flush_range_end:
172 ret [d2,d3,a2],12
173
174 .size mn10300_local_dcache_flush_page,.-mn10300_local_dcache_flush_page
175 .size mn10300_local_dcache_flush_range,.-mn10300_local_dcache_flush_range
176 .size mn10300_local_dcache_flush_range2,.-mn10300_local_dcache_flush_range2
177
178###############################################################################
179#
180# void mn10300_local_dcache_flush_inv(void)
181# Flush the entire data cache and invalidate all entries
182#
183###############################################################################
184 ALIGN
185 .globl mn10300_local_dcache_flush_inv
186 .type mn10300_local_dcache_flush_inv,@function
187mn10300_local_dcache_flush_inv:
188 movhu (CHCTR),d0
189 btst CHCTR_DCEN,d0
190 beq mn10300_local_dcache_flush_inv_end
191
192 mov DCPGCR,a0
193
194 LOCAL_CLI_SAVE(d1)
195
196 # wait for busy bit of area purge & invalidate
197 setlb
198 mov (a0),d0
199 btst DCPGCR_DCPGBSY,d0
200 lne
201
202 # set the mask to cover everything
203 clr d0
204 mov d0,(DCPGMR)
205
206 # area purge & invalidate
207 mov DCPGCR_DCP|DCPGCR_DCI,d0
208 mov d0,(a0)
209
210 # wait for busy bit of area purge & invalidate
211 setlb
212 mov (a0),d0
213 btst DCPGCR_DCPGBSY,d0
214 lne
215
216 LOCAL_IRQ_RESTORE(d1)
217
218mn10300_local_dcache_flush_inv_end:
219 ret [],0
220 .size mn10300_local_dcache_flush_inv,.-mn10300_local_dcache_flush_inv
221
222###############################################################################
223#
224# void mn10300_local_dcache_flush_inv_page(unsigned long start)
225# void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end)
226# void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size)
227# Flush and invalidate a range of addresses on a page in the dcache
228#
229###############################################################################
230 ALIGN
231 .globl mn10300_local_dcache_flush_inv_page
232 .globl mn10300_local_dcache_flush_inv_range
233 .globl mn10300_local_dcache_flush_inv_range2
234 .type mn10300_local_dcache_flush_inv_page,@function
235 .type mn10300_local_dcache_flush_inv_range,@function
236 .type mn10300_local_dcache_flush_inv_range2,@function
237mn10300_local_dcache_flush_inv_page:
238 and ~(PAGE_SIZE-1),d0
239 mov PAGE_SIZE,d1
240mn10300_local_dcache_flush_inv_range2:
241 add d0,d1
242mn10300_local_dcache_flush_inv_range:
243 movm [d2,d3,a2],(sp)
244
245 movhu (CHCTR),d2
246 btst CHCTR_DCEN,d2
247 beq mn10300_local_dcache_flush_inv_range_end
248
249 # calculate alignsize
250 #
251 # alignsize = L1_CACHE_BYTES;
252 # for (i = (end - start - 1) / L1_CACHE_BYTES; i > 0; i >>= 1)
253 # alignsize <<= 1;
254 # d2 = alignsize
255 #
256 mov L1_CACHE_BYTES,d2
257 sub d0,d1,d3
258 add -1,d3
259 lsr L1_CACHE_SHIFT,d3
260 beq 2f
2611:
262 add d2,d2
263 lsr 1,d3
264 bne 1b
2652:
266 mov d1,a1 # a1 = end
267
268 LOCAL_CLI_SAVE(d3)
269 mov DCPGCR,a0
270
271 # wait for busy bit of area purge & invalidate
272 setlb
273 mov (a0),d1
274 btst DCPGCR_DCPGBSY,d1
275 lne
276
277 # set the mask
278 mov d2,d1
279 add -1,d1
280 not d1 # d1 = mask = ~(alignsize-1)
281 mov d1,(DCPGMR)
282
283 and d1,d0,a2 # a2 = mask & start
284
285dcpgivloop:
286 # area purge & invalidate
287 mov a2,d0
288 or DCPGCR_DCP|DCPGCR_DCI,d0
289 mov d0,(a0) # DCPGCR = (mask & start)|DCPGCR_DCP|DCPGCR_DCI
290
291 # wait for busy bit of area purge & invalidate
292 setlb
293 mov (a0),d1
294 btst DCPGCR_DCPGBSY,d1
295 lne
296
297 # check purge & invalidate of end address
298 add d2,a2 # a2 += alignsize
299 cmp a1,a2 # if (a2 < end) goto dcpgivloop
300 bns dcpgivloop
301
302 LOCAL_IRQ_RESTORE(d3)
303
304mn10300_local_dcache_flush_inv_range_end:
305 ret [d2,d3,a2],12
306 .size mn10300_local_dcache_flush_inv_page,.-mn10300_local_dcache_flush_inv_page
307 .size mn10300_local_dcache_flush_inv_range,.-mn10300_local_dcache_flush_inv_range
308 .size mn10300_local_dcache_flush_inv_range2,.-mn10300_local_dcache_flush_inv_range2
diff --git a/arch/mn10300/mm/cache-flush-by-tag.S b/arch/mn10300/mm/cache-flush-by-tag.S
deleted file mode 100644
index 1ddc06849242..000000000000
--- a/arch/mn10300/mm/cache-flush-by-tag.S
+++ /dev/null
@@ -1,250 +0,0 @@
1/* MN10300 CPU core caching routines, using direct tag flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <asm/smp.h>
15#include <asm/page.h>
16#include <asm/cache.h>
17#include <asm/irqflags.h>
18
19 .am33_2
20
21#ifndef CONFIG_SMP
22 .globl mn10300_dcache_flush
23 .globl mn10300_dcache_flush_page
24 .globl mn10300_dcache_flush_range
25 .globl mn10300_dcache_flush_range2
26 .globl mn10300_dcache_flush_inv
27 .globl mn10300_dcache_flush_inv_page
28 .globl mn10300_dcache_flush_inv_range
29 .globl mn10300_dcache_flush_inv_range2
30
31mn10300_dcache_flush = mn10300_local_dcache_flush
32mn10300_dcache_flush_page = mn10300_local_dcache_flush_page
33mn10300_dcache_flush_range = mn10300_local_dcache_flush_range
34mn10300_dcache_flush_range2 = mn10300_local_dcache_flush_range2
35mn10300_dcache_flush_inv = mn10300_local_dcache_flush_inv
36mn10300_dcache_flush_inv_page = mn10300_local_dcache_flush_inv_page
37mn10300_dcache_flush_inv_range = mn10300_local_dcache_flush_inv_range
38mn10300_dcache_flush_inv_range2 = mn10300_local_dcache_flush_inv_range2
39
40#endif /* !CONFIG_SMP */
41
42###############################################################################
43#
44# void mn10300_local_dcache_flush(void)
45# Flush the entire data cache back to RAM
46#
47###############################################################################
48 ALIGN
49 .globl mn10300_local_dcache_flush
50 .type mn10300_local_dcache_flush,@function
51mn10300_local_dcache_flush:
52 movhu (CHCTR),d0
53 btst CHCTR_DCEN,d0
54 beq mn10300_local_dcache_flush_end
55
56 # read the addresses tagged in the cache's tag RAM and attempt to flush
57 # those addresses specifically
58 # - we rely on the hardware to filter out invalid tag entry addresses
59 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
60 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
61 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries
62
63mn10300_local_dcache_flush_loop:
64 mov (a0),d0
65 and L1_CACHE_TAG_MASK,d0
66 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
67 # cache
68 mov d0,(a1) # conditional purge
69
70 add L1_CACHE_BYTES,a0
71 add L1_CACHE_BYTES,a1
72 add -1,d1
73 bne mn10300_local_dcache_flush_loop
74
75mn10300_local_dcache_flush_end:
76 ret [],0
77 .size mn10300_local_dcache_flush,.-mn10300_local_dcache_flush
78
79###############################################################################
80#
81# void mn10300_local_dcache_flush_page(unsigned long start)
82# void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end)
83# void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size)
84# Flush a range of addresses on a page in the dcache
85#
86###############################################################################
87 ALIGN
88 .globl mn10300_local_dcache_flush_page
89 .globl mn10300_local_dcache_flush_range
90 .globl mn10300_local_dcache_flush_range2
91 .type mn10300_local_dcache_flush_page,@function
92 .type mn10300_local_dcache_flush_range,@function
93 .type mn10300_local_dcache_flush_range2,@function
94mn10300_local_dcache_flush_page:
95 and ~(PAGE_SIZE-1),d0
96 mov PAGE_SIZE,d1
97mn10300_local_dcache_flush_range2:
98 add d0,d1
99mn10300_local_dcache_flush_range:
100 movm [d2],(sp)
101
102 movhu (CHCTR),d2
103 btst CHCTR_DCEN,d2
104 beq mn10300_local_dcache_flush_range_end
105
106 sub d0,d1,a0
107 cmp MN10300_DCACHE_FLUSH_BORDER,a0
108 ble 1f
109
110 movm (sp),[d2]
111 bra mn10300_local_dcache_flush
1121:
113
114 # round start addr down
115 and L1_CACHE_TAG_MASK,d0
116 mov d0,a1
117
118 add L1_CACHE_BYTES,d1 # round end addr up
119 and L1_CACHE_TAG_MASK,d1
120
121 # write a request to flush all instances of an address from the cache
122 mov DCACHE_PURGE(0,0),a0
123 mov a1,d0
124 and L1_CACHE_TAG_ENTRY,d0
125 add d0,a0 # starting dcache purge control
126 # reg address
127
128 sub a1,d1
129 lsr L1_CACHE_SHIFT,d1 # total number of entries to
130 # examine
131
132 or L1_CACHE_TAG_VALID,a1 # retain valid entries in the
133 # cache
134
135mn10300_local_dcache_flush_range_loop:
136 mov a1,(L1_CACHE_WAYDISP*0,a0) # conditionally purge this line
137 # all ways
138
139 add L1_CACHE_BYTES,a0
140 add L1_CACHE_BYTES,a1
141 and ~L1_CACHE_WAYDISP,a0 # make sure way stay on way 0
142 add -1,d1
143 bne mn10300_local_dcache_flush_range_loop
144
145mn10300_local_dcache_flush_range_end:
146 ret [d2],4
147
148 .size mn10300_local_dcache_flush_page,.-mn10300_local_dcache_flush_page
149 .size mn10300_local_dcache_flush_range,.-mn10300_local_dcache_flush_range
150 .size mn10300_local_dcache_flush_range2,.-mn10300_local_dcache_flush_range2
151
152###############################################################################
153#
154# void mn10300_local_dcache_flush_inv(void)
155# Flush the entire data cache and invalidate all entries
156#
157###############################################################################
158 ALIGN
159 .globl mn10300_local_dcache_flush_inv
160 .type mn10300_local_dcache_flush_inv,@function
161mn10300_local_dcache_flush_inv:
162 movhu (CHCTR),d0
163 btst CHCTR_DCEN,d0
164 beq mn10300_local_dcache_flush_inv_end
165
166 mov L1_CACHE_NENTRIES,d1
167 clr a1
168
169mn10300_local_dcache_flush_inv_loop:
170 mov (DCACHE_PURGE_WAY0(0),a1),d0 # unconditional purge
171 mov (DCACHE_PURGE_WAY1(0),a1),d0 # unconditional purge
172 mov (DCACHE_PURGE_WAY2(0),a1),d0 # unconditional purge
173 mov (DCACHE_PURGE_WAY3(0),a1),d0 # unconditional purge
174
175 add L1_CACHE_BYTES,a1
176 add -1,d1
177 bne mn10300_local_dcache_flush_inv_loop
178
179mn10300_local_dcache_flush_inv_end:
180 ret [],0
181 .size mn10300_local_dcache_flush_inv,.-mn10300_local_dcache_flush_inv
182
183###############################################################################
184#
185# void mn10300_local_dcache_flush_inv_page(unsigned long start)
186# void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end)
187# void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size)
188# Flush and invalidate a range of addresses on a page in the dcache
189#
190###############################################################################
191 ALIGN
192 .globl mn10300_local_dcache_flush_inv_page
193 .globl mn10300_local_dcache_flush_inv_range
194 .globl mn10300_local_dcache_flush_inv_range2
195 .type mn10300_local_dcache_flush_inv_page,@function
196 .type mn10300_local_dcache_flush_inv_range,@function
197 .type mn10300_local_dcache_flush_inv_range2,@function
198mn10300_local_dcache_flush_inv_page:
199 and ~(PAGE_SIZE-1),d0
200 mov PAGE_SIZE,d1
201mn10300_local_dcache_flush_inv_range2:
202 add d0,d1
203mn10300_local_dcache_flush_inv_range:
204 movm [d2],(sp)
205
206 movhu (CHCTR),d2
207 btst CHCTR_DCEN,d2
208 beq mn10300_local_dcache_flush_inv_range_end
209
210 sub d0,d1,a0
211 cmp MN10300_DCACHE_FLUSH_INV_BORDER,a0
212 ble 1f
213
214 movm (sp),[d2]
215 bra mn10300_local_dcache_flush_inv
2161:
217
218 and L1_CACHE_TAG_MASK,d0 # round start addr down
219 mov d0,a1
220
221 add L1_CACHE_BYTES,d1 # round end addr up
222 and L1_CACHE_TAG_MASK,d1
223
224 # write a request to flush and invalidate all instances of an address
225 # from the cache
226 mov DCACHE_PURGE(0,0),a0
227 mov a1,d0
228 and L1_CACHE_TAG_ENTRY,d0
229 add d0,a0 # starting dcache purge control
230 # reg address
231
232 sub a1,d1
233 lsr L1_CACHE_SHIFT,d1 # total number of entries to
234 # examine
235
236mn10300_local_dcache_flush_inv_range_loop:
237 mov a1,(L1_CACHE_WAYDISP*0,a0) # conditionally purge this line
238 # in all ways
239
240 add L1_CACHE_BYTES,a0
241 add L1_CACHE_BYTES,a1
242 and ~L1_CACHE_WAYDISP,a0 # make sure way stay on way 0
243 add -1,d1
244 bne mn10300_local_dcache_flush_inv_range_loop
245
246mn10300_local_dcache_flush_inv_range_end:
247 ret [d2],4
248 .size mn10300_local_dcache_flush_inv_page,.-mn10300_local_dcache_flush_inv_page
249 .size mn10300_local_dcache_flush_inv_range,.-mn10300_local_dcache_flush_inv_range
250 .size mn10300_local_dcache_flush_inv_range2,.-mn10300_local_dcache_flush_inv_range2
diff --git a/arch/mn10300/mm/cache-flush-icache.c b/arch/mn10300/mm/cache-flush-icache.c
deleted file mode 100644
index fdb1a9db20f0..000000000000
--- a/arch/mn10300/mm/cache-flush-icache.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/* Flush dcache and invalidate icache when the dcache is in writeback mode
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/mm.h>
13#include <asm/cacheflush.h>
14#include <asm/smp.h>
15#include "cache-smp.h"
16
17/**
18 * flush_icache_page - Flush a page from the dcache and invalidate the icache
19 * @vma: The VMA the page is part of.
20 * @page: The page to be flushed.
21 *
22 * Write a page back from the dcache and invalidate the icache so that we can
23 * run code from it that we've just written into it
24 */
25void flush_icache_page(struct vm_area_struct *vma, struct page *page)
26{
27 unsigned long start = page_to_phys(page);
28 unsigned long flags;
29
30 flags = smp_lock_cache();
31
32 mn10300_local_dcache_flush_page(start);
33 mn10300_local_icache_inv_page(start);
34
35 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, start + PAGE_SIZE);
36 smp_unlock_cache(flags);
37}
38EXPORT_SYMBOL(flush_icache_page);
39
40/**
41 * flush_icache_page_range - Flush dcache and invalidate icache for part of a
42 * single page
43 * @start: The starting virtual address of the page part.
44 * @end: The ending virtual address of the page part.
45 *
46 * Flush the dcache and invalidate the icache for part of a single page, as
47 * determined by the virtual addresses given. The page must be in the paged
48 * area.
49 */
50static void flush_icache_page_range(unsigned long start, unsigned long end)
51{
52 unsigned long addr, size, off;
53 struct page *page;
54 pgd_t *pgd;
55 pud_t *pud;
56 pmd_t *pmd;
57 pte_t *ppte, pte;
58
59 /* work out how much of the page to flush */
60 off = start & ~PAGE_MASK;
61 size = end - start;
62
63 /* get the physical address the page is mapped to from the page
64 * tables */
65 pgd = pgd_offset(current->mm, start);
66 if (!pgd || !pgd_val(*pgd))
67 return;
68
69 pud = pud_offset(pgd, start);
70 if (!pud || !pud_val(*pud))
71 return;
72
73 pmd = pmd_offset(pud, start);
74 if (!pmd || !pmd_val(*pmd))
75 return;
76
77 ppte = pte_offset_map(pmd, start);
78 if (!ppte)
79 return;
80 pte = *ppte;
81 pte_unmap(ppte);
82
83 if (pte_none(pte))
84 return;
85
86 page = pte_page(pte);
87 if (!page)
88 return;
89
90 addr = page_to_phys(page);
91
92 /* flush the dcache and invalidate the icache coverage on that
93 * region */
94 mn10300_local_dcache_flush_range2(addr + off, size);
95 mn10300_local_icache_inv_range2(addr + off, size);
96 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, end);
97}
98
99/**
100 * flush_icache_range - Globally flush dcache and invalidate icache for region
101 * @start: The starting virtual address of the region.
102 * @end: The ending virtual address of the region.
103 *
104 * This is used by the kernel to globally flush some code it has just written
105 * from the dcache back to RAM and then to globally invalidate the icache over
106 * that region so that that code can be run on all CPUs in the system.
107 */
108void flush_icache_range(unsigned long start, unsigned long end)
109{
110 unsigned long start_page, end_page;
111 unsigned long flags;
112
113 flags = smp_lock_cache();
114
115 if (end > 0x80000000UL) {
116 /* addresses above 0xa0000000 do not go through the cache */
117 if (end > 0xa0000000UL) {
118 end = 0xa0000000UL;
119 if (start >= end)
120 goto done;
121 }
122
123 /* kernel addresses between 0x80000000 and 0x9fffffff do not
124 * require page tables, so we just map such addresses
125 * directly */
126 start_page = (start >= 0x80000000UL) ? start : 0x80000000UL;
127 mn10300_local_dcache_flush_range(start_page, end);
128 mn10300_local_icache_inv_range(start_page, end);
129 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start_page, end);
130 if (start_page == start)
131 goto done;
132 end = start_page;
133 }
134
135 start_page = start & PAGE_MASK;
136 end_page = (end - 1) & PAGE_MASK;
137
138 if (start_page == end_page) {
139 /* the first and last bytes are on the same page */
140 flush_icache_page_range(start, end);
141 } else if (start_page + 1 == end_page) {
142 /* split over two virtually contiguous pages */
143 flush_icache_page_range(start, end_page);
144 flush_icache_page_range(end_page, end);
145 } else {
146 /* more than 2 pages; just flush the entire cache */
147 mn10300_dcache_flush();
148 mn10300_icache_inv();
149 smp_cache_call(SMP_IDCACHE_INV_FLUSH, 0, 0);
150 }
151
152done:
153 smp_unlock_cache(flags);
154}
155EXPORT_SYMBOL(flush_icache_range);
diff --git a/arch/mn10300/mm/cache-inv-by-reg.S b/arch/mn10300/mm/cache-inv-by-reg.S
deleted file mode 100644
index a60825b91e77..000000000000
--- a/arch/mn10300/mm/cache-inv-by-reg.S
+++ /dev/null
@@ -1,350 +0,0 @@
1/* MN10300 CPU cache invalidation routines, using automatic purge registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20#define mn10300_local_dcache_inv_range_intr_interval \
21 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1)
22
23#if mn10300_local_dcache_inv_range_intr_interval > 0xff
24#error MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL must be 8 or less
25#endif
26
27 .am33_2
28
29#ifndef CONFIG_SMP
30 .globl mn10300_icache_inv
31 .globl mn10300_icache_inv_page
32 .globl mn10300_icache_inv_range
33 .globl mn10300_icache_inv_range2
34 .globl mn10300_dcache_inv
35 .globl mn10300_dcache_inv_page
36 .globl mn10300_dcache_inv_range
37 .globl mn10300_dcache_inv_range2
38
39mn10300_icache_inv = mn10300_local_icache_inv
40mn10300_icache_inv_page = mn10300_local_icache_inv_page
41mn10300_icache_inv_range = mn10300_local_icache_inv_range
42mn10300_icache_inv_range2 = mn10300_local_icache_inv_range2
43mn10300_dcache_inv = mn10300_local_dcache_inv
44mn10300_dcache_inv_page = mn10300_local_dcache_inv_page
45mn10300_dcache_inv_range = mn10300_local_dcache_inv_range
46mn10300_dcache_inv_range2 = mn10300_local_dcache_inv_range2
47
48#endif /* !CONFIG_SMP */
49
50###############################################################################
51#
52# void mn10300_local_icache_inv(void)
53# Invalidate the entire icache
54#
55###############################################################################
56 ALIGN
57 .globl mn10300_local_icache_inv
58 .type mn10300_local_icache_inv,@function
59mn10300_local_icache_inv:
60 mov CHCTR,a0
61
62 movhu (a0),d0
63 btst CHCTR_ICEN,d0
64 beq mn10300_local_icache_inv_end
65
66 invalidate_icache 1
67
68mn10300_local_icache_inv_end:
69 ret [],0
70 .size mn10300_local_icache_inv,.-mn10300_local_icache_inv
71
72###############################################################################
73#
74# void mn10300_local_dcache_inv(void)
75# Invalidate the entire dcache
76#
77###############################################################################
78 ALIGN
79 .globl mn10300_local_dcache_inv
80 .type mn10300_local_dcache_inv,@function
81mn10300_local_dcache_inv:
82 mov CHCTR,a0
83
84 movhu (a0),d0
85 btst CHCTR_DCEN,d0
86 beq mn10300_local_dcache_inv_end
87
88 invalidate_dcache 1
89
90mn10300_local_dcache_inv_end:
91 ret [],0
92 .size mn10300_local_dcache_inv,.-mn10300_local_dcache_inv
93
94###############################################################################
95#
96# void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end)
97# void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size)
98# void mn10300_local_dcache_inv_page(unsigned long start)
99# Invalidate a range of addresses on a page in the dcache
100#
101###############################################################################
102 ALIGN
103 .globl mn10300_local_dcache_inv_page
104 .globl mn10300_local_dcache_inv_range
105 .globl mn10300_local_dcache_inv_range2
106 .type mn10300_local_dcache_inv_page,@function
107 .type mn10300_local_dcache_inv_range,@function
108 .type mn10300_local_dcache_inv_range2,@function
109mn10300_local_dcache_inv_page:
110 and ~(PAGE_SIZE-1),d0
111 mov PAGE_SIZE,d1
112mn10300_local_dcache_inv_range2:
113 add d0,d1
114mn10300_local_dcache_inv_range:
115 # If we are in writeback mode we check the start and end alignments,
116 # and if they're not cacheline-aligned, we must flush any bits outside
117 # the range that share cachelines with stuff inside the range
118#ifdef CONFIG_MN10300_CACHE_WBACK
119 btst ~L1_CACHE_TAG_MASK,d0
120 bne 1f
121 btst ~L1_CACHE_TAG_MASK,d1
122 beq 2f
1231:
124 bra mn10300_local_dcache_flush_inv_range
1252:
126#endif /* CONFIG_MN10300_CACHE_WBACK */
127
128 movm [d2,d3,a2],(sp)
129
130 mov CHCTR,a0
131 movhu (a0),d2
132 btst CHCTR_DCEN,d2
133 beq mn10300_local_dcache_inv_range_end
134
135 # round the addresses out to be full cachelines, unless we're in
136 # writeback mode, in which case we would be in flush and invalidate by
137 # now
138#ifndef CONFIG_MN10300_CACHE_WBACK
139 and L1_CACHE_TAG_MASK,d0 # round start addr down
140
141 mov L1_CACHE_BYTES-1,d2
142 add d2,d1
143 and L1_CACHE_TAG_MASK,d1 # round end addr up
144#endif /* !CONFIG_MN10300_CACHE_WBACK */
145
146 sub d0,d1,d2 # calculate the total size
147 mov d0,a2 # A2 = start address
148 mov d1,a1 # A1 = end address
149
150 LOCAL_CLI_SAVE(d3)
151
152 mov DCPGCR,a0 # make sure the purger isn't busy
153 setlb
154 mov (a0),d0
155 btst DCPGCR_DCPGBSY,d0
156 lne
157
158 # skip initial address alignment calculation if address is zero
159 mov d2,d1
160 cmp 0,a2
161 beq 1f
162
163dcivloop:
164 /* calculate alignsize
165 *
166 * alignsize = L1_CACHE_BYTES;
167 * while (! start & alignsize) {
168 * alignsize <<=1;
169 * }
170 * d1 = alignsize;
171 */
172 mov L1_CACHE_BYTES,d1
173 lsr 1,d1
174 setlb
175 add d1,d1
176 mov d1,d0
177 and a2,d0
178 leq
179
1801:
181 /* calculate invsize
182 *
183 * if (totalsize > alignsize) {
184 * invsize = alignsize;
185 * } else {
186 * invsize = totalsize;
187 * tmp = 0x80000000;
188 * while (! invsize & tmp) {
189 * tmp >>= 1;
190 * }
191 * invsize = tmp;
192 * }
193 * d1 = invsize
194 */
195 cmp d2,d1
196 bns 2f
197 mov d2,d1
198
199 mov 0x80000000,d0 # start from 31bit=1
200 setlb
201 lsr 1,d0
202 mov d0,e0
203 and d1,e0
204 leq
205 mov d0,d1
206
2072:
208 /* set mask
209 *
210 * mask = ~(invsize-1);
211 * DCPGMR = mask;
212 */
213 mov d1,d0
214 add -1,d0
215 not d0
216 mov d0,(DCPGMR)
217
218 # invalidate area
219 mov a2,d0
220 or DCPGCR_DCI,d0
221 mov d0,(a0) # DCPGCR = (mask & start) | DCPGCR_DCI
222
223 setlb # wait for the purge to complete
224 mov (a0),d0
225 btst DCPGCR_DCPGBSY,d0
226 lne
227
228 sub d1,d2 # decrease size remaining
229 add d1,a2 # increase next start address
230
231 /* check invalidating of end address
232 *
233 * a2 = a2 + invsize
234 * if (a2 < end) {
235 * goto dcivloop;
236 * } */
237 cmp a1,a2
238 bns dcivloop
239
240 LOCAL_IRQ_RESTORE(d3)
241
242mn10300_local_dcache_inv_range_end:
243 ret [d2,d3,a2],12
244 .size mn10300_local_dcache_inv_page,.-mn10300_local_dcache_inv_page
245 .size mn10300_local_dcache_inv_range,.-mn10300_local_dcache_inv_range
246 .size mn10300_local_dcache_inv_range2,.-mn10300_local_dcache_inv_range2
247
248###############################################################################
249#
250# void mn10300_local_icache_inv_page(unsigned long start)
251# void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size)
252# void mn10300_local_icache_inv_range(unsigned long start, unsigned long end)
253# Invalidate a range of addresses on a page in the icache
254#
255###############################################################################
256 ALIGN
257 .globl mn10300_local_icache_inv_page
258 .globl mn10300_local_icache_inv_range
259 .globl mn10300_local_icache_inv_range2
260 .type mn10300_local_icache_inv_page,@function
261 .type mn10300_local_icache_inv_range,@function
262 .type mn10300_local_icache_inv_range2,@function
263mn10300_local_icache_inv_page:
264 and ~(PAGE_SIZE-1),d0
265 mov PAGE_SIZE,d1
266mn10300_local_icache_inv_range2:
267 add d0,d1
268mn10300_local_icache_inv_range:
269 movm [d2,d3,a2],(sp)
270
271 mov CHCTR,a0
272 movhu (a0),d2
273 btst CHCTR_ICEN,d2
274 beq mn10300_local_icache_inv_range_reg_end
275
276 /* calculate alignsize
277 *
278 * alignsize = L1_CACHE_BYTES;
279 * for (i = (end - start - 1) / L1_CACHE_BYTES ; i > 0; i >>= 1) {
280 * alignsize <<= 1;
281 * }
282 * d2 = alignsize;
283 */
284 mov L1_CACHE_BYTES,d2
285 sub d0,d1,d3
286 add -1,d3
287 lsr L1_CACHE_SHIFT,d3
288 beq 2f
2891:
290 add d2,d2
291 lsr 1,d3
292 bne 1b
2932:
294
295 /* a1 = end */
296 mov d1,a1
297
298 LOCAL_CLI_SAVE(d3)
299
300 mov ICIVCR,a0
301 /* wait for busy bit of area invalidation */
302 setlb
303 mov (a0),d1
304 btst ICIVCR_ICIVBSY,d1
305 lne
306
307 /* set mask
308 *
309 * mask = ~(alignsize-1);
310 * ICIVMR = mask;
311 */
312 mov d2,d1
313 add -1,d1
314 not d1
315 mov d1,(ICIVMR)
316 /* a2 = mask & start */
317 and d1,d0,a2
318
319icivloop:
320 /* area invalidate
321 *
322 * ICIVCR = (mask & start) | ICIVCR_ICI
323 */
324 mov a2,d0
325 or ICIVCR_ICI,d0
326 mov d0,(a0)
327
328 /* wait for busy bit of area invalidation */
329 setlb
330 mov (a0),d1
331 btst ICIVCR_ICIVBSY,d1
332 lne
333
334 /* check invalidating of end address
335 *
336 * a2 = a2 + alignsize
337 * if (a2 < end) {
338 * goto icivloop;
339 * } */
340 add d2,a2
341 cmp a1,a2
342 bns icivloop
343
344 LOCAL_IRQ_RESTORE(d3)
345
346mn10300_local_icache_inv_range_reg_end:
347 ret [d2,d3,a2],12
348 .size mn10300_local_icache_inv_page,.-mn10300_local_icache_inv_page
349 .size mn10300_local_icache_inv_range,.-mn10300_local_icache_inv_range
350 .size mn10300_local_icache_inv_range2,.-mn10300_local_icache_inv_range2
diff --git a/arch/mn10300/mm/cache-inv-by-tag.S b/arch/mn10300/mm/cache-inv-by-tag.S
deleted file mode 100644
index ccedce9c144d..000000000000
--- a/arch/mn10300/mm/cache-inv-by-tag.S
+++ /dev/null
@@ -1,276 +0,0 @@
1/* MN10300 CPU core caching routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16#include <asm/irqflags.h>
17#include <asm/cacheflush.h>
18#include "cache.inc"
19
20#define mn10300_local_dcache_inv_range_intr_interval \
21 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1)
22
23#if mn10300_local_dcache_inv_range_intr_interval > 0xff
24#error MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL must be 8 or less
25#endif
26
27 .am33_2
28
29 .globl mn10300_local_icache_inv_page
30 .globl mn10300_local_icache_inv_range
31 .globl mn10300_local_icache_inv_range2
32
33mn10300_local_icache_inv_page = mn10300_local_icache_inv
34mn10300_local_icache_inv_range = mn10300_local_icache_inv
35mn10300_local_icache_inv_range2 = mn10300_local_icache_inv
36
37#ifndef CONFIG_SMP
38 .globl mn10300_icache_inv
39 .globl mn10300_icache_inv_page
40 .globl mn10300_icache_inv_range
41 .globl mn10300_icache_inv_range2
42 .globl mn10300_dcache_inv
43 .globl mn10300_dcache_inv_page
44 .globl mn10300_dcache_inv_range
45 .globl mn10300_dcache_inv_range2
46
47mn10300_icache_inv = mn10300_local_icache_inv
48mn10300_icache_inv_page = mn10300_local_icache_inv_page
49mn10300_icache_inv_range = mn10300_local_icache_inv_range
50mn10300_icache_inv_range2 = mn10300_local_icache_inv_range2
51mn10300_dcache_inv = mn10300_local_dcache_inv
52mn10300_dcache_inv_page = mn10300_local_dcache_inv_page
53mn10300_dcache_inv_range = mn10300_local_dcache_inv_range
54mn10300_dcache_inv_range2 = mn10300_local_dcache_inv_range2
55
56#endif /* !CONFIG_SMP */
57
58###############################################################################
59#
60# void mn10300_local_icache_inv(void)
61# Invalidate the entire icache
62#
63###############################################################################
64 ALIGN
65 .globl mn10300_local_icache_inv
66 .type mn10300_local_icache_inv,@function
67mn10300_local_icache_inv:
68 mov CHCTR,a0
69
70 movhu (a0),d0
71 btst CHCTR_ICEN,d0
72 beq mn10300_local_icache_inv_end
73
74 invalidate_icache 1
75
76mn10300_local_icache_inv_end:
77 ret [],0
78 .size mn10300_local_icache_inv,.-mn10300_local_icache_inv
79
80###############################################################################
81#
82# void mn10300_local_dcache_inv(void)
83# Invalidate the entire dcache
84#
85###############################################################################
86 ALIGN
87 .globl mn10300_local_dcache_inv
88 .type mn10300_local_dcache_inv,@function
89mn10300_local_dcache_inv:
90 mov CHCTR,a0
91
92 movhu (a0),d0
93 btst CHCTR_DCEN,d0
94 beq mn10300_local_dcache_inv_end
95
96 invalidate_dcache 1
97
98mn10300_local_dcache_inv_end:
99 ret [],0
100 .size mn10300_local_dcache_inv,.-mn10300_local_dcache_inv
101
102###############################################################################
103#
104# void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end)
105# void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size)
106# void mn10300_local_dcache_inv_page(unsigned long start)
107# Invalidate a range of addresses on a page in the dcache
108#
109###############################################################################
110 ALIGN
111 .globl mn10300_local_dcache_inv_page
112 .globl mn10300_local_dcache_inv_range
113 .globl mn10300_local_dcache_inv_range2
114 .type mn10300_local_dcache_inv_page,@function
115 .type mn10300_local_dcache_inv_range,@function
116 .type mn10300_local_dcache_inv_range2,@function
117mn10300_local_dcache_inv_page:
118 and ~(PAGE_SIZE-1),d0
119 mov PAGE_SIZE,d1
120mn10300_local_dcache_inv_range2:
121 add d0,d1
122mn10300_local_dcache_inv_range:
123 # If we are in writeback mode we check the start and end alignments,
124 # and if they're not cacheline-aligned, we must flush any bits outside
125 # the range that share cachelines with stuff inside the range
126#ifdef CONFIG_MN10300_CACHE_WBACK
127 btst ~L1_CACHE_TAG_MASK,d0
128 bne 1f
129 btst ~L1_CACHE_TAG_MASK,d1
130 beq 2f
1311:
132 bra mn10300_local_dcache_flush_inv_range
1332:
134#endif /* CONFIG_MN10300_CACHE_WBACK */
135
136 movm [d2,d3,a2],(sp)
137
138 mov CHCTR,a2
139 movhu (a2),d2
140 btst CHCTR_DCEN,d2
141 beq mn10300_local_dcache_inv_range_end
142
143#ifndef CONFIG_MN10300_CACHE_WBACK
144 and L1_CACHE_TAG_MASK,d0 # round start addr down
145
146 add L1_CACHE_BYTES,d1 # round end addr up
147 and L1_CACHE_TAG_MASK,d1
148#endif /* !CONFIG_MN10300_CACHE_WBACK */
149 mov d0,a1
150
151 clr d2 # we're going to clear tag RAM
152 # entries
153
154 # read the tags from the tag RAM, and if they indicate a valid dirty
155 # cache line then invalidate that line
156 mov DCACHE_TAG(0,0),a0
157 mov a1,d0
158 and L1_CACHE_TAG_ENTRY,d0
159 add d0,a0 # starting dcache tag RAM
160 # access address
161
162 sub a1,d1
163 lsr L1_CACHE_SHIFT,d1 # total number of entries to
164 # examine
165
166 and ~(L1_CACHE_DISPARITY-1),a1 # determine comparator base
167
168mn10300_local_dcache_inv_range_outer_loop:
169 LOCAL_CLI_SAVE(d3)
170
171 # disable the dcache
172 movhu (a2),d0
173 and ~CHCTR_DCEN,d0
174 movhu d0,(a2)
175
176 # and wait for it to calm down
177 setlb
178 movhu (a2),d0
179 btst CHCTR_DCBUSY,d0
180 lne
181
182mn10300_local_dcache_inv_range_loop:
183
184 # process the way 0 slot
185 mov (L1_CACHE_WAYDISP*0,a0),d0 # read the tag in the way 0 slot
186 btst L1_CACHE_TAG_VALID,d0
187 beq mn10300_local_dcache_inv_range_skip_0 # jump if this cacheline
188 # is not valid
189
190 xor a1,d0
191 lsr 12,d0
192 bne mn10300_local_dcache_inv_range_skip_0 # jump if not this cacheline
193
194 mov d2,(L1_CACHE_WAYDISP*0,a0) # kill the tag
195
196mn10300_local_dcache_inv_range_skip_0:
197
198 # process the way 1 slot
199 mov (L1_CACHE_WAYDISP*1,a0),d0 # read the tag in the way 1 slot
200 btst L1_CACHE_TAG_VALID,d0
201 beq mn10300_local_dcache_inv_range_skip_1 # jump if this cacheline
202 # is not valid
203
204 xor a1,d0
205 lsr 12,d0
206 bne mn10300_local_dcache_inv_range_skip_1 # jump if not this cacheline
207
208 mov d2,(L1_CACHE_WAYDISP*1,a0) # kill the tag
209
210mn10300_local_dcache_inv_range_skip_1:
211
212 # process the way 2 slot
213 mov (L1_CACHE_WAYDISP*2,a0),d0 # read the tag in the way 2 slot
214 btst L1_CACHE_TAG_VALID,d0
215 beq mn10300_local_dcache_inv_range_skip_2 # jump if this cacheline
216 # is not valid
217
218 xor a1,d0
219 lsr 12,d0
220 bne mn10300_local_dcache_inv_range_skip_2 # jump if not this cacheline
221
222 mov d2,(L1_CACHE_WAYDISP*2,a0) # kill the tag
223
224mn10300_local_dcache_inv_range_skip_2:
225
226 # process the way 3 slot
227 mov (L1_CACHE_WAYDISP*3,a0),d0 # read the tag in the way 3 slot
228 btst L1_CACHE_TAG_VALID,d0
229 beq mn10300_local_dcache_inv_range_skip_3 # jump if this cacheline
230 # is not valid
231
232 xor a1,d0
233 lsr 12,d0
234 bne mn10300_local_dcache_inv_range_skip_3 # jump if not this cacheline
235
236 mov d2,(L1_CACHE_WAYDISP*3,a0) # kill the tag
237
238mn10300_local_dcache_inv_range_skip_3:
239
240 # approx every N steps we re-enable the cache and see if there are any
241 # interrupts to be processed
242 # we also break out if we've reached the end of the loop
243 # (the bottom nibble of the count is zero in both cases)
244 add L1_CACHE_BYTES,a0
245 add L1_CACHE_BYTES,a1
246 and ~L1_CACHE_WAYDISP,a0
247 add -1,d1
248 btst mn10300_local_dcache_inv_range_intr_interval,d1
249 bne mn10300_local_dcache_inv_range_loop
250
251 # wait for the cache to finish what it's doing
252 setlb
253 movhu (a2),d0
254 btst CHCTR_DCBUSY,d0
255 lne
256
257 # and reenable it
258 or CHCTR_DCEN,d0
259 movhu d0,(a2)
260 movhu (a2),d0
261
262 # re-enable interrupts
263 # - we don't bother with delay NOPs as we'll have enough instructions
264 # before we disable interrupts again to give the interrupts a chance
265 # to happen
266 LOCAL_IRQ_RESTORE(d3)
267
268 # go around again if the counter hasn't yet reached zero
269 add 0,d1
270 bne mn10300_local_dcache_inv_range_outer_loop
271
272mn10300_local_dcache_inv_range_end:
273 ret [d2,d3,a2],12
274 .size mn10300_local_dcache_inv_page,.-mn10300_local_dcache_inv_page
275 .size mn10300_local_dcache_inv_range,.-mn10300_local_dcache_inv_range
276 .size mn10300_local_dcache_inv_range2,.-mn10300_local_dcache_inv_range2
diff --git a/arch/mn10300/mm/cache-inv-icache.c b/arch/mn10300/mm/cache-inv-icache.c
deleted file mode 100644
index a6b63dde603d..000000000000
--- a/arch/mn10300/mm/cache-inv-icache.c
+++ /dev/null
@@ -1,129 +0,0 @@
1/* Invalidate icache when dcache doesn't need invalidation as it's in
2 * write-through mode
3 *
4 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/mm.h>
14#include <asm/cacheflush.h>
15#include <asm/smp.h>
16#include "cache-smp.h"
17
18/**
19 * flush_icache_page_range - Flush dcache and invalidate icache for part of a
20 * single page
21 * @start: The starting virtual address of the page part.
22 * @end: The ending virtual address of the page part.
23 *
24 * Invalidate the icache for part of a single page, as determined by the
25 * virtual addresses given. The page must be in the paged area. The dcache is
26 * not flushed as the cache must be in write-through mode to get here.
27 */
28static void flush_icache_page_range(unsigned long start, unsigned long end)
29{
30 unsigned long addr, size, off;
31 struct page *page;
32 pgd_t *pgd;
33 pud_t *pud;
34 pmd_t *pmd;
35 pte_t *ppte, pte;
36
37 /* work out how much of the page to flush */
38 off = start & ~PAGE_MASK;
39 size = end - start;
40
41 /* get the physical address the page is mapped to from the page
42 * tables */
43 pgd = pgd_offset(current->mm, start);
44 if (!pgd || !pgd_val(*pgd))
45 return;
46
47 pud = pud_offset(pgd, start);
48 if (!pud || !pud_val(*pud))
49 return;
50
51 pmd = pmd_offset(pud, start);
52 if (!pmd || !pmd_val(*pmd))
53 return;
54
55 ppte = pte_offset_map(pmd, start);
56 if (!ppte)
57 return;
58 pte = *ppte;
59 pte_unmap(ppte);
60
61 if (pte_none(pte))
62 return;
63
64 page = pte_page(pte);
65 if (!page)
66 return;
67
68 addr = page_to_phys(page);
69
70 /* invalidate the icache coverage on that region */
71 mn10300_local_icache_inv_range2(addr + off, size);
72 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
73}
74
75/**
76 * flush_icache_range - Globally flush dcache and invalidate icache for region
77 * @start: The starting virtual address of the region.
78 * @end: The ending virtual address of the region.
79 *
80 * This is used by the kernel to globally flush some code it has just written
81 * from the dcache back to RAM and then to globally invalidate the icache over
82 * that region so that that code can be run on all CPUs in the system.
83 */
84void flush_icache_range(unsigned long start, unsigned long end)
85{
86 unsigned long start_page, end_page;
87 unsigned long flags;
88
89 flags = smp_lock_cache();
90
91 if (end > 0x80000000UL) {
92 /* addresses above 0xa0000000 do not go through the cache */
93 if (end > 0xa0000000UL) {
94 end = 0xa0000000UL;
95 if (start >= end)
96 goto done;
97 }
98
99 /* kernel addresses between 0x80000000 and 0x9fffffff do not
100 * require page tables, so we just map such addresses
101 * directly */
102 start_page = (start >= 0x80000000UL) ? start : 0x80000000UL;
103 mn10300_icache_inv_range(start_page, end);
104 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
105 if (start_page == start)
106 goto done;
107 end = start_page;
108 }
109
110 start_page = start & PAGE_MASK;
111 end_page = (end - 1) & PAGE_MASK;
112
113 if (start_page == end_page) {
114 /* the first and last bytes are on the same page */
115 flush_icache_page_range(start, end);
116 } else if (start_page + 1 == end_page) {
117 /* split over two virtually contiguous pages */
118 flush_icache_page_range(start, end_page);
119 flush_icache_page_range(end_page, end);
120 } else {
121 /* more than 2 pages; just flush the entire cache */
122 mn10300_local_icache_inv();
123 smp_cache_call(SMP_ICACHE_INV, 0, 0);
124 }
125
126done:
127 smp_unlock_cache(flags);
128}
129EXPORT_SYMBOL(flush_icache_range);
diff --git a/arch/mn10300/mm/cache-smp-flush.c b/arch/mn10300/mm/cache-smp-flush.c
deleted file mode 100644
index fd51af5eaf70..000000000000
--- a/arch/mn10300/mm/cache-smp-flush.c
+++ /dev/null
@@ -1,156 +0,0 @@
1/* Functions for global dcache flush when writeback caching in SMP
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/mm.h>
12#include <asm/cacheflush.h>
13#include "cache-smp.h"
14
15/**
16 * mn10300_dcache_flush - Globally flush data cache
17 *
18 * Flush the data cache on all CPUs.
19 */
20void mn10300_dcache_flush(void)
21{
22 unsigned long flags;
23
24 flags = smp_lock_cache();
25 mn10300_local_dcache_flush();
26 smp_cache_call(SMP_DCACHE_FLUSH, 0, 0);
27 smp_unlock_cache(flags);
28}
29
30/**
31 * mn10300_dcache_flush_page - Globally flush a page of data cache
32 * @start: The address of the page of memory to be flushed.
33 *
34 * Flush a range of addresses in the data cache on all CPUs covering
35 * the page that includes the given address.
36 */
37void mn10300_dcache_flush_page(unsigned long start)
38{
39 unsigned long flags;
40
41 start &= ~(PAGE_SIZE-1);
42
43 flags = smp_lock_cache();
44 mn10300_local_dcache_flush_page(start);
45 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + PAGE_SIZE);
46 smp_unlock_cache(flags);
47}
48
49/**
50 * mn10300_dcache_flush_range - Globally flush range of data cache
51 * @start: The start address of the region to be flushed.
52 * @end: The end address of the region to be flushed.
53 *
54 * Flush a range of addresses in the data cache on all CPUs, between start and
55 * end-1 inclusive.
56 */
57void mn10300_dcache_flush_range(unsigned long start, unsigned long end)
58{
59 unsigned long flags;
60
61 flags = smp_lock_cache();
62 mn10300_local_dcache_flush_range(start, end);
63 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, end);
64 smp_unlock_cache(flags);
65}
66
67/**
68 * mn10300_dcache_flush_range2 - Globally flush range of data cache
69 * @start: The start address of the region to be flushed.
70 * @size: The size of the region to be flushed.
71 *
72 * Flush a range of addresses in the data cache on all CPUs, between start and
73 * start+size-1 inclusive.
74 */
75void mn10300_dcache_flush_range2(unsigned long start, unsigned long size)
76{
77 unsigned long flags;
78
79 flags = smp_lock_cache();
80 mn10300_local_dcache_flush_range2(start, size);
81 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + size);
82 smp_unlock_cache(flags);
83}
84
85/**
86 * mn10300_dcache_flush_inv - Globally flush and invalidate data cache
87 *
88 * Flush and invalidate the data cache on all CPUs.
89 */
90void mn10300_dcache_flush_inv(void)
91{
92 unsigned long flags;
93
94 flags = smp_lock_cache();
95 mn10300_local_dcache_flush_inv();
96 smp_cache_call(SMP_DCACHE_FLUSH_INV, 0, 0);
97 smp_unlock_cache(flags);
98}
99
100/**
101 * mn10300_dcache_flush_inv_page - Globally flush and invalidate a page of data
102 * cache
103 * @start: The address of the page of memory to be flushed and invalidated.
104 *
105 * Flush and invalidate a range of addresses in the data cache on all CPUs
106 * covering the page that includes the given address.
107 */
108void mn10300_dcache_flush_inv_page(unsigned long start)
109{
110 unsigned long flags;
111
112 start &= ~(PAGE_SIZE-1);
113
114 flags = smp_lock_cache();
115 mn10300_local_dcache_flush_inv_page(start);
116 smp_cache_call(SMP_DCACHE_FLUSH_INV_RANGE, start, start + PAGE_SIZE);
117 smp_unlock_cache(flags);
118}
119
120/**
121 * mn10300_dcache_flush_inv_range - Globally flush and invalidate range of data
122 * cache
123 * @start: The start address of the region to be flushed and invalidated.
124 * @end: The end address of the region to be flushed and invalidated.
125 *
126 * Flush and invalidate a range of addresses in the data cache on all CPUs,
127 * between start and end-1 inclusive.
128 */
129void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end)
130{
131 unsigned long flags;
132
133 flags = smp_lock_cache();
134 mn10300_local_dcache_flush_inv_range(start, end);
135 smp_cache_call(SMP_DCACHE_FLUSH_INV_RANGE, start, end);
136 smp_unlock_cache(flags);
137}
138
139/**
140 * mn10300_dcache_flush_inv_range2 - Globally flush and invalidate range of data
141 * cache
142 * @start: The start address of the region to be flushed and invalidated.
143 * @size: The size of the region to be flushed and invalidated.
144 *
145 * Flush and invalidate a range of addresses in the data cache on all CPUs,
146 * between start and start+size-1 inclusive.
147 */
148void mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size)
149{
150 unsigned long flags;
151
152 flags = smp_lock_cache();
153 mn10300_local_dcache_flush_inv_range2(start, size);
154 smp_cache_call(SMP_DCACHE_FLUSH_INV_RANGE, start, start + size);
155 smp_unlock_cache(flags);
156}
diff --git a/arch/mn10300/mm/cache-smp-inv.c b/arch/mn10300/mm/cache-smp-inv.c
deleted file mode 100644
index ff1787358c8e..000000000000
--- a/arch/mn10300/mm/cache-smp-inv.c
+++ /dev/null
@@ -1,153 +0,0 @@
1/* Functions for global i/dcache invalidation when caching in SMP
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/mm.h>
12#include <asm/cacheflush.h>
13#include "cache-smp.h"
14
15/**
16 * mn10300_icache_inv - Globally invalidate instruction cache
17 *
18 * Invalidate the instruction cache on all CPUs.
19 */
20void mn10300_icache_inv(void)
21{
22 unsigned long flags;
23
24 flags = smp_lock_cache();
25 mn10300_local_icache_inv();
26 smp_cache_call(SMP_ICACHE_INV, 0, 0);
27 smp_unlock_cache(flags);
28}
29
30/**
31 * mn10300_icache_inv_page - Globally invalidate a page of instruction cache
32 * @start: The address of the page of memory to be invalidated.
33 *
34 * Invalidate a range of addresses in the instruction cache on all CPUs
35 * covering the page that includes the given address.
36 */
37void mn10300_icache_inv_page(unsigned long start)
38{
39 unsigned long flags;
40
41 start &= ~(PAGE_SIZE-1);
42
43 flags = smp_lock_cache();
44 mn10300_local_icache_inv_page(start);
45 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + PAGE_SIZE);
46 smp_unlock_cache(flags);
47}
48
49/**
50 * mn10300_icache_inv_range - Globally invalidate range of instruction cache
51 * @start: The start address of the region to be invalidated.
52 * @end: The end address of the region to be invalidated.
53 *
54 * Invalidate a range of addresses in the instruction cache on all CPUs,
55 * between start and end-1 inclusive.
56 */
57void mn10300_icache_inv_range(unsigned long start, unsigned long end)
58{
59 unsigned long flags;
60
61 flags = smp_lock_cache();
62 mn10300_local_icache_inv_range(start, end);
63 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
64 smp_unlock_cache(flags);
65}
66
67/**
68 * mn10300_icache_inv_range2 - Globally invalidate range of instruction cache
69 * @start: The start address of the region to be invalidated.
70 * @size: The size of the region to be invalidated.
71 *
72 * Invalidate a range of addresses in the instruction cache on all CPUs,
73 * between start and start+size-1 inclusive.
74 */
75void mn10300_icache_inv_range2(unsigned long start, unsigned long size)
76{
77 unsigned long flags;
78
79 flags = smp_lock_cache();
80 mn10300_local_icache_inv_range2(start, size);
81 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + size);
82 smp_unlock_cache(flags);
83}
84
85/**
86 * mn10300_dcache_inv - Globally invalidate data cache
87 *
88 * Invalidate the data cache on all CPUs.
89 */
90void mn10300_dcache_inv(void)
91{
92 unsigned long flags;
93
94 flags = smp_lock_cache();
95 mn10300_local_dcache_inv();
96 smp_cache_call(SMP_DCACHE_INV, 0, 0);
97 smp_unlock_cache(flags);
98}
99
100/**
101 * mn10300_dcache_inv_page - Globally invalidate a page of data cache
102 * @start: The address of the page of memory to be invalidated.
103 *
104 * Invalidate a range of addresses in the data cache on all CPUs covering the
105 * page that includes the given address.
106 */
107void mn10300_dcache_inv_page(unsigned long start)
108{
109 unsigned long flags;
110
111 start &= ~(PAGE_SIZE-1);
112
113 flags = smp_lock_cache();
114 mn10300_local_dcache_inv_page(start);
115 smp_cache_call(SMP_DCACHE_INV_RANGE, start, start + PAGE_SIZE);
116 smp_unlock_cache(flags);
117}
118
119/**
120 * mn10300_dcache_inv_range - Globally invalidate range of data cache
121 * @start: The start address of the region to be invalidated.
122 * @end: The end address of the region to be invalidated.
123 *
124 * Invalidate a range of addresses in the data cache on all CPUs, between start
125 * and end-1 inclusive.
126 */
127void mn10300_dcache_inv_range(unsigned long start, unsigned long end)
128{
129 unsigned long flags;
130
131 flags = smp_lock_cache();
132 mn10300_local_dcache_inv_range(start, end);
133 smp_cache_call(SMP_DCACHE_INV_RANGE, start, end);
134 smp_unlock_cache(flags);
135}
136
137/**
138 * mn10300_dcache_inv_range2 - Globally invalidate range of data cache
139 * @start: The start address of the region to be invalidated.
140 * @size: The size of the region to be invalidated.
141 *
142 * Invalidate a range of addresses in the data cache on all CPUs, between start
143 * and start+size-1 inclusive.
144 */
145void mn10300_dcache_inv_range2(unsigned long start, unsigned long size)
146{
147 unsigned long flags;
148
149 flags = smp_lock_cache();
150 mn10300_local_dcache_inv_range2(start, size);
151 smp_cache_call(SMP_DCACHE_INV_RANGE, start, start + size);
152 smp_unlock_cache(flags);
153}
diff --git a/arch/mn10300/mm/cache-smp.c b/arch/mn10300/mm/cache-smp.c
deleted file mode 100644
index e80996064d3d..000000000000
--- a/arch/mn10300/mm/cache-smp.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/* SMP global caching code
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/mm.h>
13#include <linux/mman.h>
14#include <linux/threads.h>
15#include <linux/interrupt.h>
16#include <asm/page.h>
17#include <asm/pgtable.h>
18#include <asm/processor.h>
19#include <asm/cacheflush.h>
20#include <asm/io.h>
21#include <linux/uaccess.h>
22#include <asm/smp.h>
23#include "cache-smp.h"
24
25DEFINE_SPINLOCK(smp_cache_lock);
26static unsigned long smp_cache_mask;
27static unsigned long smp_cache_start;
28static unsigned long smp_cache_end;
29static cpumask_t smp_cache_ipi_map; /* Bitmask of cache IPI done CPUs */
30
31/**
32 * smp_cache_interrupt - Handle IPI request to flush caches.
33 *
34 * Handle a request delivered by IPI to flush the current CPU's
35 * caches. The parameters are stored in smp_cache_*.
36 */
37void smp_cache_interrupt(void)
38{
39 unsigned long opr_mask = smp_cache_mask;
40
41 switch ((enum smp_dcache_ops)(opr_mask & SMP_DCACHE_OP_MASK)) {
42 case SMP_DCACHE_NOP:
43 break;
44 case SMP_DCACHE_INV:
45 mn10300_local_dcache_inv();
46 break;
47 case SMP_DCACHE_INV_RANGE:
48 mn10300_local_dcache_inv_range(smp_cache_start, smp_cache_end);
49 break;
50 case SMP_DCACHE_FLUSH:
51 mn10300_local_dcache_flush();
52 break;
53 case SMP_DCACHE_FLUSH_RANGE:
54 mn10300_local_dcache_flush_range(smp_cache_start,
55 smp_cache_end);
56 break;
57 case SMP_DCACHE_FLUSH_INV:
58 mn10300_local_dcache_flush_inv();
59 break;
60 case SMP_DCACHE_FLUSH_INV_RANGE:
61 mn10300_local_dcache_flush_inv_range(smp_cache_start,
62 smp_cache_end);
63 break;
64 }
65
66 switch ((enum smp_icache_ops)(opr_mask & SMP_ICACHE_OP_MASK)) {
67 case SMP_ICACHE_NOP:
68 break;
69 case SMP_ICACHE_INV:
70 mn10300_local_icache_inv();
71 break;
72 case SMP_ICACHE_INV_RANGE:
73 mn10300_local_icache_inv_range(smp_cache_start, smp_cache_end);
74 break;
75 }
76
77 cpumask_clear_cpu(smp_processor_id(), &smp_cache_ipi_map);
78}
79
80/**
81 * smp_cache_call - Issue an IPI to request the other CPUs flush caches
82 * @opr_mask: Cache operation flags
83 * @start: Start address of request
84 * @end: End address of request
85 *
86 * Send cache flush IPI to other CPUs. This invokes smp_cache_interrupt()
87 * above on those other CPUs and then waits for them to finish.
88 *
89 * The caller must hold smp_cache_lock.
90 */
91void smp_cache_call(unsigned long opr_mask,
92 unsigned long start, unsigned long end)
93{
94 smp_cache_mask = opr_mask;
95 smp_cache_start = start;
96 smp_cache_end = end;
97 cpumask_copy(&smp_cache_ipi_map, cpu_online_mask);
98 cpumask_clear_cpu(smp_processor_id(), &smp_cache_ipi_map);
99
100 send_IPI_allbutself(FLUSH_CACHE_IPI);
101
102 while (!cpumask_empty(&smp_cache_ipi_map))
103 /* nothing. lockup detection does not belong here */
104 mb();
105}
diff --git a/arch/mn10300/mm/cache-smp.h b/arch/mn10300/mm/cache-smp.h
deleted file mode 100644
index cb52892aa66a..000000000000
--- a/arch/mn10300/mm/cache-smp.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/* SMP caching definitions
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12
13/*
14 * Operation requests for smp_cache_call().
15 *
16 * One of smp_icache_ops and one of smp_dcache_ops can be OR'd together.
17 */
18enum smp_icache_ops {
19 SMP_ICACHE_NOP = 0x0000,
20 SMP_ICACHE_INV = 0x0001,
21 SMP_ICACHE_INV_RANGE = 0x0002,
22};
23#define SMP_ICACHE_OP_MASK 0x0003
24
25enum smp_dcache_ops {
26 SMP_DCACHE_NOP = 0x0000,
27 SMP_DCACHE_INV = 0x0004,
28 SMP_DCACHE_INV_RANGE = 0x0008,
29 SMP_DCACHE_FLUSH = 0x000c,
30 SMP_DCACHE_FLUSH_RANGE = 0x0010,
31 SMP_DCACHE_FLUSH_INV = 0x0014,
32 SMP_DCACHE_FLUSH_INV_RANGE = 0x0018,
33};
34#define SMP_DCACHE_OP_MASK 0x001c
35
36#define SMP_IDCACHE_INV_FLUSH (SMP_ICACHE_INV | SMP_DCACHE_FLUSH)
37#define SMP_IDCACHE_INV_FLUSH_RANGE (SMP_ICACHE_INV_RANGE | SMP_DCACHE_FLUSH_RANGE)
38
39/*
40 * cache-smp.c
41 */
42#ifdef CONFIG_SMP
43extern spinlock_t smp_cache_lock;
44
45extern void smp_cache_call(unsigned long opr_mask,
46 unsigned long addr, unsigned long end);
47
48static inline unsigned long smp_lock_cache(void)
49 __acquires(&smp_cache_lock)
50{
51 unsigned long flags;
52 spin_lock_irqsave(&smp_cache_lock, flags);
53 return flags;
54}
55
56static inline void smp_unlock_cache(unsigned long flags)
57 __releases(&smp_cache_lock)
58{
59 spin_unlock_irqrestore(&smp_cache_lock, flags);
60}
61
62#else
63static inline unsigned long smp_lock_cache(void) { return 0; }
64static inline void smp_unlock_cache(unsigned long flags) {}
65static inline void smp_cache_call(unsigned long opr_mask,
66 unsigned long addr, unsigned long end)
67{
68}
69#endif /* CONFIG_SMP */
diff --git a/arch/mn10300/mm/cache.c b/arch/mn10300/mm/cache.c
deleted file mode 100644
index 0b925cce2b83..000000000000
--- a/arch/mn10300/mm/cache.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/* MN10300 Cache flushing routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/mm.h>
13#include <linux/mman.h>
14#include <linux/threads.h>
15#include <asm/page.h>
16#include <asm/pgtable.h>
17#include <asm/processor.h>
18#include <asm/cacheflush.h>
19#include <asm/io.h>
20#include <linux/uaccess.h>
21#include <asm/smp.h>
22#include "cache-smp.h"
23
24EXPORT_SYMBOL(mn10300_icache_inv);
25EXPORT_SYMBOL(mn10300_icache_inv_range);
26EXPORT_SYMBOL(mn10300_icache_inv_range2);
27EXPORT_SYMBOL(mn10300_icache_inv_page);
28EXPORT_SYMBOL(mn10300_dcache_inv);
29EXPORT_SYMBOL(mn10300_dcache_inv_range);
30EXPORT_SYMBOL(mn10300_dcache_inv_range2);
31EXPORT_SYMBOL(mn10300_dcache_inv_page);
32
33#ifdef CONFIG_MN10300_CACHE_WBACK
34EXPORT_SYMBOL(mn10300_dcache_flush);
35EXPORT_SYMBOL(mn10300_dcache_flush_inv);
36EXPORT_SYMBOL(mn10300_dcache_flush_inv_range);
37EXPORT_SYMBOL(mn10300_dcache_flush_inv_range2);
38EXPORT_SYMBOL(mn10300_dcache_flush_inv_page);
39EXPORT_SYMBOL(mn10300_dcache_flush_range);
40EXPORT_SYMBOL(mn10300_dcache_flush_range2);
41EXPORT_SYMBOL(mn10300_dcache_flush_page);
42#endif
43
44/*
45 * allow userspace to flush the instruction cache
46 */
47asmlinkage long sys_cacheflush(unsigned long start, unsigned long end)
48{
49 if (end < start)
50 return -EINVAL;
51
52 flush_icache_range(start, end);
53 return 0;
54}
diff --git a/arch/mn10300/mm/cache.inc b/arch/mn10300/mm/cache.inc
deleted file mode 100644
index 394a119b9c73..000000000000
--- a/arch/mn10300/mm/cache.inc
+++ /dev/null
@@ -1,133 +0,0 @@
1/* MN10300 CPU core caching macros -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12
13###############################################################################
14#
15# Invalidate the instruction cache.
16# A0: Should hold CHCTR
17# D0: Should have been read from CHCTR
18# D1: Will be clobbered
19#
20# On some cores it is necessary to disable the icache whilst we do this.
21#
22###############################################################################
23 .macro invalidate_icache,disable_irq
24
25#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
26 .if \disable_irq
27 # don't want an interrupt routine seeing a disabled cache
28 mov epsw,d1
29 and ~EPSW_IE,epsw
30 or EPSW_NMID,epsw
31 nop
32 nop
33 .endif
34
35 # disable the icache
36 and ~CHCTR_ICEN,d0
37 movhu d0,(a0)
38
39 # and wait for it to calm down
40 setlb
41 movhu (a0),d0
42 btst CHCTR_ICBUSY,d0
43 lne
44
45 # invalidate
46 or CHCTR_ICINV,d0
47 movhu d0,(a0)
48
49 # wait for the cache to finish
50 setlb
51 movhu (a0),d0
52 btst CHCTR_ICBUSY,d0
53 lne
54
55 # and reenable it
56 or CHCTR_ICEN,d0
57 movhu d0,(a0)
58 movhu (a0),d0
59
60 .if \disable_irq
61 LOCAL_IRQ_RESTORE(d1)
62 .endif
63
64#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
65
66 # invalidate
67 or CHCTR_ICINV,d0
68 movhu d0,(a0)
69 movhu (a0),d0
70
71#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
72 .endm
73
74###############################################################################
75#
76# Invalidate the data cache.
77# A0: Should hold CHCTR
78# D0: Should have been read from CHCTR
79# D1: Will be clobbered
80#
81# On some cores it is necessary to disable the dcache whilst we do this.
82#
83###############################################################################
84 .macro invalidate_dcache,disable_irq
85
86#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
87 .if \disable_irq
88 # don't want an interrupt routine seeing a disabled cache
89 mov epsw,d1
90 and ~EPSW_IE,epsw
91 or EPSW_NMID,epsw
92 nop
93 nop
94 .endif
95
96 # disable the dcache
97 and ~CHCTR_DCEN,d0
98 movhu d0,(a0)
99
100 # and wait for it to calm down
101 setlb
102 movhu (a0),d0
103 btst CHCTR_DCBUSY,d0
104 lne
105
106 # invalidate
107 or CHCTR_DCINV,d0
108 movhu d0,(a0)
109
110 # wait for the cache to finish
111 setlb
112 movhu (a0),d0
113 btst CHCTR_DCBUSY,d0
114 lne
115
116 # and reenable it
117 or CHCTR_DCEN,d0
118 movhu d0,(a0)
119 movhu (a0),d0
120
121 .if \disable_irq
122 LOCAL_IRQ_RESTORE(d1)
123 .endif
124
125#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
126
127 # invalidate
128 or CHCTR_DCINV,d0
129 movhu d0,(a0)
130 movhu (a0),d0
131
132#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
133 .endm
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
deleted file mode 100644
index e3910d4db102..000000000000
--- a/arch/mn10300/mm/dma-alloc.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/* MN10300 Dynamic DMA mapping support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from: arch/i386/kernel/pci-dma.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#include <linux/types.h>
14#include <linux/mm.h>
15#include <linux/string.h>
16#include <linux/pci.h>
17#include <linux/gfp.h>
18#include <linux/export.h>
19#include <asm/io.h>
20
21static unsigned long pci_sram_allocated = 0xbc000000;
22
23static void *mn10300_dma_alloc(struct device *dev, size_t size,
24 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
25{
26 unsigned long addr;
27 void *ret;
28
29 pr_debug("dma_alloc_coherent(%s,%zu,%x)\n",
30 dev ? dev_name(dev) : "?", size, gfp);
31
32 if (0xbe000000 - pci_sram_allocated >= size) {
33 size = (size + 255) & ~255;
34 addr = pci_sram_allocated;
35 pci_sram_allocated += size;
36 ret = (void *) addr;
37 goto done;
38 }
39
40 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
41 gfp |= GFP_DMA;
42
43 addr = __get_free_pages(gfp, get_order(size));
44 if (!addr)
45 return NULL;
46
47 /* map the coherent memory through the uncached memory window */
48 ret = (void *) (addr | 0x20000000);
49
50 /* fill the memory with obvious rubbish */
51 memset((void *) addr, 0xfb, size);
52
53 /* write back and evict all cache lines covering this region */
54 mn10300_dcache_flush_inv_range2(virt_to_phys((void *) addr), PAGE_SIZE);
55
56done:
57 *dma_handle = virt_to_bus((void *) addr);
58 printk("dma_alloc_coherent() = %p [%x]\n", ret, *dma_handle);
59 return ret;
60}
61
62static void mn10300_dma_free(struct device *dev, size_t size, void *vaddr,
63 dma_addr_t dma_handle, unsigned long attrs)
64{
65 unsigned long addr = (unsigned long) vaddr & ~0x20000000;
66
67 if (addr >= 0x9c000000)
68 return;
69
70 free_pages(addr, get_order(size));
71}
72
73static int mn10300_dma_map_sg(struct device *dev, struct scatterlist *sglist,
74 int nents, enum dma_data_direction direction,
75 unsigned long attrs)
76{
77 struct scatterlist *sg;
78 int i;
79
80 for_each_sg(sglist, sg, nents, i) {
81 BUG_ON(!sg_page(sg));
82
83 sg->dma_address = sg_phys(sg);
84 }
85
86 mn10300_dcache_flush_inv();
87 return nents;
88}
89
90static dma_addr_t mn10300_dma_map_page(struct device *dev, struct page *page,
91 unsigned long offset, size_t size,
92 enum dma_data_direction direction, unsigned long attrs)
93{
94 return page_to_bus(page) + offset;
95}
96
97static void mn10300_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
98 size_t size, enum dma_data_direction direction)
99{
100 mn10300_dcache_flush_inv();
101}
102
103static void mn10300_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
104 int nelems, enum dma_data_direction direction)
105{
106 mn10300_dcache_flush_inv();
107}
108
109static int mn10300_dma_supported(struct device *dev, u64 mask)
110{
111 /*
112 * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
113 * guarantee allocations that must be within a tighter range than
114 * GFP_DMA
115 */
116 if (mask < 0x00ffffff)
117 return 0;
118 return 1;
119}
120
121const struct dma_map_ops mn10300_dma_ops = {
122 .alloc = mn10300_dma_alloc,
123 .free = mn10300_dma_free,
124 .map_page = mn10300_dma_map_page,
125 .map_sg = mn10300_dma_map_sg,
126 .sync_single_for_device = mn10300_dma_sync_single_for_device,
127 .sync_sg_for_device = mn10300_dma_sync_sg_for_device,
128};
diff --git a/arch/mn10300/mm/extable.c b/arch/mn10300/mm/extable.c
deleted file mode 100644
index 045a903ee6b9..000000000000
--- a/arch/mn10300/mm/extable.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/* MN10300 In-kernel exception handling
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/extable.h>
12#include <linux/spinlock.h>
13#include <linux/uaccess.h>
14
15int fixup_exception(struct pt_regs *regs)
16{
17 const struct exception_table_entry *fixup;
18
19 fixup = search_exception_tables(regs->pc);
20 if (fixup) {
21 regs->pc = fixup->fixup;
22 return 1;
23 }
24
25 return 0;
26}
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c
deleted file mode 100644
index f0bfa1448744..000000000000
--- a/arch/mn10300/mm/fault.c
+++ /dev/null
@@ -1,414 +0,0 @@
1/* MN10300 MMU Fault handler
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/string.h>
18#include <linux/types.h>
19#include <linux/ptrace.h>
20#include <linux/mman.h>
21#include <linux/mm.h>
22#include <linux/smp.h>
23#include <linux/interrupt.h>
24#include <linux/init.h>
25#include <linux/vt_kern.h> /* For unblank_screen() */
26#include <linux/uaccess.h>
27
28#include <asm/pgalloc.h>
29#include <asm/hardirq.h>
30#include <asm/cpu-regs.h>
31#include <asm/debugger.h>
32#include <asm/gdb-stub.h>
33
34/*
35 * Unlock any spinlocks which will prevent us from getting the
36 * message out
37 */
38void bust_spinlocks(int yes)
39{
40 if (yes) {
41 oops_in_progress = 1;
42 } else {
43 int loglevel_save = console_loglevel;
44#ifdef CONFIG_VT
45 unblank_screen();
46#endif
47 oops_in_progress = 0;
48 /*
49 * OK, the message is on the console. Now we call printk()
50 * without oops_in_progress set so that printk will give klogd
51 * a poke. Hold onto your hats...
52 */
53 console_loglevel = 15; /* NMI oopser may have shut the console
54 * up */
55 printk(" ");
56 console_loglevel = loglevel_save;
57 }
58}
59
60void do_BUG(const char *file, int line)
61{
62 bust_spinlocks(1);
63 printk(KERN_EMERG CUT_HERE);
64 printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
65}
66
67#if 0
68static void print_pagetable_entries(pgd_t *pgdir, unsigned long address)
69{
70 pgd_t *pgd;
71 pmd_t *pmd;
72 pte_t *pte;
73
74 pgd = pgdir + __pgd_offset(address);
75 printk(KERN_DEBUG "pgd entry %p: %016Lx\n",
76 pgd, (long long) pgd_val(*pgd));
77
78 if (!pgd_present(*pgd)) {
79 printk(KERN_DEBUG "... pgd not present!\n");
80 return;
81 }
82 pmd = pmd_offset(pgd, address);
83 printk(KERN_DEBUG "pmd entry %p: %016Lx\n",
84 pmd, (long long)pmd_val(*pmd));
85
86 if (!pmd_present(*pmd)) {
87 printk(KERN_DEBUG "... pmd not present!\n");
88 return;
89 }
90 pte = pte_offset(pmd, address);
91 printk(KERN_DEBUG "pte entry %p: %016Lx\n",
92 pte, (long long) pte_val(*pte));
93
94 if (!pte_present(*pte))
95 printk(KERN_DEBUG "... pte not present!\n");
96}
97#endif
98
99/*
100 * This routine handles page faults. It determines the address,
101 * and the problem, and then passes it off to one of the appropriate
102 * routines.
103 *
104 * fault_code:
105 * - LSW: either MMUFCR_IFC or MMUFCR_DFC as appropriate
106 * - MSW: 0 if data access, 1 if instruction access
107 * - bit 0: TLB miss flag
108 * - bit 1: initial write
109 * - bit 2: page invalid
110 * - bit 3: protection violation
111 * - bit 4: accessor (0=user 1=kernel)
112 * - bit 5: 0=read 1=write
113 * - bit 6-8: page protection spec
114 * - bit 9: illegal address
115 * - bit 16: 0=data 1=ins
116 *
117 */
118asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long fault_code,
119 unsigned long address)
120{
121 struct vm_area_struct *vma;
122 struct task_struct *tsk;
123 struct mm_struct *mm;
124 unsigned long page;
125 siginfo_t info;
126 int fault;
127 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
128
129#ifdef CONFIG_GDBSTUB
130 /* handle GDB stub causing a fault */
131 if (gdbstub_busy) {
132 gdbstub_exception(regs, TBR & TBR_INT_CODE);
133 return;
134 }
135#endif
136
137#if 0
138 printk(KERN_DEBUG "--- do_page_fault(%p,%s:%04lx,%08lx)\n",
139 regs,
140 fault_code & 0x10000 ? "ins" : "data",
141 fault_code & 0xffff, address);
142#endif
143
144 tsk = current;
145
146 /*
147 * We fault-in kernel-space virtual memory on-demand. The
148 * 'reference' page table is init_mm.pgd.
149 *
150 * NOTE! We MUST NOT take any locks for this case. We may
151 * be in an interrupt or a critical region, and should
152 * only copy the information from the master page table,
153 * nothing more.
154 *
155 * This verifies that the fault happens in kernel space
156 * and that the fault was a page not present (invalid) error
157 */
158 if (address >= VMALLOC_START && address < VMALLOC_END &&
159 (fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR &&
160 (fault_code & MMUFCR_xFC_PGINVAL) == MMUFCR_xFC_PGINVAL
161 )
162 goto vmalloc_fault;
163
164 mm = tsk->mm;
165 info.si_code = SEGV_MAPERR;
166
167 /*
168 * If we're in an interrupt or have no user
169 * context, we must not take the fault..
170 */
171 if (faulthandler_disabled() || !mm)
172 goto no_context;
173
174 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR)
175 flags |= FAULT_FLAG_USER;
176retry:
177 down_read(&mm->mmap_sem);
178
179 vma = find_vma(mm, address);
180 if (!vma)
181 goto bad_area;
182 if (vma->vm_start <= address)
183 goto good_area;
184 if (!(vma->vm_flags & VM_GROWSDOWN))
185 goto bad_area;
186
187 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
188 /* accessing the stack below the stack pointer is always a
189 * bug */
190 if ((address & PAGE_MASK) + 2 * PAGE_SIZE < regs->sp) {
191#if 0
192 printk(KERN_WARNING
193 "[%d] ### Access below stack @%lx (sp=%lx)\n",
194 current->pid, address, regs->sp);
195 printk(KERN_WARNING
196 "vma [%08x - %08x]\n",
197 vma->vm_start, vma->vm_end);
198 show_registers(regs);
199 printk(KERN_WARNING
200 "[%d] ### Code: [%08lx]"
201 " %02x %02x %02x %02x %02x %02x %02x %02x\n",
202 current->pid,
203 regs->pc,
204 ((u8 *) regs->pc)[0],
205 ((u8 *) regs->pc)[1],
206 ((u8 *) regs->pc)[2],
207 ((u8 *) regs->pc)[3],
208 ((u8 *) regs->pc)[4],
209 ((u8 *) regs->pc)[5],
210 ((u8 *) regs->pc)[6],
211 ((u8 *) regs->pc)[7]
212 );
213#endif
214 goto bad_area;
215 }
216 }
217
218 if (expand_stack(vma, address))
219 goto bad_area;
220
221/*
222 * Ok, we have a good vm_area for this memory access, so
223 * we can handle it..
224 */
225good_area:
226 info.si_code = SEGV_ACCERR;
227 switch (fault_code & (MMUFCR_xFC_PGINVAL|MMUFCR_xFC_TYPE)) {
228 default: /* 3: write, present */
229 case MMUFCR_xFC_TYPE_WRITE:
230#ifdef TEST_VERIFY_AREA
231 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR)
232 printk(KERN_DEBUG "WP fault at %08lx\n", regs->pc);
233#endif
234 /* write to absent page */
235 case MMUFCR_xFC_PGINVAL | MMUFCR_xFC_TYPE_WRITE:
236 if (!(vma->vm_flags & VM_WRITE))
237 goto bad_area;
238 flags |= FAULT_FLAG_WRITE;
239 break;
240
241 /* read from protected page */
242 case MMUFCR_xFC_TYPE_READ:
243 goto bad_area;
244
245 /* read from absent page present */
246 case MMUFCR_xFC_PGINVAL | MMUFCR_xFC_TYPE_READ:
247 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
248 goto bad_area;
249 break;
250 }
251
252 /*
253 * If for any reason at all we couldn't handle the fault,
254 * make sure we exit gracefully rather than endlessly redo
255 * the fault.
256 */
257 fault = handle_mm_fault(vma, address, flags);
258
259 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
260 return;
261
262 if (unlikely(fault & VM_FAULT_ERROR)) {
263 if (fault & VM_FAULT_OOM)
264 goto out_of_memory;
265 else if (fault & VM_FAULT_SIGSEGV)
266 goto bad_area;
267 else if (fault & VM_FAULT_SIGBUS)
268 goto do_sigbus;
269 BUG();
270 }
271 if (flags & FAULT_FLAG_ALLOW_RETRY) {
272 if (fault & VM_FAULT_MAJOR)
273 current->maj_flt++;
274 else
275 current->min_flt++;
276 if (fault & VM_FAULT_RETRY) {
277 flags &= ~FAULT_FLAG_ALLOW_RETRY;
278
279 /* No need to up_read(&mm->mmap_sem) as we would
280 * have already released it in __lock_page_or_retry
281 * in mm/filemap.c.
282 */
283
284 goto retry;
285 }
286 }
287
288 up_read(&mm->mmap_sem);
289 return;
290
291/*
292 * Something tried to access memory that isn't in our memory map..
293 * Fix it, but check if it's kernel or user first..
294 */
295bad_area:
296 up_read(&mm->mmap_sem);
297
298 /* User mode accesses just cause a SIGSEGV */
299 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
300 info.si_signo = SIGSEGV;
301 info.si_errno = 0;
302 /* info.si_code has been set above */
303 info.si_addr = (void *)address;
304 force_sig_info(SIGSEGV, &info, tsk);
305 return;
306 }
307
308no_context:
309 /* Are we prepared to handle this kernel fault? */
310 if (fixup_exception(regs))
311 return;
312
313/*
314 * Oops. The kernel tried to access some bad page. We'll have to
315 * terminate things with extreme prejudice.
316 */
317
318 bust_spinlocks(1);
319
320 if (address < PAGE_SIZE)
321 printk(KERN_ALERT
322 "Unable to handle kernel NULL pointer dereference");
323 else
324 printk(KERN_ALERT
325 "Unable to handle kernel paging request");
326 printk(" at virtual address %08lx\n", address);
327 printk(" printing pc:\n");
328 printk(KERN_ALERT "%08lx\n", regs->pc);
329
330 debugger_intercept(fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR,
331 SIGSEGV, SEGV_ACCERR, regs);
332
333 page = PTBR;
334 page = ((unsigned long *) __va(page))[address >> 22];
335 printk(KERN_ALERT "*pde = %08lx\n", page);
336 if (page & 1) {
337 page &= PAGE_MASK;
338 address &= 0x003ff000;
339 page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
340 printk(KERN_ALERT "*pte = %08lx\n", page);
341 }
342
343 die("Oops", regs, fault_code);
344 do_exit(SIGKILL);
345
346/*
347 * We ran out of memory, or some other thing happened to us that made
348 * us unable to handle the page fault gracefully.
349 */
350out_of_memory:
351 up_read(&mm->mmap_sem);
352 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
353 pagefault_out_of_memory();
354 return;
355 }
356 goto no_context;
357
358do_sigbus:
359 up_read(&mm->mmap_sem);
360
361 /*
362 * Send a sigbus, regardless of whether we were in kernel
363 * or user mode.
364 */
365 info.si_signo = SIGBUS;
366 info.si_errno = 0;
367 info.si_code = BUS_ADRERR;
368 info.si_addr = (void *)address;
369 force_sig_info(SIGBUS, &info, tsk);
370
371 /* Kernel mode? Handle exceptions or die */
372 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR)
373 goto no_context;
374 return;
375
376vmalloc_fault:
377 {
378 /*
379 * Synchronize this task's top level page-table
380 * with the 'reference' page table.
381 *
382 * Do _not_ use "tsk" here. We might be inside
383 * an interrupt in the middle of a task switch..
384 */
385 int index = pgd_index(address);
386 pgd_t *pgd, *pgd_k;
387 pud_t *pud, *pud_k;
388 pmd_t *pmd, *pmd_k;
389 pte_t *pte_k;
390
391 pgd_k = init_mm.pgd + index;
392
393 if (!pgd_present(*pgd_k))
394 goto no_context;
395
396 pud_k = pud_offset(pgd_k, address);
397 if (!pud_present(*pud_k))
398 goto no_context;
399
400 pmd_k = pmd_offset(pud_k, address);
401 if (!pmd_present(*pmd_k))
402 goto no_context;
403
404 pgd = (pgd_t *) PTBR + index;
405 pud = pud_offset(pgd, address);
406 pmd = pmd_offset(pud, address);
407 set_pmd(pmd, *pmd_k);
408
409 pte_k = pte_offset_kernel(pmd_k, address);
410 if (!pte_present(*pte_k))
411 goto no_context;
412 return;
413 }
414}
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
deleted file mode 100644
index 8ce677d5575e..000000000000
--- a/arch/mn10300/mm/init.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/* MN10300 Memory management initialisation
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/signal.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/ptrace.h>
19#include <linux/mman.h>
20#include <linux/fs.h>
21#include <linux/mm.h>
22#include <linux/swap.h>
23#include <linux/smp.h>
24#include <linux/init.h>
25#include <linux/initrd.h>
26#include <linux/highmem.h>
27#include <linux/pagemap.h>
28#include <linux/bootmem.h>
29#include <linux/gfp.h>
30
31#include <asm/processor.h>
32#include <linux/uaccess.h>
33#include <asm/pgtable.h>
34#include <asm/pgalloc.h>
35#include <asm/dma.h>
36#include <asm/tlb.h>
37#include <asm/sections.h>
38
39unsigned long highstart_pfn, highend_pfn;
40
41#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
42static struct vm_struct user_iomap_vm;
43#endif
44
45/*
46 * set up paging
47 */
48void __init paging_init(void)
49{
50 unsigned long zones_size[MAX_NR_ZONES] = {0,};
51 pte_t *ppte;
52 int loop;
53
54 /* main kernel space -> RAM mapping is handled as 1:1 transparent by
55 * the MMU */
56 memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
57 memset(kernel_vmalloc_ptes, 0, sizeof(kernel_vmalloc_ptes));
58
59 /* load the VMALLOC area PTE table addresses into the kernel PGD */
60 ppte = kernel_vmalloc_ptes;
61 for (loop = VMALLOC_START / (PAGE_SIZE * PTRS_PER_PTE);
62 loop < VMALLOC_END / (PAGE_SIZE * PTRS_PER_PTE);
63 loop++
64 ) {
65 set_pgd(swapper_pg_dir + loop, __pgd(__pa(ppte) | _PAGE_TABLE));
66 ppte += PAGE_SIZE / sizeof(pte_t);
67 }
68
69 /* declare the sizes of the RAM zones (only use the normal zone) */
70 zones_size[ZONE_NORMAL] =
71 contig_page_data.bdata->node_low_pfn -
72 contig_page_data.bdata->node_min_pfn;
73
74 /* pass the memory from the bootmem allocator to the main allocator */
75 free_area_init(zones_size);
76
77#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
78 /* The Atomic Operation Unit registers need to be mapped to userspace
79 * for all processes. The following uses vm_area_register_early() to
80 * reserve the first page of the vmalloc area and sets the pte for that
81 * page.
82 *
83 * glibc hardcodes this virtual mapping, so we're pretty much stuck with
84 * it from now on.
85 */
86 user_iomap_vm.flags = VM_USERMAP;
87 user_iomap_vm.size = 1 << PAGE_SHIFT;
88 vm_area_register_early(&user_iomap_vm, PAGE_SIZE);
89 ppte = kernel_vmalloc_ptes;
90 set_pte(ppte, pfn_pte(USER_ATOMIC_OPS_PAGE_ADDR >> PAGE_SHIFT,
91 PAGE_USERIO));
92#endif
93
94 local_flush_tlb_all();
95}
96
97/*
98 * transfer all the memory from the bootmem allocator to the runtime allocator
99 */
100void __init mem_init(void)
101{
102 BUG_ON(!mem_map);
103
104#define START_PFN (contig_page_data.bdata->node_min_pfn)
105#define MAX_LOW_PFN (contig_page_data.bdata->node_low_pfn)
106
107 max_mapnr = MAX_LOW_PFN - START_PFN;
108 high_memory = (void *) __va(MAX_LOW_PFN * PAGE_SIZE);
109
110 /* clear the zero-page */
111 memset(empty_zero_page, 0, PAGE_SIZE);
112
113 /* this will put all low memory onto the freelists */
114 free_all_bootmem();
115
116 mem_init_print_info(NULL);
117}
118
119/*
120 * recycle memory containing stuff only required for initialisation
121 */
122void free_initmem(void)
123{
124 free_initmem_default(POISON_FREE_INITMEM);
125}
126
127/*
128 * dispose of the memory on which the initial ramdisk resided
129 */
130#ifdef CONFIG_BLK_DEV_INITRD
131void free_initrd_mem(unsigned long start, unsigned long end)
132{
133 free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM,
134 "initrd");
135}
136#endif
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
deleted file mode 100644
index 8ace89617c1c..000000000000
--- a/arch/mn10300/mm/misalignment.c
+++ /dev/null
@@ -1,966 +0,0 @@
1/* MN10300 Misalignment fixup handler
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/extable.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/ptrace.h>
17#include <linux/timer.h>
18#include <linux/mm.h>
19#include <linux/smp.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/pci.h>
25#include <asm/processor.h>
26#include <linux/uaccess.h>
27#include <asm/io.h>
28#include <linux/atomic.h>
29#include <asm/smp.h>
30#include <asm/pgalloc.h>
31#include <asm/cpu-regs.h>
32#include <asm/busctl-regs.h>
33#include <asm/fpu.h>
34#include <asm/gdb-stub.h>
35#include <asm/asm-offsets.h>
36
37#if 0
38#define kdebug(FMT, ...) printk(KERN_DEBUG "MISALIGN: "FMT"\n", ##__VA_ARGS__)
39#else
40#define kdebug(FMT, ...) do {} while (0)
41#endif
42
43static int misalignment_addr(unsigned long *registers, unsigned long sp,
44 unsigned params, unsigned opcode,
45 unsigned long disp,
46 void **_address, unsigned long **_postinc,
47 unsigned long *_inc);
48
49static int misalignment_reg(unsigned long *registers, unsigned params,
50 unsigned opcode, unsigned long disp,
51 unsigned long **_register);
52
53static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode);
54
55static const unsigned Dreg_index[] = {
56 REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
57};
58
59static const unsigned Areg_index[] = {
60 REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2
61};
62
63static const unsigned Rreg_index[] = {
64 REG_E0 >> 2, REG_E1 >> 2, REG_E2 >> 2, REG_E3 >> 2,
65 REG_E4 >> 2, REG_E5 >> 2, REG_E6 >> 2, REG_E7 >> 2,
66 REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2,
67 REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
68};
69
70enum format_id {
71 FMT_S0,
72 FMT_S1,
73 FMT_S2,
74 FMT_S4,
75 FMT_D0,
76 FMT_D1,
77 FMT_D2,
78 FMT_D4,
79 FMT_D6,
80 FMT_D7,
81 FMT_D8,
82 FMT_D9,
83 FMT_D10,
84};
85
86static const struct {
87 u_int8_t opsz, dispsz;
88} format_tbl[16] = {
89 [FMT_S0] = { 8, 0 },
90 [FMT_S1] = { 8, 8 },
91 [FMT_S2] = { 8, 16 },
92 [FMT_S4] = { 8, 32 },
93 [FMT_D0] = { 16, 0 },
94 [FMT_D1] = { 16, 8 },
95 [FMT_D2] = { 16, 16 },
96 [FMT_D4] = { 16, 32 },
97 [FMT_D6] = { 24, 0 },
98 [FMT_D7] = { 24, 8 },
99 [FMT_D8] = { 24, 24 },
100 [FMT_D9] = { 24, 32 },
101 [FMT_D10] = { 32, 0 },
102};
103
104enum value_id {
105 DM0, /* data reg in opcode in bits 0-1 */
106 DM1, /* data reg in opcode in bits 2-3 */
107 DM2, /* data reg in opcode in bits 4-5 */
108 AM0, /* addr reg in opcode in bits 0-1 */
109 AM1, /* addr reg in opcode in bits 2-3 */
110 AM2, /* addr reg in opcode in bits 4-5 */
111 RM0, /* reg in opcode in bits 0-3 */
112 RM1, /* reg in opcode in bits 2-5 */
113 RM2, /* reg in opcode in bits 4-7 */
114 RM4, /* reg in opcode in bits 8-11 */
115 RM6, /* reg in opcode in bits 12-15 */
116
117 RD0, /* reg in displacement in bits 0-3 */
118 RD2, /* reg in displacement in bits 4-7 */
119
120 SP, /* stack pointer */
121
122 SD8, /* 8-bit signed displacement */
123 SD16, /* 16-bit signed displacement */
124 SD24, /* 24-bit signed displacement */
125 SIMM4_2, /* 4-bit signed displacement in opcode bits 4-7 */
126 SIMM8, /* 8-bit signed immediate */
127 IMM8, /* 8-bit unsigned immediate */
128 IMM16, /* 16-bit unsigned immediate */
129 IMM24, /* 24-bit unsigned immediate */
130 IMM32, /* 32-bit unsigned immediate */
131 IMM32_HIGH8, /* 32-bit unsigned immediate, LSB in opcode */
132
133 IMM32_MEM, /* 32-bit unsigned displacement */
134 IMM32_HIGH8_MEM, /* 32-bit unsigned displacement, LSB in opcode */
135
136 DN0 = DM0,
137 DN1 = DM1,
138 DN2 = DM2,
139 AN0 = AM0,
140 AN1 = AM1,
141 AN2 = AM2,
142 RN0 = RM0,
143 RN1 = RM1,
144 RN2 = RM2,
145 RN4 = RM4,
146 RN6 = RM6,
147 DI = DM1,
148 RI = RM2,
149
150};
151
152struct mn10300_opcode {
153 const char name[8];
154 u_int32_t opcode;
155 u_int32_t opmask;
156 unsigned exclusion;
157
158 enum format_id format;
159
160 unsigned cpu_mask;
161#define AM33 330
162
163 unsigned params[2];
164#define MEM(ADDR) (0x80000000 | (ADDR))
165#define MEM2(ADDR1, ADDR2) (0x80000000 | (ADDR1) << 8 | (ADDR2))
166#define MEMINC(ADDR) (0x81000000 | (ADDR))
167#define MEMINC2(ADDR, INC) (0x81000000 | (ADDR) << 8 | (INC))
168};
169
170/* LIBOPCODES EXCERPT
171 Assemble Matsushita MN10300 instructions.
172 Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
173
174 This program is free software; you can redistribute it and/or modify
175 it under the terms of the GNU General Public Licence as published by
176 the Free Software Foundation; either version 2 of the Licence, or
177 (at your option) any later version.
178
179 This program is distributed in the hope that it will be useful,
180 but WITHOUT ANY WARRANTY; without even the implied warranty of
181 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
182 GNU General Public Licence for more details.
183
184 You should have received a copy of the GNU General Public Licence
185 along with this program; if not, write to the Free Software
186 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
187*/
188static const struct mn10300_opcode mn10300_opcodes[] = {
189{ "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}},
190{ "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}},
191{ "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}},
192{ "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
193{ "mov", 0x60, 0xf0, 0, FMT_S0, 0, {DM1, MEM(AN0)}},
194{ "mov", 0x70, 0xf0, 0, FMT_S0, 0, {MEM(AM0), DN1}},
195{ "mov", 0xf000, 0xfff0, 0, FMT_D0, 0, {MEM(AM0), AN1}},
196{ "mov", 0xf010, 0xfff0, 0, FMT_D0, 0, {AM1, MEM(AN0)}},
197{ "mov", 0xf300, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), DN2}},
198{ "mov", 0xf340, 0xffc0, 0, FMT_D0, 0, {DM2, MEM2(DI, AN0)}},
199{ "mov", 0xf380, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), AN2}},
200{ "mov", 0xf3c0, 0xffc0, 0, FMT_D0, 0, {AM2, MEM2(DI, AN0)}},
201{ "mov", 0xf80000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8, AM0), DN1}},
202{ "mov", 0xf81000, 0xfff000, 0, FMT_D1, 0, {DM1, MEM2(SD8, AN0)}},
203{ "mov", 0xf82000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8,AM0), AN1}},
204{ "mov", 0xf83000, 0xfff000, 0, FMT_D1, 0, {AM1, MEM2(SD8, AN0)}},
205{ "mov", 0xf90a00, 0xffff00, 0, FMT_D6, AM33, {MEM(RM0), RN2}},
206{ "mov", 0xf91a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEM(RN0)}},
207{ "mov", 0xf96a00, 0xffff00, 0x12, FMT_D6, AM33, {MEMINC(RM0), RN2}},
208{ "mov", 0xf97a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEMINC(RN0)}},
209{ "mov", 0xfa000000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), DN1}},
210{ "mov", 0xfa100000, 0xfff00000, 0, FMT_D2, 0, {DM1, MEM2(SD16, AN0)}},
211{ "mov", 0xfa200000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), AN1}},
212{ "mov", 0xfa300000, 0xfff00000, 0, FMT_D2, 0, {AM1, MEM2(SD16, AN0)}},
213{ "mov", 0xfa900000, 0xfff30000, 0, FMT_D2, 0, {AM1, MEM2(IMM16, SP)}},
214{ "mov", 0xfa910000, 0xfff30000, 0, FMT_D2, 0, {DM1, MEM2(IMM16, SP)}},
215{ "mov", 0xfab00000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), AN0}},
216{ "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}},
217{ "mov", 0xfb0a0000, 0xffff0000, 0, FMT_D7, AM33, {MEM2(SD8, RM0), RN2}},
218{ "mov", 0xfb1a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEM2(SD8, RN0)}},
219{ "mov", 0xfb6a0000, 0xffff0000, 0x22, FMT_D7, AM33, {MEMINC2 (RM0, SIMM8), RN2}},
220{ "mov", 0xfb7a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEMINC2 (RN0, SIMM8)}},
221{ "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
222{ "mov", 0xfb8e0000, 0xffff000f, 0, FMT_D7, AM33, {MEM2(RI, RM0), RD2}},
223{ "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}},
224{ "mov", 0xfb9e0000, 0xffff000f, 0, FMT_D7, AM33, {RD2, MEM2(RI, RN0)}},
225{ "mov", 0xfc000000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), DN1}},
226{ "mov", 0xfc100000, 0xfff00000, 0, FMT_D4, 0, {DM1, MEM2(IMM32,AN0)}},
227{ "mov", 0xfc200000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), AN1}},
228{ "mov", 0xfc300000, 0xfff00000, 0, FMT_D4, 0, {AM1, MEM2(IMM32,AN0)}},
229{ "mov", 0xfc800000, 0xfff30000, 0, FMT_D4, 0, {AM1, MEM(IMM32_MEM)}},
230{ "mov", 0xfc810000, 0xfff30000, 0, FMT_D4, 0, {DM1, MEM(IMM32_MEM)}},
231{ "mov", 0xfc900000, 0xfff30000, 0, FMT_D4, 0, {AM1, MEM2(IMM32, SP)}},
232{ "mov", 0xfc910000, 0xfff30000, 0, FMT_D4, 0, {DM1, MEM2(IMM32, SP)}},
233{ "mov", 0xfca00000, 0xfffc0000, 0, FMT_D4, 0, {MEM(IMM32_MEM), AN0}},
234{ "mov", 0xfca40000, 0xfffc0000, 0, FMT_D4, 0, {MEM(IMM32_MEM), DN0}},
235{ "mov", 0xfcb00000, 0xfffc0000, 0, FMT_D4, 0, {MEM2(IMM32, SP), AN0}},
236{ "mov", 0xfcb40000, 0xfffc0000, 0, FMT_D4, 0, {MEM2(IMM32, SP), DN0}},
237{ "mov", 0xfd0a0000, 0xffff0000, 0, FMT_D8, AM33, {MEM2(SD24, RM0), RN2}},
238{ "mov", 0xfd1a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEM2(SD24, RN0)}},
239{ "mov", 0xfd6a0000, 0xffff0000, 0x22, FMT_D8, AM33, {MEMINC2 (RM0, IMM24), RN2}},
240{ "mov", 0xfd7a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEMINC2 (RN0, IMM24)}},
241{ "mov", 0xfd8a0000, 0xffff0f00, 0, FMT_D8, AM33, {MEM2(IMM24, SP), RN2}},
242{ "mov", 0xfd9a0000, 0xffff0f00, 0, FMT_D8, AM33, {RM2, MEM2(IMM24, SP)}},
243{ "mov", 0xfe0a0000, 0xffff0000, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8,RM0), RN2}},
244{ "mov", 0xfe0a0000, 0xffff0000, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8,RM0), RN2}},
245{ "mov", 0xfe0e0000, 0xffff0f00, 0, FMT_D9, AM33, {MEM(IMM32_HIGH8_MEM), RN2}},
246{ "mov", 0xfe1a0000, 0xffff0000, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, RN0)}},
247{ "mov", 0xfe1a0000, 0xffff0000, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, RN0)}},
248{ "mov", 0xfe1e0000, 0xffff0f00, 0, FMT_D9, AM33, {RM2, MEM(IMM32_HIGH8_MEM)}},
249{ "mov", 0xfe6a0000, 0xffff0000, 0x22, FMT_D9, AM33, {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
250{ "mov", 0xfe7a0000, 0xffff0000, 0, FMT_D9, AM33, {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
251{ "mov", 0xfe8a0000, 0xffff0f00, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8, SP), RN2}},
252{ "mov", 0xfe9a0000, 0xffff0f00, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, SP)}},
253
254{ "movhu", 0xf060, 0xfff0, 0, FMT_D0, 0, {MEM(AM0), DN1}},
255{ "movhu", 0xf070, 0xfff0, 0, FMT_D0, 0, {DM1, MEM(AN0)}},
256{ "movhu", 0xf480, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), DN2}},
257{ "movhu", 0xf4c0, 0xffc0, 0, FMT_D0, 0, {DM2, MEM2(DI, AN0)}},
258{ "movhu", 0xf86000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8, AM0), DN1}},
259{ "movhu", 0xf87000, 0xfff000, 0, FMT_D1, 0, {DM1, MEM2(SD8, AN0)}},
260{ "movhu", 0xf89300, 0xfff300, 0, FMT_D1, 0, {DM1, MEM2(IMM8, SP)}},
261{ "movhu", 0xf8bc00, 0xfffc00, 0, FMT_D1, 0, {MEM2(IMM8, SP), DN0}},
262{ "movhu", 0xf94a00, 0xffff00, 0, FMT_D6, AM33, {MEM(RM0), RN2}},
263{ "movhu", 0xf95a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEM(RN0)}},
264{ "movhu", 0xf9ea00, 0xffff00, 0x12, FMT_D6, AM33, {MEMINC(RM0), RN2}},
265{ "movhu", 0xf9fa00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEMINC(RN0)}},
266{ "movhu", 0xfa600000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), DN1}},
267{ "movhu", 0xfa700000, 0xfff00000, 0, FMT_D2, 0, {DM1, MEM2(SD16, AN0)}},
268{ "movhu", 0xfa930000, 0xfff30000, 0, FMT_D2, 0, {DM1, MEM2(IMM16, SP)}},
269{ "movhu", 0xfabc0000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}},
270{ "movhu", 0xfb4a0000, 0xffff0000, 0, FMT_D7, AM33, {MEM2(SD8, RM0), RN2}},
271{ "movhu", 0xfb5a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEM2(SD8, RN0)}},
272{ "movhu", 0xfbca0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
273{ "movhu", 0xfbce0000, 0xffff000f, 0, FMT_D7, AM33, {MEM2(RI, RM0), RD2}},
274{ "movhu", 0xfbda0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}},
275{ "movhu", 0xfbde0000, 0xffff000f, 0, FMT_D7, AM33, {RD2, MEM2(RI, RN0)}},
276{ "movhu", 0xfbea0000, 0xffff0000, 0x22, FMT_D7, AM33, {MEMINC2 (RM0, SIMM8), RN2}},
277{ "movhu", 0xfbfa0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEMINC2 (RN0, SIMM8)}},
278{ "movhu", 0xfc600000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), DN1}},
279{ "movhu", 0xfc700000, 0xfff00000, 0, FMT_D4, 0, {DM1, MEM2(IMM32,AN0)}},
280{ "movhu", 0xfc830000, 0xfff30000, 0, FMT_D4, 0, {DM1, MEM(IMM32_MEM)}},
281{ "movhu", 0xfc930000, 0xfff30000, 0, FMT_D4, 0, {DM1, MEM2(IMM32, SP)}},
282{ "movhu", 0xfcac0000, 0xfffc0000, 0, FMT_D4, 0, {MEM(IMM32_MEM), DN0}},
283{ "movhu", 0xfcbc0000, 0xfffc0000, 0, FMT_D4, 0, {MEM2(IMM32, SP), DN0}},
284{ "movhu", 0xfd4a0000, 0xffff0000, 0, FMT_D8, AM33, {MEM2(SD24, RM0), RN2}},
285{ "movhu", 0xfd5a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEM2(SD24, RN0)}},
286{ "movhu", 0xfdca0000, 0xffff0f00, 0, FMT_D8, AM33, {MEM2(IMM24, SP), RN2}},
287{ "movhu", 0xfdda0000, 0xffff0f00, 0, FMT_D8, AM33, {RM2, MEM2(IMM24, SP)}},
288{ "movhu", 0xfdea0000, 0xffff0000, 0x22, FMT_D8, AM33, {MEMINC2 (RM0, IMM24), RN2}},
289{ "movhu", 0xfdfa0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEMINC2 (RN0, IMM24)}},
290{ "movhu", 0xfe4a0000, 0xffff0000, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8,RM0), RN2}},
291{ "movhu", 0xfe4e0000, 0xffff0f00, 0, FMT_D9, AM33, {MEM(IMM32_HIGH8_MEM), RN2}},
292{ "movhu", 0xfe5a0000, 0xffff0000, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, RN0)}},
293{ "movhu", 0xfe5e0000, 0xffff0f00, 0, FMT_D9, AM33, {RM2, MEM(IMM32_HIGH8_MEM)}},
294{ "movhu", 0xfeca0000, 0xffff0f00, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8, SP), RN2}},
295{ "movhu", 0xfeda0000, 0xffff0f00, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, SP)}},
296{ "movhu", 0xfeea0000, 0xffff0000, 0x22, FMT_D9, AM33, {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
297{ "movhu", 0xfefa0000, 0xffff0000, 0, FMT_D9, AM33, {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
298
299{ "mov_llt", 0xf7e00000, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
300{ "mov_lgt", 0xf7e00001, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
301{ "mov_lge", 0xf7e00002, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
302{ "mov_lle", 0xf7e00003, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
303{ "mov_lcs", 0xf7e00004, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
304{ "mov_lhi", 0xf7e00005, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
305{ "mov_lcc", 0xf7e00006, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
306{ "mov_lls", 0xf7e00007, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
307{ "mov_leq", 0xf7e00008, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
308{ "mov_lne", 0xf7e00009, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
309{ "mov_lra", 0xf7e0000a, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}},
310
311{ "", 0, 0, 0, 0, 0, {0}},
312};
313
314/*
315 * fix up misalignment problems where possible
316 */
317asmlinkage void misalignment(struct pt_regs *regs, enum exception_code code)
318{
319 const struct exception_table_entry *fixup;
320 const struct mn10300_opcode *pop;
321 unsigned long *registers = (unsigned long *) regs;
322 unsigned long data, *store, *postinc, disp, inc, sp;
323 mm_segment_t seg;
324 siginfo_t info;
325 uint32_t opcode, noc, xo, xm;
326 uint8_t *pc, byte, datasz;
327 void *address;
328 unsigned tmp, npop, dispsz, loop;
329
330 /* we don't fix up userspace misalignment faults */
331 if (user_mode(regs))
332 goto bus_error;
333
334 sp = (unsigned long) regs + sizeof(*regs);
335
336 kdebug("==>misalignment({pc=%lx,sp=%lx})", regs->pc, sp);
337
338 if (regs->epsw & EPSW_IE)
339 asm volatile("or %0,epsw" : : "i"(EPSW_IE));
340
341 seg = get_fs();
342 set_fs(KERNEL_DS);
343
344 fixup = search_exception_tables(regs->pc);
345
346 /* first thing to do is to match the opcode */
347 pc = (u_int8_t *) regs->pc;
348
349 if (__get_user(byte, pc) != 0)
350 goto fetch_error;
351 opcode = byte;
352 noc = 8;
353
354 for (pop = mn10300_opcodes; pop->name[0]; pop++) {
355 npop = ilog2(pop->opcode | pop->opmask);
356 if (npop <= 0 || npop > 31)
357 continue;
358 npop = (npop + 8) & ~7;
359
360 got_more_bits:
361 if (npop == noc) {
362 if ((opcode & pop->opmask) == pop->opcode)
363 goto found_opcode;
364 } else if (npop > noc) {
365 xo = pop->opcode >> (npop - noc);
366 xm = pop->opmask >> (npop - noc);
367
368 if ((opcode & xm) != xo)
369 continue;
370
371 /* we've got a partial match (an exact match on the
372 * first N bytes), so we need to get some more data */
373 pc++;
374 if (__get_user(byte, pc) != 0)
375 goto fetch_error;
376 opcode = opcode << 8 | byte;
377 noc += 8;
378 goto got_more_bits;
379 } else {
380 /* there's already been a partial match as long as the
381 * complete match we're now considering, so this one
382 * should't match */
383 continue;
384 }
385 }
386
387 /* didn't manage to find a fixup */
388 printk(KERN_CRIT "MISALIGN: %lx: unsupported instruction %x\n",
389 regs->pc, opcode);
390
391failed:
392 set_fs(seg);
393 if (die_if_no_fixup("misalignment error", regs, code))
394 return;
395
396bus_error:
397 info.si_signo = SIGBUS;
398 info.si_errno = 0;
399 info.si_code = BUS_ADRALN;
400 info.si_addr = (void *) regs->pc;
401 force_sig_info(SIGBUS, &info, current);
402 return;
403
404 /* error reading opcodes */
405fetch_error:
406 printk(KERN_CRIT
407 "MISALIGN: %p: fault whilst reading instruction data\n",
408 pc);
409 goto failed;
410
411bad_addr_mode:
412 printk(KERN_CRIT
413 "MISALIGN: %lx: unsupported addressing mode %x\n",
414 regs->pc, opcode);
415 goto failed;
416
417bad_reg_mode:
418 printk(KERN_CRIT
419 "MISALIGN: %lx: unsupported register mode %x\n",
420 regs->pc, opcode);
421 goto failed;
422
423unsupported_instruction:
424 printk(KERN_CRIT
425 "MISALIGN: %lx: unsupported instruction %x (%s)\n",
426 regs->pc, opcode, pop->name);
427 goto failed;
428
429transfer_failed:
430 set_fs(seg);
431 if (fixup) {
432 regs->pc = fixup->fixup;
433 return;
434 }
435 if (die_if_no_fixup("misalignment fixup", regs, code))
436 return;
437
438 info.si_signo = SIGSEGV;
439 info.si_errno = 0;
440 info.si_code = SEGV_MAPERR;
441 info.si_addr = (void *) regs->pc;
442 force_sig_info(SIGSEGV, &info, current);
443 return;
444
445 /* we matched the opcode */
446found_opcode:
447 kdebug("%lx: %x==%x { %x, %x }",
448 regs->pc, opcode, pop->opcode, pop->params[0], pop->params[1]);
449
450 tmp = format_tbl[pop->format].opsz;
451 BUG_ON(tmp > noc); /* match was less complete than it ought to have been */
452
453 if (tmp < noc) {
454 tmp = noc - tmp;
455 opcode >>= tmp;
456 pc -= tmp >> 3;
457 }
458
459 /* grab the extra displacement (note it's LSB first) */
460 disp = 0;
461 dispsz = format_tbl[pop->format].dispsz;
462 for (loop = 0; loop < dispsz; loop += 8) {
463 pc++;
464 if (__get_user(byte, pc) != 0)
465 goto fetch_error;
466 disp |= byte << loop;
467 kdebug("{%p} disp[%02x]=%02x", pc, loop, byte);
468 }
469
470 kdebug("disp=%lx", disp);
471
472 set_fs(KERNEL_XDS);
473 if (fixup)
474 set_fs(seg);
475
476 tmp = (pop->params[0] ^ pop->params[1]) & 0x80000000;
477 if (!tmp) {
478 printk(KERN_CRIT
479 "MISALIGN: %lx: insn not move to/from memory %x\n",
480 regs->pc, opcode);
481 goto failed;
482 }
483
484 /* determine the data transfer size of the move */
485 if (pop->name[3] == 0 || /* "mov" */
486 pop->name[4] == 'l') /* mov_lcc */
487 inc = datasz = 4;
488 else if (pop->name[3] == 'h') /* movhu */
489 inc = datasz = 2;
490 else
491 goto unsupported_instruction;
492
493 if (pop->params[0] & 0x80000000) {
494 /* move memory to register */
495 if (!misalignment_addr(registers, sp,
496 pop->params[0], opcode, disp,
497 &address, &postinc, &inc))
498 goto bad_addr_mode;
499
500 if (!misalignment_reg(registers, pop->params[1], opcode, disp,
501 &store))
502 goto bad_reg_mode;
503
504 kdebug("mov%u (%p),DARn", datasz, address);
505 if (copy_from_user(&data, (void *) address, datasz) != 0)
506 goto transfer_failed;
507 if (pop->params[0] & 0x1000000) {
508 kdebug("inc=%lx", inc);
509 *postinc += inc;
510 }
511
512 *store = data;
513 kdebug("loaded %lx", data);
514 } else {
515 /* move register to memory */
516 if (!misalignment_reg(registers, pop->params[0], opcode, disp,
517 &store))
518 goto bad_reg_mode;
519
520 if (!misalignment_addr(registers, sp,
521 pop->params[1], opcode, disp,
522 &address, &postinc, &inc))
523 goto bad_addr_mode;
524
525 data = *store;
526
527 kdebug("mov%u %lx,(%p)", datasz, data, address);
528 if (copy_to_user((void *) address, &data, datasz) != 0)
529 goto transfer_failed;
530 if (pop->params[1] & 0x1000000)
531 *postinc += inc;
532 }
533
534 tmp = format_tbl[pop->format].opsz + format_tbl[pop->format].dispsz;
535 regs->pc += tmp >> 3;
536
537 /* handle MOV_Lcc, which are currently the only FMT_D10 insns that
538 * access memory */
539 if (pop->format == FMT_D10)
540 misalignment_MOV_Lcc(regs, opcode);
541
542 set_fs(seg);
543}
544
545/*
546 * determine the address that was being accessed
547 */
548static int misalignment_addr(unsigned long *registers, unsigned long sp,
549 unsigned params, unsigned opcode,
550 unsigned long disp,
551 void **_address, unsigned long **_postinc,
552 unsigned long *_inc)
553{
554 unsigned long *postinc = NULL, address = 0, tmp;
555
556 if (!(params & 0x1000000)) {
557 kdebug("noinc");
558 *_inc = 0;
559 _inc = NULL;
560 }
561
562 params &= 0x00ffffff;
563
564 do {
565 switch (params & 0xff) {
566 case DM0:
567 postinc = &registers[Dreg_index[opcode & 0x03]];
568 address += *postinc;
569 break;
570 case DM1:
571 postinc = &registers[Dreg_index[opcode >> 2 & 0x03]];
572 address += *postinc;
573 break;
574 case DM2:
575 postinc = &registers[Dreg_index[opcode >> 4 & 0x03]];
576 address += *postinc;
577 break;
578 case AM0:
579 postinc = &registers[Areg_index[opcode & 0x03]];
580 address += *postinc;
581 break;
582 case AM1:
583 postinc = &registers[Areg_index[opcode >> 2 & 0x03]];
584 address += *postinc;
585 break;
586 case AM2:
587 postinc = &registers[Areg_index[opcode >> 4 & 0x03]];
588 address += *postinc;
589 break;
590 case RM0:
591 postinc = &registers[Rreg_index[opcode & 0x0f]];
592 address += *postinc;
593 break;
594 case RM1:
595 postinc = &registers[Rreg_index[opcode >> 2 & 0x0f]];
596 address += *postinc;
597 break;
598 case RM2:
599 postinc = &registers[Rreg_index[opcode >> 4 & 0x0f]];
600 address += *postinc;
601 break;
602 case RM4:
603 postinc = &registers[Rreg_index[opcode >> 8 & 0x0f]];
604 address += *postinc;
605 break;
606 case RM6:
607 postinc = &registers[Rreg_index[opcode >> 12 & 0x0f]];
608 address += *postinc;
609 break;
610 case RD0:
611 postinc = &registers[Rreg_index[disp & 0x0f]];
612 address += *postinc;
613 break;
614 case RD2:
615 postinc = &registers[Rreg_index[disp >> 4 & 0x0f]];
616 address += *postinc;
617 break;
618 case SP:
619 address += sp;
620 break;
621
622 /* displacements are either to be added to the address
623 * before use, or, in the case of post-inc addressing,
624 * to be added into the base register after use */
625 case SD8:
626 case SIMM8:
627 disp = (long) (int8_t) (disp & 0xff);
628 goto displace_or_inc;
629 case SD16:
630 disp = (long) (int16_t) (disp & 0xffff);
631 goto displace_or_inc;
632 case SD24:
633 tmp = disp << 8;
634 asm("asr 8,%0" : "=r"(tmp) : "0"(tmp) : "cc");
635 disp = (long) tmp;
636 goto displace_or_inc;
637 case SIMM4_2:
638 tmp = opcode >> 4 & 0x0f;
639 tmp <<= 28;
640 asm("asr 28,%0" : "=r"(tmp) : "0"(tmp) : "cc");
641 disp = (long) tmp;
642 goto displace_or_inc;
643 case IMM8:
644 disp &= 0x000000ff;
645 goto displace_or_inc;
646 case IMM16:
647 disp &= 0x0000ffff;
648 goto displace_or_inc;
649 case IMM24:
650 disp &= 0x00ffffff;
651 goto displace_or_inc;
652 case IMM32:
653 case IMM32_MEM:
654 case IMM32_HIGH8:
655 case IMM32_HIGH8_MEM:
656 displace_or_inc:
657 kdebug("%s %lx", _inc ? "incr" : "disp", disp);
658 if (!_inc)
659 address += disp;
660 else
661 *_inc = disp;
662 break;
663 default:
664 BUG();
665 return 0;
666 }
667 } while ((params >>= 8));
668
669 *_address = (void *) address;
670 *_postinc = postinc;
671 return 1;
672}
673
674/*
675 * determine the register that is acting as source/dest
676 */
677static int misalignment_reg(unsigned long *registers, unsigned params,
678 unsigned opcode, unsigned long disp,
679 unsigned long **_register)
680{
681 params &= 0x7fffffff;
682
683 if (params & 0xffffff00)
684 return 0;
685
686 switch (params & 0xff) {
687 case DM0:
688 *_register = &registers[Dreg_index[opcode & 0x03]];
689 break;
690 case DM1:
691 *_register = &registers[Dreg_index[opcode >> 2 & 0x03]];
692 break;
693 case DM2:
694 *_register = &registers[Dreg_index[opcode >> 4 & 0x03]];
695 break;
696 case AM0:
697 *_register = &registers[Areg_index[opcode & 0x03]];
698 break;
699 case AM1:
700 *_register = &registers[Areg_index[opcode >> 2 & 0x03]];
701 break;
702 case AM2:
703 *_register = &registers[Areg_index[opcode >> 4 & 0x03]];
704 break;
705 case RM0:
706 *_register = &registers[Rreg_index[opcode & 0x0f]];
707 break;
708 case RM1:
709 *_register = &registers[Rreg_index[opcode >> 2 & 0x0f]];
710 break;
711 case RM2:
712 *_register = &registers[Rreg_index[opcode >> 4 & 0x0f]];
713 break;
714 case RM4:
715 *_register = &registers[Rreg_index[opcode >> 8 & 0x0f]];
716 break;
717 case RM6:
718 *_register = &registers[Rreg_index[opcode >> 12 & 0x0f]];
719 break;
720 case RD0:
721 *_register = &registers[Rreg_index[disp & 0x0f]];
722 break;
723 case RD2:
724 *_register = &registers[Rreg_index[disp >> 4 & 0x0f]];
725 break;
726 case SP:
727 *_register = &registers[REG_SP >> 2];
728 break;
729
730 default:
731 BUG();
732 return 0;
733 }
734
735 return 1;
736}
737
738/*
739 * handle the conditional loop part of the move-and-loop instructions
740 */
741static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode)
742{
743 unsigned long epsw = regs->epsw;
744 unsigned long NxorV;
745
746 kdebug("MOV_Lcc %x [flags=%lx]", opcode, epsw & 0xf);
747
748 /* calculate N^V and shift onto the same bit position as Z */
749 NxorV = ((epsw >> 3) ^ epsw >> 1) & 1;
750
751 switch (opcode & 0xf) {
752 case 0x0: /* MOV_LLT: N^V */
753 if (NxorV)
754 goto take_the_loop;
755 return;
756 case 0x1: /* MOV_LGT: ~(Z or (N^V))*/
757 if (!((epsw & EPSW_FLAG_Z) | NxorV))
758 goto take_the_loop;
759 return;
760 case 0x2: /* MOV_LGE: ~(N^V) */
761 if (!NxorV)
762 goto take_the_loop;
763 return;
764 case 0x3: /* MOV_LLE: Z or (N^V) */
765 if ((epsw & EPSW_FLAG_Z) | NxorV)
766 goto take_the_loop;
767 return;
768
769 case 0x4: /* MOV_LCS: C */
770 if (epsw & EPSW_FLAG_C)
771 goto take_the_loop;
772 return;
773 case 0x5: /* MOV_LHI: ~(C or Z) */
774 if (!(epsw & (EPSW_FLAG_C | EPSW_FLAG_Z)))
775 goto take_the_loop;
776 return;
777 case 0x6: /* MOV_LCC: ~C */
778 if (!(epsw & EPSW_FLAG_C))
779 goto take_the_loop;
780 return;
781 case 0x7: /* MOV_LLS: C or Z */
782 if (epsw & (EPSW_FLAG_C | EPSW_FLAG_Z))
783 goto take_the_loop;
784 return;
785
786 case 0x8: /* MOV_LEQ: Z */
787 if (epsw & EPSW_FLAG_Z)
788 goto take_the_loop;
789 return;
790 case 0x9: /* MOV_LNE: ~Z */
791 if (!(epsw & EPSW_FLAG_Z))
792 goto take_the_loop;
793 return;
794 case 0xa: /* MOV_LRA: always */
795 goto take_the_loop;
796
797 default:
798 BUG();
799 }
800
801take_the_loop:
802 /* wind the PC back to just after the SETLB insn */
803 kdebug("loop LAR=%lx", regs->lar);
804 regs->pc = regs->lar - 4;
805}
806
807/*
808 * misalignment handler tests
809 */
810#ifdef CONFIG_TEST_MISALIGNMENT_HANDLER
811static u8 __initdata testbuf[512] __attribute__((aligned(16))) = {
812 [257] = 0x11,
813 [258] = 0x22,
814 [259] = 0x33,
815 [260] = 0x44,
816};
817
818#define ASSERTCMP(X, OP, Y) \
819do { \
820 if (unlikely(!((X) OP (Y)))) { \
821 printk(KERN_ERR "\n"); \
822 printk(KERN_ERR "MISALIGN: Assertion failed at line %u\n", \
823 __LINE__); \
824 printk(KERN_ERR "0x%lx " #OP " 0x%lx is false\n", \
825 (unsigned long)(X), (unsigned long)(Y)); \
826 BUG(); \
827 } \
828} while(0)
829
830static int __init test_misalignment(void)
831{
832 register void *r asm("e0");
833 register u32 y asm("e1");
834 void *p = testbuf, *q;
835 u32 tmp, tmp2, x;
836
837 printk(KERN_NOTICE "==>test_misalignment() [testbuf=%p]\n", p);
838 p++;
839
840 printk(KERN_NOTICE "___ MOV (Am),Dn ___\n");
841 q = p + 256;
842 asm volatile("mov (%0),%1" : "+a"(q), "=d"(x));
843 ASSERTCMP(q, ==, p + 256);
844 ASSERTCMP(x, ==, 0x44332211);
845
846 printk(KERN_NOTICE "___ MOV (256,Am),Dn ___\n");
847 q = p;
848 asm volatile("mov (256,%0),%1" : "+a"(q), "=d"(x));
849 ASSERTCMP(q, ==, p);
850 ASSERTCMP(x, ==, 0x44332211);
851
852 printk(KERN_NOTICE "___ MOV (Di,Am),Dn ___\n");
853 tmp = 256;
854 q = p;
855 asm volatile("mov (%2,%0),%1" : "+a"(q), "=d"(x), "+d"(tmp));
856 ASSERTCMP(q, ==, p);
857 ASSERTCMP(x, ==, 0x44332211);
858 ASSERTCMP(tmp, ==, 256);
859
860 printk(KERN_NOTICE "___ MOV (256,Rm),Rn ___\n");
861 r = p;
862 asm volatile("mov (256,%0),%1" : "+r"(r), "=r"(y));
863 ASSERTCMP(r, ==, p);
864 ASSERTCMP(y, ==, 0x44332211);
865
866 printk(KERN_NOTICE "___ MOV (Rm+),Rn ___\n");
867 r = p + 256;
868 asm volatile("mov (%0+),%1" : "+r"(r), "=r"(y));
869 ASSERTCMP(r, ==, p + 256 + 4);
870 ASSERTCMP(y, ==, 0x44332211);
871
872 printk(KERN_NOTICE "___ MOV (Rm+,8),Rn ___\n");
873 r = p + 256;
874 asm volatile("mov (%0+,8),%1" : "+r"(r), "=r"(y));
875 ASSERTCMP(r, ==, p + 256 + 8);
876 ASSERTCMP(y, ==, 0x44332211);
877
878 printk(KERN_NOTICE "___ MOV (7,SP),Rn ___\n");
879 asm volatile(
880 "add -16,sp \n"
881 "mov +0x11,%0 \n"
882 "movbu %0,(7,sp) \n"
883 "mov +0x22,%0 \n"
884 "movbu %0,(8,sp) \n"
885 "mov +0x33,%0 \n"
886 "movbu %0,(9,sp) \n"
887 "mov +0x44,%0 \n"
888 "movbu %0,(10,sp) \n"
889 "mov (7,sp),%1 \n"
890 "add +16,sp \n"
891 : "+a"(q), "=d"(x));
892 ASSERTCMP(x, ==, 0x44332211);
893
894 printk(KERN_NOTICE "___ MOV (259,SP),Rn ___\n");
895 asm volatile(
896 "add -264,sp \n"
897 "mov +0x11,%0 \n"
898 "movbu %0,(259,sp) \n"
899 "mov +0x22,%0 \n"
900 "movbu %0,(260,sp) \n"
901 "mov +0x33,%0 \n"
902 "movbu %0,(261,sp) \n"
903 "mov +0x55,%0 \n"
904 "movbu %0,(262,sp) \n"
905 "mov (259,sp),%1 \n"
906 "add +264,sp \n"
907 : "+d"(tmp), "=d"(x));
908 ASSERTCMP(x, ==, 0x55332211);
909
910 printk(KERN_NOTICE "___ MOV (260,SP),Rn ___\n");
911 asm volatile(
912 "add -264,sp \n"
913 "mov +0x11,%0 \n"
914 "movbu %0,(260,sp) \n"
915 "mov +0x22,%0 \n"
916 "movbu %0,(261,sp) \n"
917 "mov +0x33,%0 \n"
918 "movbu %0,(262,sp) \n"
919 "mov +0x55,%0 \n"
920 "movbu %0,(263,sp) \n"
921 "mov (260,sp),%1 \n"
922 "add +264,sp \n"
923 : "+d"(tmp), "=d"(x));
924 ASSERTCMP(x, ==, 0x55332211);
925
926
927 printk(KERN_NOTICE "___ MOV_LNE ___\n");
928 tmp = 1;
929 tmp2 = 2;
930 q = p + 256;
931 asm volatile(
932 "setlb \n"
933 "mov %2,%3 \n"
934 "mov %1,%2 \n"
935 "cmp +0,%1 \n"
936 "mov_lne (%0+,4),%1"
937 : "+r"(q), "+d"(tmp), "+d"(tmp2), "=d"(x)
938 :
939 : "cc");
940 ASSERTCMP(q, ==, p + 256 + 12);
941 ASSERTCMP(x, ==, 0x44332211);
942
943 printk(KERN_NOTICE "___ MOV in SETLB ___\n");
944 tmp = 1;
945 tmp2 = 2;
946 q = p + 256;
947 asm volatile(
948 "setlb \n"
949 "mov %1,%3 \n"
950 "mov (%0+),%1 \n"
951 "cmp +0,%1 \n"
952 "lne "
953 : "+a"(q), "+d"(tmp), "+d"(tmp2), "=d"(x)
954 :
955 : "cc");
956
957 ASSERTCMP(q, ==, p + 256 + 8);
958 ASSERTCMP(x, ==, 0x44332211);
959
960 printk(KERN_NOTICE "<==test_misalignment()\n");
961 return 0;
962}
963
964arch_initcall(test_misalignment);
965
966#endif /* CONFIG_TEST_MISALIGNMENT_HANDLER */
diff --git a/arch/mn10300/mm/mmu-context.c b/arch/mn10300/mm/mmu-context.c
deleted file mode 100644
index a4f7d3dcc6e6..000000000000
--- a/arch/mn10300/mm/mmu-context.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* MN10300 MMU context allocation and management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <asm/mmu_context.h>
14#include <asm/tlbflush.h>
15
16#ifdef CONFIG_MN10300_TLB_USE_PIDR
17/*
18 * list of the MMU contexts last allocated on each CPU
19 */
20unsigned long mmu_context_cache[NR_CPUS] = {
21 [0 ... NR_CPUS - 1] =
22 MMU_CONTEXT_FIRST_VERSION * 2 - (1 - MMU_CONTEXT_TLBPID_LOCK_NR),
23};
24#endif /* CONFIG_MN10300_TLB_USE_PIDR */
25
26/*
27 * preemptively set a TLB entry
28 */
29void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
30{
31 unsigned long pteu, ptel, cnx, flags;
32 pte_t pte = *ptep;
33
34 addr &= PAGE_MASK;
35 ptel = pte_val(pte) & ~(xPTEL_UNUSED1 | xPTEL_UNUSED2);
36
37 /* make sure the context doesn't migrate and defend against
38 * interference from vmalloc'd regions */
39 local_irq_save(flags);
40
41 cnx = ~MMU_NO_CONTEXT;
42#ifdef CONFIG_MN10300_TLB_USE_PIDR
43 cnx = mm_context(vma->vm_mm);
44#endif
45
46 if (cnx != MMU_NO_CONTEXT) {
47 pteu = addr;
48#ifdef CONFIG_MN10300_TLB_USE_PIDR
49 pteu |= cnx & MMU_CONTEXT_TLBPID_MASK;
50#endif
51 if (!(pte_val(pte) & _PAGE_NX)) {
52 IPTEU = pteu;
53 if (IPTEL & xPTEL_V)
54 IPTEL = ptel;
55 }
56 DPTEU = pteu;
57 if (DPTEL & xPTEL_V)
58 DPTEL = ptel;
59 }
60
61 local_irq_restore(flags);
62}
diff --git a/arch/mn10300/mm/pgtable.c b/arch/mn10300/mm/pgtable.c
deleted file mode 100644
index 9577cf768875..000000000000
--- a/arch/mn10300/mm/pgtable.c
+++ /dev/null
@@ -1,174 +0,0 @@
1/* MN10300 Page table management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/gfp.h>
16#include <linux/mm.h>
17#include <linux/swap.h>
18#include <linux/smp.h>
19#include <linux/highmem.h>
20#include <linux/pagemap.h>
21#include <linux/spinlock.h>
22#include <linux/quicklist.h>
23
24#include <asm/pgtable.h>
25#include <asm/pgalloc.h>
26#include <asm/tlb.h>
27#include <asm/tlbflush.h>
28
29/*
30 * Associate a large virtual page frame with a given physical page frame
31 * and protection flags for that frame. pfn is for the base of the page,
32 * vaddr is what the page gets mapped to - both must be properly aligned.
33 * The pmd must already be instantiated. Assumes PAE mode.
34 */
35void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
36{
37 pgd_t *pgd;
38 pud_t *pud;
39 pmd_t *pmd;
40
41 if (vaddr & (PMD_SIZE-1)) { /* vaddr is misaligned */
42 printk(KERN_ERR "set_pmd_pfn: vaddr misaligned\n");
43 return; /* BUG(); */
44 }
45 if (pfn & (PTRS_PER_PTE-1)) { /* pfn is misaligned */
46 printk(KERN_ERR "set_pmd_pfn: pfn misaligned\n");
47 return; /* BUG(); */
48 }
49 pgd = swapper_pg_dir + pgd_index(vaddr);
50 if (pgd_none(*pgd)) {
51 printk(KERN_ERR "set_pmd_pfn: pgd_none\n");
52 return; /* BUG(); */
53 }
54 pud = pud_offset(pgd, vaddr);
55 pmd = pmd_offset(pud, vaddr);
56 set_pmd(pmd, pfn_pmd(pfn, flags));
57 /*
58 * It's enough to flush this one mapping.
59 * (PGE mappings get flushed as well)
60 */
61 local_flush_tlb_one(vaddr);
62}
63
64pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
65{
66 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL);
67 if (pte)
68 clear_page(pte);
69 return pte;
70}
71
72struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
73{
74 struct page *pte;
75
76#ifdef CONFIG_HIGHPTE
77 pte = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM, 0);
78#else
79 pte = alloc_pages(GFP_KERNEL, 0);
80#endif
81 if (!pte)
82 return NULL;
83 clear_highpage(pte);
84 if (!pgtable_page_ctor(pte)) {
85 __free_page(pte);
86 return NULL;
87 }
88 return pte;
89}
90
91/*
92 * List of all pgd's needed for non-PAE so it can invalidate entries
93 * in both cached and uncached pgd's; not needed for PAE since the
94 * kernel pmd is shared. If PAE were not to share the pmd a similar
95 * tactic would be needed. This is essentially codepath-based locking
96 * against pageattr.c; it is the unique case in which a valid change
97 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
98 * vmalloc faults work because attached pagetables are never freed.
99 * If the locking proves to be non-performant, a ticketing scheme with
100 * checks at dup_mmap(), exec(), and other mmlist addition points
101 * could be used. The locking scheme was chosen on the basis of
102 * manfred's recommendations and having no core impact whatsoever.
103 * -- nyc
104 */
105DEFINE_SPINLOCK(pgd_lock);
106struct page *pgd_list;
107
108static inline void pgd_list_add(pgd_t *pgd)
109{
110 struct page *page = virt_to_page(pgd);
111 page->index = (unsigned long) pgd_list;
112 if (pgd_list)
113 set_page_private(pgd_list, (unsigned long) &page->index);
114 pgd_list = page;
115 set_page_private(page, (unsigned long) &pgd_list);
116}
117
118static inline void pgd_list_del(pgd_t *pgd)
119{
120 struct page *next, **pprev, *page = virt_to_page(pgd);
121 next = (struct page *) page->index;
122 pprev = (struct page **) page_private(page);
123 *pprev = next;
124 if (next)
125 set_page_private(next, (unsigned long) pprev);
126}
127
128void pgd_ctor(void *pgd)
129{
130 unsigned long flags;
131
132 if (PTRS_PER_PMD == 1)
133 spin_lock_irqsave(&pgd_lock, flags);
134
135 memcpy((pgd_t *)pgd + USER_PTRS_PER_PGD,
136 swapper_pg_dir + USER_PTRS_PER_PGD,
137 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
138
139 if (PTRS_PER_PMD > 1)
140 return;
141
142 pgd_list_add(pgd);
143 spin_unlock_irqrestore(&pgd_lock, flags);
144 memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
145}
146
147/* never called when PTRS_PER_PMD > 1 */
148void pgd_dtor(void *pgd)
149{
150 unsigned long flags; /* can be called from interrupt context */
151
152 spin_lock_irqsave(&pgd_lock, flags);
153 pgd_list_del(pgd);
154 spin_unlock_irqrestore(&pgd_lock, flags);
155}
156
157pgd_t *pgd_alloc(struct mm_struct *mm)
158{
159 return quicklist_alloc(0, GFP_KERNEL, pgd_ctor);
160}
161
162void pgd_free(struct mm_struct *mm, pgd_t *pgd)
163{
164 quicklist_free(0, pgd_dtor, pgd);
165}
166
167void __init pgtable_cache_init(void)
168{
169}
170
171void check_pgt_cache(void)
172{
173 quicklist_trim(0, pgd_dtor, 25, 16);
174}
diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S
deleted file mode 100644
index b9940177d81b..000000000000
--- a/arch/mn10300/mm/tlb-mn10300.S
+++ /dev/null
@@ -1,220 +0,0 @@
1###############################################################################
2#
3# TLB loading functions
4#
5# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
6# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
7# Modified by David Howells (dhowells@redhat.com)
8#
9# This program is free software; you can redistribute it and/or
10# modify it under the terms of the GNU General Public Licence
11# as published by the Free Software Foundation; either version
12# 2 of the Licence, or (at your option) any later version.
13#
14###############################################################################
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/smp.h>
18#include <asm/intctl-regs.h>
19#include <asm/frame.inc>
20#include <asm/page.h>
21#include <asm/pgtable.h>
22
23###############################################################################
24#
25# Instruction TLB Miss handler entry point
26#
27###############################################################################
28 .type itlb_miss,@function
29ENTRY(itlb_miss)
30#ifdef CONFIG_GDBSTUB
31 movm [d2,d3,a2],(sp)
32#else
33 or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
34 # register bank
35 nop
36 nop
37 nop
38#endif
39
40#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
41 mov (MMUCTR),d2
42 mov d2,(MMUCTR)
43#endif
44
45 and ~EPSW_NMID,epsw
46 mov (IPTEU),d3
47 mov (PTBR),a2
48 mov d3,d2
49 and 0xffc00000,d2
50 lsr 20,d2
51 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
52 btst _PAGE_VALID,a2
53 beq itlb_miss_fault # jump if doesn't point anywhere
54
55 and ~(PAGE_SIZE-1),a2
56 mov d3,d2
57 and 0x003ff000,d2
58 lsr 10,d2
59 add d2,a2
60 mov (a2),d2 # get pte from PTD[addr 21..12]
61 btst _PAGE_VALID,d2
62 beq itlb_miss_fault # jump if doesn't point to a page
63 # (might be a swap id)
64#if ((_PAGE_ACCESSED & 0xffffff00) == 0)
65 bset _PAGE_ACCESSED,(0,a2)
66#elif ((_PAGE_ACCESSED & 0xffff00ff) == 0)
67 bset +(_PAGE_ACCESSED >> 8),(1,a2)
68#else
69#error "_PAGE_ACCESSED value is out of range"
70#endif
71 and ~xPTEL2_UNUSED1,d2
72itlb_miss_set:
73 mov d2,(IPTEL2) # change the TLB
74#ifdef CONFIG_GDBSTUB
75 movm (sp),[d2,d3,a2]
76#endif
77 rti
78
79itlb_miss_fault:
80 mov _PAGE_VALID,d2 # force address error handler to be
81 # invoked
82 bra itlb_miss_set
83
84 .size itlb_miss, . - itlb_miss
85
86###############################################################################
87#
88# Data TLB Miss handler entry point
89#
90###############################################################################
91 .type dtlb_miss,@function
92ENTRY(dtlb_miss)
93#ifdef CONFIG_GDBSTUB
94 movm [d2,d3,a2],(sp)
95#else
96 or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
97 # register bank
98 nop
99 nop
100 nop
101#endif
102
103#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
104 mov (MMUCTR),d2
105 mov d2,(MMUCTR)
106#endif
107
108 and ~EPSW_NMID,epsw
109 mov (DPTEU),d3
110 mov (PTBR),a2
111 mov d3,d2
112 and 0xffc00000,d2
113 lsr 20,d2
114 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
115 btst _PAGE_VALID,a2
116 beq dtlb_miss_fault # jump if doesn't point anywhere
117
118 and ~(PAGE_SIZE-1),a2
119 mov d3,d2
120 and 0x003ff000,d2
121 lsr 10,d2
122 add d2,a2
123 mov (a2),d2 # get pte from PTD[addr 21..12]
124 btst _PAGE_VALID,d2
125 beq dtlb_miss_fault # jump if doesn't point to a page
126 # (might be a swap id)
127#if ((_PAGE_ACCESSED & 0xffffff00) == 0)
128 bset _PAGE_ACCESSED,(0,a2)
129#elif ((_PAGE_ACCESSED & 0xffff00ff) == 0)
130 bset +(_PAGE_ACCESSED >> 8),(1,a2)
131#else
132#error "_PAGE_ACCESSED value is out of range"
133#endif
134 and ~xPTEL2_UNUSED1,d2
135dtlb_miss_set:
136 mov d2,(DPTEL2) # change the TLB
137#ifdef CONFIG_GDBSTUB
138 movm (sp),[d2,d3,a2]
139#endif
140 rti
141
142dtlb_miss_fault:
143 mov _PAGE_VALID,d2 # force address error handler to be
144 # invoked
145 bra dtlb_miss_set
146 .size dtlb_miss, . - dtlb_miss
147
148###############################################################################
149#
150# Instruction TLB Address Error handler entry point
151#
152###############################################################################
153 .type itlb_aerror,@function
154ENTRY(itlb_aerror)
155 add -4,sp
156 SAVE_ALL
157
158#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
159 mov (MMUCTR),d1
160 mov d1,(MMUCTR)
161#endif
162
163 and ~EPSW_NMID,epsw
164 add -4,sp # need to pass three params
165
166 # calculate the fault code
167 movhu (MMUFCR_IFC),d1
168 or 0x00010000,d1 # it's an instruction fetch
169
170 # determine the page address
171 mov (IPTEU),d0
172 and PAGE_MASK,d0
173 mov d0,(12,sp)
174
175 clr d0
176 mov d0,(IPTEL2)
177
178 or EPSW_IE,epsw
179 mov fp,d0
180 call do_page_fault[],0 # do_page_fault(regs,code,addr
181
182 jmp ret_from_exception
183 .size itlb_aerror, . - itlb_aerror
184
185###############################################################################
186#
187# Data TLB Address Error handler entry point
188#
189###############################################################################
190 .type dtlb_aerror,@function
191ENTRY(dtlb_aerror)
192 add -4,sp
193 SAVE_ALL
194
195#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
196 mov (MMUCTR),d1
197 mov d1,(MMUCTR)
198#endif
199
200 add -4,sp # need to pass three params
201 and ~EPSW_NMID,epsw
202
203 # calculate the fault code
204 movhu (MMUFCR_DFC),d1
205
206 # determine the page address
207 mov (DPTEU),a2
208 mov a2,d0
209 and PAGE_MASK,d0
210 mov d0,(12,sp)
211
212 clr d0
213 mov d0,(DPTEL2)
214
215 or EPSW_IE,epsw
216 mov fp,d0
217 call do_page_fault[],0 # do_page_fault(regs,code,addr
218
219 jmp ret_from_exception
220 .size dtlb_aerror, . - dtlb_aerror
diff --git a/arch/mn10300/mm/tlb-smp.c b/arch/mn10300/mm/tlb-smp.c
deleted file mode 100644
index 085f2bb691ac..000000000000
--- a/arch/mn10300/mm/tlb-smp.c
+++ /dev/null
@@ -1,213 +0,0 @@
1/* SMP TLB support routines.
2 *
3 * Copyright (C) 2006-2008 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <linux/interrupt.h>
16#include <linux/spinlock.h>
17#include <linux/init.h>
18#include <linux/jiffies.h>
19#include <linux/cpumask.h>
20#include <linux/err.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/sched/mm.h>
24#include <linux/profile.h>
25#include <linux/smp.h>
26#include <asm/tlbflush.h>
27#include <asm/bitops.h>
28#include <asm/processor.h>
29#include <asm/bug.h>
30#include <asm/exceptions.h>
31#include <asm/hardirq.h>
32#include <asm/fpu.h>
33#include <asm/mmu_context.h>
34#include <asm/thread_info.h>
35#include <asm/cpu-regs.h>
36#include <asm/intctl-regs.h>
37
38/*
39 * For flush TLB
40 */
41#define FLUSH_ALL 0xffffffff
42
43static cpumask_t flush_cpumask;
44static struct mm_struct *flush_mm;
45static unsigned long flush_va;
46static DEFINE_SPINLOCK(tlbstate_lock);
47
48DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
49 &init_mm, 0
50};
51
52static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
53 unsigned long va);
54static void do_flush_tlb_all(void *info);
55
56/**
57 * smp_flush_tlb - Callback to invalidate the TLB.
58 * @unused: Callback context (ignored).
59 */
60void smp_flush_tlb(void *unused)
61{
62 unsigned long cpu_id;
63
64 cpu_id = get_cpu();
65
66 if (!cpumask_test_cpu(cpu_id, &flush_cpumask))
67 /* This was a BUG() but until someone can quote me the line
68 * from the intel manual that guarantees an IPI to multiple
69 * CPUs is retried _only_ on the erroring CPUs its staying as a
70 * return
71 *
72 * BUG();
73 */
74 goto out;
75
76 if (flush_va == FLUSH_ALL)
77 local_flush_tlb();
78 else
79 local_flush_tlb_page(flush_mm, flush_va);
80
81 smp_mb__before_atomic();
82 cpumask_clear_cpu(cpu_id, &flush_cpumask);
83 smp_mb__after_atomic();
84out:
85 put_cpu();
86}
87
88/**
89 * flush_tlb_others - Tell the specified CPUs to invalidate their TLBs
90 * @cpumask: The list of CPUs to target.
91 * @mm: The VM context to flush from (if va!=FLUSH_ALL).
92 * @va: Virtual address to flush or FLUSH_ALL to flush everything.
93 */
94static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
95 unsigned long va)
96{
97 cpumask_t tmp;
98
99 /* A couple of sanity checks (to be removed):
100 * - mask must not be empty
101 * - current CPU must not be in mask
102 * - we do not send IPIs to as-yet unbooted CPUs.
103 */
104 BUG_ON(!mm);
105 BUG_ON(cpumask_empty(&cpumask));
106 BUG_ON(cpumask_test_cpu(smp_processor_id(), &cpumask));
107
108 cpumask_and(&tmp, &cpumask, cpu_online_mask);
109 BUG_ON(!cpumask_equal(&cpumask, &tmp));
110
111 /* I'm not happy about this global shared spinlock in the MM hot path,
112 * but we'll see how contended it is.
113 *
114 * Temporarily this turns IRQs off, so that lockups are detected by the
115 * NMI watchdog.
116 */
117 spin_lock(&tlbstate_lock);
118
119 flush_mm = mm;
120 flush_va = va;
121#if NR_CPUS <= BITS_PER_LONG
122 atomic_or(cpumask.bits[0], (atomic_t *)&flush_cpumask.bits[0]);
123#else
124#error Not supported.
125#endif
126
127 /* FIXME: if NR_CPUS>=3, change send_IPI_mask */
128 smp_call_function(smp_flush_tlb, NULL, 1);
129
130 while (!cpumask_empty(&flush_cpumask))
131 /* Lockup detection does not belong here */
132 smp_mb();
133
134 flush_mm = NULL;
135 flush_va = 0;
136 spin_unlock(&tlbstate_lock);
137}
138
139/**
140 * flush_tlb_mm - Invalidate TLB of specified VM context
141 * @mm: The VM context to invalidate.
142 */
143void flush_tlb_mm(struct mm_struct *mm)
144{
145 cpumask_t cpu_mask;
146
147 preempt_disable();
148 cpumask_copy(&cpu_mask, mm_cpumask(mm));
149 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
150
151 local_flush_tlb();
152 if (!cpumask_empty(&cpu_mask))
153 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
154
155 preempt_enable();
156}
157
158/**
159 * flush_tlb_current_task - Invalidate TLB of current task
160 */
161void flush_tlb_current_task(void)
162{
163 struct mm_struct *mm = current->mm;
164 cpumask_t cpu_mask;
165
166 preempt_disable();
167 cpumask_copy(&cpu_mask, mm_cpumask(mm));
168 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
169
170 local_flush_tlb();
171 if (!cpumask_empty(&cpu_mask))
172 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
173
174 preempt_enable();
175}
176
177/**
178 * flush_tlb_page - Invalidate TLB of page
179 * @vma: The VM context to invalidate the page for.
180 * @va: The virtual address of the page to invalidate.
181 */
182void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
183{
184 struct mm_struct *mm = vma->vm_mm;
185 cpumask_t cpu_mask;
186
187 preempt_disable();
188 cpumask_copy(&cpu_mask, mm_cpumask(mm));
189 cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
190
191 local_flush_tlb_page(mm, va);
192 if (!cpumask_empty(&cpu_mask))
193 flush_tlb_others(cpu_mask, mm, va);
194
195 preempt_enable();
196}
197
198/**
199 * do_flush_tlb_all - Callback to completely invalidate a TLB
200 * @unused: Callback context (ignored).
201 */
202static void do_flush_tlb_all(void *unused)
203{
204 local_flush_tlb_all();
205}
206
207/**
208 * flush_tlb_all - Completely invalidate TLBs on all CPUs
209 */
210void flush_tlb_all(void)
211{
212 on_each_cpu(do_flush_tlb_all, 0, 1);
213}
diff --git a/arch/mn10300/oprofile/Makefile b/arch/mn10300/oprofile/Makefile
deleted file mode 100644
index 9fa95aaf496b..000000000000
--- a/arch/mn10300/oprofile/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the MN10300-specific profiling code
4#
5obj-$(CONFIG_OPROFILE) += oprofile.o
6
7DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
8 oprof.o cpu_buffer.o buffer_sync.o \
9 event_buffer.o oprofile_files.o \
10 oprofilefs.o oprofile_stats.o \
11 timer_int.o )
12
13oprofile-y := $(DRIVER_OBJS) op_model_null.o
14
diff --git a/arch/mn10300/oprofile/op_model_null.c b/arch/mn10300/oprofile/op_model_null.c
deleted file mode 100644
index cd4ab374bc4f..000000000000
--- a/arch/mn10300/oprofile/op_model_null.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/* Null profiling driver
2 *
3 * Copyright (C) 2003 Paul Mundt
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * Licence. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9#include <linux/kernel.h>
10#include <linux/oprofile.h>
11#include <linux/init.h>
12#include <linux/errno.h>
13
14int __init oprofile_arch_init(struct oprofile_operations *ops)
15{
16 return -ENODEV;
17}
18
19void oprofile_arch_exit(void)
20{
21}
22
diff --git a/arch/mn10300/proc-mn103e010/Makefile b/arch/mn10300/proc-mn103e010/Makefile
deleted file mode 100644
index ac2c9784cd21..000000000000
--- a/arch/mn10300/proc-mn103e010/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the MN103E010 processor chip specific code
3#
4obj-y := proc-init.o
5
diff --git a/arch/mn10300/proc-mn103e010/include/proc/cache.h b/arch/mn10300/proc-mn103e010/include/proc/cache.h
deleted file mode 100644
index 967d144f307e..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/cache.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* MN103E010 Cache specification
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CACHE_H
12#define _ASM_PROC_CACHE_H
13
14/* L1 cache */
15
16#define L1_CACHE_NWAYS 4 /* number of ways in caches */
17#define L1_CACHE_NENTRIES 256 /* number of entries in each way */
18#define L1_CACHE_BYTES 16 /* bytes per entry */
19#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */
20#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */
21
22#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */
23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */
25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
26#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY)
27
28/*
29 * specification of the interval between interrupt checking intervals whilst
30 * managing the cache with the interrupts disabled
31 */
32#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4
33
34/*
35 * The size of range at which it becomes more economical to just flush the
36 * whole cache rather than trying to flush the specified range.
37 */
38#define MN10300_DCACHE_FLUSH_BORDER \
39 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
40#define MN10300_DCACHE_FLUSH_INV_BORDER \
41 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
42
43#endif /* _ASM_PROC_CACHE_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/clock.h b/arch/mn10300/proc-mn103e010/include/proc/clock.h
deleted file mode 100644
index 704a819f1f4b..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* MN103E010-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CLOCK_H
12#define _ASM_PROC_CLOCK_H
13
14#include <unit/clock.h>
15
16#endif /* _ASM_PROC_CLOCK_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/dmactl-regs.h b/arch/mn10300/proc-mn103e010/include/proc/dmactl-regs.h
deleted file mode 100644
index d72d328d1f9c..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/dmactl-regs.h
+++ /dev/null
@@ -1,102 +0,0 @@
1/* MN103E010 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_DMACTL_REGS_H
13#define _ASM_PROC_DMACTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* DMA registers */
20#define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
21#define DMxCTR_BG 0x0000001f /* transfer request source */
22#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
23#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
24#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
25#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
26#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
27#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
28#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
29#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
30#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
31#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
32#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
33#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
34#define DMxCTR_BG_AFE 0x0000000d /* - analogue front-end interrupt source */
35#define DMxCTR_BG_ADC 0x0000000e /* - A/D conversion end interrupt source */
36#define DMxCTR_BG_IRDA 0x0000000f /* - IrDA interrupt source */
37#define DMxCTR_BG_RTC 0x00000010 /* - RTC interrupt source */
38#define DMxCTR_BG_XIRQ0 0x00000011 /* - XIRQ0 pin interrupt source */
39#define DMxCTR_BG_XIRQ1 0x00000012 /* - XIRQ1 pin interrupt source */
40#define DMxCTR_BG_XDMR0 0x00000013 /* - external request 0 source (XDMR0 pin) */
41#define DMxCTR_BG_XDMR1 0x00000014 /* - external request 1 source (XDMR1 pin) */
42#define DMxCTR_SAM 0x000000e0 /* DMA transfer src addr mode */
43#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
44#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
45#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
46#define DMxCTR_DAM 0x00000000 /* DMA transfer dest addr mode */
47#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
48#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
49#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
50#define DMxCTR_TM 0x00001800 /* DMA transfer mode */
51#define DMxCTR_TM_BATCH 0x00000000 /* - batch transfer */
52#define DMxCTR_TM_INTERM 0x00001000 /* - intermittent transfer */
53#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
54#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
55#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
56#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
57#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
58#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
59#define DMxCTR_RQM 0x00060000 /* external request input source mode */
60#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
61#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
62#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
63#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
64#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
65#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
66
67#define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
68
69#define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
70
71#define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
72#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
73
74#define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
75 * size reg */
76#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
77
78#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
79#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
80#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
81#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
82
83#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
84#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
85#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
86#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
87
88#ifndef __ASSEMBLY__
89
90struct mn10300_dmactl_regs {
91 u32 ctr;
92 const void *src;
93 void *dst;
94 u32 siz;
95 u32 cyc;
96} __attribute__((aligned(0x100)));
97
98#endif /* __ASSEMBLY__ */
99
100#endif /* __KERNEL__ */
101
102#endif /* _ASM_PROC_DMACTL_REGS_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/intctl-regs.h b/arch/mn10300/proc-mn103e010/include/proc/intctl-regs.h
deleted file mode 100644
index 516afe824055..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/intctl-regs.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_PROC_INTCTL_REGS_H
3#define _ASM_PROC_INTCTL_REGS_H
4
5#ifndef _ASM_INTCTL_REGS_H
6# error "please don't include this file directly"
7#endif
8
9/* intr acceptance group reg */
10#define IAGR __SYSREG(0xd4000100, u16)
11
12/* group number register */
13#define IAGR_GN 0x00fc
14
15#define __GET_XIRQ_TRIGGER(X, Z) (((Z) >> ((X) * 2)) & 3)
16
17#define __SET_XIRQ_TRIGGER(X, Y, Z) \
18({ \
19 typeof(Z) x = (Z); \
20 x &= ~(3 << ((X) * 2)); \
21 x |= ((Y) & 3) << ((X) * 2); \
22 (Z) = x; \
23})
24
25/* external pin intr spec reg */
26#define EXTMD __SYSREG(0xd4000200, u16)
27#define GET_XIRQ_TRIGGER(X) __GET_XIRQ_TRIGGER(X, EXTMD)
28#define SET_XIRQ_TRIGGER(X, Y) __SET_XIRQ_TRIGGER(X, Y, EXTMD)
29
30#endif /* _ASM_PROC_INTCTL_REGS_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/irq.h b/arch/mn10300/proc-mn103e010/include/proc/irq.h
deleted file mode 100644
index aa6ee8f98b1b..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/irq.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN103E010 On-board interrupt controller numbers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_IRQ_H
13#define _ASM_PROC_IRQ_H
14
15#ifdef __KERNEL__
16
17#define GxICR_NUM_IRQS 42
18
19#define GxICR_NUM_XIRQS 8
20
21#define XIRQ0 34
22#define XIRQ1 35
23#define XIRQ2 36
24#define XIRQ3 37
25#define XIRQ4 38
26#define XIRQ5 39
27#define XIRQ6 40
28#define XIRQ7 41
29
30#define XIRQ2IRQ(num) (XIRQ0 + num)
31
32#endif /* __KERNEL__ */
33
34#endif /* _ASM_PROC_IRQ_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/proc.h b/arch/mn10300/proc-mn103e010/include/proc/proc.h
deleted file mode 100644
index 39c4f8e7d2d3..000000000000
--- a/arch/mn10300/proc-mn103e010/include/proc/proc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* MN103E010 Processor description
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_PROC_H
13#define _ASM_PROC_PROC_H
14
15#define PROCESSOR_VENDOR_NAME "Panasonic"
16#define PROCESSOR_MODEL_NAME "mn103e010"
17
18#endif /* _ASM_PROC_PROC_H */
diff --git a/arch/mn10300/proc-mn103e010/proc-init.c b/arch/mn10300/proc-mn103e010/proc-init.c
deleted file mode 100644
index 102d86a6ae56..000000000000
--- a/arch/mn10300/proc-mn103e010/proc-init.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/* MN103E010 Processor initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/irq.h>
13#include <asm/cacheflush.h>
14#include <asm/fpu.h>
15#include <asm/irq.h>
16#include <asm/rtc.h>
17#include <asm/busctl-regs.h>
18
19/*
20 * initialise the on-silicon processor peripherals
21 */
22asmlinkage void __init processor_init(void)
23{
24 int loop;
25
26 /* set up the exception table first */
27 for (loop = 0x000; loop < 0x400; loop += 8)
28 __set_intr_stub(loop, __common_exception);
29
30 __set_intr_stub(EXCEP_ITLBMISS, itlb_miss);
31 __set_intr_stub(EXCEP_DTLBMISS, dtlb_miss);
32 __set_intr_stub(EXCEP_IAERROR, itlb_aerror);
33 __set_intr_stub(EXCEP_DAERROR, dtlb_aerror);
34 __set_intr_stub(EXCEP_BUSERROR, raw_bus_error);
35 __set_intr_stub(EXCEP_DOUBLE_FAULT, double_fault);
36 __set_intr_stub(EXCEP_FPU_DISABLED, fpu_disabled);
37 __set_intr_stub(EXCEP_SYSCALL0, system_call);
38
39 __set_intr_stub(EXCEP_NMI, nmi_handler);
40 __set_intr_stub(EXCEP_WDT, nmi_handler);
41 __set_intr_stub(EXCEP_IRQ_LEVEL0, irq_handler);
42 __set_intr_stub(EXCEP_IRQ_LEVEL1, irq_handler);
43 __set_intr_stub(EXCEP_IRQ_LEVEL2, irq_handler);
44 __set_intr_stub(EXCEP_IRQ_LEVEL3, irq_handler);
45 __set_intr_stub(EXCEP_IRQ_LEVEL4, irq_handler);
46 __set_intr_stub(EXCEP_IRQ_LEVEL5, irq_handler);
47 __set_intr_stub(EXCEP_IRQ_LEVEL6, irq_handler);
48
49 IVAR0 = EXCEP_IRQ_LEVEL0;
50 IVAR1 = EXCEP_IRQ_LEVEL1;
51 IVAR2 = EXCEP_IRQ_LEVEL2;
52 IVAR3 = EXCEP_IRQ_LEVEL3;
53 IVAR4 = EXCEP_IRQ_LEVEL4;
54 IVAR5 = EXCEP_IRQ_LEVEL5;
55 IVAR6 = EXCEP_IRQ_LEVEL6;
56
57 mn10300_dcache_flush_inv();
58 mn10300_icache_inv();
59
60 /* disable all interrupts and set to priority 6 (lowest) */
61 for (loop = 0; loop < NR_IRQS; loop++)
62 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
63
64 /* clear the timers */
65 TM0MD = 0;
66 TM1MD = 0;
67 TM2MD = 0;
68 TM3MD = 0;
69 TM4MD = 0;
70 TM5MD = 0;
71 TM6MD = 0;
72 TM6MDA = 0;
73 TM6MDB = 0;
74 TM7MD = 0;
75 TM8MD = 0;
76 TM9MD = 0;
77 TM10MD = 0;
78 TM11MD = 0;
79
80 calibrate_clock();
81}
82
83/*
84 * determine the memory size and base from the memory controller regs
85 */
86void __init get_mem_info(unsigned long *mem_base, unsigned long *mem_size)
87{
88 unsigned long base, size;
89
90 *mem_base = 0;
91 *mem_size = 0;
92
93 base = SDBASE(0);
94 if (base & SDBASE_CE) {
95 size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
96 size = ~size + 1;
97 base &= SDBASE_CBA;
98
99 printk(KERN_INFO "SDRAM[0]: %luMb @%08lx\n", size >> 20, base);
100 *mem_size += size;
101 *mem_base = base;
102 }
103
104 base = SDBASE(1);
105 if (base & SDBASE_CE) {
106 size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
107 size = ~size + 1;
108 base &= SDBASE_CBA;
109
110 printk(KERN_INFO "SDRAM[1]: %luMb @%08lx\n", size >> 20, base);
111 *mem_size += size;
112 if (*mem_base == 0)
113 *mem_base = base;
114 }
115}
diff --git a/arch/mn10300/proc-mn2ws0050/Makefile b/arch/mn10300/proc-mn2ws0050/Makefile
deleted file mode 100644
index d4ca13309a85..000000000000
--- a/arch/mn10300/proc-mn2ws0050/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5obj-y := proc-init.o
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h b/arch/mn10300/proc-mn2ws0050/include/proc/cache.h
deleted file mode 100644
index bcb5df2d892f..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* Cache specification
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 13-Nov-2006 MEI Add L1_CACHE_SHIFT_MAX definition.
9 * 29-Jul-2008 MEI Add define for MN10300_HAS_AREAPURGE_REG.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16#ifndef _ASM_PROC_CACHE_H
17#define _ASM_PROC_CACHE_H
18
19/*
20 * L1 cache
21 */
22#define L1_CACHE_NWAYS 4 /* number of ways in caches */
23#define L1_CACHE_NENTRIES 128 /* number of entries in each way */
24#define L1_CACHE_BYTES 32 /* bytes per entry */
25#define L1_CACHE_SHIFT 5 /* shift for bytes per entry */
26#define L1_CACHE_WAYDISP 0x1000 /* distance from one way to the next */
27
28#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */
29#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
30#define L1_CACHE_TAG_ENTRY 0x00000fe0 /* cache tag entry address mask */
31#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
32#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY)
33
34/*
35 * specification of the interval between interrupt checking intervals whilst
36 * managing the cache with the interrupts disabled
37 */
38#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4
39
40/*
41 * The size of range at which it becomes more economical to just flush the
42 * whole cache rather than trying to flush the specified range.
43 */
44#define MN10300_DCACHE_FLUSH_BORDER \
45 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
46#define MN10300_DCACHE_FLUSH_INV_BORDER \
47 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
48
49#endif /* _ASM_PROC_CACHE_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/clock.h b/arch/mn10300/proc-mn2ws0050/include/proc/clock.h
deleted file mode 100644
index fe4c0a4a53a2..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/clock.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* clock.h: proc-specific clocks
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 23-Feb-2007 MEI Delete define for watchdog timer.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15#ifndef _ASM_PROC_CLOCK_H
16#define _ASM_PROC_CLOCK_H
17
18#include <unit/clock.h>
19
20#endif /* _ASM_PROC_CLOCK_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/dmactl-regs.h b/arch/mn10300/proc-mn2ws0050/include/proc/dmactl-regs.h
deleted file mode 100644
index 4c4319e241d1..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/dmactl-regs.h
+++ /dev/null
@@ -1,103 +0,0 @@
1/* MN2WS0050 on-board DMA controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 */
10
11#ifndef _ASM_PROC_DMACTL_REGS_H
12#define _ASM_PROC_DMACTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* DMA registers */
19#define DMxCTR(N) __SYSREG(0xd4005000+(N*0x100), u32) /* control reg */
20#define DMxCTR_BG 0x0000001f /* transfer request source */
21#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
22#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
23#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
24#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
25#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
26#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
27#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
28#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
29#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
30#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
31#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
32#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
33#define DMxCTR_BG_RYBY 0x0000000d /* - NAND Flash RY/BY request source */
34#define DMxCTR_BG_RMC 0x0000000e /* - remote controller output */
35#define DMxCTR_BG_XIRQ12 0x00000011 /* - XIRQ12 pin interrupt source */
36#define DMxCTR_BG_XIRQ13 0x00000012 /* - XIRQ13 pin interrupt source */
37#define DMxCTR_BG_TCK 0x00000014 /* - tick timer underflow */
38#define DMxCTR_BG_SC4TX 0x00000019 /* - serial port4 transmission */
39#define DMxCTR_BG_SC4RX 0x0000001a /* - serial port4 reception */
40#define DMxCTR_BG_SC5TX 0x0000001b /* - serial port5 transmission */
41#define DMxCTR_BG_SC5RX 0x0000001c /* - serial port5 reception */
42#define DMxCTR_BG_SC6TX 0x0000001d /* - serial port6 transmission */
43#define DMxCTR_BG_SC6RX 0x0000001e /* - serial port6 reception */
44#define DMxCTR_BG_TMSUFLOW 0x0000001f /* - timestamp timer underflow */
45#define DMxCTR_SAM 0x00000060 /* DMA transfer src addr mode */
46#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
47#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
48#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
49#define DMxCTR_DAM 0x00000300 /* DMA transfer dest addr mode */
50#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
51#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
52#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
53#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
54#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
55#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
56#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
57#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
58#define DMxCTR_RRE 0x00008000 /* DMA round robin enable */
59#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
60#define DMxCTR_RQM 0x00060000 /* external request input source mode */
61#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
62#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
63#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
64#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
65#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
66#define DMxCTR_PERR 0x40000000 /* DMA transfer parameter error flag */
67#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
68
69#define DMxSRC(N) __SYSREG(0xd4005004+(N*0x100), u32) /* control reg */
70
71#define DMxDST(N) __SYSREG(0xd4005008+(N*0x100), u32) /* source addr reg */
72
73#define DMxSIZ(N) __SYSREG(0xd400500c+(N*0x100), u32) /* dest addr reg */
74#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
75
76#define DMxCYC(N) __SYSREG(0xd4005010+(N*0x100), u32) /* intermittent size reg */
77#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
78
79#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
80#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
81#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
82#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
83
84#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
85#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
86#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
87#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
88
89#ifndef __ASSEMBLY__
90
91struct mn10300_dmactl_regs {
92 u32 ctr;
93 const void *src;
94 void *dst;
95 u32 siz;
96 u32 cyc;
97} __attribute__((aligned(0x100)));
98
99#endif /* __ASSEMBLY__ */
100
101#endif /* __KERNEL__ */
102
103#endif /* _ASM_PROC_DMACTL_REGS_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/intctl-regs.h b/arch/mn10300/proc-mn2ws0050/include/proc/intctl-regs.h
deleted file mode 100644
index 4d4084ea6694..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/intctl-regs.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_PROC_INTCTL_REGS_H
3#define _ASM_PROC_INTCTL_REGS_H
4
5#ifndef _ASM_INTCTL_REGS_H
6# error "please don't include this file directly"
7#endif
8
9/* intr acceptance group reg */
10#define IAGR __SYSREG(0xd4000100, u16)
11
12/* group number register */
13#define IAGR_GN 0x003fc
14
15#define __GET_XIRQ_TRIGGER(X, Z) (((Z) >> ((X) * 2)) & 3)
16
17#define __SET_XIRQ_TRIGGER(X, Y, Z) \
18({ \
19 typeof(Z) x = (Z); \
20 x &= ~(3 << ((X) * 2)); \
21 x |= ((Y) & 3) << ((X) * 2); \
22 (Z) = x; \
23})
24
25/* external pin intr spec reg */
26#define EXTMD0 __SYSREG(0xd4000200, u32)
27#define GET_XIRQ_TRIGGER(X) __GET_XIRQ_TRIGGER(X, EXTMD0)
28#define SET_XIRQ_TRIGGER(X, Y) __SET_XIRQ_TRIGGER(X, Y, EXTMD0)
29
30#endif /* _ASM_PROC_INTCTL_REGS_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/irq.h b/arch/mn10300/proc-mn2ws0050/include/proc/irq.h
deleted file mode 100644
index 37777a85ab6f..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/irq.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* MN2WS0050 on-board interrupt controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 13-Nov-2006 MEI Define extended IRQ number for SMP support.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _PROC_IRQ_H
17#define _PROC_IRQ_H
18
19#ifdef __KERNEL__
20
21#define GxICR_NUM_IRQS 163
22#ifdef CONFIG_SMP
23#define GxICR_NUM_EXT_IRQS 197
24#endif /* CONFIG_SMP */
25
26#define GxICR_NUM_XIRQS 16
27
28#define XIRQ0 34
29#define XIRQ1 35
30#define XIRQ2 36
31#define XIRQ3 37
32#define XIRQ4 38
33#define XIRQ5 39
34#define XIRQ6 40
35#define XIRQ7 41
36#define XIRQ8 42
37#define XIRQ9 43
38#define XIRQ10 44
39#define XIRQ11 45
40#define XIRQ12 46
41#define XIRQ13 47
42#define XIRQ14 48
43#define XIRQ15 49
44
45#define XIRQ2IRQ(num) (XIRQ0 + num)
46
47#endif /* __KERNEL__ */
48
49#endif /* _PROC_IRQ_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/nand-regs.h b/arch/mn10300/proc-mn2ws0050/include/proc/nand-regs.h
deleted file mode 100644
index 84448f3828b3..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/nand-regs.h
+++ /dev/null
@@ -1,120 +0,0 @@
1/* NAND flash interface register definitions
2 *
3 * Copyright (C) 2008-2009 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _PROC_NAND_REGS_H_
17#define _PROC_NAND_REGS_H_
18
19/* command register */
20#define FCOMMAND_0 __SYSREG(0xd8f00000, u8) /* fcommand[24:31] */
21#define FCOMMAND_1 __SYSREG(0xd8f00001, u8) /* fcommand[16:23] */
22#define FCOMMAND_2 __SYSREG(0xd8f00002, u8) /* fcommand[8:15] */
23#define FCOMMAND_3 __SYSREG(0xd8f00003, u8) /* fcommand[0:7] */
24
25/* for dma 16 byte trans, use FCOMMAND2 register */
26#define FCOMMAND2_0 __SYSREG(0xd8f00110, u8) /* fcommand2[24:31] */
27#define FCOMMAND2_1 __SYSREG(0xd8f00111, u8) /* fcommand2[16:23] */
28#define FCOMMAND2_2 __SYSREG(0xd8f00112, u8) /* fcommand2[8:15] */
29#define FCOMMAND2_3 __SYSREG(0xd8f00113, u8) /* fcommand2[0:7] */
30
31#define FCOMMAND_FIEN 0x80 /* nand flash I/F enable */
32#define FCOMMAND_BW_8BIT 0x00 /* 8bit bus width */
33#define FCOMMAND_BW_16BIT 0x40 /* 16bit bus width */
34#define FCOMMAND_BLOCKSZ_SMALL 0x00 /* small block */
35#define FCOMMAND_BLOCKSZ_LARGE 0x20 /* large block */
36#define FCOMMAND_DMASTART 0x10 /* dma start */
37#define FCOMMAND_RYBY 0x08 /* ready/busy flag */
38#define FCOMMAND_RYBYINTMSK 0x04 /* mask ready/busy interrupt */
39#define FCOMMAND_XFWP 0x02 /* write protect enable */
40#define FCOMMAND_XFCE 0x01 /* flash device disable */
41#define FCOMMAND_SEQKILL 0x10 /* stop seq-read */
42#define FCOMMAND_ANUM 0x07 /* address cycle */
43#define FCOMMAND_ANUM_NONE 0x00 /* address cycle none */
44#define FCOMMAND_ANUM_1CYC 0x01 /* address cycle 1cycle */
45#define FCOMMAND_ANUM_2CYC 0x02 /* address cycle 2cycle */
46#define FCOMMAND_ANUM_3CYC 0x03 /* address cycle 3cycle */
47#define FCOMMAND_ANUM_4CYC 0x04 /* address cycle 4cycle */
48#define FCOMMAND_ANUM_5CYC 0x05 /* address cycle 5cycle */
49#define FCOMMAND_FCMD_READ0 0x00 /* read1 command */
50#define FCOMMAND_FCMD_SEQIN 0x80 /* page program 1st command */
51#define FCOMMAND_FCMD_PAGEPROG 0x10 /* page program 2nd command */
52#define FCOMMAND_FCMD_RESET 0xff /* reset command */
53#define FCOMMAND_FCMD_ERASE1 0x60 /* erase 1st command */
54#define FCOMMAND_FCMD_ERASE2 0xd0 /* erase 2nd command */
55#define FCOMMAND_FCMD_STATUS 0x70 /* read status command */
56#define FCOMMAND_FCMD_READID 0x90 /* read id command */
57#define FCOMMAND_FCMD_READOOB 0x50 /* read3 command */
58/* address register */
59#define FADD __SYSREG(0xd8f00004, u32)
60/* address register 2 */
61#define FADD2 __SYSREG(0xd8f00008, u32)
62/* error judgement register */
63#define FJUDGE __SYSREG(0xd8f0000c, u32)
64#define FJUDGE_NOERR 0x0 /* no error */
65#define FJUDGE_1BITERR 0x1 /* 1bit error in data area */
66#define FJUDGE_PARITYERR 0x2 /* parity error */
67#define FJUDGE_UNCORRECTABLE 0x3 /* uncorrectable error */
68#define FJUDGE_ERRJDG_MSK 0x3 /* mask of judgement result */
69/* 1st ECC store register */
70#define FECC11 __SYSREG(0xd8f00010, u32)
71/* 2nd ECC store register */
72#define FECC12 __SYSREG(0xd8f00014, u32)
73/* 3rd ECC store register */
74#define FECC21 __SYSREG(0xd8f00018, u32)
75/* 4th ECC store register */
76#define FECC22 __SYSREG(0xd8f0001c, u32)
77/* 5th ECC store register */
78#define FECC31 __SYSREG(0xd8f00020, u32)
79/* 6th ECC store register */
80#define FECC32 __SYSREG(0xd8f00024, u32)
81/* 7th ECC store register */
82#define FECC41 __SYSREG(0xd8f00028, u32)
83/* 8th ECC store register */
84#define FECC42 __SYSREG(0xd8f0002c, u32)
85/* data register */
86#define FDATA __SYSREG(0xd8f00030, u32)
87/* access pulse register */
88#define FPWS __SYSREG(0xd8f00100, u32)
89#define FPWS_PWS1W_2CLK 0x00000000 /* write pulse width 1clock */
90#define FPWS_PWS1W_3CLK 0x01000000 /* write pulse width 2clock */
91#define FPWS_PWS1W_4CLK 0x02000000 /* write pulse width 4clock */
92#define FPWS_PWS1W_5CLK 0x03000000 /* write pulse width 5clock */
93#define FPWS_PWS1W_6CLK 0x04000000 /* write pulse width 6clock */
94#define FPWS_PWS1W_7CLK 0x05000000 /* write pulse width 7clock */
95#define FPWS_PWS1W_8CLK 0x06000000 /* write pulse width 8clock */
96#define FPWS_PWS1R_3CLK 0x00010000 /* read pulse width 3clock */
97#define FPWS_PWS1R_4CLK 0x00020000 /* read pulse width 4clock */
98#define FPWS_PWS1R_5CLK 0x00030000 /* read pulse width 5clock */
99#define FPWS_PWS1R_6CLK 0x00040000 /* read pulse width 6clock */
100#define FPWS_PWS1R_7CLK 0x00050000 /* read pulse width 7clock */
101#define FPWS_PWS1R_8CLK 0x00060000 /* read pulse width 8clock */
102#define FPWS_PWS2W_2CLK 0x00000100 /* write pulse interval 2clock */
103#define FPWS_PWS2W_3CLK 0x00000200 /* write pulse interval 3clock */
104#define FPWS_PWS2W_4CLK 0x00000300 /* write pulse interval 4clock */
105#define FPWS_PWS2W_5CLK 0x00000400 /* write pulse interval 5clock */
106#define FPWS_PWS2W_6CLK 0x00000500 /* write pulse interval 6clock */
107#define FPWS_PWS2R_2CLK 0x00000001 /* read pulse interval 2clock */
108#define FPWS_PWS2R_3CLK 0x00000002 /* read pulse interval 3clock */
109#define FPWS_PWS2R_4CLK 0x00000003 /* read pulse interval 4clock */
110#define FPWS_PWS2R_5CLK 0x00000004 /* read pulse interval 5clock */
111#define FPWS_PWS2R_6CLK 0x00000005 /* read pulse interval 6clock */
112/* command register 2 */
113#define FCOMMAND2 __SYSREG(0xd8f00110, u32)
114/* transfer frequency register */
115#define FNUM __SYSREG(0xd8f00114, u32)
116#define FSDATA_ADDR 0xd8f00400
117/* active data register */
118#define FSDATA __SYSREG(FSDATA_ADDR, u32)
119
120#endif /* _PROC_NAND_REGS_H_ */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/proc.h b/arch/mn10300/proc-mn2ws0050/include/proc/proc.h
deleted file mode 100644
index 90d5cadd05bd..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/proc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* proc.h: MN2WS0050 processor description
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_PROC_H
13#define _ASM_PROC_PROC_H
14
15#define PROCESSOR_VENDOR_NAME "Panasonic"
16#define PROCESSOR_MODEL_NAME "mn2ws0050"
17
18#endif /* _ASM_PROC_PROC_H */
diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/smp-regs.h b/arch/mn10300/proc-mn2ws0050/include/proc/smp-regs.h
deleted file mode 100644
index 22f277fbb4de..000000000000
--- a/arch/mn10300/proc-mn2ws0050/include/proc/smp-regs.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* MN10300/AM33v2 Microcontroller SMP registers
2 *
3 * Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
4 * All Rights Reserved.
5 * Created:
6 * 13-Nov-2006 MEI Add extended cache and atomic operation register
7 * for SMP support.
8 * 23-Feb-2007 MEI Add define for gdbstub SMP.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _ASM_PROC_SMP_REGS_H
17#define _ASM_PROC_SMP_REGS_H
18
19#ifdef __KERNEL__
20
21#ifndef __ASSEMBLY__
22#include <linux/types.h>
23#endif
24#include <asm/cpu-regs.h>
25
26/*
27 * Reference to the interrupt controllers of other CPUs
28 */
29#define CROSS_ICR_CPU_SHIFT 16
30
31#define CROSS_GxICR(X, CPU) __SYSREG(0xc4000000 + (X) * 4 + \
32 ((X) >= 64 && (X) < 192) * 0xf00 + ((CPU) << CROSS_ICR_CPU_SHIFT), u16)
33#define CROSS_GxICR_u8(X, CPU) __SYSREG(0xc4000000 + (X) * 4 + \
34 (((X) >= 64) && ((X) < 192)) * 0xf00 + ((CPU) << CROSS_ICR_CPU_SHIFT), u8)
35
36/* CPU ID register */
37#define CPUID __SYSREGC(0xc0000054, u32)
38#define CPUID_MASK 0x00000007 /* CPU ID mask */
39
40/* extended cache control register */
41#define ECHCTR __SYSREG(0xc0000c20, u32)
42#define ECHCTR_IBCM 0x00000001 /* instruction cache broad cast mask */
43#define ECHCTR_DBCM 0x00000002 /* data cache broad cast mask */
44#define ECHCTR_ISPM 0x00000004 /* instruction cache snoop mask */
45#define ECHCTR_DSPM 0x00000008 /* data cache snoop mask */
46
47#define NMIAGR __SYSREG(0xd400013c, u16)
48#define NMIAGR_GN 0x03fc
49
50#endif /* __KERNEL__ */
51#endif /* _ASM_PROC_SMP_REGS_H */
diff --git a/arch/mn10300/proc-mn2ws0050/proc-init.c b/arch/mn10300/proc-mn2ws0050/proc-init.c
deleted file mode 100644
index 25b1b453c515..000000000000
--- a/arch/mn10300/proc-mn2ws0050/proc-init.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/* MN2WS0050 processor initialisation
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16
17#include <asm/cacheflush.h>
18#include <asm/processor.h>
19#include <linux/uaccess.h>
20#include <asm/io.h>
21#include <linux/atomic.h>
22#include <asm/smp.h>
23#include <asm/pgalloc.h>
24#include <asm/busctl-regs.h>
25#include <unit/timex.h>
26#include <asm/fpu.h>
27#include <asm/rtc.h>
28
29#define MEMCONF __SYSREGC(0xdf800400, u32)
30
31/*
32 * initialise the on-silicon processor peripherals
33 */
34asmlinkage void __init processor_init(void)
35{
36 int loop;
37
38 /* set up the exception table first */
39 for (loop = 0x000; loop < 0x400; loop += 8)
40 __set_intr_stub(loop, __common_exception);
41
42 __set_intr_stub(EXCEP_ITLBMISS, itlb_miss);
43 __set_intr_stub(EXCEP_DTLBMISS, dtlb_miss);
44 __set_intr_stub(EXCEP_IAERROR, itlb_aerror);
45 __set_intr_stub(EXCEP_DAERROR, dtlb_aerror);
46 __set_intr_stub(EXCEP_BUSERROR, raw_bus_error);
47 __set_intr_stub(EXCEP_DOUBLE_FAULT, double_fault);
48 __set_intr_stub(EXCEP_FPU_DISABLED, fpu_disabled);
49 __set_intr_stub(EXCEP_SYSCALL0, system_call);
50
51 __set_intr_stub(EXCEP_NMI, nmi_handler);
52 __set_intr_stub(EXCEP_WDT, nmi_handler);
53 __set_intr_stub(EXCEP_IRQ_LEVEL0, irq_handler);
54 __set_intr_stub(EXCEP_IRQ_LEVEL1, irq_handler);
55 __set_intr_stub(EXCEP_IRQ_LEVEL2, irq_handler);
56 __set_intr_stub(EXCEP_IRQ_LEVEL3, irq_handler);
57 __set_intr_stub(EXCEP_IRQ_LEVEL4, irq_handler);
58 __set_intr_stub(EXCEP_IRQ_LEVEL5, irq_handler);
59 __set_intr_stub(EXCEP_IRQ_LEVEL6, irq_handler);
60
61 IVAR0 = EXCEP_IRQ_LEVEL0;
62 IVAR1 = EXCEP_IRQ_LEVEL1;
63 IVAR2 = EXCEP_IRQ_LEVEL2;
64 IVAR3 = EXCEP_IRQ_LEVEL3;
65 IVAR4 = EXCEP_IRQ_LEVEL4;
66 IVAR5 = EXCEP_IRQ_LEVEL5;
67 IVAR6 = EXCEP_IRQ_LEVEL6;
68
69#ifndef CONFIG_MN10300_HAS_CACHE_SNOOP
70 mn10300_dcache_flush_inv();
71 mn10300_icache_inv();
72#endif
73
74 /* disable all interrupts and set to priority 6 (lowest) */
75#ifdef CONFIG_SMP
76 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
77 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
78#else /* !CONFIG_SMP */
79 for (loop = 0; loop < NR_IRQS; loop++)
80 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
81#endif /* !CONFIG_SMP */
82
83 /* clear the timers */
84 TM0MD = 0;
85 TM1MD = 0;
86 TM2MD = 0;
87 TM3MD = 0;
88 TM4MD = 0;
89 TM5MD = 0;
90 TM6MD = 0;
91 TM6MDA = 0;
92 TM6MDB = 0;
93 TM7MD = 0;
94 TM8MD = 0;
95 TM9MD = 0;
96 TM10MD = 0;
97 TM11MD = 0;
98 TM12MD = 0;
99 TM13MD = 0;
100 TM14MD = 0;
101 TM15MD = 0;
102
103 calibrate_clock();
104}
105
106/*
107 * determine the memory size and base from the memory controller regs
108 */
109void __init get_mem_info(unsigned long *mem_base, unsigned long *mem_size)
110{
111 unsigned long memconf = MEMCONF;
112 unsigned long size = 0; /* order: MByte */
113
114 *mem_base = 0x90000000; /* fixed address */
115
116 switch (memconf & 0x00000003) {
117 case 0x01:
118 size = 256 / 8; /* 256 Mbit per chip */
119 break;
120 case 0x02:
121 size = 512 / 8; /* 512 Mbit per chip */
122 break;
123 case 0x03:
124 size = 1024 / 8; /* 1 Gbit per chip */
125 break;
126 default:
127 panic("Invalid SDRAM size");
128 break;
129 }
130
131 printk(KERN_INFO "DDR2-SDRAM: %luMB x 2 @%08lx\n", size, *mem_base);
132
133 *mem_size = (size * 2) << 20;
134}
diff --git a/arch/mn10300/unit-asb2303/Makefile b/arch/mn10300/unit-asb2303/Makefile
deleted file mode 100644
index 38a5bb43b0bb..000000000000
--- a/arch/mn10300/unit-asb2303/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1###############################################################################
2#
3# Makefile for the ASB2303 board
4#
5###############################################################################
6obj-y := unit-init.o smc91111.o flash.o leds.o
diff --git a/arch/mn10300/unit-asb2303/flash.c b/arch/mn10300/unit-asb2303/flash.c
deleted file mode 100644
index b03d8738d67c..000000000000
--- a/arch/mn10300/unit-asb2303/flash.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/* Handle mapping of the flash on the ASB2303 board
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15
16#define ASB2303_PROM_ADDR 0xA0000000 /* Boot PROM */
17#define ASB2303_PROM_SIZE (2 * 1024 * 1024)
18#define ASB2303_FLASH_ADDR 0xA4000000 /* System Flash */
19#define ASB2303_FLASH_SIZE (32 * 1024 * 1024)
20#define ASB2303_CONFIG_ADDR 0xA6000000 /* System Config EEPROM */
21#define ASB2303_CONFIG_SIZE (8 * 1024)
22
23/*
24 * default MTD partition table for both main flash devices, expected to be
25 * overridden by RedBoot
26 */
27static struct mtd_partition asb2303_partitions[] = {
28 {
29 .name = "Bootloader",
30 .size = 0x00040000,
31 .offset = 0,
32 .mask_flags = MTD_CAP_ROM /* force read-only */
33 }, {
34 .name = "Kernel",
35 .size = 0x00400000,
36 .offset = 0x00040000,
37 }, {
38 .name = "Filesystem",
39 .size = MTDPART_SIZ_FULL,
40 .offset = 0x00440000
41 }
42};
43
44/*
45 * the ASB2303 Boot PROM definition
46 */
47static struct physmap_flash_data asb2303_bootprom_data = {
48 .width = 2,
49 .nr_parts = 1,
50 .parts = asb2303_partitions,
51};
52
53static struct resource asb2303_bootprom_resource = {
54 .start = ASB2303_PROM_ADDR,
55 .end = ASB2303_PROM_ADDR + ASB2303_PROM_SIZE,
56 .flags = IORESOURCE_MEM,
57};
58
59static struct platform_device asb2303_bootprom = {
60 .name = "physmap-flash",
61 .id = 0,
62 .dev.platform_data = &asb2303_bootprom_data,
63 .num_resources = 1,
64 .resource = &asb2303_bootprom_resource,
65};
66
67/*
68 * the ASB2303 System Flash definition
69 */
70static struct physmap_flash_data asb2303_sysflash_data = {
71 .width = 4,
72 .nr_parts = 1,
73 .parts = asb2303_partitions,
74};
75
76static struct resource asb2303_sysflash_resource = {
77 .start = ASB2303_FLASH_ADDR,
78 .end = ASB2303_FLASH_ADDR + ASB2303_FLASH_SIZE,
79 .flags = IORESOURCE_MEM,
80};
81
82static struct platform_device asb2303_sysflash = {
83 .name = "physmap-flash",
84 .id = 1,
85 .dev.platform_data = &asb2303_sysflash_data,
86 .num_resources = 1,
87 .resource = &asb2303_sysflash_resource,
88};
89
90/*
91 * register the ASB2303 flashes
92 */
93static int __init asb2303_mtd_init(void)
94{
95 platform_device_register(&asb2303_bootprom);
96 platform_device_register(&asb2303_sysflash);
97 return 0;
98}
99device_initcall(asb2303_mtd_init);
diff --git a/arch/mn10300/unit-asb2303/include/unit/clock.h b/arch/mn10300/unit-asb2303/include/unit/clock.h
deleted file mode 100644
index 0316907a012e..000000000000
--- a/arch/mn10300/unit-asb2303/include/unit/clock.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* ASB2303-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#define MN10300_IOCLK 33333333UL
18/* #define MN10300_IOBCLK 66666666UL */
19
20#endif /* !__ASSEMBLY__ */
21
22#define MN10300_WDCLK MN10300_IOCLK
23
24#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/leds.h b/arch/mn10300/unit-asb2303/include/unit/leds.h
deleted file mode 100644
index 3a7543ea7b5c..000000000000
--- a/arch/mn10300/unit-asb2303/include/unit/leds.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* ASB2303-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2303_GPIO0DEF __SYSREG(0xDB000000, u32)
20#define ASB2303_7SEGLEDS __SYSREG(0xDB000008, u32)
21
22/*
23 * use the 7-segment LEDs to indicate states
24 */
25
26/* flip the 7-segment LEDs between "G" and "-" */
27#define mn10300_set_gdbleds(ONOFF) \
28do { \
29 ASB2303_7SEGLEDS = (ONOFF) ? 0x85 : 0x7f; \
30} while (0)
31
32/* indicate double-fault by displaying "d" on the LEDs */
33#define mn10300_set_dbfleds \
34 mov 0x43,d0 ; \
35 movbu d0,(ASB2303_7SEGLEDS)
36
37#ifndef __ASSEMBLY__
38extern void peripheral_leds_display_exception(enum exception_code code);
39extern void peripheral_leds_led_chase(void);
40extern void debug_to_serial(const char *p, int n);
41#endif /* __ASSEMBLY__ */
42
43#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/serial.h b/arch/mn10300/unit-asb2303/include/unit/serial.h
deleted file mode 100644
index 991e356bac5f..000000000000
--- a/arch/mn10300/unit-asb2303/include/unit/serial.h
+++ /dev/null
@@ -1,141 +0,0 @@
1/* ASB2303-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <proc/irq.h>
17#include <linux/serial_reg.h>
18
19#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
20#define SERIAL_PORT1_BASE_ADDRESS 0xA6FC0000
21
22#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
23
24/*
25 * The ASB2303 has an 18.432 MHz clock the UART
26 */
27#define BASE_BAUD (18432000 / 16)
28
29/*
30 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
31 */
32#ifndef CONFIG_GDBSTUB_ON_TTYSx
33
34#define SERIAL_PORT_DFNS \
35 { \
36 .baud_base = BASE_BAUD, \
37 .irq = SERIAL_IRQ, \
38 .flags = STD_COM_FLAGS, \
39 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
40 .iomem_reg_shift = 2, \
41 .io_type = SERIAL_IO_MEM, \
42 }, \
43 { \
44 .baud_base = BASE_BAUD, \
45 .irq = SERIAL_IRQ, \
46 .flags = STD_COM_FLAGS, \
47 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
48 .iomem_reg_shift = 2, \
49 .io_type = SERIAL_IO_MEM, \
50 },
51
52#ifndef __ASSEMBLY__
53
54static inline void __debug_to_serial(const char *p, int n)
55{
56}
57
58#endif /* !__ASSEMBLY__ */
59
60#else /* CONFIG_GDBSTUB_ON_TTYSx */
61
62#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */
63
64#if defined(CONFIG_GDBSTUB_ON_TTYS0)
65#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
66#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
67#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
68#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
69#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
70#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
71#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
72#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
73#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
74#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
75#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
76#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
77#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
78
79#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
80#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
81#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
82#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
83#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
84#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
85#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
86#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
87#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
88#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
89#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
90#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
91#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
92#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
93#endif
94
95#ifndef __ASSEMBLY__
96
97#define LSR_WAIT_FOR(STATE) \
98do { \
99 while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {} \
100} while (0)
101#define FLOWCTL_WAIT_FOR(LINE) \
102do { \
103 while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {} \
104} while (0)
105#define FLOWCTL_CLEAR(LINE) \
106do { \
107 GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \
108} while (0)
109#define FLOWCTL_SET(LINE) \
110do { \
111 GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; \
112} while (0)
113#define FLOWCTL_QUERY(LINE) ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
114
115static inline void __debug_to_serial(const char *p, int n)
116{
117 char ch;
118
119 FLOWCTL_SET(DTR);
120
121 for (; n > 0; n--) {
122 LSR_WAIT_FOR(THRE);
123 FLOWCTL_WAIT_FOR(CTS);
124
125 ch = *p++;
126 if (ch == 0x0a) {
127 GDBPORT_SERIAL_TX = 0x0d;
128 LSR_WAIT_FOR(THRE);
129 FLOWCTL_WAIT_FOR(CTS);
130 }
131 GDBPORT_SERIAL_TX = ch;
132 }
133
134 FLOWCTL_CLEAR(DTR);
135}
136
137#endif /* !__ASSEMBLY__ */
138
139#endif /* CONFIG_GDBSTUB_ON_TTYSx */
140
141#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/smc91111.h b/arch/mn10300/unit-asb2303/include/unit/smc91111.h
deleted file mode 100644
index dd4e2946438e..000000000000
--- a/arch/mn10300/unit-asb2303/include/unit/smc91111.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* Support for the SMC91C111 NIC on an ASB2303
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMC91111_H
12#define _ASM_UNIT_SMC91111_H
13
14#include <asm/intctl-regs.h>
15
16#define SMC91111_BASE 0xAA000300UL
17#define SMC91111_BASE_END 0xAA000400UL
18#define SMC91111_IRQ XIRQ3
19
20#define SMC_CAN_USE_8BIT 0
21#define SMC_CAN_USE_16BIT 1
22#define SMC_CAN_USE_32BIT 0
23#define SMC_NOWAIT 1
24#define SMC_IRQ_FLAGS (0)
25
26#if SMC_CAN_USE_8BIT
27#define SMC_inb(a, r) inb((unsigned long) ((a) + (r)))
28#define SMC_outb(v, a, r) outb(v, (unsigned long) ((a) + (r)))
29#endif
30
31#if SMC_CAN_USE_16BIT
32#define SMC_inw(a, r) inw((unsigned long) ((a) + (r)))
33#define SMC_outw(lp, v, a, r) outw(v, (unsigned long) ((a) + (r)))
34#define SMC_insw(a, r, p, l) insw((unsigned long) ((a) + (r)), (p), (l))
35#define SMC_outsw(a, r, p, l) outsw((unsigned long) ((a) + (r)), (p), (l))
36#endif
37
38#if SMC_CAN_USE_32BIT
39#define SMC_inl(a, r) inl((unsigned long) ((a) + (r)))
40#define SMC_outl(v, a, r) outl(v, (unsigned long) ((a) + (r)))
41#define SMC_insl(a, r, p, l) insl((unsigned long) ((a) + (r)), (p), (l))
42#define SMC_outsl(a, r, p, l) outsl((unsigned long) ((a) + (r)), (p), (l))
43#endif
44
45#define RPC_LSA_DEFAULT RPC_LED_100_10
46#define RPC_LSB_DEFAULT RPC_LED_TX_RX
47
48#define set_irq_type(irq, type)
49
50#endif /* _ASM_UNIT_SMC91111_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/timex.h b/arch/mn10300/unit-asb2303/include/unit/timex.h
deleted file mode 100644
index c37f9832cf17..000000000000
--- a/arch/mn10300/unit-asb2303/include/unit/timex.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/* ASB2303-specific timer specifications
2 *
3 * Copyright (C) 2007, 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#include <asm/timer-regs.h>
15#include <unit/clock.h>
16#include <asm/param.h>
17
18/*
19 * jiffies counter specifications
20 */
21
22#define TMJCBR_MAX 0xffff
23#define TMJCIRQ TM1IRQ
24#define TMJCICR TM1ICR
25
26#ifndef __ASSEMBLY__
27
28#define MN10300_SRC_IOCLK MN10300_IOCLK
29
30#ifndef HZ
31# error HZ undeclared.
32#endif /* !HZ */
33/* use as little prescaling as possible to avoid losing accuracy */
34#if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
35# define IOCLK_PRESCALE 1
36# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK
37# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK
38#elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
39# define IOCLK_PRESCALE 8
40# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_8
41# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_8
42#elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
43# define IOCLK_PRESCALE 32
44# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_32
45# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_32
46#else
47# error You lose.
48#endif
49
50#define MN10300_JCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
51#define MN10300_TSCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
52
53#define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
54#define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
55
56static inline void stop_jiffies_counter(void)
57{
58 u16 tmp;
59 TM01MD = JC_TIMER_CLKSRC | TM1MD_SRC_TM0CASCADE << 8;
60 tmp = TM01MD;
61}
62
63static inline void reload_jiffies_counter(u32 cnt)
64{
65 u32 tmp;
66
67 TM01BR = cnt;
68 tmp = TM01BR;
69
70 TM01MD = JC_TIMER_CLKSRC | \
71 TM1MD_SRC_TM0CASCADE << 8 | \
72 TM0MD_INIT_COUNTER | \
73 TM1MD_INIT_COUNTER << 8;
74
75
76 TM01MD = JC_TIMER_CLKSRC | \
77 TM1MD_SRC_TM0CASCADE << 8 | \
78 TM0MD_COUNT_ENABLE | \
79 TM1MD_COUNT_ENABLE << 8;
80
81 tmp = TM01MD;
82}
83
84#endif /* !__ASSEMBLY__ */
85
86
87/*
88 * timestamp counter specifications
89 */
90
91#define TMTSCBR_MAX 0xffffffff
92#define TMTSCBC TM45BC
93
94#ifndef __ASSEMBLY__
95
96static inline void startup_timestamp_counter(void)
97{
98 u32 t32;
99
100 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
101 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
102 */
103 TM45BR = TMTSCBR_MAX;
104 t32 = TM45BR;
105
106 TM4MD = TSC_TIMER_CLKSRC;
107 TM4MD |= TM4MD_INIT_COUNTER;
108 TM4MD &= ~TM4MD_INIT_COUNTER;
109 TM4ICR = 0;
110 t32 = TM4ICR;
111
112 TM5MD = TM5MD_SRC_TM4CASCADE;
113 TM5MD |= TM5MD_INIT_COUNTER;
114 TM5MD &= ~TM5MD_INIT_COUNTER;
115 TM5ICR = 0;
116 t32 = TM5ICR;
117
118 TM5MD |= TM5MD_COUNT_ENABLE;
119 TM4MD |= TM4MD_COUNT_ENABLE;
120 t32 = TM5MD;
121 t32 = TM4MD;
122}
123
124static inline void shutdown_timestamp_counter(void)
125{
126 u8 t8;
127 TM4MD = 0;
128 TM5MD = 0;
129 t8 = TM4MD;
130 t8 = TM5MD;
131}
132
133/*
134 * we use a cascaded pair of 16-bit down-counting timers to count I/O
135 * clock cycles for the purposes of time keeping
136 */
137typedef unsigned long cycles_t;
138
139static inline cycles_t read_timestamp_counter(void)
140{
141 return (cycles_t)~TMTSCBC;
142}
143
144#endif /* !__ASSEMBLY__ */
145
146#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/arch/mn10300/unit-asb2303/leds.c b/arch/mn10300/unit-asb2303/leds.c
deleted file mode 100644
index c03839357a14..000000000000
--- a/arch/mn10300/unit-asb2303/leds.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/* ASB2303 peripheral 7-segment LEDs x1 support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14
15#include <asm/io.h>
16#include <asm/processor.h>
17#include <asm/intctl-regs.h>
18#include <asm/rtc-regs.h>
19#include <unit/leds.h>
20
21#if 0
22static const u8 asb2303_led_hex_tbl[16] = {
23 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
24 0x00, 0x20, 0x10, 0x06, 0x8c, 0x42, 0x0c, 0x1c
25};
26#endif
27
28static const u8 asb2303_led_chase_tbl[6] = {
29 ~0x02, /* top - segA */
30 ~0x04, /* right top - segB */
31 ~0x08, /* right bottom - segC */
32 ~0x10, /* bottom - segD */
33 ~0x20, /* left bottom - segE */
34 ~0x40, /* left top - segF */
35};
36
37static unsigned asb2303_led_chase;
38
39void peripheral_leds_display_exception(enum exception_code code)
40{
41 ASB2303_GPIO0DEF = 0x5555; /* configure as an output port */
42 ASB2303_7SEGLEDS = 0x6d; /* triple horizontal bar */
43}
44
45void peripheral_leds_led_chase(void)
46{
47 ASB2303_GPIO0DEF = 0x5555; /* configure as an output port */
48 ASB2303_7SEGLEDS = asb2303_led_chase_tbl[asb2303_led_chase];
49 asb2303_led_chase++;
50 if (asb2303_led_chase >= 6)
51 asb2303_led_chase = 0;
52}
diff --git a/arch/mn10300/unit-asb2303/smc91111.c b/arch/mn10300/unit-asb2303/smc91111.c
deleted file mode 100644
index 53677694b165..000000000000
--- a/arch/mn10300/unit-asb2303/smc91111.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/* ASB2303 initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16
17#include <asm/io.h>
18#include <asm/irq.h>
19#include <asm/timex.h>
20#include <asm/processor.h>
21#include <asm/intctl-regs.h>
22#include <unit/smc91111.h>
23
24static struct resource smc91c111_resources[] = {
25 [0] = {
26 .start = SMC91111_BASE,
27 .end = SMC91111_BASE_END,
28 .flags = IORESOURCE_MEM,
29 },
30 [1] = {
31 .start = SMC91111_IRQ,
32 .end = SMC91111_IRQ,
33 .flags = IORESOURCE_IRQ,
34 },
35};
36
37static struct platform_device smc91c111_device = {
38 .name = "smc91x",
39 .id = 0,
40 .num_resources = ARRAY_SIZE(smc91c111_resources),
41 .resource = smc91c111_resources,
42};
43
44/*
45 * add platform devices
46 */
47static int __init unit_device_init(void)
48{
49 platform_device_register(&smc91c111_device);
50 return 0;
51}
52
53device_initcall(unit_device_init);
diff --git a/arch/mn10300/unit-asb2303/unit-init.c b/arch/mn10300/unit-asb2303/unit-init.c
deleted file mode 100644
index 834a76aa551a..000000000000
--- a/arch/mn10300/unit-asb2303/unit-init.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* ASB2303 initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/device.h>
16
17#include <asm/io.h>
18#include <asm/setup.h>
19#include <asm/processor.h>
20#include <asm/irq.h>
21#include <asm/intctl-regs.h>
22
23/*
24 * initialise some of the unit hardware before gdbstub is set up
25 */
26asmlinkage void __init unit_init(void)
27{
28 /* set up the external interrupts */
29 SET_XIRQ_TRIGGER(0, XIRQ_TRIGGER_HILEVEL);
30 SET_XIRQ_TRIGGER(2, XIRQ_TRIGGER_LOWLEVEL);
31 SET_XIRQ_TRIGGER(3, XIRQ_TRIGGER_HILEVEL);
32 SET_XIRQ_TRIGGER(4, XIRQ_TRIGGER_LOWLEVEL);
33 SET_XIRQ_TRIGGER(5, XIRQ_TRIGGER_LOWLEVEL);
34
35#ifdef CONFIG_EXT_SERIAL_IRQ_LEVEL
36 set_intr_level(XIRQ0, NUM2GxICR_LEVEL(CONFIG_EXT_SERIAL_IRQ_LEVEL));
37#endif
38
39#ifdef CONFIG_ETHERNET_IRQ_LEVEL
40 set_intr_level(XIRQ3, NUM2GxICR_LEVEL(CONFIG_ETHERNET_IRQ_LEVEL));
41#endif
42}
43
44/*
45 * initialise the rest of the unit hardware after gdbstub is ready
46 */
47void __init unit_setup(void)
48{
49}
50
51/*
52 * initialise the external interrupts used by a unit of this type
53 */
54void __init unit_init_IRQ(void)
55{
56 unsigned int extnum;
57
58 for (extnum = 0; extnum < NR_XIRQS; extnum++) {
59 switch (GET_XIRQ_TRIGGER(extnum)) {
60 case XIRQ_TRIGGER_HILEVEL:
61 case XIRQ_TRIGGER_LOWLEVEL:
62 mn10300_set_lateack_irq_type(XIRQ2IRQ(extnum));
63 break;
64 default:
65 break;
66 }
67 }
68}
diff --git a/arch/mn10300/unit-asb2305/Makefile b/arch/mn10300/unit-asb2305/Makefile
deleted file mode 100644
index cbc5abaa939a..000000000000
--- a/arch/mn10300/unit-asb2305/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1###############################################################################
2#
3# Makefile for the ASB2305 board
4#
5###############################################################################
6obj-y := unit-init.o leds.o
7
8obj-$(CONFIG_PCI) += pci.o pci-asb2305.o pci-irq.o
diff --git a/arch/mn10300/unit-asb2305/include/unit/clock.h b/arch/mn10300/unit-asb2305/include/unit/clock.h
deleted file mode 100644
index 29e3425431cf..000000000000
--- a/arch/mn10300/unit-asb2305/include/unit/clock.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* ASB2305-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#define MN10300_IOCLK 33333333UL
18/* #define MN10300_IOBCLK 66666666UL */
19
20#endif /* !__ASSEMBLY__ */
21
22#define MN10300_WDCLK MN10300_IOCLK
23
24#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/leds.h b/arch/mn10300/unit-asb2305/include/unit/leds.h
deleted file mode 100644
index bc471f617fd1..000000000000
--- a/arch/mn10300/unit-asb2305/include/unit/leds.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* ASB2305-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
20
21/* perform a hard reset by driving PIO06 low */
22#define mn10300_unit_hard_reset() \
23do { \
24 P0OUT &= 0xbf; \
25 P0MD = (P0MD & P0MD_6) | P0MD_6_OUT; \
26} while (0)
27
28/*
29 * use the 7-segment LEDs to indicate states
30 */
31/* indicate double-fault by displaying "db-f" on the LEDs */
32#define mn10300_set_dbfleds \
33 mov 0x43077f1d,d0 ; \
34 mov d0,(ASB2305_7SEGLEDS)
35
36/* flip the 7-segment LEDs between "Gdb-" and "----" */
37#define mn10300_set_gdbleds(ONOFF) \
38do { \
39 ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
40} while (0)
41
42#ifndef __ASSEMBLY__
43extern void peripheral_leds_display_exception(enum exception_code);
44extern void peripheral_leds_led_chase(void);
45extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
46extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
47extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
48extern void peripheral_leds7x4_display_rtc(void);
49#endif /* __ASSEMBLY__ */
50
51#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h
deleted file mode 100644
index 88c08219315f..000000000000
--- a/arch/mn10300/unit-asb2305/include/unit/serial.h
+++ /dev/null
@@ -1,125 +0,0 @@
1/* ASB2305-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SERIAL_H
12#define _ASM_UNIT_SERIAL_H
13
14#include <asm/cpu-regs.h>
15#include <proc/irq.h>
16#include <linux/serial_reg.h>
17
18#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
19#define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
20
21#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
22
23/*
24 * The ASB2305 has an 18.432 MHz clock the UART
25 */
26#define BASE_BAUD (18432000 / 16)
27
28/*
29 * dispose of the /dev/ttyS0 serial port
30 */
31#ifndef CONFIG_GDBSTUB_ON_TTYSx
32
33#define SERIAL_PORT_DFNS \
34 { \
35 .baud_base = BASE_BAUD, \
36 .irq = SERIAL_IRQ, \
37 .flags = STD_COM_FLAGS, \
38 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
39 .iomem_reg_shift = 2, \
40 .io_type = SERIAL_IO_MEM, \
41 },
42
43#ifndef __ASSEMBLY__
44
45static inline void __debug_to_serial(const char *p, int n)
46{
47}
48
49#endif /* !__ASSEMBLY__ */
50
51#else /* CONFIG_GDBSTUB_ON_TTYSx */
52
53#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
54
55#if defined(CONFIG_GDBSTUB_ON_TTYS0)
56#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
57#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
58#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
59#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
60#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
61#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
62#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
63#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
64#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
65#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
66#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
67#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
68#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
69
70#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
71#error The ASB2305 doesnt have a /dev/ttyS1
72#endif
73
74#ifndef __ASSEMBLY__
75
76#define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
77#define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
78#define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
79#define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
80
81#define LSR_WAIT_FOR(STATE) \
82do { \
83 while (!(TTYS0_LSR & UART_LSR_##STATE)) {} \
84} while (0)
85#define FLOWCTL_WAIT_FOR(LINE) \
86do { \
87 while (!(TTYS0_MSR & UART_MSR_##LINE)) {} \
88} while (0)
89#define FLOWCTL_CLEAR(LINE) \
90do { \
91 TTYS0_MCR &= ~UART_MCR_##LINE; \
92} while (0)
93#define FLOWCTL_SET(LINE) \
94do { \
95 TTYS0_MCR |= UART_MCR_##LINE; \
96} while (0)
97#define FLOWCTL_QUERY(LINE) ({ TTYS0_MSR & UART_MSR_##LINE; })
98
99static inline void __debug_to_serial(const char *p, int n)
100{
101 char ch;
102
103 FLOWCTL_SET(DTR);
104
105 for (; n > 0; n--) {
106 LSR_WAIT_FOR(THRE);
107 FLOWCTL_WAIT_FOR(CTS);
108
109 ch = *p++;
110 if (ch == 0x0a) {
111 TTYS0_TX = 0x0d;
112 LSR_WAIT_FOR(THRE);
113 FLOWCTL_WAIT_FOR(CTS);
114 }
115 TTYS0_TX = ch;
116 }
117
118 FLOWCTL_CLEAR(DTR);
119}
120
121#endif /* !__ASSEMBLY__ */
122
123#endif /* CONFIG_GDBSTUB_ON_TTYSx */
124
125#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h
deleted file mode 100644
index 4cefc224f448..000000000000
--- a/arch/mn10300/unit-asb2305/include/unit/timex.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/* ASB2305-specific timer specifications
2 *
3 * Copyright (C) 2007, 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#include <asm/timer-regs.h>
15#include <unit/clock.h>
16#include <asm/param.h>
17
18/*
19 * jiffies counter specifications
20 */
21
22#define TMJCBR_MAX 0xffff
23#define TMJCIRQ TM1IRQ
24#define TMJCICR TM1ICR
25
26#ifndef __ASSEMBLY__
27
28#define MN10300_SRC_IOCLK MN10300_IOCLK
29
30#ifndef HZ
31# error HZ undeclared.
32#endif /* !HZ */
33/* use as little prescaling as possible to avoid losing accuracy */
34#if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
35# define IOCLK_PRESCALE 1
36# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK
37# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK
38#elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
39# define IOCLK_PRESCALE 8
40# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_8
41# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_8
42#elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
43# define IOCLK_PRESCALE 32
44# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_32
45# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_32
46#else
47# error You lose.
48#endif
49
50#define MN10300_JCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
51#define MN10300_TSCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
52
53#define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
54#define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
55
56static inline void stop_jiffies_counter(void)
57{
58 u16 tmp;
59 TM01MD = JC_TIMER_CLKSRC | TM1MD_SRC_TM0CASCADE << 8;
60 tmp = TM01MD;
61}
62
63static inline void reload_jiffies_counter(u32 cnt)
64{
65 u32 tmp;
66
67 TM01BR = cnt;
68 tmp = TM01BR;
69
70 TM01MD = JC_TIMER_CLKSRC | \
71 TM1MD_SRC_TM0CASCADE << 8 | \
72 TM0MD_INIT_COUNTER | \
73 TM1MD_INIT_COUNTER << 8;
74
75
76 TM01MD = JC_TIMER_CLKSRC | \
77 TM1MD_SRC_TM0CASCADE << 8 | \
78 TM0MD_COUNT_ENABLE | \
79 TM1MD_COUNT_ENABLE << 8;
80
81 tmp = TM01MD;
82}
83
84#endif /* !__ASSEMBLY__ */
85
86
87/*
88 * timestamp counter specifications
89 */
90
91#define TMTSCBR_MAX 0xffffffff
92#define TMTSCBC TM45BC
93
94#ifndef __ASSEMBLY__
95
96static inline void startup_timestamp_counter(void)
97{
98 u32 t32;
99
100 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
101 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
102 */
103 TM45BR = TMTSCBR_MAX;
104 t32 = TM45BR;
105
106 TM4MD = TSC_TIMER_CLKSRC;
107 TM4MD |= TM4MD_INIT_COUNTER;
108 TM4MD &= ~TM4MD_INIT_COUNTER;
109 TM4ICR = 0;
110 t32 = TM4ICR;
111
112 TM5MD = TM5MD_SRC_TM4CASCADE;
113 TM5MD |= TM5MD_INIT_COUNTER;
114 TM5MD &= ~TM5MD_INIT_COUNTER;
115 TM5ICR = 0;
116 t32 = TM5ICR;
117
118 TM5MD |= TM5MD_COUNT_ENABLE;
119 TM4MD |= TM4MD_COUNT_ENABLE;
120 t32 = TM5MD;
121 t32 = TM4MD;
122}
123
124static inline void shutdown_timestamp_counter(void)
125{
126 u8 t8;
127 TM4MD = 0;
128 TM5MD = 0;
129 t8 = TM4MD;
130 t8 = TM5MD;
131}
132
133/*
134 * we use a cascaded pair of 16-bit down-counting timers to count I/O
135 * clock cycles for the purposes of time keeping
136 */
137typedef unsigned long cycles_t;
138
139static inline cycles_t read_timestamp_counter(void)
140{
141 return (cycles_t)~TMTSCBC;
142}
143
144#endif /* !__ASSEMBLY__ */
145
146#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/arch/mn10300/unit-asb2305/leds.c b/arch/mn10300/unit-asb2305/leds.c
deleted file mode 100644
index 6f8de9954026..000000000000
--- a/arch/mn10300/unit-asb2305/leds.c
+++ /dev/null
@@ -1,124 +0,0 @@
1/* ASB2305 Peripheral 7-segment LEDs x4 support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <asm/io.h>
15#include <asm/processor.h>
16#include <asm/intctl-regs.h>
17#include <asm/rtc-regs.h>
18#include <unit/leds.h>
19
20static const u8 asb2305_led_hex_tbl[16] = {
21 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
22 0x00, 0x20, 0x10, 0x06, 0x8c, 0x42, 0x0c, 0x1c
23};
24
25static const u32 asb2305_led_chase_tbl[6] = {
26 ~0x02020202, /* top - segA */
27 ~0x04040404, /* right top - segB */
28 ~0x08080808, /* right bottom - segC */
29 ~0x10101010, /* bottom - segD */
30 ~0x20202020, /* left bottom - segE */
31 ~0x40404040, /* left top - segF */
32};
33
34static unsigned asb2305_led_chase;
35
36void peripheral_leds7x4_display_dec(unsigned int val, unsigned int points)
37{
38 u32 leds;
39
40 leds = asb2305_led_hex_tbl[(val/1000) % 10];
41 leds <<= 8;
42 leds |= asb2305_led_hex_tbl[(val/100) % 10];
43 leds <<= 8;
44 leds |= asb2305_led_hex_tbl[(val/10) % 10];
45 leds <<= 8;
46 leds |= asb2305_led_hex_tbl[val % 10];
47 leds |= points^0x01010101;
48
49 ASB2305_7SEGLEDS = leds;
50}
51
52void peripheral_leds7x4_display_hex(unsigned int val, unsigned int points)
53{
54 u32 leds;
55
56 leds = asb2305_led_hex_tbl[(val/1000) % 10];
57 leds <<= 8;
58 leds |= asb2305_led_hex_tbl[(val/100) % 10];
59 leds <<= 8;
60 leds |= asb2305_led_hex_tbl[(val/10) % 10];
61 leds <<= 8;
62 leds |= asb2305_led_hex_tbl[val % 10];
63 leds |= points^0x01010101;
64
65 ASB2305_7SEGLEDS = leds;
66}
67
68void peripheral_leds_display_exception(enum exception_code code)
69{
70 u32 leds;
71
72 leds = asb2305_led_hex_tbl[(code/0x100) % 0x10];
73 leds <<= 8;
74 leds |= asb2305_led_hex_tbl[(code/0x10) % 0x10];
75 leds <<= 8;
76 leds |= asb2305_led_hex_tbl[code % 0x10];
77 leds |= 0x6d010101;
78
79 ASB2305_7SEGLEDS = leds;
80}
81
82void peripheral_leds7x4_display_minssecs(unsigned int time, unsigned int points)
83{
84 u32 leds;
85
86 leds = asb2305_led_hex_tbl[(time/600) % 6];
87 leds <<= 8;
88 leds |= asb2305_led_hex_tbl[(time/60) % 10];
89 leds <<= 8;
90 leds |= asb2305_led_hex_tbl[(time/10) % 6];
91 leds <<= 8;
92 leds |= asb2305_led_hex_tbl[time % 10];
93 leds |= points^0x01010101;
94
95 ASB2305_7SEGLEDS = leds;
96}
97
98void peripheral_leds7x4_display_rtc(void)
99{
100 unsigned int clock;
101 u8 mins, secs;
102
103 mins = RTMCR;
104 secs = RTSCR;
105
106 clock = ((mins & 0xf0) >> 4);
107 clock *= 10;
108 clock += (mins & 0x0f);
109 clock *= 6;
110
111 clock += ((secs & 0xf0) >> 4);
112 clock *= 10;
113 clock += (secs & 0x0f);
114
115 peripheral_leds7x4_display_minssecs(clock, 0);
116}
117
118void peripheral_leds_led_chase(void)
119{
120 ASB2305_7SEGLEDS = asb2305_led_chase_tbl[asb2305_led_chase];
121 asb2305_led_chase++;
122 if (asb2305_led_chase >= 6)
123 asb2305_led_chase = 0;
124}
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
deleted file mode 100644
index e0f4617c0c7a..000000000000
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ /dev/null
@@ -1,212 +0,0 @@
1/* ASB2305 PCI resource stuff
2 *
3 * Copyright (C) 2001 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/pci-i386.c
6 * - Copyright 1997--2000 Martin Mares <mj@suse.cz>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/ioport.h>
18#include <linux/errno.h>
19#include "pci-asb2305.h"
20
21/*
22 * We need to avoid collisions with `mirrored' VGA ports
23 * and other strange ISA hardware, so we always want the
24 * addresses to be allocated in the 0x000-0x0ff region
25 * modulo 0x400.
26 *
27 * Why? Because some silly external IO cards only decode
28 * the low 10 bits of the IO address. The 0x00-0xff region
29 * is reserved for motherboard devices that decode all 16
30 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
31 * but we want to try to avoid allocating at 0x2900-0x2bff
32 * which might have be mirrored at 0x0100-0x03ff..
33 */
34resource_size_t pcibios_align_resource(void *data, const struct resource *res,
35 resource_size_t size, resource_size_t align)
36{
37 resource_size_t start = res->start;
38
39#if 0
40 struct pci_dev *dev = data;
41
42 printk(KERN_DEBUG
43 "### PCIBIOS_ALIGN_RESOURCE(%s,,{%08lx-%08lx,%08lx},%lx)\n",
44 pci_name(dev),
45 res->start,
46 res->end,
47 res->flags,
48 size
49 );
50#endif
51
52 if ((res->flags & IORESOURCE_IO) && (start & 0x300))
53 start = (start + 0x3ff) & ~0x3ff;
54
55 return start;
56}
57
58
59/*
60 * Handle resources of PCI devices. If the world were perfect, we could
61 * just allocate all the resource regions and do nothing more. It isn't.
62 * On the other hand, we cannot just re-allocate all devices, as it would
63 * require us to know lots of host bridge internals. So we attempt to
64 * keep as much of the original configuration as possible, but tweak it
65 * when it's found to be wrong.
66 *
67 * Known BIOS problems we have to work around:
68 * - I/O or memory regions not configured
69 * - regions configured, but not enabled in the command register
70 * - bogus I/O addresses above 64K used
71 * - expansion ROMs left enabled (this may sound harmless, but given
72 * the fact the PCI specs explicitly allow address decoders to be
73 * shared between expansion ROMs and other resource regions, it's
74 * at least dangerous)
75 *
76 * Our solution:
77 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
78 * This gives us fixed barriers on where we can allocate.
79 * (2) Allocate resources for all enabled devices. If there is
80 * a collision, just mark the resource as unallocated. Also
81 * disable expansion ROMs during this step.
82 * (3) Try to allocate resources for disabled devices. If the
83 * resources were assigned correctly, everything goes well,
84 * if they weren't, they won't disturb allocation of other
85 * resources.
86 * (4) Assign new addresses to resources which were either
87 * not configured at all or misconfigured. If explicitly
88 * requested by the user, configure expansion ROM address
89 * as well.
90 */
91static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
92{
93 struct pci_bus *bus;
94 struct pci_dev *dev;
95 int idx;
96 struct resource *r;
97
98 /* Depth-First Search on bus tree */
99 list_for_each_entry(bus, bus_list, node) {
100 dev = bus->self;
101 if (dev) {
102 for (idx = PCI_BRIDGE_RESOURCES;
103 idx < PCI_NUM_RESOURCES;
104 idx++) {
105 r = &dev->resource[idx];
106 if (!r->flags)
107 continue;
108 if (!r->start ||
109 pci_claim_bridge_resource(dev, idx) < 0) {
110 printk(KERN_ERR "PCI:"
111 " Cannot allocate resource"
112 " region %d of bridge %s\n",
113 idx, pci_name(dev));
114 /* Something is wrong with the region.
115 * Invalidate the resource to prevent
116 * child resource allocations in this
117 * range. */
118 r->start = r->end = 0;
119 r->flags = 0;
120 }
121 }
122 }
123 pcibios_allocate_bus_resources(&bus->children);
124 }
125}
126
127static void __init pcibios_allocate_resources(int pass)
128{
129 struct pci_dev *dev = NULL;
130 int idx, disabled;
131 u16 command;
132 struct resource *r;
133
134 for_each_pci_dev(dev) {
135 pci_read_config_word(dev, PCI_COMMAND, &command);
136 for (idx = 0; idx < 6; idx++) {
137 r = &dev->resource[idx];
138 if (r->parent) /* Already allocated */
139 continue;
140 if (!r->start) /* Address not assigned */
141 continue;
142 if (r->flags & IORESOURCE_IO)
143 disabled = !(command & PCI_COMMAND_IO);
144 else
145 disabled = !(command & PCI_COMMAND_MEMORY);
146 if (pass == disabled) {
147 DBG("PCI[%s]: Resource %08lx-%08lx"
148 " (f=%lx, d=%d, p=%d)\n",
149 pci_name(dev), r->start, r->end, r->flags,
150 disabled, pass);
151 if (pci_claim_resource(dev, idx) < 0) {
152 printk(KERN_ERR "PCI:"
153 " Cannot allocate resource"
154 " region %d of device %s\n",
155 idx, pci_name(dev));
156 /* We'll assign a new address later */
157 r->end -= r->start;
158 r->start = 0;
159 }
160 }
161 }
162 if (!pass) {
163 r = &dev->resource[PCI_ROM_RESOURCE];
164 if (r->flags & IORESOURCE_ROM_ENABLE) {
165 /* Turn the ROM off, leave the resource region,
166 * but keep it unregistered. */
167 u32 reg;
168 DBG("PCI: Switching off ROM of %s\n",
169 pci_name(dev));
170 r->flags &= ~IORESOURCE_ROM_ENABLE;
171 pci_read_config_dword(
172 dev, dev->rom_base_reg, &reg);
173 pci_write_config_dword(
174 dev, dev->rom_base_reg,
175 reg & ~PCI_ROM_ADDRESS_ENABLE);
176 }
177 }
178 }
179}
180
181static int __init pcibios_assign_resources(void)
182{
183 struct pci_dev *dev = NULL;
184 struct resource *r;
185
186 /* Try to use BIOS settings for ROMs, otherwise let
187 pci_assign_unassigned_resources() allocate the new
188 addresses. */
189 for_each_pci_dev(dev) {
190 r = &dev->resource[PCI_ROM_RESOURCE];
191 if (!r->flags || !r->start)
192 continue;
193 if (pci_claim_resource(dev, PCI_ROM_RESOURCE) < 0) {
194 r->end -= r->start;
195 r->start = 0;
196 }
197 }
198
199 pci_assign_unassigned_resources();
200
201 return 0;
202}
203
204fs_initcall(pcibios_assign_resources);
205
206void __init pcibios_resource_survey(void)
207{
208 DBG("PCI: Allocating resources\n");
209 pcibios_allocate_bus_resources(&pci_root_buses);
210 pcibios_allocate_resources(0);
211 pcibios_allocate_resources(1);
212}
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
deleted file mode 100644
index 0667f613b023..000000000000
--- a/arch/mn10300/unit-asb2305/pci-asb2305.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/* ASB2305 Arch-specific PCI declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from: arch/i386/kernel/pci-i386.h: (c) 1999 Martin Mares <mj@ucw.cz>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _PCI_ASB2305_H
13#define _PCI_ASB2305_H
14
15#undef DEBUG
16
17#ifdef DEBUG
18#define DBG(x...) printk(x)
19#else
20#define DBG(x...)
21#endif
22
23extern unsigned int pci_probe;
24
25/* pci-asb2305.c */
26
27extern void pcibios_resource_survey(void);
28
29/* pci.c */
30
31extern struct pci_ops *pci_root_ops;
32
33/* pci-irq.c */
34
35struct irq_info {
36 u8 bus, devfn; /* Bus, device and function */
37 struct {
38 u8 link; /* IRQ line ID, chipset dependent,
39 * 0=not routed */
40 u16 bitmap; /* Available IRQs */
41 } __attribute__((packed)) irq[4];
42 u8 slot; /* Slot number, 0=onboard */
43 u8 rfu;
44} __attribute__((packed));
45
46struct irq_routing_table {
47 u32 signature; /* PIRQ_SIGNATURE should be here */
48 u16 version; /* PIRQ_VERSION */
49 u16 size; /* Table size in bytes */
50 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
51 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
52 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
53 u32 miniport_data; /* Crap */
54 u8 rfu[11];
55 u8 checksum; /* Modulo 256 checksum must give zero */
56 struct irq_info slots[0];
57} __attribute__((packed));
58
59extern unsigned int pcibios_irq_mask;
60
61extern void pcibios_irq_init(void);
62extern void pcibios_fixup_irqs(void);
63extern void pcibios_enable_irq(struct pci_dev *dev);
64
65#endif /* PCI_ASB2305_H */
diff --git a/arch/mn10300/unit-asb2305/pci-irq.c b/arch/mn10300/unit-asb2305/pci-irq.c
deleted file mode 100644
index fcb28ceb824d..000000000000
--- a/arch/mn10300/unit-asb2305/pci-irq.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/* PCI IRQ routing on the MN103E010 based ASB2305
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * This is simple: All PCI interrupts route through the CPU's XIRQ1 pin [IRQ 35]
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <asm/io.h>
20#include <asm/smp.h>
21#include "pci-asb2305.h"
22
23void __init pcibios_irq_init(void)
24{
25}
26
27void __init pcibios_fixup_irqs(void)
28{
29 struct pci_dev *dev = NULL;
30 u8 line, pin;
31
32 for_each_pci_dev(dev) {
33 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
34 if (pin) {
35 dev->irq = XIRQ1;
36 pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
37 dev->irq);
38 }
39 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &line);
40 }
41}
42
43void pcibios_enable_irq(struct pci_dev *dev)
44{
45 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
46}
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
deleted file mode 100644
index 3dfe2d31c67b..000000000000
--- a/arch/mn10300/unit-asb2305/pci.c
+++ /dev/null
@@ -1,505 +0,0 @@
1/* ASB2305 PCI support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from arch/i386/kernel/pci-pc.c
6 * (c) 1999--2000 Martin Mares <mj@suse.cz>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/pci.h>
17#include <linux/init.h>
18#include <linux/ioport.h>
19#include <linux/delay.h>
20#include <linux/irq.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include "pci-asb2305.h"
24
25unsigned int pci_probe = 1;
26
27struct pci_ops *pci_root_ops;
28
29/*
30 * The accessible PCI window does not cover the entire CPU address space, but
31 * there are devices we want to access outside of that window, so we need to
32 * insert specific PCI bus resources instead of using the platform-level bus
33 * resources directly for the PCI root bus.
34 *
35 * These are configured and inserted by pcibios_init().
36 */
37static struct resource pci_ioport_resource = {
38 .name = "PCI IO",
39 .start = 0xbe000000,
40 .end = 0xbe03ffff,
41 .flags = IORESOURCE_IO,
42};
43
44static struct resource pci_iomem_resource = {
45 .name = "PCI mem",
46 .start = 0xb8000000,
47 .end = 0xbbffffff,
48 .flags = IORESOURCE_MEM,
49};
50
51/*
52 * Functions for accessing PCI configuration space
53 */
54
55#define CONFIG_CMD(bus, devfn, where) \
56 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
57
58#define MEM_PAGING_REG (*(volatile __u32 *) 0xBFFFFFF4)
59#define CONFIG_ADDRESS (*(volatile __u32 *) 0xBFFFFFF8)
60#define CONFIG_DATAL(X) (*(volatile __u32 *) 0xBFFFFFFC)
61#define CONFIG_DATAW(X) (*(volatile __u16 *) (0xBFFFFFFC + ((X) & 2)))
62#define CONFIG_DATAB(X) (*(volatile __u8 *) (0xBFFFFFFC + ((X) & 3)))
63
64#define BRIDGEREGB(X) (*(volatile __u8 *) (0xBE040000 + (X)))
65#define BRIDGEREGW(X) (*(volatile __u16 *) (0xBE040000 + (X)))
66#define BRIDGEREGL(X) (*(volatile __u32 *) (0xBE040000 + (X)))
67
68static inline int __query(const struct pci_bus *bus, unsigned int devfn)
69{
70#if 0
71 return bus->number == 0 && (devfn == PCI_DEVFN(0, 0));
72 return bus->number == 1;
73 return bus->number == 0 &&
74 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0));
75#endif
76 return 1;
77}
78
79/*
80 *
81 */
82static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn,
83 int where, u32 *_value)
84{
85 u32 rawval, value;
86
87 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
88 value = BRIDGEREGB(where);
89 __pcbdebug("=> %02hx", &BRIDGEREGL(where), value);
90 } else {
91 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
92 rawval = CONFIG_ADDRESS;
93 value = CONFIG_DATAB(where);
94 if (__query(bus, devfn))
95 __pcidebug("=> %02hx", bus, devfn, where, value);
96 }
97
98 *_value = value;
99 return PCIBIOS_SUCCESSFUL;
100}
101
102static int pci_ampci_read_config_word(struct pci_bus *bus, unsigned int devfn,
103 int where, u32 *_value)
104{
105 u32 rawval, value;
106
107 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
108 value = BRIDGEREGW(where);
109 __pcbdebug("=> %04hx", &BRIDGEREGL(where), value);
110 } else {
111 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
112 rawval = CONFIG_ADDRESS;
113 value = CONFIG_DATAW(where);
114 if (__query(bus, devfn))
115 __pcidebug("=> %04hx", bus, devfn, where, value);
116 }
117
118 *_value = value;
119 return PCIBIOS_SUCCESSFUL;
120}
121
122static int pci_ampci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
123 int where, u32 *_value)
124{
125 u32 rawval, value;
126
127 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
128 value = BRIDGEREGL(where);
129 __pcbdebug("=> %08x", &BRIDGEREGL(where), value);
130 } else {
131 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
132 rawval = CONFIG_ADDRESS;
133 value = CONFIG_DATAL(where);
134 if (__query(bus, devfn))
135 __pcidebug("=> %08x", bus, devfn, where, value);
136 }
137
138 *_value = value;
139 return PCIBIOS_SUCCESSFUL;
140}
141
142static int pci_ampci_write_config_byte(struct pci_bus *bus, unsigned int devfn,
143 int where, u8 value)
144{
145 u32 rawval;
146
147 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
148 __pcbdebug("<= %02x", &BRIDGEREGB(where), value);
149 BRIDGEREGB(where) = value;
150 } else {
151 if (bus->number == 0 &&
152 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0))
153 )
154 __pcidebug("<= %02x", bus, devfn, where, value);
155 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
156 rawval = CONFIG_ADDRESS;
157 CONFIG_DATAB(where) = value;
158 }
159 return PCIBIOS_SUCCESSFUL;
160}
161
162static int pci_ampci_write_config_word(struct pci_bus *bus, unsigned int devfn,
163 int where, u16 value)
164{
165 u32 rawval;
166
167 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
168 __pcbdebug("<= %04hx", &BRIDGEREGW(where), value);
169 BRIDGEREGW(where) = value;
170 } else {
171 if (__query(bus, devfn))
172 __pcidebug("<= %04hx", bus, devfn, where, value);
173 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
174 rawval = CONFIG_ADDRESS;
175 CONFIG_DATAW(where) = value;
176 }
177 return PCIBIOS_SUCCESSFUL;
178}
179
180static int pci_ampci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
181 int where, u32 value)
182{
183 u32 rawval;
184
185 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
186 __pcbdebug("<= %08x", &BRIDGEREGL(where), value);
187 BRIDGEREGL(where) = value;
188 } else {
189 if (__query(bus, devfn))
190 __pcidebug("<= %08x", bus, devfn, where, value);
191 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
192 rawval = CONFIG_ADDRESS;
193 CONFIG_DATAL(where) = value;
194 }
195 return PCIBIOS_SUCCESSFUL;
196}
197
198static int pci_ampci_read_config(struct pci_bus *bus, unsigned int devfn,
199 int where, int size, u32 *val)
200{
201 switch (size) {
202 case 1:
203 return pci_ampci_read_config_byte(bus, devfn, where, val);
204 case 2:
205 return pci_ampci_read_config_word(bus, devfn, where, val);
206 case 4:
207 return pci_ampci_read_config_dword(bus, devfn, where, val);
208 default:
209 BUG();
210 return -EOPNOTSUPP;
211 }
212}
213
214static int pci_ampci_write_config(struct pci_bus *bus, unsigned int devfn,
215 int where, int size, u32 val)
216{
217 switch (size) {
218 case 1:
219 return pci_ampci_write_config_byte(bus, devfn, where, val);
220 case 2:
221 return pci_ampci_write_config_word(bus, devfn, where, val);
222 case 4:
223 return pci_ampci_write_config_dword(bus, devfn, where, val);
224 default:
225 BUG();
226 return -EOPNOTSUPP;
227 }
228}
229
230static struct pci_ops pci_direct_ampci = {
231 .read = pci_ampci_read_config,
232 .write = pci_ampci_write_config,
233};
234
235/*
236 * Before we decide to use direct hardware access mechanisms, we try to do some
237 * trivial checks to ensure it at least _seems_ to be working -- we just test
238 * whether bus 00 contains a host bridge (this is similar to checking
239 * techniques used in XFree86, but ours should be more reliable since we
240 * attempt to make use of direct access hints provided by the PCI BIOS).
241 *
242 * This should be close to trivial, but it isn't, because there are buggy
243 * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
244 */
245static int __init pci_sanity_check(struct pci_ops *o)
246{
247 struct pci_bus bus; /* Fake bus and device */
248 u32 x;
249
250 bus.number = 0;
251
252 if ((!o->read(&bus, 0, PCI_CLASS_DEVICE, 2, &x) &&
253 (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
254 (!o->read(&bus, 0, PCI_VENDOR_ID, 2, &x) &&
255 (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
256 return 1;
257
258 printk(KERN_ERR "PCI: Sanity check failed\n");
259 return 0;
260}
261
262static int __init pci_check_direct(void)
263{
264 unsigned long flags;
265
266 local_irq_save(flags);
267
268 /*
269 * Check if access works.
270 */
271 if (pci_sanity_check(&pci_direct_ampci)) {
272 local_irq_restore(flags);
273 printk(KERN_INFO "PCI: Using configuration ampci\n");
274 request_mem_region(0xBE040000, 256, "AMPCI bridge");
275 request_mem_region(0xBFFFFFF4, 12, "PCI ampci");
276 request_mem_region(0xBC000000, 32 * 1024 * 1024, "PCI SRAM");
277 return 0;
278 }
279
280 local_irq_restore(flags);
281 return -ENODEV;
282}
283
284static void pcibios_fixup_device_resources(struct pci_dev *dev)
285{
286 int idx;
287
288 if (!dev->bus)
289 return;
290
291 for (idx = 0; idx < PCI_BRIDGE_RESOURCES; idx++) {
292 struct resource *r = &dev->resource[idx];
293
294 if (!r->flags || r->parent || !r->start)
295 continue;
296
297 pci_claim_resource(dev, idx);
298 }
299}
300
301static void pcibios_fixup_bridge_resources(struct pci_dev *dev)
302{
303 int idx;
304
305 if (!dev->bus)
306 return;
307
308 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
309 struct resource *r = &dev->resource[idx];
310
311 if (!r->flags || r->parent || !r->start)
312 continue;
313
314 pci_claim_bridge_resource(dev, idx);
315 }
316}
317
318/*
319 * Called after each bus is probed, but before its children
320 * are examined.
321 */
322void pcibios_fixup_bus(struct pci_bus *bus)
323{
324 struct pci_dev *dev;
325
326 if (bus->self) {
327 pci_read_bridge_bases(bus);
328 pcibios_fixup_bridge_resources(bus->self);
329 }
330
331 list_for_each_entry(dev, &bus->devices, bus_list)
332 pcibios_fixup_device_resources(dev);
333}
334
335/*
336 * Initialization. Try all known PCI access methods. Note that we support
337 * using both PCI BIOS and direct access: in such cases, we use I/O ports
338 * to access config space, but we still keep BIOS order of cards to be
339 * compatible with 2.0.X. This should go away some day.
340 */
341static int __init pcibios_init(void)
342{
343 resource_size_t io_offset, mem_offset;
344 LIST_HEAD(resources);
345 struct pci_bus *bus;
346
347 ioport_resource.start = 0xA0000000;
348 ioport_resource.end = 0xDFFFFFFF;
349 iomem_resource.start = 0xA0000000;
350 iomem_resource.end = 0xDFFFFFFF;
351
352 if (insert_resource(&iomem_resource, &pci_iomem_resource) < 0)
353 panic("Unable to insert PCI IOMEM resource\n");
354 if (insert_resource(&ioport_resource, &pci_ioport_resource) < 0)
355 panic("Unable to insert PCI IOPORT resource\n");
356
357 if (!pci_probe)
358 return 0;
359
360 if (pci_check_direct() < 0) {
361 printk(KERN_WARNING "PCI: No PCI bus detected\n");
362 return 0;
363 }
364
365 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
366 MEM_PAGING_REG);
367
368 io_offset = pci_ioport_resource.start -
369 (pci_ioport_resource.start & 0x00ffffff);
370 mem_offset = pci_iomem_resource.start -
371 ((pci_iomem_resource.start & 0x03ffffff) | MEM_PAGING_REG);
372
373 pci_add_resource_offset(&resources, &pci_ioport_resource, io_offset);
374 pci_add_resource_offset(&resources, &pci_iomem_resource, mem_offset);
375 bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL, &resources);
376 if (!bus)
377 return 0;
378
379 pcibios_irq_init();
380 pcibios_fixup_irqs();
381 pcibios_resource_survey();
382 pci_bus_add_devices(bus);
383 return 0;
384}
385
386arch_initcall(pcibios_init);
387
388char *__init pcibios_setup(char *str)
389{
390 if (!strcmp(str, "off")) {
391 pci_probe = 0;
392 return NULL;
393 }
394
395 return str;
396}
397
398int pcibios_enable_device(struct pci_dev *dev, int mask)
399{
400 int err;
401
402 err = pci_enable_resources(dev, mask);
403 if (err == 0)
404 pcibios_enable_irq(dev);
405 return err;
406}
407
408/*
409 * disable the ethernet chipset
410 */
411static void __init unit_disable_pcnet(struct pci_bus *bus, struct pci_ops *o)
412{
413 u32 x;
414
415 bus->number = 0;
416
417 o->read (bus, PCI_DEVFN(2, 0), PCI_VENDOR_ID, 4, &x);
418 o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x);
419 x |= PCI_COMMAND_MASTER |
420 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
421 PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
422 o->write(bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, x);
423 o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x);
424 o->write(bus, PCI_DEVFN(2, 0), PCI_BASE_ADDRESS_0, 4, 0x00030001);
425 o->read (bus, PCI_DEVFN(2, 0), PCI_BASE_ADDRESS_0, 4, &x);
426
427#define RDP (*(volatile u32 *) 0xBE030010)
428#define RAP (*(volatile u32 *) 0xBE030014)
429#define __set_RAP(X) do { RAP = (X); x = RAP; } while (0)
430#define __set_RDP(X) do { RDP = (X); x = RDP; } while (0)
431#define __get_RDP() ({ RDP & 0xffff; })
432
433 __set_RAP(0);
434 __set_RDP(0x0004); /* CSR0 = STOP */
435
436 __set_RAP(88); /* check CSR88 indicates an Am79C973 */
437 BUG_ON(__get_RDP() != 0x5003);
438
439 for (x = 0; x < 100; x++)
440 asm volatile("nop");
441
442 __set_RDP(0x0004); /* CSR0 = STOP */
443}
444
445/*
446 * initialise the unit hardware
447 */
448asmlinkage void __init unit_pci_init(void)
449{
450 struct pci_bus bus; /* Fake bus and device */
451 struct pci_ops *o = &pci_direct_ampci;
452 u32 x;
453
454 set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_PCI_IRQ_LEVEL));
455
456 memset(&bus, 0, sizeof(bus));
457
458 MEM_PAGING_REG = 0xE8000000;
459
460 /* we need to set up the bridge _now_ or we won't be able to access the
461 * PCI config registers
462 */
463 BRIDGEREGW(PCI_COMMAND) |=
464 PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
465 PCI_COMMAND_MEMORY | PCI_COMMAND_IO | PCI_COMMAND_MASTER;
466 BRIDGEREGW(PCI_STATUS) = 0xF800;
467 BRIDGEREGB(PCI_LATENCY_TIMER) = 0x10;
468 BRIDGEREGL(PCI_BASE_ADDRESS_0) = 0x80000000;
469 BRIDGEREGB(PCI_INTERRUPT_LINE) = 1;
470 BRIDGEREGL(0x48) = 0x98000000; /* AMPCI base addr */
471 BRIDGEREGB(0x41) = 0x00; /* secondary bus
472 * number */
473 BRIDGEREGB(0x42) = 0x01; /* subordinate bus
474 * number */
475 BRIDGEREGB(0x44) = 0x01;
476 BRIDGEREGL(0x50) = 0x00000001;
477 BRIDGEREGL(0x58) = 0x00001002;
478 BRIDGEREGL(0x5C) = 0x00000011;
479
480 /* we also need to set up the PCI-PCI bridge */
481 bus.number = 0;
482
483 /* IO: 0x00000000-0x00020000 */
484 o->read (&bus, PCI_DEVFN(3, 0), PCI_COMMAND, 2, &x);
485 x |= PCI_COMMAND_MASTER |
486 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
487 PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
488 o->write(&bus, PCI_DEVFN(3, 0), PCI_COMMAND, 2, x);
489
490 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, &x);
491 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, &x);
492 o->read (&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, &x);
493 o->read (&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, &x);
494
495 o->write(&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, 0x01);
496 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, &x);
497 o->write(&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, 0x00020000);
498 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, &x);
499 o->write(&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, 0xEBB0EA00);
500 o->read (&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, &x);
501 o->write(&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, 0xE9F0E800);
502 o->read (&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, &x);
503
504 unit_disable_pcnet(&bus, o);
505}
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
deleted file mode 100644
index bc4adfaf815c..000000000000
--- a/arch/mn10300/unit-asb2305/unit-init.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/* ASB2305 Initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <asm/io.h>
16#include <asm/irq.h>
17#include <asm/setup.h>
18#include <asm/processor.h>
19#include <asm/intctl-regs.h>
20#include <asm/serial-regs.h>
21#include <unit/serial.h>
22
23/*
24 * initialise some of the unit hardware before gdbstub is set up
25 */
26asmlinkage void __init unit_init(void)
27{
28#ifndef CONFIG_GDBSTUB_ON_TTYSx
29 /* set the 16550 interrupt line to level 3 if not being used for GDB */
30#ifdef CONFIG_EXT_SERIAL_IRQ_LEVEL
31 set_intr_level(XIRQ0, NUM2GxICR_LEVEL(CONFIG_EXT_SERIAL_IRQ_LEVEL));
32#endif
33#endif /* CONFIG_GDBSTUB_ON_TTYSx */
34}
35
36/*
37 * initialise the rest of the unit hardware after gdbstub is ready
38 */
39void __init unit_setup(void)
40{
41#ifdef CONFIG_PCI
42 unit_pci_init();
43#endif
44}
45
46/*
47 * initialise the external interrupts used by a unit of this type
48 */
49void __init unit_init_IRQ(void)
50{
51 unsigned int extnum;
52
53 for (extnum = 0; extnum < NR_XIRQS; extnum++) {
54 switch (GET_XIRQ_TRIGGER(extnum)) {
55 case XIRQ_TRIGGER_HILEVEL:
56 case XIRQ_TRIGGER_LOWLEVEL:
57 mn10300_set_lateack_irq_type(XIRQ2IRQ(extnum));
58 break;
59 default:
60 break;
61 }
62 }
63}
diff --git a/arch/mn10300/unit-asb2364/Makefile b/arch/mn10300/unit-asb2364/Makefile
deleted file mode 100644
index b3263ecfc4ff..000000000000
--- a/arch/mn10300/unit-asb2364/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8# Note 2! The CFLAGS definitions are now in the main makefile...
9
10obj-y := unit-init.o leds.o irq-fpga.o
11
12obj-$(CONFIG_SMSC911X) += smsc911x.o
diff --git a/arch/mn10300/unit-asb2364/include/unit/clock.h b/arch/mn10300/unit-asb2364/include/unit/clock.h
deleted file mode 100644
index d34ac9a7508b..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/clock.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* clock.h: unit-specific clocks
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 23-Feb-2007 MEI Add define for watchdog timer.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _ASM_UNIT_CLOCK_H
17#define _ASM_UNIT_CLOCK_H
18
19#ifndef __ASSEMBLY__
20
21#define MN10300_IOCLK 100000000UL /* for DDR800 */
22/*#define MN10300_IOCLK 83333333UL */ /* for DDR667 */
23#define MN10300_IOBCLK MN10300_IOCLK /* IOBCLK is equal to IOCLK */
24
25#endif /* !__ASSEMBLY__ */
26
27#define MN10300_WDCLK 27000000UL
28
29#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
deleted file mode 100644
index 2901ed344b3d..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/* ASB2364 FPGA registers
3 */
4
5#ifndef _ASM_UNIT_FPGA_REGS_H
6#define _ASM_UNIT_FPGA_REGS_H
7
8#include <asm/cpu-regs.h>
9
10#ifdef __KERNEL__
11
12#define ASB2364_FPGA_REG_RESET_LAN __SYSREG(0xa9001300, u16)
13#define ASB2364_FPGA_REG_RESET_UART __SYSREG(0xa9001304, u16)
14#define ASB2364_FPGA_REG_RESET_I2C __SYSREG(0xa9001308, u16)
15#define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16)
16#define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16)
17
18#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001510+((X)*4), u16)
19#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0)
20#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1)
21#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2)
22#define ASB2364_FPGA_REG_IRQ_USB ASB2364_FPGA_REG_IRQ(3)
23#define ASB2364_FPGA_REG_IRQ_FPGA ASB2364_FPGA_REG_IRQ(5)
24
25#define ASB2364_FPGA_REG_MASK(X) __SYSREG(0xa9001590+((X)*4), u16)
26#define ASB2364_FPGA_REG_MASK_LAN ASB2364_FPGA_REG_MASK(0)
27#define ASB2364_FPGA_REG_MASK_UART ASB2364_FPGA_REG_MASK(1)
28#define ASB2364_FPGA_REG_MASK_I2C ASB2364_FPGA_REG_MASK(2)
29#define ASB2364_FPGA_REG_MASK_USB ASB2364_FPGA_REG_MASK(3)
30#define ASB2364_FPGA_REG_MASK_FPGA ASB2364_FPGA_REG_MASK(5)
31
32#define ASB2364_FPGA_REG_CPLD5_SET1 __SYSREG(0xa9002500, u16)
33#define ASB2364_FPGA_REG_CPLD5_SET2 __SYSREG(0xa9002504, u16)
34#define ASB2364_FPGA_REG_CPLD6_SET1 __SYSREG(0xa9002600, u16)
35#define ASB2364_FPGA_REG_CPLD6_SET2 __SYSREG(0xa9002604, u16)
36#define ASB2364_FPGA_REG_CPLD7_SET1 __SYSREG(0xa9002700, u16)
37#define ASB2364_FPGA_REG_CPLD7_SET2 __SYSREG(0xa9002704, u16)
38#define ASB2364_FPGA_REG_CPLD8_SET1 __SYSREG(0xa9002800, u16)
39#define ASB2364_FPGA_REG_CPLD8_SET2 __SYSREG(0xa9002804, u16)
40#define ASB2364_FPGA_REG_CPLD9_SET1 __SYSREG(0xa9002900, u16)
41#define ASB2364_FPGA_REG_CPLD9_SET2 __SYSREG(0xa9002904, u16)
42#define ASB2364_FPGA_REG_CPLD10_SET1 __SYSREG(0xa9002a00, u16)
43#define ASB2364_FPGA_REG_CPLD10_SET2 __SYSREG(0xa9002a04, u16)
44
45#define SyncExBus() \
46 do { \
47 unsigned short w; \
48 w = *(volatile short *)0xa9000000; \
49 } while (0)
50
51#endif /* __KERNEL__ */
52
53#endif /* _ASM_UNIT_FPGA_REGS_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/irq.h b/arch/mn10300/unit-asb2364/include/unit/irq.h
deleted file mode 100644
index 786148e46565..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/irq.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* ASB2364 FPGA irq numbers
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _UNIT_IRQ_H
12#define _UNIT_IRQ_H
13
14#ifndef __ASSEMBLY__
15
16#ifdef CONFIG_SMP
17#define NR_CPU_IRQS GxICR_NUM_EXT_IRQS
18#else
19#define NR_CPU_IRQS GxICR_NUM_IRQS
20#endif
21
22enum {
23 FPGA_LAN_IRQ = NR_CPU_IRQS,
24 FPGA_UART_IRQ,
25 FPGA_I2C_IRQ,
26 FPGA_USB_IRQ,
27 FPGA_RESERVED_IRQ,
28 FPGA_FPGA_IRQ,
29 NR_IRQS
30};
31
32extern void __init irq_fpga_init(void);
33
34#endif /* !__ASSEMBLY__ */
35#endif /* _UNIT_IRQ_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/leds.h b/arch/mn10300/unit-asb2364/include/unit/leds.h
deleted file mode 100644
index 03a3933ad323..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/leds.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* Unit-specific leds
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define MN10300_USE_7SEGLEDS 0
20
21#define ASB2364_7SEGLEDS __SYSREG(0xA9001630, u32)
22
23/*
24 * use the 7-segment LEDs to indicate states
25 */
26
27#if MN10300_USE_7SEGLEDS
28/* flip the 7-segment LEDs between "Gdb-" and "----" */
29#define mn10300_set_gdbleds(ONOFF) \
30 do { \
31 ASB2364_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
32 } while (0)
33#else
34#define mn10300_set_gdbleds(ONOFF) do {} while (0)
35#endif
36
37#if MN10300_USE_7SEGLEDS
38/* indicate double-fault by displaying "db-f" on the LEDs */
39#define mn10300_set_dbfleds \
40 mov 0x43077f1d,d0 ; \
41 mov d0,(ASB2364_7SEGLEDS)
42#else
43#define mn10300_set_dbfleds
44#endif
45
46#ifndef __ASSEMBLY__
47extern void peripheral_leds_display_exception(enum exception_code);
48extern void peripheral_leds_led_chase(void);
49extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
50extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
51extern void debug_to_serial(const char *, int);
52#endif /* __ASSEMBLY__ */
53
54#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/serial.h b/arch/mn10300/unit-asb2364/include/unit/serial.h
deleted file mode 100644
index 92f224a97efc..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/serial.h
+++ /dev/null
@@ -1,151 +0,0 @@
1/* Unit-specific 8250 serial ports
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <proc/irq.h>
17#include <unit/fpga-regs.h>
18#include <linux/serial_reg.h>
19
20#define SERIAL_PORT0_BASE_ADDRESS 0xA8200000
21
22#define SERIAL_IRQ XIRQ1 /* single serial (TL16C550C) (Lo) */
23
24/*
25 * The ASB2364 has an 12.288 MHz clock
26 * for your UART.
27 *
28 * It'd be nice if someone built a serial card with a 24.576 MHz
29 * clock, since the 16550A is capable of handling a top speed of 1.5
30 * megabits/second; but this requires the faster clock.
31 */
32#define BASE_BAUD (12288000 / 16)
33
34/*
35 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
36 */
37#ifndef CONFIG_GDBSTUB_ON_TTYSx
38
39#define SERIAL_PORT_DFNS \
40 { \
41 .baud_base = BASE_BAUD, \
42 .irq = SERIAL_IRQ, \
43 .flags = STD_COM_FLAGS, \
44 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
45 .iomem_reg_shift = 1, \
46 .io_type = SERIAL_IO_MEM, \
47 },
48
49#ifndef __ASSEMBLY__
50
51static inline void __debug_to_serial(const char *p, int n)
52{
53}
54
55#endif /* !__ASSEMBLY__ */
56
57#else /* CONFIG_GDBSTUB_ON_TTYSx */
58
59#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
60
61#if defined(CONFIG_GDBSTUB_ON_TTYS0)
62#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 2, u8)
63#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 2, u8)
64#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 2, u8)
65#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 2, u8)
66#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8)
67#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 2, u8)
68#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 2, u8)
69#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 2, u8)
70#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 2, u8)
71#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 2, u8)
72#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 2, u8)
73#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 2, u8)
74#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
75
76#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
77#error The ASB2364 does not have a /dev/ttyS1
78#endif
79
80#ifndef __ASSEMBLY__
81
82static inline void __debug_to_serial(const char *p, int n)
83{
84 char ch;
85
86#define LSR_WAIT_FOR(STATE) \
87 do {} while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE))
88#define FLOWCTL_QUERY(LINE) \
89 ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
90#define FLOWCTL_WAIT_FOR(LINE) \
91 do {} while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE))
92#define FLOWCTL_CLEAR(LINE) \
93 do { GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; } while (0)
94#define FLOWCTL_SET(LINE) \
95 do { GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; } while (0)
96
97 FLOWCTL_SET(DTR);
98
99 for (; n > 0; n--) {
100 LSR_WAIT_FOR(THRE);
101 FLOWCTL_WAIT_FOR(CTS);
102
103 ch = *p++;
104 if (ch == 0x0a) {
105 GDBPORT_SERIAL_TX = 0x0d;
106 LSR_WAIT_FOR(THRE);
107 FLOWCTL_WAIT_FOR(CTS);
108 }
109 GDBPORT_SERIAL_TX = ch;
110 }
111
112 FLOWCTL_CLEAR(DTR);
113}
114
115#endif /* !__ASSEMBLY__ */
116
117#endif /* CONFIG_GDBSTUB_ON_TTYSx */
118
119#define SERIAL_INITIALIZE \
120do { \
121 /* release reset */ \
122 ASB2364_FPGA_REG_RESET_UART = 0x0001; \
123 SyncExBus(); \
124} while (0)
125
126#define SERIAL_CHECK_INTERRUPT \
127do { \
128 if ((ASB2364_FPGA_REG_IRQ_UART & 0x0001) == 0x0001) { \
129 return IRQ_NONE; \
130 } \
131} while (0)
132
133#define SERIAL_CLEAR_INTERRUPT \
134do { \
135 ASB2364_FPGA_REG_IRQ_UART = 0x0001; \
136 SyncExBus(); \
137} while (0)
138
139#define SERIAL_SET_INT_MASK \
140do { \
141 ASB2364_FPGA_REG_MASK_UART = 0x0001; \
142 SyncExBus(); \
143} while (0)
144
145#define SERIAL_CLEAR_INT_MASK \
146do { \
147 ASB2364_FPGA_REG_MASK_UART = 0x0000; \
148 SyncExBus(); \
149} while (0)
150
151#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/smsc911x.h b/arch/mn10300/unit-asb2364/include/unit/smsc911x.h
deleted file mode 100644
index 4c1ede535fa9..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/smsc911x.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/* Support for the SMSC911x NIC
2 *
3 * Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMSC911X_H
12#define _ASM_UNIT_SMSC911X_H
13
14#include <linux/netdevice.h>
15#include <proc/irq.h>
16#include <unit/fpga-regs.h>
17
18#define MN10300_USE_EXT_EEPROM
19
20
21#define SMSC911X_BASE 0xA8000000UL
22#define SMSC911X_BASE_END 0xA8000100UL
23#define SMSC911X_IRQ FPGA_LAN_IRQ
24
25/*
26 * Allow the FPGA to be initialised by the SMSC911x driver
27 */
28#undef SMSC_INITIALIZE
29#define SMSC_INITIALIZE() \
30do { \
31 /* release reset */ \
32 ASB2364_FPGA_REG_RESET_LAN = 0x0001; \
33 SyncExBus(); \
34} while (0)
35
36#ifdef MN10300_USE_EXT_EEPROM
37#include <linux/delay.h>
38#include <unit/clock.h>
39
40#define EEPROM_ADDRESS 0xA0
41#define MAC_OFFSET 0x0008
42#define USE_IIC_CH 0 /* 0 or 1 */
43#define IIC_OFFSET (0x80000 * USE_IIC_CH)
44#define IIC_DTRM __SYSREG(0xd8400000 + IIC_OFFSET, u32)
45#define IIC_DREC __SYSREG(0xd8400004 + IIC_OFFSET, u32)
46#define IIC_MYADD __SYSREG(0xd8400008 + IIC_OFFSET, u32)
47#define IIC_CLK __SYSREG(0xd840000c + IIC_OFFSET, u32)
48#define IIC_BRST __SYSREG(0xd8400010 + IIC_OFFSET, u32)
49#define IIC_HOLD __SYSREG(0xd8400014 + IIC_OFFSET, u32)
50#define IIC_BSTS __SYSREG(0xd8400018 + IIC_OFFSET, u32)
51#define IIC_ICR __SYSREG(0xd4000080 + 4 * USE_IIC_CH, u16)
52
53#define IIC_CLK_PLS ((unsigned short)(MN10300_IOCLK / 100000 - 1))
54#define IIC_CLK_LOW ((unsigned short)(IIC_CLK_PLS / 2))
55
56#define SYS_IIC_DTRM_Bit_STA ((unsigned short)0x0400)
57#define SYS_IIC_DTRM_Bit_STO ((unsigned short)0x0200)
58#define SYS_IIC_DTRM_Bit_ACK ((unsigned short)0x0100)
59#define SYS_IIC_DTRM_Bit_DATA ((unsigned short)0x00FF)
60
61static inline void POLL_INT_REQ(volatile u16 *icr)
62{
63 unsigned long flags;
64 u16 tmp;
65
66 while (!(*icr & GxICR_REQUEST))
67 ;
68 flags = arch_local_cli_save();
69 tmp = *icr;
70 *icr = (tmp & GxICR_LEVEL) | GxICR_DETECT;
71 tmp = *icr;
72 arch_local_irq_restore(flags);
73}
74
75/*
76 * Implement the SMSC911x hook for MAC address retrieval
77 */
78#undef smsc_get_mac
79static inline int smsc_get_mac(struct net_device *dev)
80{
81 unsigned char *mac_buf = dev->dev_addr;
82 int i;
83 unsigned short value;
84 unsigned int data;
85 int mac_length = 6;
86 int check;
87 u16 orig_gicr, tmp;
88 unsigned long flags;
89
90 /* save original GnICR and clear GnICR.IE */
91 flags = arch_local_cli_save();
92 orig_gicr = IIC_ICR;
93 IIC_ICR = orig_gicr & GxICR_LEVEL;
94 tmp = IIC_ICR;
95 arch_local_irq_restore(flags);
96
97 IIC_MYADD = 0x00000008;
98 IIC_CLK = (IIC_CLK_LOW << 16) + (IIC_CLK_PLS);
99 /* bus hung recovery */
100
101 while (1) {
102 check = 0;
103 for (i = 0; i < 3; i++) {
104 if ((IIC_BSTS & 0x00000003) == 0x00000003)
105 check++;
106 udelay(3);
107 }
108
109 if (check == 3) {
110 IIC_BRST = 0x00000003;
111 break;
112 } else {
113 for (i = 0; i < 3; i++) {
114 IIC_BRST = 0x00000002;
115 udelay(8);
116 IIC_BRST = 0x00000003;
117 udelay(8);
118 }
119 }
120 }
121
122 IIC_BRST = 0x00000002;
123 IIC_BRST = 0x00000003;
124
125 value = SYS_IIC_DTRM_Bit_STA | SYS_IIC_DTRM_Bit_ACK;
126 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
127 (unsigned short)0x0000);
128 IIC_DTRM = value;
129 POLL_INT_REQ(&IIC_ICR);
130
131 /** send offset of MAC address in EEPROM **/
132 IIC_DTRM = (unsigned char)((MAC_OFFSET & 0xFF00) >> 8);
133 POLL_INT_REQ(&IIC_ICR);
134
135 IIC_DTRM = (unsigned char)(MAC_OFFSET & 0x00FF);
136 POLL_INT_REQ(&IIC_ICR);
137
138 udelay(1000);
139
140 value = SYS_IIC_DTRM_Bit_STA;
141 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
142 (unsigned short)0x0001);
143 IIC_DTRM = value;
144 POLL_INT_REQ(&IIC_ICR);
145
146 IIC_DTRM = 0x00000000;
147 while (mac_length > 0) {
148 POLL_INT_REQ(&IIC_ICR);
149
150 data = IIC_DREC;
151 mac_length--;
152 if (mac_length == 0)
153 value = 0x00000300; /* stop IIC bus */
154 else if (mac_length == 1)
155 value = 0x00000100; /* no ack */
156 else
157 value = 0x00000000; /* ack */
158 IIC_DTRM = value;
159 *mac_buf++ = (unsigned char)(data & 0xff);
160 }
161
162 /* restore GnICR.LV and GnICR.IE */
163 flags = arch_local_cli_save();
164 IIC_ICR = (orig_gicr & (GxICR_LEVEL | GxICR_ENABLE));
165 tmp = IIC_ICR;
166 arch_local_irq_restore(flags);
167
168 return 0;
169}
170#endif /* MN10300_USE_EXT_EEPROM */
171#endif /* _ASM_UNIT_SMSC911X_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/timex.h b/arch/mn10300/unit-asb2364/include/unit/timex.h
deleted file mode 100644
index 42f32db75087..000000000000
--- a/arch/mn10300/unit-asb2364/include/unit/timex.h
+++ /dev/null
@@ -1,155 +0,0 @@
1/* timex.h: MN2WS0038 architecture timer specifications
2 *
3 * Copyright (C) 2002, 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#include <asm/timer-regs.h>
15#include <unit/clock.h>
16#include <asm/param.h>
17
18/*
19 * jiffies counter specifications
20 */
21
22#define TMJCBR_MAX 0xffffff /* 24bit */
23#define TMJCIRQ TMTIRQ
24
25#ifndef __ASSEMBLY__
26
27#define MN10300_SRC_IOBCLK MN10300_IOBCLK
28
29#ifndef HZ
30# error HZ undeclared.
31#endif /* !HZ */
32
33#define MN10300_JCCLK (MN10300_SRC_IOBCLK)
34#define MN10300_TSCCLK (MN10300_SRC_IOBCLK)
35
36#define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
37#define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
38
39/* Check bit width of MTM interval value that sets base register */
40#if (MN10300_JC_PER_HZ - 1) > TMJCBR_MAX
41# error MTM tick timer interval value is overflow.
42#endif
43
44static inline void stop_jiffies_counter(void)
45{
46 u16 tmp;
47 TMTMD = 0;
48 tmp = TMTMD;
49}
50
51static inline void reload_jiffies_counter(u32 cnt)
52{
53 u32 tmp;
54
55 TMTBR = cnt;
56 tmp = TMTBR;
57
58 TMTMD = TMTMD_TMTLDE;
59 TMTMD = TMTMD_TMTCNE;
60 tmp = TMTMD;
61}
62
63#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS) && \
64 !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
65/*
66 * If we aren't using broadcasting, each core needs its own event timer.
67 * Since CPU0 uses the tick timer which is 24-bits, we use timer 4 & 5
68 * cascaded to 32-bits for CPU1 (but only really use 24-bits to match
69 * CPU0).
70 */
71
72#define TMJC1IRQ TM5IRQ
73
74static inline void stop_jiffies_counter1(void)
75{
76 u8 tmp;
77 TM4MD = 0;
78 TM5MD = 0;
79 tmp = TM4MD;
80 tmp = TM5MD;
81}
82
83static inline void reload_jiffies_counter1(u32 cnt)
84{
85 u32 tmp;
86
87 TM45BR = cnt;
88 tmp = TM45BR;
89
90 TM4MD = TM4MD_INIT_COUNTER;
91 tmp = TM4MD;
92
93 TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_INIT_COUNTER;
94 TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_COUNT_ENABLE;
95 tmp = TM5MD;
96
97 TM4MD = TM4MD_COUNT_ENABLE;
98 tmp = TM4MD;
99}
100#endif /* CONFIG_SMP&GENERIC_CLOCKEVENTS&!GENERIC_CLOCKEVENTS_BROADCAST */
101
102#endif /* !__ASSEMBLY__ */
103
104
105/*
106 * timestamp counter specifications
107 */
108#define TMTSCBR_MAX 0xffffffff
109
110#ifndef __ASSEMBLY__
111
112/* Use 32-bit timestamp counter */
113#define TMTSCMD TMSMD
114#define TMTSCBR TMSBR
115#define TMTSCBC TMSBC
116#define TMTSCICR TMSICR
117
118static inline void startup_timestamp_counter(void)
119{
120 u32 sync;
121
122 /* set up TMS(Timestamp) 32bit timer register to count real time
123 * - count down from 4Gig-1 to 0 and wrap at IOBCLK rate
124 */
125
126 TMTSCBR = TMTSCBR_MAX;
127 sync = TMTSCBR;
128
129 TMTSCICR = 0;
130 sync = TMTSCICR;
131
132 TMTSCMD = TMTMD_TMTLDE;
133 TMTSCMD = TMTMD_TMTCNE;
134 sync = TMTSCMD;
135}
136
137static inline void shutdown_timestamp_counter(void)
138{
139 TMTSCMD = 0;
140}
141
142/*
143 * we use a cascaded pair of 16-bit down-counting timers to count I/O
144 * clock cycles for the purposes of time keeping
145 */
146typedef unsigned long cycles_t;
147
148static inline cycles_t read_timestamp_counter(void)
149{
150 return (cycles_t)~TMTSCBC;
151}
152
153#endif /* !__ASSEMBLY__ */
154
155#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/arch/mn10300/unit-asb2364/irq-fpga.c b/arch/mn10300/unit-asb2364/irq-fpga.c
deleted file mode 100644
index 073e2ccc4a44..000000000000
--- a/arch/mn10300/unit-asb2364/irq-fpga.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/* ASB2364 FPGA interrupt multiplexing
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/interrupt.h>
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <unit/fpga-regs.h>
16
17/*
18 * FPGA PIC operations
19 */
20static void asb2364_fpga_mask(struct irq_data *d)
21{
22 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001;
23 SyncExBus();
24}
25
26static void asb2364_fpga_ack(struct irq_data *d)
27{
28 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001;
29 SyncExBus();
30}
31
32static void asb2364_fpga_mask_ack(struct irq_data *d)
33{
34 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001;
35 SyncExBus();
36 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001;
37 SyncExBus();
38}
39
40static void asb2364_fpga_unmask(struct irq_data *d)
41{
42 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0000;
43 SyncExBus();
44}
45
46static struct irq_chip asb2364_fpga_pic = {
47 .name = "fpga",
48 .irq_ack = asb2364_fpga_ack,
49 .irq_mask = asb2364_fpga_mask,
50 .irq_mask_ack = asb2364_fpga_mask_ack,
51 .irq_unmask = asb2364_fpga_unmask,
52};
53
54/*
55 * FPGA PIC interrupt handler
56 */
57static irqreturn_t fpga_interrupt(int irq, void *_mask)
58{
59 if ((ASB2364_FPGA_REG_IRQ_LAN & 0x0001) != 0x0001)
60 generic_handle_irq(FPGA_LAN_IRQ);
61 if ((ASB2364_FPGA_REG_IRQ_UART & 0x0001) != 0x0001)
62 generic_handle_irq(FPGA_UART_IRQ);
63 if ((ASB2364_FPGA_REG_IRQ_I2C & 0x0001) != 0x0001)
64 generic_handle_irq(FPGA_I2C_IRQ);
65 if ((ASB2364_FPGA_REG_IRQ_USB & 0x0001) != 0x0001)
66 generic_handle_irq(FPGA_USB_IRQ);
67 if ((ASB2364_FPGA_REG_IRQ_FPGA & 0x0001) != 0x0001)
68 generic_handle_irq(FPGA_FPGA_IRQ);
69
70 return IRQ_HANDLED;
71}
72
73/*
74 * Define an interrupt action for each FPGA PIC output
75 */
76static struct irqaction fpga_irq[] = {
77 [0] = {
78 .handler = fpga_interrupt,
79 .flags = IRQF_SHARED,
80 .name = "fpga",
81 },
82};
83
84/*
85 * Initialise the FPGA's PIC
86 */
87void __init irq_fpga_init(void)
88{
89 int irq;
90
91 ASB2364_FPGA_REG_MASK_LAN = 0x0001;
92 SyncExBus();
93 ASB2364_FPGA_REG_MASK_UART = 0x0001;
94 SyncExBus();
95 ASB2364_FPGA_REG_MASK_I2C = 0x0001;
96 SyncExBus();
97 ASB2364_FPGA_REG_MASK_USB = 0x0001;
98 SyncExBus();
99 ASB2364_FPGA_REG_MASK_FPGA = 0x0001;
100 SyncExBus();
101
102 for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++)
103 irq_set_chip_and_handler(irq, &asb2364_fpga_pic,
104 handle_level_irq);
105
106 /* the FPGA drives the XIRQ1 input on the CPU PIC */
107 setup_irq(XIRQ1, &fpga_irq[0]);
108}
diff --git a/arch/mn10300/unit-asb2364/leds.c b/arch/mn10300/unit-asb2364/leds.c
deleted file mode 100644
index 1ff830c372b3..000000000000
--- a/arch/mn10300/unit-asb2364/leds.c
+++ /dev/null
@@ -1,98 +0,0 @@
1/* leds.c: ASB2364 peripheral 7seg LEDs x4 support
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15
16#include <asm/io.h>
17#include <asm/processor.h>
18#include <asm/intctl-regs.h>
19#include <asm/rtc-regs.h>
20#include <unit/leds.h>
21
22#if MN10300_USE_7SEGLEDS
23static const u8 asb2364_led_hex_tbl[16] = {
24 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
25 0x00, 0x20, 0x10, 0x06, 0x8c, 0x42, 0x0c, 0x1c
26};
27
28static const u32 asb2364_led_chase_tbl[6] = {
29 ~0x02020202, /* top - segA */
30 ~0x04040404, /* right top - segB */
31 ~0x08080808, /* right bottom - segC */
32 ~0x10101010, /* bottom - segD */
33 ~0x20202020, /* left bottom - segE */
34 ~0x40404040, /* left top - segF */
35};
36
37static unsigned asb2364_led_chase;
38
39void peripheral_leds7x4_display_dec(unsigned int val, unsigned int points)
40{
41 u32 leds;
42
43 leds = asb2364_led_hex_tbl[(val/1000) % 10];
44 leds <<= 8;
45 leds |= asb2364_led_hex_tbl[(val/100) % 10];
46 leds <<= 8;
47 leds |= asb2364_led_hex_tbl[(val/10) % 10];
48 leds <<= 8;
49 leds |= asb2364_led_hex_tbl[val % 10];
50 leds |= points^0x01010101;
51
52 ASB2364_7SEGLEDS = leds;
53}
54
55void peripheral_leds7x4_display_hex(unsigned int val, unsigned int points)
56{
57 u32 leds;
58
59 leds = asb2364_led_hex_tbl[(val/1000) % 10];
60 leds <<= 8;
61 leds |= asb2364_led_hex_tbl[(val/100) % 10];
62 leds <<= 8;
63 leds |= asb2364_led_hex_tbl[(val/10) % 10];
64 leds <<= 8;
65 leds |= asb2364_led_hex_tbl[val % 10];
66 leds |= points^0x01010101;
67
68 ASB2364_7SEGLEDS = leds;
69}
70
71/* display triple horizontal bar and exception code */
72void peripheral_leds_display_exception(enum exception_code code)
73{
74 u32 leds;
75
76 leds = asb2364_led_hex_tbl[(code/0x100) % 0x10];
77 leds <<= 8;
78 leds |= asb2364_led_hex_tbl[(code/0x10) % 0x10];
79 leds <<= 8;
80 leds |= asb2364_led_hex_tbl[code % 0x10];
81 leds |= 0x6d010101;
82
83 ASB2364_7SEGLEDS = leds;
84}
85
86void peripheral_leds_led_chase(void)
87{
88 ASB2364_7SEGLEDS = asb2364_led_chase_tbl[asb2364_led_chase];
89 asb2364_led_chase++;
90 if (asb2364_led_chase >= 6)
91 asb2364_led_chase = 0;
92}
93#else /* MN10300_USE_7SEGLEDS */
94void peripheral_leds7x4_display_dec(unsigned int val, unsigned int points) { }
95void peripheral_leds7x4_display_hex(unsigned int val, unsigned int points) { }
96void peripheral_leds_display_exception(enum exception_code code) { }
97void peripheral_leds_led_chase(void) { }
98#endif /* MN10300_USE_7SEGLEDS */
diff --git a/arch/mn10300/unit-asb2364/smsc911x.c b/arch/mn10300/unit-asb2364/smsc911x.c
deleted file mode 100644
index 544a73e94c81..000000000000
--- a/arch/mn10300/unit-asb2364/smsc911x.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/* Specification for the SMSC911x NIC
2 *
3 * Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/ioport.h>
17#include <linux/smsc911x.h>
18#include <unit/smsc911x.h>
19
20static struct smsc911x_platform_config smsc911x_config = {
21 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
22 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
23 .flags = SMSC911X_USE_32BIT,
24};
25
26static struct resource smsc911x_resources[] = {
27 [0] = {
28 .start = SMSC911X_BASE,
29 .end = SMSC911X_BASE_END,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 .start = SMSC911X_IRQ,
34 .end = SMSC911X_IRQ,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39static struct platform_device smsc911x_device = {
40 .name = "smsc911x",
41 .id = 0,
42 .num_resources = ARRAY_SIZE(smsc911x_resources),
43 .resource = smsc911x_resources,
44 .dev = {
45 .platform_data = &smsc911x_config,
46 }
47};
48
49/*
50 * add platform devices
51 */
52static int __init unit_device_init(void)
53{
54 platform_device_register(&smsc911x_device);
55 return 0;
56}
57
58device_initcall(unit_device_init);
diff --git a/arch/mn10300/unit-asb2364/unit-init.c b/arch/mn10300/unit-asb2364/unit-init.c
deleted file mode 100644
index 6359b41ce7e9..000000000000
--- a/arch/mn10300/unit-asb2364/unit-init.c
+++ /dev/null
@@ -1,132 +0,0 @@
1/* ASB2364 initialisation
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/delay.h>
17
18#include <asm/io.h>
19#include <asm/setup.h>
20#include <asm/processor.h>
21#include <asm/irq.h>
22#include <asm/intctl-regs.h>
23#include <asm/serial-regs.h>
24#include <unit/fpga-regs.h>
25#include <unit/serial.h>
26#include <unit/smsc911x.h>
27
28#define TTYS0_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8)
29#define LAN_IRQ_CFG __SYSREG(SMSC911X_BASE + 0x54, u32)
30#define LAN_INT_EN __SYSREG(SMSC911X_BASE + 0x5c, u32)
31
32/*
33 * initialise some of the unit hardware before gdbstub is set up
34 */
35asmlinkage void __init unit_init(void)
36{
37 /* Make sure we aren't going to get unexpected interrupts */
38 TTYS0_SERIAL_IER = 0;
39 SC0RXICR = 0;
40 SC0TXICR = 0;
41 SC1RXICR = 0;
42 SC1TXICR = 0;
43 SC2RXICR = 0;
44 SC2TXICR = 0;
45
46 /* Attempt to reset the FPGA attached peripherals */
47 ASB2364_FPGA_REG_RESET_LAN = 0x0000;
48 SyncExBus();
49 ASB2364_FPGA_REG_RESET_UART = 0x0000;
50 SyncExBus();
51 ASB2364_FPGA_REG_RESET_I2C = 0x0000;
52 SyncExBus();
53 ASB2364_FPGA_REG_RESET_USB = 0x0000;
54 SyncExBus();
55 ASB2364_FPGA_REG_RESET_AV = 0x0000;
56 SyncExBus();
57
58 /* set up the external interrupts */
59
60 /* XIRQ[0]: NAND RXBY */
61 /* SET_XIRQ_TRIGGER(0, XIRQ_TRIGGER_LOWLEVEL); */
62
63 /* XIRQ[1]: LAN, UART, I2C, USB, PCI, FPGA */
64 SET_XIRQ_TRIGGER(1, XIRQ_TRIGGER_LOWLEVEL);
65
66 /* XIRQ[2]: Extend Slot 1-9 */
67 /* SET_XIRQ_TRIGGER(2, XIRQ_TRIGGER_LOWLEVEL); */
68
69#if defined(CONFIG_EXT_SERIAL_IRQ_LEVEL) && \
70 defined(CONFIG_ETHERNET_IRQ_LEVEL) && \
71 (CONFIG_EXT_SERIAL_IRQ_LEVEL != CONFIG_ETHERNET_IRQ_LEVEL)
72# error CONFIG_EXT_SERIAL_IRQ_LEVEL != CONFIG_ETHERNET_IRQ_LEVEL
73#endif
74
75#if defined(CONFIG_EXT_SERIAL_IRQ_LEVEL)
76 set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_EXT_SERIAL_IRQ_LEVEL));
77#elif defined(CONFIG_ETHERNET_IRQ_LEVEL)
78 set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_ETHERNET_IRQ_LEVEL));
79#endif
80}
81
82/*
83 * initialise the rest of the unit hardware after gdbstub is ready
84 */
85asmlinkage void __init unit_setup(void)
86{
87 /* Release the reset on the SMSC911X so that it is ready by the time we
88 * need it */
89 ASB2364_FPGA_REG_RESET_LAN = 0x0001;
90 SyncExBus();
91 ASB2364_FPGA_REG_RESET_UART = 0x0001;
92 SyncExBus();
93 ASB2364_FPGA_REG_RESET_I2C = 0x0001;
94 SyncExBus();
95 ASB2364_FPGA_REG_RESET_USB = 0x0001;
96 SyncExBus();
97 ASB2364_FPGA_REG_RESET_AV = 0x0001;
98 SyncExBus();
99
100 /* Make sure the ethernet chipset isn't going to give us an interrupt
101 * storm from stuff it was doing pre-reset */
102 LAN_IRQ_CFG = 0;
103 LAN_INT_EN = 0;
104}
105
106/*
107 * initialise the external interrupts used by a unit of this type
108 */
109void __init unit_init_IRQ(void)
110{
111 unsigned int extnum;
112
113 for (extnum = 0 ; extnum < NR_XIRQS ; extnum++) {
114 switch (GET_XIRQ_TRIGGER(extnum)) {
115 /* LEVEL triggered interrupts should be made
116 * post-ACK'able as they hold their lines until
117 * serviced
118 */
119 case XIRQ_TRIGGER_HILEVEL:
120 case XIRQ_TRIGGER_LOWLEVEL:
121 mn10300_set_lateack_irq_type(XIRQ2IRQ(extnum));
122 break;
123 default:
124 break;
125 }
126 }
127
128#define IRQCTL __SYSREG(0xd5000090, u32)
129 IRQCTL |= 0x02;
130
131 irq_fpga_init();
132}
diff --git a/crypto/sha3_generic.c b/crypto/sha3_generic.c
index ded148783303..264ec12c0b9c 100644
--- a/crypto/sha3_generic.c
+++ b/crypto/sha3_generic.c
@@ -21,7 +21,7 @@
21#include <asm/unaligned.h> 21#include <asm/unaligned.h>
22 22
23/* 23/*
24 * On some 32-bit architectures (mn10300 and h8300), GCC ends up using 24 * On some 32-bit architectures (h8300), GCC ends up using
25 * over 1 KB of stack if we inline the round calculation into the loop 25 * over 1 KB of stack if we inline the round calculation into the loop
26 * in keccakf(). On the other hand, on 64-bit architectures with plenty 26 * in keccakf(). On the other hand, on 64-bit architectures with plenty
27 * of [64-bit wide] general purpose registers, not inlining it severely 27 * of [64-bit wide] general purpose registers, not inlining it severely
diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c
index c868a878c84f..be1b4921f22a 100644
--- a/drivers/input/joystick/analog.c
+++ b/drivers/input/joystick/analog.c
@@ -163,7 +163,7 @@ static unsigned int get_time_pit(void)
163#define GET_TIME(x) do { x = (unsigned int)rdtsc(); } while (0) 163#define GET_TIME(x) do { x = (unsigned int)rdtsc(); } while (0)
164#define DELTA(x,y) ((y)-(x)) 164#define DELTA(x,y) ((y)-(x))
165#define TIME_NAME "TSC" 165#define TIME_NAME "TSC"
166#elif defined(__alpha__) || defined(CONFIG_MN10300) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) || defined(CONFIG_TILE) 166#elif defined(__alpha__) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) || defined(CONFIG_TILE)
167#define GET_TIME(x) do { x = get_cycles(); } while (0) 167#define GET_TIME(x) do { x = get_cycles(); } while (0)
168#define DELTA(x,y) ((y)-(x)) 168#define DELTA(x,y) ((y)-(x))
169#define TIME_NAME "get_cycles" 169#define TIME_NAME "get_cycles"
diff --git a/drivers/net/ethernet/smsc/Kconfig b/drivers/net/ethernet/smsc/Kconfig
index 4c2f612e4414..948603e9b905 100644
--- a/drivers/net/ethernet/smsc/Kconfig
+++ b/drivers/net/ethernet/smsc/Kconfig
@@ -6,7 +6,7 @@ config NET_VENDOR_SMSC
6 bool "SMC (SMSC)/Western Digital devices" 6 bool "SMC (SMSC)/Western Digital devices"
7 default y 7 default y
8 depends on ARM || ARM64 || ATARI_ETHERNAT || BLACKFIN || COLDFIRE || \ 8 depends on ARM || ARM64 || ATARI_ETHERNAT || BLACKFIN || COLDFIRE || \
9 ISA || M32R || MAC || MIPS || MN10300 || NIOS2 || PCI || \ 9 ISA || M32R || MAC || MIPS || NIOS2 || PCI || \
10 PCMCIA || SUPERH || XTENSA || H8300 10 PCMCIA || SUPERH || XTENSA || H8300
11 ---help--- 11 ---help---
12 If you have a network (Ethernet) card belonging to this class, say Y. 12 If you have a network (Ethernet) card belonging to this class, say Y.
@@ -38,7 +38,7 @@ config SMC91X
38 select MII 38 select MII
39 depends on !OF || GPIOLIB 39 depends on !OF || GPIOLIB
40 depends on ARM || ARM64 || ATARI_ETHERNAT || BLACKFIN || COLDFIRE || \ 40 depends on ARM || ARM64 || ATARI_ETHERNAT || BLACKFIN || COLDFIRE || \
41 M32R || MIPS || MN10300 || NIOS2 || SUPERH || XTENSA || H8300 41 M32R || MIPS || NIOS2 || SUPERH || XTENSA || H8300
42 ---help--- 42 ---help---
43 This is a driver for SMC's 91x series of Ethernet chipsets, 43 This is a driver for SMC's 91x series of Ethernet chipsets,
44 including the SMC91C94 and the SMC91C111. Say Y if you want it 44 including the SMC91C94 and the SMC91C111. Say Y if you want it
@@ -77,7 +77,7 @@ config SMC911X
77 tristate "SMSC LAN911[5678] support" 77 tristate "SMSC LAN911[5678] support"
78 select CRC32 78 select CRC32
79 select MII 79 select MII
80 depends on (ARM || SUPERH || MN10300) 80 depends on (ARM || SUPERH)
81 ---help--- 81 ---help---
82 This is a driver for SMSC's LAN911x series of Ethernet chipsets 82 This is a driver for SMSC's LAN911x series of Ethernet chipsets
83 including the new LAN9115, LAN9116, LAN9117, and LAN9118. 83 including the new LAN9115, LAN9116, LAN9117, and LAN9118.
diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h
index 08b17adf0a65..8445622dc4cf 100644
--- a/drivers/net/ethernet/smsc/smc91x.h
+++ b/drivers/net/ethernet/smsc/smc91x.h
@@ -162,14 +162,6 @@ static inline void _SMC_outw_align4(u16 val, void __iomem *ioaddr, int reg,
162#define RPC_LSA_DEFAULT RPC_LED_TX_RX 162#define RPC_LSA_DEFAULT RPC_LED_TX_RX
163#define RPC_LSB_DEFAULT RPC_LED_100_10 163#define RPC_LSB_DEFAULT RPC_LED_100_10
164 164
165#elif defined(CONFIG_MN10300)
166
167/*
168 * MN10300/AM33 configuration
169 */
170
171#include <unit/smc91111.h>
172
173#elif defined(CONFIG_ATARI) 165#elif defined(CONFIG_ATARI)
174 166
175#define SMC_CAN_USE_8BIT 1 167#define SMC_CAN_USE_8BIT 1
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 8ab5f0a5d323..be5a3dc99c11 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -868,7 +868,7 @@ comment "Platform RTC drivers"
868 868
869config RTC_DRV_CMOS 869config RTC_DRV_CMOS
870 tristate "PC-style 'CMOS'" 870 tristate "PC-style 'CMOS'"
871 depends on X86 || ARM || M32R || PPC || MIPS || SPARC64 || MN10300 871 depends on X86 || ARM || M32R || PPC || MIPS || SPARC64
872 default y if X86 872 default y if X86
873 select RTC_MC146818_LIB 873 select RTC_MC146818_LIB
874 help 874 help
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 9dca53df3584..f7c0f72abb56 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -711,7 +711,7 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
711 address_space = 64; 711 address_space = 64;
712#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 712#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
713 || defined(__sparc__) || defined(__mips__) \ 713 || defined(__sparc__) || defined(__mips__) \
714 || defined(__powerpc__) || defined(CONFIG_MN10300) 714 || defined(__powerpc__)
715 address_space = 128; 715 address_space = 128;
716#else 716#else
717#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 717#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
diff --git a/drivers/staging/speakup/Kconfig b/drivers/staging/speakup/Kconfig
index 7e8037e230b8..efd6f4560d3e 100644
--- a/drivers/staging/speakup/Kconfig
+++ b/drivers/staging/speakup/Kconfig
@@ -1,7 +1,7 @@
1menu "Speakup console speech" 1menu "Speakup console speech"
2 2
3config SPEAKUP 3config SPEAKUP
4 depends on VT && !MN10300 4 depends on VT
5 tristate "Speakup core" 5 tristate "Speakup core"
6 ---help--- 6 ---help---
7 This is the Speakup screen reader. Think of it as a 7 This is the Speakup screen reader. Think of it as a
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 7f1f1fbcef9e..005ed87c8216 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -7,7 +7,7 @@ menu "Console display driver support"
7config VGA_CONSOLE 7config VGA_CONSOLE
8 bool "VGA text console" if EXPERT || !X86 8 bool "VGA text console" if EXPERT || !X86
9 depends on !4xx && !PPC_8xx && !SPARC && !M68K && !PARISC && !FRV && \ 9 depends on !4xx && !PPC_8xx && !SPARC && !M68K && !PARISC && !FRV && \
10 !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && !CRIS && \ 10 !SUPERH && !BLACKFIN && !AVR32 && !CRIS && \
11 (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) && \ 11 (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) && \
12 !ARM64 && !ARC && !MICROBLAZE && !OPENRISC 12 !ARM64 && !ARC && !MICROBLAZE && !OPENRISC
13 default y 13 default y
diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h
index 3f38eb03649c..abe6dd9ca2a8 100644
--- a/include/asm-generic/atomic.h
+++ b/include/asm-generic/atomic.h
@@ -2,8 +2,6 @@
2 * Generic C implementation of atomic counter operations. Usable on 2 * Generic C implementation of atomic counter operations. Usable on
3 * UP systems only. Do not include in machine independent code. 3 * UP systems only. Do not include in machine independent code.
4 * 4 *
5 * Originally implemented for MN10300.
6 *
7 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 5 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
8 * Written by David Howells (dhowells@redhat.com) 6 * Written by David Howells (dhowells@redhat.com)
9 * 7 *
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index fe297b599b0a..29458bbb2fa0 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Generic barrier definitions, originally based on MN10300 definitions. 2 * Generic barrier definitions.
3 * 3 *
4 * It should be possible to use these on really simple architectures, 4 * It should be possible to use these on really simple architectures,
5 * but it serves more as a starting point for new ports. 5 * but it serves more as a starting point for new ports.
diff --git a/include/asm-generic/exec.h b/include/asm-generic/exec.h
index 567766b0074a..32c0a216f576 100644
--- a/include/asm-generic/exec.h
+++ b/include/asm-generic/exec.h
@@ -1,4 +1,4 @@
1/* Generic process execution definitions, based on MN10300 definitions. 1/* Generic process execution definitions.
2 * 2 *
3 * It should be possible to use these on really simple architectures, 3 * It should be possible to use these on really simple architectures,
4 * but it serves more as a starting point for new ports. 4 * but it serves more as a starting point for new ports.
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b4531e3b2120..fe184b9bb6ea 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -1,4 +1,4 @@
1/* Generic I/O port emulation, based on MN10300 code 1/* Generic I/O port emulation.
2 * 2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com) 4 * Written by David Howells (dhowells@redhat.com)
diff --git a/include/asm-generic/pci_iomap.h b/include/asm-generic/pci_iomap.h
index 854f96ad5ccb..d4f16dcc2ed7 100644
--- a/include/asm-generic/pci_iomap.h
+++ b/include/asm-generic/pci_iomap.h
@@ -1,5 +1,5 @@
1/* SPDX-License-Identifier: GPL-2.0+ */ 1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Generic I/O port emulation, based on MN10300 code 2/* Generic I/O port emulation.
3 * 3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com) 5 * Written by David Howells (dhowells@redhat.com)
diff --git a/include/asm-generic/switch_to.h b/include/asm-generic/switch_to.h
index 052c4ac04fd5..986acc9d34bb 100644
--- a/include/asm-generic/switch_to.h
+++ b/include/asm-generic/switch_to.h
@@ -1,4 +1,4 @@
1/* Generic task switch macro wrapper, based on MN10300 definitions. 1/* Generic task switch macro wrapper.
2 * 2 *
3 * It should be possible to use these on really simple architectures, 3 * It should be possible to use these on really simple architectures,
4 * but it serves more as a starting point for new ports. 4 * but it serves more as a starting point for new ports.
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 771989d25ef8..20d42c0d9fb6 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -25,7 +25,7 @@
25#include <asm/byteorder.h> 25#include <asm/byteorder.h>
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300) 28#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
29# define SUPPORT_VLB_SYNC 0 29# define SUPPORT_VLB_SYNC 0
30#else 30#else
31# define SUPPORT_VLB_SYNC 1 31# define SUPPORT_VLB_SYNC 1
diff --git a/init/Kconfig b/init/Kconfig
index e37f4b2a6445..a14bcc9724a2 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1108,7 +1108,7 @@ config MULTIUSER
1108 1108
1109config SGETMASK_SYSCALL 1109config SGETMASK_SYSCALL
1110 bool "sgetmask/ssetmask syscalls support" if EXPERT 1110 bool "sgetmask/ssetmask syscalls support" if EXPERT
1111 def_bool PARISC || MN10300 || BLACKFIN || M68K || PPC || MIPS || X86 || SPARC || CRIS || MICROBLAZE || SUPERH 1111 def_bool PARISC || BLACKFIN || M68K || PPC || MIPS || X86 || SPARC || CRIS || MICROBLAZE || SUPERH
1112 ---help--- 1112 ---help---
1113 sys_sgetmask and sys_ssetmask are obsolete system calls 1113 sys_sgetmask and sys_ssetmask are obsolete system calls
1114 no longer supported in libc but still enabled by default in some 1114 no longer supported in libc but still enabled by default in some
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index d5964b051017..41ac9d294245 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -356,7 +356,7 @@ config FRAME_POINTER
356 bool "Compile the kernel with frame pointers" 356 bool "Compile the kernel with frame pointers"
357 depends on DEBUG_KERNEL && \ 357 depends on DEBUG_KERNEL && \
358 (CRIS || M68K || FRV || UML || \ 358 (CRIS || M68K || FRV || UML || \
359 SUPERH || BLACKFIN || MN10300) || \ 359 SUPERH || BLACKFIN) || \
360 ARCH_WANT_FRAME_POINTERS 360 ARCH_WANT_FRAME_POINTERS
361 default y if (DEBUG_INFO && UML) || ARCH_WANT_FRAME_POINTERS 361 default y if (DEBUG_INFO && UML) || ARCH_WANT_FRAME_POINTERS
362 help 362 help
diff --git a/lib/test_user_copy.c b/lib/test_user_copy.c
index 4621db801b23..a6556f3364d1 100644
--- a/lib/test_user_copy.c
+++ b/lib/test_user_copy.c
@@ -35,7 +35,6 @@
35 !defined(CONFIG_M32R) && \ 35 !defined(CONFIG_M32R) && \
36 !defined(CONFIG_M68K) && \ 36 !defined(CONFIG_M68K) && \
37 !defined(CONFIG_MICROBLAZE) && \ 37 !defined(CONFIG_MICROBLAZE) && \
38 !defined(CONFIG_MN10300) && \
39 !defined(CONFIG_NIOS2) && \ 38 !defined(CONFIG_NIOS2) && \
40 !defined(CONFIG_PPC32) && \ 39 !defined(CONFIG_PPC32) && \
41 !defined(CONFIG_SUPERH)) 40 !defined(CONFIG_SUPERH))
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 9917f928d0fd..4ff08a0ef5d3 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -840,8 +840,7 @@ static const char *const section_white_list[] =
840 ".debug*", 840 ".debug*",
841 ".cranges", /* sh64 */ 841 ".cranges", /* sh64 */
842 ".zdebug*", /* Compressed debug sections. */ 842 ".zdebug*", /* Compressed debug sections. */
843 ".GCC-command-line", /* mn10300 */ 843 ".GCC.command.line", /* record-gcc-switches */
844 ".GCC.command.line", /* record-gcc-switches, non mn10300 */
845 ".mdebug*", /* alpha, score, mips etc. */ 844 ".mdebug*", /* alpha, score, mips etc. */
846 ".pdr", /* alpha, score, mips etc. */ 845 ".pdr", /* alpha, score, mips etc. */
847 ".stab*", 846 ".stab*",
@@ -1104,8 +1103,8 @@ static const struct sectioncheck *section_mismatch(
1104 /* 1103 /*
1105 * The target section could be the SHT_NUL section when we're 1104 * The target section could be the SHT_NUL section when we're
1106 * handling relocations to un-resolved symbols, trying to match it 1105 * handling relocations to un-resolved symbols, trying to match it
1107 * doesn't make much sense and causes build failures on parisc and 1106 * doesn't make much sense and causes build failures on parisc
1108 * mn10300 architectures. 1107 * architectures.
1109 */ 1108 */
1110 if (*tosec == '\0') 1109 if (*tosec == '\0')
1111 return NULL; 1110 return NULL;
diff --git a/tools/arch/mn10300/include/uapi/asm/bitsperlong.h b/tools/arch/mn10300/include/uapi/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/tools/arch/mn10300/include/uapi/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/bitsperlong.h>
diff --git a/tools/arch/mn10300/include/uapi/asm/mman.h b/tools/arch/mn10300/include/uapi/asm/mman.h
deleted file mode 100644
index b9360639974f..000000000000
--- a/tools/arch/mn10300/include/uapi/asm/mman.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef TOOLS_ARCH_MN10300_UAPI_ASM_MMAN_FIX_H
3#define TOOLS_ARCH_MN10300_UAPI_ASM_MMAN_FIX_H
4#include <uapi/asm-generic/mman.h>
5/* MAP_32BIT is undefined on mn10300, fix it for perf */
6#define MAP_32BIT 0
7#endif
diff --git a/tools/include/asm-generic/barrier.h b/tools/include/asm-generic/barrier.h
index 47b933903eaf..52278d880a61 100644
--- a/tools/include/asm-generic/barrier.h
+++ b/tools/include/asm-generic/barrier.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Copied from the kernel sources to tools/perf/: 2 * Copied from the kernel sources to tools/perf/:
3 * 3 *
4 * Generic barrier definitions, originally based on MN10300 definitions. 4 * Generic barrier definitions.
5 * 5 *
6 * It should be possible to use these on really simple architectures, 6 * It should be possible to use these on really simple architectures,
7 * but it serves more as a starting point for new ports. 7 * but it serves more as a starting point for new ports.