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authorArnd Bergmann <arnd@arndb.de>2018-10-04 10:41:12 -0400
committerArnd Bergmann <arnd@arndb.de>2018-10-04 10:41:16 -0400
commit5140512d5be501e09171deef16e03087f57ef980 (patch)
tree6e43e550c74b98af4b1b66b25d9545ad721d3089
parent22b9292141aa791d8182514da9ba780e7ea09528 (diff)
parent186b45657b244ce865e01b65d73868a48252e1ff (diff)
Merge tag 'v4.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Nodes for the newly support rk3188 display controller, a fix for a new dtc warning, gpio setting for the sdmmc regulator on radxarock and a new board the "S" variant of the rk3288-based Tinker board, that sports an added emmc. * tag 'v4.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add rk3288-based Tinker board S ARM: dts: rockchip: move shared tinker-board nodes to a common dtsi ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock ARM: dts: rockchip: Fix erroneous SPI bus dtc warnings on rk3036 ARM: dts: rockchip: add rk3188 lcd controller nodes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt4
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/rk3036.dtsi2
-rw-r--r--arch/arm/boot/dts/rk3188-radxarock.dts8
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi82
-rw-r--r--arch/arm/boot/dts/rk3288-tinker-s.dts26
-rw-r--r--arch/arm/boot/dts/rk3288-tinker.dts498
-rw-r--r--arch/arm/boot/dts/rk3288-tinker.dtsi502
8 files changed, 626 insertions, 497 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 0b7e699628d6..0cc71236d639 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -17,6 +17,10 @@ Rockchip platforms device tree bindings
17 Required root node properties: 17 Required root node properties:
18 - compatible = "asus,rk3288-tinker", "rockchip,rk3288"; 18 - compatible = "asus,rk3288-tinker", "rockchip,rk3288";
19 19
20- Asus Tinker board S
21 Required root node properties:
22 - compatible = "asus,rk3288-tinker-s", "rockchip,rk3288";
23
20- Kylin RK3036 board: 24- Kylin RK3036 board:
21 Required root node properties: 25 Required root node properties:
22 - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036"; 26 - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 058a09e08a56..b0e966d625b9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -870,6 +870,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
870 rk3288-r89.dtb \ 870 rk3288-r89.dtb \
871 rk3288-rock2-square.dtb \ 871 rk3288-rock2-square.dtb \
872 rk3288-tinker.dtb \ 872 rk3288-tinker.dtb \
873 rk3288-tinker-s.dtb \
873 rk3288-veyron-brain.dtb \ 874 rk3288-veyron-brain.dtb \
874 rk3288-veyron-jaq.dtb \ 875 rk3288-veyron-jaq.dtb \
875 rk3288-veyron-jerry.dtb \ 876 rk3288-veyron-jerry.dtb \
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 67f57200d9a0..d560fc4051c5 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -733,7 +733,7 @@
733 /* no rts / cts for uart2 */ 733 /* no rts / cts for uart2 */
734 }; 734 };
735 735
736 spi { 736 spi-pins {
737 spi_txd:spi-txd { 737 spi_txd:spi-txd {
738 rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>; 738 rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
739 }; 739 };
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 45fd2b302dda..4a2890618f6f 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -93,6 +93,8 @@
93 regulator-min-microvolt = <3300000>; 93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>; 94 regulator-max-microvolt = <3300000>;
95 gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; 95 gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&sdmmc_pwr>;
96 startup-delay-us = <100000>; 98 startup-delay-us = <100000>;
97 vin-supply = <&vcc_io>; 99 vin-supply = <&vcc_io>;
98 }; 100 };
@@ -315,6 +317,12 @@
315 }; 317 };
316 }; 318 };
317 319
320 sd0 {
321 sdmmc_pwr: sdmmc-pwr {
322 rockchip,pins = <RK_GPIO3 1 RK_FUNC_GPIO &pcfg_pull_none>;
323 };
324 };
325
318 usb { 326 usb {
319 host_vbus_drv: host-vbus-drv { 327 host_vbus_drv: host-vbus-drv {
320 rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>; 328 rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index aa123f93f181..b6f790973736 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -56,6 +56,11 @@
56 }; 56 };
57 }; 57 };
58 58
59 display-subsystem {
60 compatible = "rockchip,display-subsystem";
61 ports = <&vop0_out>, <&vop1_out>;
62 };
63
59 sram: sram@10080000 { 64 sram: sram@10080000 {
60 compatible = "mmio-sram"; 65 compatible = "mmio-sram";
61 reg = <0x10080000 0x8000>; 66 reg = <0x10080000 0x8000>;
@@ -69,6 +74,38 @@
69 }; 74 };
70 }; 75 };
71 76
77 vop0: vop@1010c000 {
78 compatible = "rockchip,rk3188-vop";
79 reg = <0x1010c000 0x1000>;
80 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
81 clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>;
82 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
83 resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
84 reset-names = "axi", "ahb", "dclk";
85 status = "disabled";
86
87 vop0_out: port {
88 #address-cells = <1>;
89 #size-cells = <0>;
90 };
91 };
92
93 vop1: vop@1010e000 {
94 compatible = "rockchip,rk3188-vop";
95 reg = <0x1010e000 0x1000>;
96 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
97 clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>;
98 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
99 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
100 reset-names = "axi", "ahb", "dclk";
101 status = "disabled";
102
103 vop1_out: port {
104 #address-cells = <1>;
105 #size-cells = <0>;
106 };
107 };
108
72 timer3: timer@2000e000 { 109 timer3: timer@2000e000 {
73 compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; 110 compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
74 reg = <0x2000e000 0x20>; 111 reg = <0x2000e000 0x20>;
@@ -309,6 +346,51 @@
309 }; 346 };
310 }; 347 };
311 348
349 lcdc1 {
350 lcdc1_dclk: lcdc1-dclk {
351 rockchip,pins = <2 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
352 };
353
354 lcdc1_den: lcdc1-den {
355 rockchip,pins = <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
356 };
357
358 lcdc1_hsync: lcdc1-hsync {
359 rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
360 };
361
362 lcdc1_vsync: lcdc1-vsync {
363 rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
364 };
365
366 lcdc1_rgb24: ldcd1-rgb24 {
367 rockchip,pins = <2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
368 <2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
369 <2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
370 <2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
371 <2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
372 <2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
373 <2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
374 <2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
375 <2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
376 <2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
377 <2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
378 <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
379 <2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
380 <2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
381 <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
382 <2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
383 <2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
384 <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
385 <2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
386 <2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
387 <2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
388 <2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,
389 <2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,
390 <2 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
391 };
392 };
393
312 pwm0 { 394 pwm0 {
313 pwm0_out: pwm0-out { 395 pwm0_out: pwm0-out {
314 rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>; 396 rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/rk3288-tinker-s.dts b/arch/arm/boot/dts/rk3288-tinker-s.dts
new file mode 100644
index 000000000000..37093922b482
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-tinker-s.dts
@@ -0,0 +1,26 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7
8#include "rk3288-tinker.dtsi"
9
10/ {
11 model = "Rockchip RK3288 Asus Tinker Board S";
12 compatible = "asus,rk3288-tinker-s", "rockchip,rk3288";
13};
14
15&emmc {
16 bus-width = <8>;
17 cap-mmc-highspeed;
18 disable-wp;
19 non-removable;
20 pinctrl-names = "default";
21 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
22 max-frequency = <150000000>;
23 mmc-hs200-1_8v;
24 mmc-ddr-1_8v;
25 status = "okay";
26};
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index ceade5962899..1e43527aa196 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -5,503 +5,9 @@
5 5
6/dts-v1/; 6/dts-v1/;
7 7
8#include "rk3288.dtsi" 8#include "rk3288-tinker.dtsi"
9#include <dt-bindings/input/input.h>
10 9
11/ { 10/ {
12 model = "Rockchip RK3288 Tinker Board"; 11 model = "Rockchip RK3288 Asus Tinker Board";
13 compatible = "asus,rk3288-tinker", "rockchip,rk3288"; 12 compatible = "asus,rk3288-tinker", "rockchip,rk3288";
14
15 chosen {
16 stdout-path = "serial2:115200n8";
17 };
18
19 memory {
20 reg = <0x0 0x0 0x0 0x80000000>;
21 device_type = "memory";
22 };
23
24 ext_gmac: external-gmac-clock {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <125000000>;
28 clock-output-names = "ext_gmac";
29 };
30
31 gpio-keys {
32 compatible = "gpio-keys";
33 #address-cells = <1>;
34 #size-cells = <0>;
35 autorepeat;
36
37 pinctrl-names = "default";
38 pinctrl-0 = <&pwrbtn>;
39
40 button@0 {
41 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_POWER>;
43 label = "GPIO Key Power";
44 linux,input-type = <1>;
45 wakeup-source;
46 debounce-interval = <100>;
47 };
48 };
49
50 gpio-leds {
51 compatible = "gpio-leds";
52
53 act-led {
54 gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger="mmc0";
56 };
57
58 heartbeat-led {
59 gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
60 linux,default-trigger="heartbeat";
61 };
62
63 pwr-led {
64 gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "default-on";
66 };
67 };
68
69 sound {
70 compatible = "simple-audio-card";
71 simple-audio-card,format = "i2s";
72 simple-audio-card,name = "rockchip,tinker-codec";
73 simple-audio-card,mclk-fs = <512>;
74
75 simple-audio-card,codec {
76 sound-dai = <&hdmi>;
77 };
78
79 simple-audio-card,cpu {
80 sound-dai = <&i2s>;
81 };
82 };
83
84 vcc_sys: vsys-regulator {
85 compatible = "regulator-fixed";
86 regulator-name = "vcc_sys";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 regulator-always-on;
90 regulator-boot-on;
91 };
92
93 vcc_sd: sdmmc-regulator {
94 compatible = "regulator-fixed";
95 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&sdmmc_pwr>;
98 regulator-name = "vcc_sd";
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 startup-delay-us = <100000>;
102 vin-supply = <&vcc_io>;
103 };
104};
105
106&cpu0 {
107 cpu0-supply = <&vdd_cpu>;
108};
109
110&gmac {
111 assigned-clocks = <&cru SCLK_MAC>;
112 assigned-clock-parents = <&ext_gmac>;
113 clock_in_out = "input";
114 phy-mode = "rgmii";
115 phy-supply = <&vcc33_lan>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&rgmii_pins>;
118 snps,reset-gpio = <&gpio4 7 0>;
119 snps,reset-active-low;
120 snps,reset-delays-us = <0 10000 1000000>;
121 tx_delay = <0x30>;
122 rx_delay = <0x10>;
123 status = "ok";
124};
125
126&gpu {
127 mali-supply = <&vdd_gpu>;
128 status = "okay";
129};
130
131&hdmi {
132 ddc-i2c-bus = <&i2c5>;
133 status = "okay";
134};
135
136&i2c0 {
137 clock-frequency = <400000>;
138 status = "okay";
139
140 rk808: pmic@1b {
141 compatible = "rockchip,rk808";
142 reg = <0x1b>;
143 interrupt-parent = <&gpio0>;
144 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
145 #clock-cells = <1>;
146 clock-output-names = "xin32k", "rk808-clkout2";
147 dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
148 <&gpio0 12 GPIO_ACTIVE_HIGH>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
151 rockchip,system-power-controller;
152 wakeup-source;
153
154 vcc1-supply = <&vcc_sys>;
155 vcc2-supply = <&vcc_sys>;
156 vcc3-supply = <&vcc_sys>;
157 vcc4-supply = <&vcc_sys>;
158 vcc6-supply = <&vcc_sys>;
159 vcc7-supply = <&vcc_sys>;
160 vcc8-supply = <&vcc_io>;
161 vcc9-supply = <&vcc_io>;
162 vcc10-supply = <&vcc_io>;
163 vcc11-supply = <&vcc_sys>;
164 vcc12-supply = <&vcc_io>;
165 vddio-supply = <&vcc_io>;
166
167 regulators {
168 vdd_cpu: DCDC_REG1 {
169 regulator-always-on;
170 regulator-boot-on;
171 regulator-min-microvolt = <750000>;
172 regulator-max-microvolt = <1350000>;
173 regulator-name = "vdd_arm";
174 regulator-ramp-delay = <6000>;
175 regulator-state-mem {
176 regulator-off-in-suspend;
177 };
178 };
179
180 vdd_gpu: DCDC_REG2 {
181 regulator-always-on;
182 regulator-boot-on;
183 regulator-min-microvolt = <850000>;
184 regulator-max-microvolt = <1250000>;
185 regulator-name = "vdd_gpu";
186 regulator-ramp-delay = <6000>;
187 regulator-state-mem {
188 regulator-on-in-suspend;
189 regulator-suspend-microvolt = <1000000>;
190 };
191 };
192
193 vcc_ddr: DCDC_REG3 {
194 regulator-always-on;
195 regulator-boot-on;
196 regulator-name = "vcc_ddr";
197 regulator-state-mem {
198 regulator-on-in-suspend;
199 };
200 };
201
202 vcc_io: DCDC_REG4 {
203 regulator-always-on;
204 regulator-boot-on;
205 regulator-min-microvolt = <3300000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-name = "vcc_io";
208 regulator-state-mem {
209 regulator-on-in-suspend;
210 regulator-suspend-microvolt = <3300000>;
211 };
212 };
213
214 vcc18_ldo1: LDO_REG1 {
215 regulator-always-on;
216 regulator-boot-on;
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <1800000>;
219 regulator-name = "vcc18_ldo1";
220 regulator-state-mem {
221 regulator-on-in-suspend;
222 regulator-suspend-microvolt = <1800000>;
223 };
224 };
225
226 vcc33_mipi: LDO_REG2 {
227 regulator-always-on;
228 regulator-boot-on;
229 regulator-min-microvolt = <3300000>;
230 regulator-max-microvolt = <3300000>;
231 regulator-name = "vcc33_mipi";
232 regulator-state-mem {
233 regulator-off-in-suspend;
234 };
235 };
236
237 vdd_10: LDO_REG3 {
238 regulator-always-on;
239 regulator-boot-on;
240 regulator-min-microvolt = <1000000>;
241 regulator-max-microvolt = <1000000>;
242 regulator-name = "vdd_10";
243 regulator-state-mem {
244 regulator-on-in-suspend;
245 regulator-suspend-microvolt = <1000000>;
246 };
247 };
248
249 vcc18_codec: LDO_REG4 {
250 regulator-always-on;
251 regulator-boot-on;
252 regulator-min-microvolt = <1800000>;
253 regulator-max-microvolt = <1800000>;
254 regulator-name = "vcc18_codec";
255 regulator-state-mem {
256 regulator-on-in-suspend;
257 regulator-suspend-microvolt = <1800000>;
258 };
259 };
260
261 vccio_sd: LDO_REG5 {
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <3300000>;
264 regulator-name = "vccio_sd";
265 regulator-state-mem {
266 regulator-on-in-suspend;
267 regulator-suspend-microvolt = <3300000>;
268 };
269 };
270
271 vdd10_lcd: LDO_REG6 {
272 regulator-always-on;
273 regulator-boot-on;
274 regulator-min-microvolt = <1000000>;
275 regulator-max-microvolt = <1000000>;
276 regulator-name = "vdd10_lcd";
277 regulator-state-mem {
278 regulator-on-in-suspend;
279 regulator-suspend-microvolt = <1000000>;
280 };
281 };
282
283 vcc_18: LDO_REG7 {
284 regulator-always-on;
285 regulator-boot-on;
286 regulator-min-microvolt = <1800000>;
287 regulator-max-microvolt = <1800000>;
288 regulator-name = "vcc_18";
289 regulator-state-mem {
290 regulator-on-in-suspend;
291 regulator-suspend-microvolt = <1800000>;
292 };
293 };
294
295 vcc18_lcd: LDO_REG8 {
296 regulator-always-on;
297 regulator-boot-on;
298 regulator-min-microvolt = <1800000>;
299 regulator-max-microvolt = <1800000>;
300 regulator-name = "vcc18_lcd";
301 regulator-state-mem {
302 regulator-on-in-suspend;
303 regulator-suspend-microvolt = <1800000>;
304 };
305 };
306
307 vcc33_sd: SWITCH_REG1 {
308 regulator-always-on;
309 regulator-boot-on;
310 regulator-name = "vcc33_sd";
311 regulator-state-mem {
312 regulator-on-in-suspend;
313 };
314 };
315
316 vcc33_lan: SWITCH_REG2 {
317 regulator-always-on;
318 regulator-boot-on;
319 regulator-name = "vcc33_lan";
320 regulator-state-mem {
321 regulator-on-in-suspend;
322 };
323 };
324 };
325 };
326};
327
328&i2c2 {
329 status = "okay";
330};
331
332&i2c5 {
333 status = "okay";
334};
335
336&i2s {
337 #sound-dai-cells = <0>;
338 status = "okay";
339};
340
341&io_domains {
342 status = "okay";
343
344 sdcard-supply = <&vccio_sd>;
345};
346
347&pinctrl {
348 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
349 drive-strength = <8>;
350 };
351
352 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
353 bias-pull-up;
354 drive-strength = <8>;
355 };
356
357 backlight {
358 bl_en: bl-en {
359 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
360 };
361 };
362
363 buttons {
364 pwrbtn: pwrbtn {
365 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
366 };
367 };
368
369 eth_phy {
370 eth_phy_pwr: eth-phy-pwr {
371 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
372 };
373 };
374
375 pmic {
376 pmic_int: pmic-int {
377 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
378 &pcfg_pull_up>;
379 };
380
381 dvs_1: dvs-1 {
382 rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
383 &pcfg_pull_down>;
384 };
385
386 dvs_2: dvs-2 {
387 rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
388 &pcfg_pull_down>;
389 };
390 };
391
392 sdmmc {
393 sdmmc_bus4: sdmmc-bus4 {
394 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
395 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
396 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
397 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
398 };
399
400 sdmmc_clk: sdmmc-clk {
401 rockchip,pins = <6 20 RK_FUNC_1 \
402 &pcfg_pull_none_drv_8ma>;
403 };
404
405 sdmmc_cmd: sdmmc-cmd {
406 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
407 };
408
409 sdmmc_pwr: sdmmc-pwr {
410 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
411 };
412 };
413
414 usb {
415 host_vbus_drv: host-vbus-drv {
416 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
417 };
418
419 pwr_3g: pwr-3g {
420 rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
421 };
422 };
423};
424
425&pwm0 {
426 status = "okay";
427};
428
429&saradc {
430 vref-supply = <&vcc18_ldo1>;
431 status ="okay";
432};
433
434&sdmmc {
435 bus-width = <4>;
436 cap-mmc-highspeed;
437 cap-sd-highspeed;
438 card-detect-delay = <200>;
439 disable-wp; /* wp not hooked up */
440 pinctrl-names = "default";
441 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
442 status = "okay";
443 vmmc-supply = <&vcc33_sd>;
444 vqmmc-supply = <&vccio_sd>;
445};
446
447&tsadc {
448 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
449 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
450 status = "okay";
451};
452
453&uart0 {
454 status = "okay";
455};
456
457&uart1 {
458 status = "okay";
459};
460
461&uart2 {
462 status = "okay";
463};
464
465&uart3 {
466 status = "okay";
467};
468
469&uart4 {
470 status = "okay";
471};
472
473&usbphy {
474 status = "okay";
475};
476
477&usb_host0_ehci {
478 status = "okay";
479};
480
481&usb_host1 {
482 status = "okay";
483};
484
485&usb_otg {
486 status= "okay";
487};
488
489&vopb {
490 status = "okay";
491};
492
493&vopb_mmu {
494 status = "okay";
495};
496
497&vopl {
498 status = "okay";
499};
500
501&vopl_mmu {
502 status = "okay";
503};
504
505&wdt {
506 status = "okay";
507}; 13};
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
new file mode 100644
index 000000000000..aa107ee41b8b
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -0,0 +1,502 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include "rk3288.dtsi"
7#include <dt-bindings/input/input.h>
8
9/ {
10 chosen {
11 stdout-path = "serial2:115200n8";
12 };
13
14 memory {
15 reg = <0x0 0x0 0x0 0x80000000>;
16 device_type = "memory";
17 };
18
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <125000000>;
23 clock-output-names = "ext_gmac";
24 };
25
26 gpio-keys {
27 compatible = "gpio-keys";
28 #address-cells = <1>;
29 #size-cells = <0>;
30 autorepeat;
31
32 pinctrl-names = "default";
33 pinctrl-0 = <&pwrbtn>;
34
35 button@0 {
36 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
37 linux,code = <KEY_POWER>;
38 label = "GPIO Key Power";
39 linux,input-type = <1>;
40 wakeup-source;
41 debounce-interval = <100>;
42 };
43 };
44
45 gpio-leds {
46 compatible = "gpio-leds";
47
48 act-led {
49 gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
50 linux,default-trigger="mmc0";
51 };
52
53 heartbeat-led {
54 gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger="heartbeat";
56 };
57
58 pwr-led {
59 gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
60 linux,default-trigger = "default-on";
61 };
62 };
63
64 sound {
65 compatible = "simple-audio-card";
66 simple-audio-card,format = "i2s";
67 simple-audio-card,name = "rockchip,tinker-codec";
68 simple-audio-card,mclk-fs = <512>;
69
70 simple-audio-card,codec {
71 sound-dai = <&hdmi>;
72 };
73
74 simple-audio-card,cpu {
75 sound-dai = <&i2s>;
76 };
77 };
78
79 vcc_sys: vsys-regulator {
80 compatible = "regulator-fixed";
81 regulator-name = "vcc_sys";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 regulator-always-on;
85 regulator-boot-on;
86 };
87
88 vcc_sd: sdmmc-regulator {
89 compatible = "regulator-fixed";
90 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&sdmmc_pwr>;
93 regulator-name = "vcc_sd";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96 startup-delay-us = <100000>;
97 vin-supply = <&vcc_io>;
98 };
99};
100
101&cpu0 {
102 cpu0-supply = <&vdd_cpu>;
103};
104
105&gmac {
106 assigned-clocks = <&cru SCLK_MAC>;
107 assigned-clock-parents = <&ext_gmac>;
108 clock_in_out = "input";
109 phy-mode = "rgmii";
110 phy-supply = <&vcc33_lan>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&rgmii_pins>;
113 snps,reset-gpio = <&gpio4 7 0>;
114 snps,reset-active-low;
115 snps,reset-delays-us = <0 10000 1000000>;
116 tx_delay = <0x30>;
117 rx_delay = <0x10>;
118 status = "ok";
119};
120
121&gpu {
122 mali-supply = <&vdd_gpu>;
123 status = "okay";
124};
125
126&hdmi {
127 ddc-i2c-bus = <&i2c5>;
128 status = "okay";
129};
130
131&i2c0 {
132 clock-frequency = <400000>;
133 status = "okay";
134
135 rk808: pmic@1b {
136 compatible = "rockchip,rk808";
137 reg = <0x1b>;
138 interrupt-parent = <&gpio0>;
139 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
140 #clock-cells = <1>;
141 clock-output-names = "xin32k", "rk808-clkout2";
142 dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
143 <&gpio0 12 GPIO_ACTIVE_HIGH>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
146 rockchip,system-power-controller;
147 wakeup-source;
148
149 vcc1-supply = <&vcc_sys>;
150 vcc2-supply = <&vcc_sys>;
151 vcc3-supply = <&vcc_sys>;
152 vcc4-supply = <&vcc_sys>;
153 vcc6-supply = <&vcc_sys>;
154 vcc7-supply = <&vcc_sys>;
155 vcc8-supply = <&vcc_io>;
156 vcc9-supply = <&vcc_io>;
157 vcc10-supply = <&vcc_io>;
158 vcc11-supply = <&vcc_sys>;
159 vcc12-supply = <&vcc_io>;
160 vddio-supply = <&vcc_io>;
161
162 regulators {
163 vdd_cpu: DCDC_REG1 {
164 regulator-always-on;
165 regulator-boot-on;
166 regulator-min-microvolt = <750000>;
167 regulator-max-microvolt = <1350000>;
168 regulator-name = "vdd_arm";
169 regulator-ramp-delay = <6000>;
170 regulator-state-mem {
171 regulator-off-in-suspend;
172 };
173 };
174
175 vdd_gpu: DCDC_REG2 {
176 regulator-always-on;
177 regulator-boot-on;
178 regulator-min-microvolt = <850000>;
179 regulator-max-microvolt = <1250000>;
180 regulator-name = "vdd_gpu";
181 regulator-ramp-delay = <6000>;
182 regulator-state-mem {
183 regulator-on-in-suspend;
184 regulator-suspend-microvolt = <1000000>;
185 };
186 };
187
188 vcc_ddr: DCDC_REG3 {
189 regulator-always-on;
190 regulator-boot-on;
191 regulator-name = "vcc_ddr";
192 regulator-state-mem {
193 regulator-on-in-suspend;
194 };
195 };
196
197 vcc_io: DCDC_REG4 {
198 regulator-always-on;
199 regulator-boot-on;
200 regulator-min-microvolt = <3300000>;
201 regulator-max-microvolt = <3300000>;
202 regulator-name = "vcc_io";
203 regulator-state-mem {
204 regulator-on-in-suspend;
205 regulator-suspend-microvolt = <3300000>;
206 };
207 };
208
209 vcc18_ldo1: LDO_REG1 {
210 regulator-always-on;
211 regulator-boot-on;
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <1800000>;
214 regulator-name = "vcc18_ldo1";
215 regulator-state-mem {
216 regulator-on-in-suspend;
217 regulator-suspend-microvolt = <1800000>;
218 };
219 };
220
221 vcc33_mipi: LDO_REG2 {
222 regulator-always-on;
223 regulator-boot-on;
224 regulator-min-microvolt = <3300000>;
225 regulator-max-microvolt = <3300000>;
226 regulator-name = "vcc33_mipi";
227 regulator-state-mem {
228 regulator-off-in-suspend;
229 };
230 };
231
232 vdd_10: LDO_REG3 {
233 regulator-always-on;
234 regulator-boot-on;
235 regulator-min-microvolt = <1000000>;
236 regulator-max-microvolt = <1000000>;
237 regulator-name = "vdd_10";
238 regulator-state-mem {
239 regulator-on-in-suspend;
240 regulator-suspend-microvolt = <1000000>;
241 };
242 };
243
244 vcc18_codec: LDO_REG4 {
245 regulator-always-on;
246 regulator-boot-on;
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <1800000>;
249 regulator-name = "vcc18_codec";
250 regulator-state-mem {
251 regulator-on-in-suspend;
252 regulator-suspend-microvolt = <1800000>;
253 };
254 };
255
256 vccio_sd: LDO_REG5 {
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <3300000>;
259 regulator-name = "vccio_sd";
260 regulator-state-mem {
261 regulator-on-in-suspend;
262 regulator-suspend-microvolt = <3300000>;
263 };
264 };
265
266 vdd10_lcd: LDO_REG6 {
267 regulator-always-on;
268 regulator-boot-on;
269 regulator-min-microvolt = <1000000>;
270 regulator-max-microvolt = <1000000>;
271 regulator-name = "vdd10_lcd";
272 regulator-state-mem {
273 regulator-on-in-suspend;
274 regulator-suspend-microvolt = <1000000>;
275 };
276 };
277
278 vcc_18: LDO_REG7 {
279 regulator-always-on;
280 regulator-boot-on;
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
283 regulator-name = "vcc_18";
284 regulator-state-mem {
285 regulator-on-in-suspend;
286 regulator-suspend-microvolt = <1800000>;
287 };
288 };
289
290 vcc18_lcd: LDO_REG8 {
291 regulator-always-on;
292 regulator-boot-on;
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-name = "vcc18_lcd";
296 regulator-state-mem {
297 regulator-on-in-suspend;
298 regulator-suspend-microvolt = <1800000>;
299 };
300 };
301
302 vcc33_sd: SWITCH_REG1 {
303 regulator-always-on;
304 regulator-boot-on;
305 regulator-name = "vcc33_sd";
306 regulator-state-mem {
307 regulator-on-in-suspend;
308 };
309 };
310
311 vcc33_lan: SWITCH_REG2 {
312 regulator-always-on;
313 regulator-boot-on;
314 regulator-name = "vcc33_lan";
315 regulator-state-mem {
316 regulator-on-in-suspend;
317 };
318 };
319 };
320 };
321};
322
323&i2c2 {
324 status = "okay";
325};
326
327&i2c5 {
328 status = "okay";
329};
330
331&i2s {
332 #sound-dai-cells = <0>;
333 status = "okay";
334};
335
336&io_domains {
337 status = "okay";
338
339 sdcard-supply = <&vccio_sd>;
340};
341
342&pinctrl {
343 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
344 drive-strength = <8>;
345 };
346
347 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
348 bias-pull-up;
349 drive-strength = <8>;
350 };
351
352 backlight {
353 bl_en: bl-en {
354 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
355 };
356 };
357
358 buttons {
359 pwrbtn: pwrbtn {
360 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
361 };
362 };
363
364 eth_phy {
365 eth_phy_pwr: eth-phy-pwr {
366 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
367 };
368 };
369
370 pmic {
371 pmic_int: pmic-int {
372 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
373 &pcfg_pull_up>;
374 };
375
376 dvs_1: dvs-1 {
377 rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
378 &pcfg_pull_down>;
379 };
380
381 dvs_2: dvs-2 {
382 rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
383 &pcfg_pull_down>;
384 };
385 };
386
387 sdmmc {
388 sdmmc_bus4: sdmmc-bus4 {
389 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
390 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
391 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
392 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
393 };
394
395 sdmmc_clk: sdmmc-clk {
396 rockchip,pins = <6 20 RK_FUNC_1 \
397 &pcfg_pull_none_drv_8ma>;
398 };
399
400 sdmmc_cmd: sdmmc-cmd {
401 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
402 };
403
404 sdmmc_pwr: sdmmc-pwr {
405 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
406 };
407 };
408
409 usb {
410 host_vbus_drv: host-vbus-drv {
411 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
412 };
413
414 pwr_3g: pwr-3g {
415 rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
416 };
417 };
418};
419
420&pwm0 {
421 status = "okay";
422};
423
424&saradc {
425 vref-supply = <&vcc18_ldo1>;
426 status ="okay";
427};
428
429&sdmmc {
430 bus-width = <4>;
431 cap-mmc-highspeed;
432 cap-sd-highspeed;
433 card-detect-delay = <200>;
434 disable-wp; /* wp not hooked up */
435 pinctrl-names = "default";
436 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
437 status = "okay";
438 vmmc-supply = <&vcc33_sd>;
439 vqmmc-supply = <&vccio_sd>;
440};
441
442&tsadc {
443 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
444 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
445 status = "okay";
446};
447
448&uart0 {
449 status = "okay";
450};
451
452&uart1 {
453 status = "okay";
454};
455
456&uart2 {
457 status = "okay";
458};
459
460&uart3 {
461 status = "okay";
462};
463
464&uart4 {
465 status = "okay";
466};
467
468&usbphy {
469 status = "okay";
470};
471
472&usb_host0_ehci {
473 status = "okay";
474};
475
476&usb_host1 {
477 status = "okay";
478};
479
480&usb_otg {
481 status= "okay";
482};
483
484&vopb {
485 status = "okay";
486};
487
488&vopb_mmu {
489 status = "okay";
490};
491
492&vopl {
493 status = "okay";
494};
495
496&vopl_mmu {
497 status = "okay";
498};
499
500&wdt {
501 status = "okay";
502};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-26 06:34:11 -0400