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authorHeiko Stuebner <heiko@sntech.de>2017-09-15 04:33:49 -0400
committerHeiko Stuebner <heiko@sntech.de>2017-10-14 15:30:22 -0400
commit4e07533f30e8e2d4447fc4e159d34b4068d96efc (patch)
tree15a7d977e116fa92adab3624f6f99945dbb8264c
parent8c04f7a3e347cb2a00074d197f5cd5b25c6fe383 (diff)
clk: rockchip: add more rk3188 graphics clock ids
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed 1 at it's end but that should be safe because no driver for the camera interface has surfaced so far and the old vendor kernels for these socs are based on linux-3.0 and still used board files then, so there really are no previous users anywhere to be found. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--include/dt-bindings/clock/rk3188-cru-common.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/rk3188-cru-common.h b/include/dt-bindings/clock/rk3188-cru-common.h
index eff4319d008b..b9462b7d3dfe 100644
--- a/include/dt-bindings/clock/rk3188-cru-common.h
+++ b/include/dt-bindings/clock/rk3188-cru-common.h
@@ -68,12 +68,14 @@
68#define ACLK_LCDC1 196 68#define ACLK_LCDC1 196
69#define ACLK_GPU 197 69#define ACLK_GPU 197
70#define ACLK_SMC 198 70#define ACLK_SMC 198
71#define ACLK_CIF 199 71#define ACLK_CIF1 199
72#define ACLK_IPP 200 72#define ACLK_IPP 200
73#define ACLK_RGA 201 73#define ACLK_RGA 201
74#define ACLK_CIF0 202 74#define ACLK_CIF0 202
75#define ACLK_CPU 203 75#define ACLK_CPU 203
76#define ACLK_PERI 204 76#define ACLK_PERI 204
77#define ACLK_VEPU 205
78#define ACLK_VDPU 206
77 79
78/* pclk gates */ 80/* pclk gates */
79#define PCLK_GRF 320 81#define PCLK_GRF 320
@@ -134,8 +136,11 @@
134#define HCLK_NANDC0 467 136#define HCLK_NANDC0 467
135#define HCLK_CPU 468 137#define HCLK_CPU 468
136#define HCLK_PERI 469 138#define HCLK_PERI 469
139#define HCLK_CIF1 470
140#define HCLK_VEPU 471
141#define HCLK_VDPU 472
137 142
138#define CLK_NR_CLKS (HCLK_PERI + 1) 143#define CLK_NR_CLKS (HCLK_VDPU + 1)
139 144
140/* soft-reset indices */ 145/* soft-reset indices */
141#define SRST_MCORE 2 146#define SRST_MCORE 2