diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2018-01-28 23:07:45 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2018-02-12 04:49:43 -0500 |
commit | 3f64507697e32c2f491224f9f0656be5ae5d6d15 (patch) | |
tree | acbcf1ce00dc4ed3e4d241dccc1ccd2af2cae25d | |
parent | 7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff) |
ASoC: max98088: replace codec to component
Now we can replace Codec to Component. Let's do it.
Note:
xxx_codec_xxx() -> xxx_component_xxx()
.idle_bias_off = 0 -> .idle_bias_on = 1
.ignore_pmdown_time = 0 -> .use_pmdown_time = 1
- -> .endianness = 1
- -> .non_legacy_dai_naming = 1
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/max98088.c | 314 |
1 files changed, 153 insertions, 161 deletions
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index f0bb830874e5..865f64c40b79 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c | |||
@@ -307,7 +307,7 @@ static const struct regmap_config max98088_regmap = { | |||
307 | /* | 307 | /* |
308 | * Load equalizer DSP coefficient configurations registers | 308 | * Load equalizer DSP coefficient configurations registers |
309 | */ | 309 | */ |
310 | static void m98088_eq_band(struct snd_soc_codec *codec, unsigned int dai, | 310 | static void m98088_eq_band(struct snd_soc_component *component, unsigned int dai, |
311 | unsigned int band, u16 *coefs) | 311 | unsigned int band, u16 *coefs) |
312 | { | 312 | { |
313 | unsigned int eq_reg; | 313 | unsigned int eq_reg; |
@@ -325,8 +325,8 @@ static void m98088_eq_band(struct snd_soc_codec *codec, unsigned int dai, | |||
325 | 325 | ||
326 | /* Step through the registers and coefs */ | 326 | /* Step through the registers and coefs */ |
327 | for (i = 0; i < M98088_COEFS_PER_BAND; i++) { | 327 | for (i = 0; i < M98088_COEFS_PER_BAND; i++) { |
328 | snd_soc_write(codec, eq_reg++, M98088_BYTE1(coefs[i])); | 328 | snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); |
329 | snd_soc_write(codec, eq_reg++, M98088_BYTE0(coefs[i])); | 329 | snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); |
330 | } | 330 | } |
331 | } | 331 | } |
332 | 332 | ||
@@ -380,12 +380,12 @@ static SOC_ENUM_SINGLE_DECL(max98088_dai1_adc_filter_enum, | |||
380 | static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol, | 380 | static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol, |
381 | struct snd_ctl_elem_value *ucontrol) | 381 | struct snd_ctl_elem_value *ucontrol) |
382 | { | 382 | { |
383 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 383 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
384 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 384 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
385 | unsigned int sel = ucontrol->value.integer.value[0]; | 385 | unsigned int sel = ucontrol->value.integer.value[0]; |
386 | 386 | ||
387 | max98088->mic1pre = sel; | 387 | max98088->mic1pre = sel; |
388 | snd_soc_update_bits(codec, M98088_REG_35_LVL_MIC1, M98088_MICPRE_MASK, | 388 | snd_soc_component_update_bits(component, M98088_REG_35_LVL_MIC1, M98088_MICPRE_MASK, |
389 | (1+sel)<<M98088_MICPRE_SHIFT); | 389 | (1+sel)<<M98088_MICPRE_SHIFT); |
390 | 390 | ||
391 | return 0; | 391 | return 0; |
@@ -394,8 +394,8 @@ static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol, | |||
394 | static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol, | 394 | static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol, |
395 | struct snd_ctl_elem_value *ucontrol) | 395 | struct snd_ctl_elem_value *ucontrol) |
396 | { | 396 | { |
397 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 397 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
398 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 398 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
399 | 399 | ||
400 | ucontrol->value.integer.value[0] = max98088->mic1pre; | 400 | ucontrol->value.integer.value[0] = max98088->mic1pre; |
401 | return 0; | 401 | return 0; |
@@ -404,12 +404,12 @@ static int max98088_mic1pre_get(struct snd_kcontrol *kcontrol, | |||
404 | static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol, | 404 | static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol, |
405 | struct snd_ctl_elem_value *ucontrol) | 405 | struct snd_ctl_elem_value *ucontrol) |
406 | { | 406 | { |
407 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 407 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
408 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 408 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
409 | unsigned int sel = ucontrol->value.integer.value[0]; | 409 | unsigned int sel = ucontrol->value.integer.value[0]; |
410 | 410 | ||
411 | max98088->mic2pre = sel; | 411 | max98088->mic2pre = sel; |
412 | snd_soc_update_bits(codec, M98088_REG_36_LVL_MIC2, M98088_MICPRE_MASK, | 412 | snd_soc_component_update_bits(component, M98088_REG_36_LVL_MIC2, M98088_MICPRE_MASK, |
413 | (1+sel)<<M98088_MICPRE_SHIFT); | 413 | (1+sel)<<M98088_MICPRE_SHIFT); |
414 | 414 | ||
415 | return 0; | 415 | return 0; |
@@ -418,8 +418,8 @@ static int max98088_mic2pre_set(struct snd_kcontrol *kcontrol, | |||
418 | static int max98088_mic2pre_get(struct snd_kcontrol *kcontrol, | 418 | static int max98088_mic2pre_get(struct snd_kcontrol *kcontrol, |
419 | struct snd_ctl_elem_value *ucontrol) | 419 | struct snd_ctl_elem_value *ucontrol) |
420 | { | 420 | { |
421 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 421 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
422 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 422 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
423 | 423 | ||
424 | ucontrol->value.integer.value[0] = max98088->mic2pre; | 424 | ucontrol->value.integer.value[0] = max98088->mic2pre; |
425 | return 0; | 425 | return 0; |
@@ -617,21 +617,21 @@ static const struct snd_kcontrol_new max98088_right_ADC_mixer_controls[] = { | |||
617 | static int max98088_mic_event(struct snd_soc_dapm_widget *w, | 617 | static int max98088_mic_event(struct snd_soc_dapm_widget *w, |
618 | struct snd_kcontrol *kcontrol, int event) | 618 | struct snd_kcontrol *kcontrol, int event) |
619 | { | 619 | { |
620 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 620 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
621 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 621 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
622 | 622 | ||
623 | switch (event) { | 623 | switch (event) { |
624 | case SND_SOC_DAPM_POST_PMU: | 624 | case SND_SOC_DAPM_POST_PMU: |
625 | if (w->reg == M98088_REG_35_LVL_MIC1) { | 625 | if (w->reg == M98088_REG_35_LVL_MIC1) { |
626 | snd_soc_update_bits(codec, w->reg, M98088_MICPRE_MASK, | 626 | snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, |
627 | (1+max98088->mic1pre)<<M98088_MICPRE_SHIFT); | 627 | (1+max98088->mic1pre)<<M98088_MICPRE_SHIFT); |
628 | } else { | 628 | } else { |
629 | snd_soc_update_bits(codec, w->reg, M98088_MICPRE_MASK, | 629 | snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, |
630 | (1+max98088->mic2pre)<<M98088_MICPRE_SHIFT); | 630 | (1+max98088->mic2pre)<<M98088_MICPRE_SHIFT); |
631 | } | 631 | } |
632 | break; | 632 | break; |
633 | case SND_SOC_DAPM_POST_PMD: | 633 | case SND_SOC_DAPM_POST_PMD: |
634 | snd_soc_update_bits(codec, w->reg, M98088_MICPRE_MASK, 0); | 634 | snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, 0); |
635 | break; | 635 | break; |
636 | default: | 636 | default: |
637 | return -EINVAL; | 637 | return -EINVAL; |
@@ -647,8 +647,8 @@ static int max98088_mic_event(struct snd_soc_dapm_widget *w, | |||
647 | static int max98088_line_pga(struct snd_soc_dapm_widget *w, | 647 | static int max98088_line_pga(struct snd_soc_dapm_widget *w, |
648 | int event, int line, u8 channel) | 648 | int event, int line, u8 channel) |
649 | { | 649 | { |
650 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 650 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
651 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 651 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
652 | u8 *state; | 652 | u8 *state; |
653 | 653 | ||
654 | if (WARN_ON(!(channel == 1 || channel == 2))) | 654 | if (WARN_ON(!(channel == 1 || channel == 2))) |
@@ -668,13 +668,13 @@ static int max98088_line_pga(struct snd_soc_dapm_widget *w, | |||
668 | switch (event) { | 668 | switch (event) { |
669 | case SND_SOC_DAPM_POST_PMU: | 669 | case SND_SOC_DAPM_POST_PMU: |
670 | *state |= channel; | 670 | *state |= channel; |
671 | snd_soc_update_bits(codec, w->reg, | 671 | snd_soc_component_update_bits(component, w->reg, |
672 | (1 << w->shift), (1 << w->shift)); | 672 | (1 << w->shift), (1 << w->shift)); |
673 | break; | 673 | break; |
674 | case SND_SOC_DAPM_POST_PMD: | 674 | case SND_SOC_DAPM_POST_PMD: |
675 | *state &= ~channel; | 675 | *state &= ~channel; |
676 | if (*state == 0) { | 676 | if (*state == 0) { |
677 | snd_soc_update_bits(codec, w->reg, | 677 | snd_soc_component_update_bits(component, w->reg, |
678 | (1 << w->shift), 0); | 678 | (1 << w->shift), 0); |
679 | } | 679 | } |
680 | break; | 680 | break; |
@@ -963,8 +963,8 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream, | |||
963 | struct snd_pcm_hw_params *params, | 963 | struct snd_pcm_hw_params *params, |
964 | struct snd_soc_dai *dai) | 964 | struct snd_soc_dai *dai) |
965 | { | 965 | { |
966 | struct snd_soc_codec *codec = dai->codec; | 966 | struct snd_soc_component *component = dai->component; |
967 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 967 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
968 | struct max98088_cdata *cdata; | 968 | struct max98088_cdata *cdata; |
969 | unsigned long long ni; | 969 | unsigned long long ni; |
970 | unsigned int rate; | 970 | unsigned int rate; |
@@ -976,51 +976,51 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream, | |||
976 | 976 | ||
977 | switch (params_width(params)) { | 977 | switch (params_width(params)) { |
978 | case 16: | 978 | case 16: |
979 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, | 979 | snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, |
980 | M98088_DAI_WS, 0); | 980 | M98088_DAI_WS, 0); |
981 | break; | 981 | break; |
982 | case 24: | 982 | case 24: |
983 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, | 983 | snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, |
984 | M98088_DAI_WS, M98088_DAI_WS); | 984 | M98088_DAI_WS, M98088_DAI_WS); |
985 | break; | 985 | break; |
986 | default: | 986 | default: |
987 | return -EINVAL; | 987 | return -EINVAL; |
988 | } | 988 | } |
989 | 989 | ||
990 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); | 990 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); |
991 | 991 | ||
992 | if (rate_value(rate, ®val)) | 992 | if (rate_value(rate, ®val)) |
993 | return -EINVAL; | 993 | return -EINVAL; |
994 | 994 | ||
995 | snd_soc_update_bits(codec, M98088_REG_11_DAI1_CLKMODE, | 995 | snd_soc_component_update_bits(component, M98088_REG_11_DAI1_CLKMODE, |
996 | M98088_CLKMODE_MASK, regval); | 996 | M98088_CLKMODE_MASK, regval); |
997 | cdata->rate = rate; | 997 | cdata->rate = rate; |
998 | 998 | ||
999 | /* Configure NI when operating as master */ | 999 | /* Configure NI when operating as master */ |
1000 | if (snd_soc_read(codec, M98088_REG_14_DAI1_FORMAT) | 1000 | if (snd_soc_component_read32(component, M98088_REG_14_DAI1_FORMAT) |
1001 | & M98088_DAI_MAS) { | 1001 | & M98088_DAI_MAS) { |
1002 | if (max98088->sysclk == 0) { | 1002 | if (max98088->sysclk == 0) { |
1003 | dev_err(codec->dev, "Invalid system clock frequency\n"); | 1003 | dev_err(component->dev, "Invalid system clock frequency\n"); |
1004 | return -EINVAL; | 1004 | return -EINVAL; |
1005 | } | 1005 | } |
1006 | ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) | 1006 | ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) |
1007 | * (unsigned long long int)rate; | 1007 | * (unsigned long long int)rate; |
1008 | do_div(ni, (unsigned long long int)max98088->sysclk); | 1008 | do_div(ni, (unsigned long long int)max98088->sysclk); |
1009 | snd_soc_write(codec, M98088_REG_12_DAI1_CLKCFG_HI, | 1009 | snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, |
1010 | (ni >> 8) & 0x7F); | 1010 | (ni >> 8) & 0x7F); |
1011 | snd_soc_write(codec, M98088_REG_13_DAI1_CLKCFG_LO, | 1011 | snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, |
1012 | ni & 0xFF); | 1012 | ni & 0xFF); |
1013 | } | 1013 | } |
1014 | 1014 | ||
1015 | /* Update sample rate mode */ | 1015 | /* Update sample rate mode */ |
1016 | if (rate < 50000) | 1016 | if (rate < 50000) |
1017 | snd_soc_update_bits(codec, M98088_REG_18_DAI1_FILTERS, | 1017 | snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, |
1018 | M98088_DAI_DHF, 0); | 1018 | M98088_DAI_DHF, 0); |
1019 | else | 1019 | else |
1020 | snd_soc_update_bits(codec, M98088_REG_18_DAI1_FILTERS, | 1020 | snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, |
1021 | M98088_DAI_DHF, M98088_DAI_DHF); | 1021 | M98088_DAI_DHF, M98088_DAI_DHF); |
1022 | 1022 | ||
1023 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, | 1023 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, |
1024 | M98088_SHDNRUN); | 1024 | M98088_SHDNRUN); |
1025 | 1025 | ||
1026 | return 0; | 1026 | return 0; |
@@ -1030,8 +1030,8 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, | |||
1030 | struct snd_pcm_hw_params *params, | 1030 | struct snd_pcm_hw_params *params, |
1031 | struct snd_soc_dai *dai) | 1031 | struct snd_soc_dai *dai) |
1032 | { | 1032 | { |
1033 | struct snd_soc_codec *codec = dai->codec; | 1033 | struct snd_soc_component *component = dai->component; |
1034 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1034 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1035 | struct max98088_cdata *cdata; | 1035 | struct max98088_cdata *cdata; |
1036 | unsigned long long ni; | 1036 | unsigned long long ni; |
1037 | unsigned int rate; | 1037 | unsigned int rate; |
@@ -1043,51 +1043,51 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, | |||
1043 | 1043 | ||
1044 | switch (params_width(params)) { | 1044 | switch (params_width(params)) { |
1045 | case 16: | 1045 | case 16: |
1046 | snd_soc_update_bits(codec, M98088_REG_1C_DAI2_FORMAT, | 1046 | snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, |
1047 | M98088_DAI_WS, 0); | 1047 | M98088_DAI_WS, 0); |
1048 | break; | 1048 | break; |
1049 | case 24: | 1049 | case 24: |
1050 | snd_soc_update_bits(codec, M98088_REG_1C_DAI2_FORMAT, | 1050 | snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, |
1051 | M98088_DAI_WS, M98088_DAI_WS); | 1051 | M98088_DAI_WS, M98088_DAI_WS); |
1052 | break; | 1052 | break; |
1053 | default: | 1053 | default: |
1054 | return -EINVAL; | 1054 | return -EINVAL; |
1055 | } | 1055 | } |
1056 | 1056 | ||
1057 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); | 1057 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); |
1058 | 1058 | ||
1059 | if (rate_value(rate, ®val)) | 1059 | if (rate_value(rate, ®val)) |
1060 | return -EINVAL; | 1060 | return -EINVAL; |
1061 | 1061 | ||
1062 | snd_soc_update_bits(codec, M98088_REG_19_DAI2_CLKMODE, | 1062 | snd_soc_component_update_bits(component, M98088_REG_19_DAI2_CLKMODE, |
1063 | M98088_CLKMODE_MASK, regval); | 1063 | M98088_CLKMODE_MASK, regval); |
1064 | cdata->rate = rate; | 1064 | cdata->rate = rate; |
1065 | 1065 | ||
1066 | /* Configure NI when operating as master */ | 1066 | /* Configure NI when operating as master */ |
1067 | if (snd_soc_read(codec, M98088_REG_1C_DAI2_FORMAT) | 1067 | if (snd_soc_component_read32(component, M98088_REG_1C_DAI2_FORMAT) |
1068 | & M98088_DAI_MAS) { | 1068 | & M98088_DAI_MAS) { |
1069 | if (max98088->sysclk == 0) { | 1069 | if (max98088->sysclk == 0) { |
1070 | dev_err(codec->dev, "Invalid system clock frequency\n"); | 1070 | dev_err(component->dev, "Invalid system clock frequency\n"); |
1071 | return -EINVAL; | 1071 | return -EINVAL; |
1072 | } | 1072 | } |
1073 | ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) | 1073 | ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) |
1074 | * (unsigned long long int)rate; | 1074 | * (unsigned long long int)rate; |
1075 | do_div(ni, (unsigned long long int)max98088->sysclk); | 1075 | do_div(ni, (unsigned long long int)max98088->sysclk); |
1076 | snd_soc_write(codec, M98088_REG_1A_DAI2_CLKCFG_HI, | 1076 | snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, |
1077 | (ni >> 8) & 0x7F); | 1077 | (ni >> 8) & 0x7F); |
1078 | snd_soc_write(codec, M98088_REG_1B_DAI2_CLKCFG_LO, | 1078 | snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, |
1079 | ni & 0xFF); | 1079 | ni & 0xFF); |
1080 | } | 1080 | } |
1081 | 1081 | ||
1082 | /* Update sample rate mode */ | 1082 | /* Update sample rate mode */ |
1083 | if (rate < 50000) | 1083 | if (rate < 50000) |
1084 | snd_soc_update_bits(codec, M98088_REG_20_DAI2_FILTERS, | 1084 | snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, |
1085 | M98088_DAI_DHF, 0); | 1085 | M98088_DAI_DHF, 0); |
1086 | else | 1086 | else |
1087 | snd_soc_update_bits(codec, M98088_REG_20_DAI2_FILTERS, | 1087 | snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, |
1088 | M98088_DAI_DHF, M98088_DAI_DHF); | 1088 | M98088_DAI_DHF, M98088_DAI_DHF); |
1089 | 1089 | ||
1090 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, | 1090 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, |
1091 | M98088_SHDNRUN); | 1091 | M98088_SHDNRUN); |
1092 | 1092 | ||
1093 | return 0; | 1093 | return 0; |
@@ -1096,8 +1096,8 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, | |||
1096 | static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, | 1096 | static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, |
1097 | int clk_id, unsigned int freq, int dir) | 1097 | int clk_id, unsigned int freq, int dir) |
1098 | { | 1098 | { |
1099 | struct snd_soc_codec *codec = dai->codec; | 1099 | struct snd_soc_component *component = dai->component; |
1100 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1100 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1101 | 1101 | ||
1102 | /* Requested clock frequency is already setup */ | 1102 | /* Requested clock frequency is already setup */ |
1103 | if (freq == max98088->sysclk) | 1103 | if (freq == max98088->sysclk) |
@@ -1108,18 +1108,18 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, | |||
1108 | * 0x02 (when master clk is 20MHz to 30MHz).. | 1108 | * 0x02 (when master clk is 20MHz to 30MHz).. |
1109 | */ | 1109 | */ |
1110 | if ((freq >= 10000000) && (freq < 20000000)) { | 1110 | if ((freq >= 10000000) && (freq < 20000000)) { |
1111 | snd_soc_write(codec, M98088_REG_10_SYS_CLK, 0x10); | 1111 | snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); |
1112 | } else if ((freq >= 20000000) && (freq < 30000000)) { | 1112 | } else if ((freq >= 20000000) && (freq < 30000000)) { |
1113 | snd_soc_write(codec, M98088_REG_10_SYS_CLK, 0x20); | 1113 | snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); |
1114 | } else { | 1114 | } else { |
1115 | dev_err(codec->dev, "Invalid master clock frequency\n"); | 1115 | dev_err(component->dev, "Invalid master clock frequency\n"); |
1116 | return -EINVAL; | 1116 | return -EINVAL; |
1117 | } | 1117 | } |
1118 | 1118 | ||
1119 | if (snd_soc_read(codec, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) { | 1119 | if (snd_soc_component_read32(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) { |
1120 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, | 1120 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, |
1121 | M98088_SHDNRUN, 0); | 1121 | M98088_SHDNRUN, 0); |
1122 | snd_soc_update_bits(codec, M98088_REG_51_PWR_SYS, | 1122 | snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, |
1123 | M98088_SHDNRUN, M98088_SHDNRUN); | 1123 | M98088_SHDNRUN, M98088_SHDNRUN); |
1124 | } | 1124 | } |
1125 | 1125 | ||
@@ -1132,8 +1132,8 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, | |||
1132 | static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, | 1132 | static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, |
1133 | unsigned int fmt) | 1133 | unsigned int fmt) |
1134 | { | 1134 | { |
1135 | struct snd_soc_codec *codec = codec_dai->codec; | 1135 | struct snd_soc_component *component = codec_dai->component; |
1136 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1136 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1137 | struct max98088_cdata *cdata; | 1137 | struct max98088_cdata *cdata; |
1138 | u8 reg15val; | 1138 | u8 reg15val; |
1139 | u8 reg14val = 0; | 1139 | u8 reg14val = 0; |
@@ -1146,9 +1146,9 @@ static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, | |||
1146 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 1146 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
1147 | case SND_SOC_DAIFMT_CBS_CFS: | 1147 | case SND_SOC_DAIFMT_CBS_CFS: |
1148 | /* Slave mode PLL */ | 1148 | /* Slave mode PLL */ |
1149 | snd_soc_write(codec, M98088_REG_12_DAI1_CLKCFG_HI, | 1149 | snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, |
1150 | 0x80); | 1150 | 0x80); |
1151 | snd_soc_write(codec, M98088_REG_13_DAI1_CLKCFG_LO, | 1151 | snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, |
1152 | 0x00); | 1152 | 0x00); |
1153 | break; | 1153 | break; |
1154 | case SND_SOC_DAIFMT_CBM_CFM: | 1154 | case SND_SOC_DAIFMT_CBM_CFM: |
@@ -1158,7 +1158,7 @@ static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, | |||
1158 | case SND_SOC_DAIFMT_CBS_CFM: | 1158 | case SND_SOC_DAIFMT_CBS_CFM: |
1159 | case SND_SOC_DAIFMT_CBM_CFS: | 1159 | case SND_SOC_DAIFMT_CBM_CFS: |
1160 | default: | 1160 | default: |
1161 | dev_err(codec->dev, "Clock mode unsupported"); | 1161 | dev_err(component->dev, "Clock mode unsupported"); |
1162 | return -EINVAL; | 1162 | return -EINVAL; |
1163 | } | 1163 | } |
1164 | 1164 | ||
@@ -1188,14 +1188,14 @@ static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, | |||
1188 | return -EINVAL; | 1188 | return -EINVAL; |
1189 | } | 1189 | } |
1190 | 1190 | ||
1191 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, | 1191 | snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, |
1192 | M98088_DAI_MAS | M98088_DAI_DLY | M98088_DAI_BCI | | 1192 | M98088_DAI_MAS | M98088_DAI_DLY | M98088_DAI_BCI | |
1193 | M98088_DAI_WCI, reg14val); | 1193 | M98088_DAI_WCI, reg14val); |
1194 | 1194 | ||
1195 | reg15val = M98088_DAI_BSEL64; | 1195 | reg15val = M98088_DAI_BSEL64; |
1196 | if (max98088->digmic) | 1196 | if (max98088->digmic) |
1197 | reg15val |= M98088_DAI_OSR64; | 1197 | reg15val |= M98088_DAI_OSR64; |
1198 | snd_soc_write(codec, M98088_REG_15_DAI1_CLOCK, reg15val); | 1198 | snd_soc_component_write(component, M98088_REG_15_DAI1_CLOCK, reg15val); |
1199 | } | 1199 | } |
1200 | 1200 | ||
1201 | return 0; | 1201 | return 0; |
@@ -1204,8 +1204,8 @@ static int max98088_dai1_set_fmt(struct snd_soc_dai *codec_dai, | |||
1204 | static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, | 1204 | static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, |
1205 | unsigned int fmt) | 1205 | unsigned int fmt) |
1206 | { | 1206 | { |
1207 | struct snd_soc_codec *codec = codec_dai->codec; | 1207 | struct snd_soc_component *component = codec_dai->component; |
1208 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1208 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1209 | struct max98088_cdata *cdata; | 1209 | struct max98088_cdata *cdata; |
1210 | u8 reg1Cval = 0; | 1210 | u8 reg1Cval = 0; |
1211 | 1211 | ||
@@ -1217,9 +1217,9 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, | |||
1217 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 1217 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
1218 | case SND_SOC_DAIFMT_CBS_CFS: | 1218 | case SND_SOC_DAIFMT_CBS_CFS: |
1219 | /* Slave mode PLL */ | 1219 | /* Slave mode PLL */ |
1220 | snd_soc_write(codec, M98088_REG_1A_DAI2_CLKCFG_HI, | 1220 | snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, |
1221 | 0x80); | 1221 | 0x80); |
1222 | snd_soc_write(codec, M98088_REG_1B_DAI2_CLKCFG_LO, | 1222 | snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, |
1223 | 0x00); | 1223 | 0x00); |
1224 | break; | 1224 | break; |
1225 | case SND_SOC_DAIFMT_CBM_CFM: | 1225 | case SND_SOC_DAIFMT_CBM_CFM: |
@@ -1229,7 +1229,7 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, | |||
1229 | case SND_SOC_DAIFMT_CBS_CFM: | 1229 | case SND_SOC_DAIFMT_CBS_CFM: |
1230 | case SND_SOC_DAIFMT_CBM_CFS: | 1230 | case SND_SOC_DAIFMT_CBM_CFS: |
1231 | default: | 1231 | default: |
1232 | dev_err(codec->dev, "Clock mode unsupported"); | 1232 | dev_err(component->dev, "Clock mode unsupported"); |
1233 | return -EINVAL; | 1233 | return -EINVAL; |
1234 | } | 1234 | } |
1235 | 1235 | ||
@@ -1259,11 +1259,11 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, | |||
1259 | return -EINVAL; | 1259 | return -EINVAL; |
1260 | } | 1260 | } |
1261 | 1261 | ||
1262 | snd_soc_update_bits(codec, M98088_REG_1C_DAI2_FORMAT, | 1262 | snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, |
1263 | M98088_DAI_MAS | M98088_DAI_DLY | M98088_DAI_BCI | | 1263 | M98088_DAI_MAS | M98088_DAI_DLY | M98088_DAI_BCI | |
1264 | M98088_DAI_WCI, reg1Cval); | 1264 | M98088_DAI_WCI, reg1Cval); |
1265 | 1265 | ||
1266 | snd_soc_write(codec, M98088_REG_1D_DAI2_CLOCK, | 1266 | snd_soc_component_write(component, M98088_REG_1D_DAI2_CLOCK, |
1267 | M98088_DAI_BSEL64); | 1267 | M98088_DAI_BSEL64); |
1268 | } | 1268 | } |
1269 | 1269 | ||
@@ -1272,7 +1272,7 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai, | |||
1272 | 1272 | ||
1273 | static int max98088_dai1_digital_mute(struct snd_soc_dai *codec_dai, int mute) | 1273 | static int max98088_dai1_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
1274 | { | 1274 | { |
1275 | struct snd_soc_codec *codec = codec_dai->codec; | 1275 | struct snd_soc_component *component = codec_dai->component; |
1276 | int reg; | 1276 | int reg; |
1277 | 1277 | ||
1278 | if (mute) | 1278 | if (mute) |
@@ -1280,14 +1280,14 @@ static int max98088_dai1_digital_mute(struct snd_soc_dai *codec_dai, int mute) | |||
1280 | else | 1280 | else |
1281 | reg = 0; | 1281 | reg = 0; |
1282 | 1282 | ||
1283 | snd_soc_update_bits(codec, M98088_REG_2F_LVL_DAI1_PLAY, | 1283 | snd_soc_component_update_bits(component, M98088_REG_2F_LVL_DAI1_PLAY, |
1284 | M98088_DAI_MUTE_MASK, reg); | 1284 | M98088_DAI_MUTE_MASK, reg); |
1285 | return 0; | 1285 | return 0; |
1286 | } | 1286 | } |
1287 | 1287 | ||
1288 | static int max98088_dai2_digital_mute(struct snd_soc_dai *codec_dai, int mute) | 1288 | static int max98088_dai2_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
1289 | { | 1289 | { |
1290 | struct snd_soc_codec *codec = codec_dai->codec; | 1290 | struct snd_soc_component *component = codec_dai->component; |
1291 | int reg; | 1291 | int reg; |
1292 | 1292 | ||
1293 | if (mute) | 1293 | if (mute) |
@@ -1295,15 +1295,15 @@ static int max98088_dai2_digital_mute(struct snd_soc_dai *codec_dai, int mute) | |||
1295 | else | 1295 | else |
1296 | reg = 0; | 1296 | reg = 0; |
1297 | 1297 | ||
1298 | snd_soc_update_bits(codec, M98088_REG_31_LVL_DAI2_PLAY, | 1298 | snd_soc_component_update_bits(component, M98088_REG_31_LVL_DAI2_PLAY, |
1299 | M98088_DAI_MUTE_MASK, reg); | 1299 | M98088_DAI_MUTE_MASK, reg); |
1300 | return 0; | 1300 | return 0; |
1301 | } | 1301 | } |
1302 | 1302 | ||
1303 | static int max98088_set_bias_level(struct snd_soc_codec *codec, | 1303 | static int max98088_set_bias_level(struct snd_soc_component *component, |
1304 | enum snd_soc_bias_level level) | 1304 | enum snd_soc_bias_level level) |
1305 | { | 1305 | { |
1306 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1306 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1307 | 1307 | ||
1308 | switch (level) { | 1308 | switch (level) { |
1309 | case SND_SOC_BIAS_ON: | 1309 | case SND_SOC_BIAS_ON: |
@@ -1313,15 +1313,15 @@ static int max98088_set_bias_level(struct snd_soc_codec *codec, | |||
1313 | break; | 1313 | break; |
1314 | 1314 | ||
1315 | case SND_SOC_BIAS_STANDBY: | 1315 | case SND_SOC_BIAS_STANDBY: |
1316 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) | 1316 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) |
1317 | regcache_sync(max98088->regmap); | 1317 | regcache_sync(max98088->regmap); |
1318 | 1318 | ||
1319 | snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | 1319 | snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, |
1320 | M98088_MBEN, M98088_MBEN); | 1320 | M98088_MBEN, M98088_MBEN); |
1321 | break; | 1321 | break; |
1322 | 1322 | ||
1323 | case SND_SOC_BIAS_OFF: | 1323 | case SND_SOC_BIAS_OFF: |
1324 | snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | 1324 | snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, |
1325 | M98088_MBEN, 0); | 1325 | M98088_MBEN, 0); |
1326 | regcache_mark_dirty(max98088->regmap); | 1326 | regcache_mark_dirty(max98088->regmap); |
1327 | break; | 1327 | break; |
@@ -1380,7 +1380,7 @@ static struct snd_soc_dai_driver max98088_dai[] = { | |||
1380 | 1380 | ||
1381 | static const char *eq_mode_name[] = {"EQ1 Mode", "EQ2 Mode"}; | 1381 | static const char *eq_mode_name[] = {"EQ1 Mode", "EQ2 Mode"}; |
1382 | 1382 | ||
1383 | static int max98088_get_channel(struct snd_soc_codec *codec, const char *name) | 1383 | static int max98088_get_channel(struct snd_soc_component *component, const char *name) |
1384 | { | 1384 | { |
1385 | int i; | 1385 | int i; |
1386 | 1386 | ||
@@ -1389,13 +1389,13 @@ static int max98088_get_channel(struct snd_soc_codec *codec, const char *name) | |||
1389 | return i; | 1389 | return i; |
1390 | 1390 | ||
1391 | /* Shouldn't happen */ | 1391 | /* Shouldn't happen */ |
1392 | dev_err(codec->dev, "Bad EQ channel name '%s'\n", name); | 1392 | dev_err(component->dev, "Bad EQ channel name '%s'\n", name); |
1393 | return -EINVAL; | 1393 | return -EINVAL; |
1394 | } | 1394 | } |
1395 | 1395 | ||
1396 | static void max98088_setup_eq1(struct snd_soc_codec *codec) | 1396 | static void max98088_setup_eq1(struct snd_soc_component *component) |
1397 | { | 1397 | { |
1398 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1398 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1399 | struct max98088_pdata *pdata = max98088->pdata; | 1399 | struct max98088_pdata *pdata = max98088->pdata; |
1400 | struct max98088_eq_cfg *coef_set; | 1400 | struct max98088_eq_cfg *coef_set; |
1401 | int best, best_val, save, i, sel, fs; | 1401 | int best, best_val, save, i, sel, fs; |
@@ -1420,29 +1420,29 @@ static void max98088_setup_eq1(struct snd_soc_codec *codec) | |||
1420 | } | 1420 | } |
1421 | } | 1421 | } |
1422 | 1422 | ||
1423 | dev_dbg(codec->dev, "Selected %s/%dHz for %dHz sample rate\n", | 1423 | dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", |
1424 | pdata->eq_cfg[best].name, | 1424 | pdata->eq_cfg[best].name, |
1425 | pdata->eq_cfg[best].rate, fs); | 1425 | pdata->eq_cfg[best].rate, fs); |
1426 | 1426 | ||
1427 | /* Disable EQ while configuring, and save current on/off state */ | 1427 | /* Disable EQ while configuring, and save current on/off state */ |
1428 | save = snd_soc_read(codec, M98088_REG_49_CFG_LEVEL); | 1428 | save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL); |
1429 | snd_soc_update_bits(codec, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0); | 1429 | snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0); |
1430 | 1430 | ||
1431 | coef_set = &pdata->eq_cfg[sel]; | 1431 | coef_set = &pdata->eq_cfg[sel]; |
1432 | 1432 | ||
1433 | m98088_eq_band(codec, 0, 0, coef_set->band1); | 1433 | m98088_eq_band(component, 0, 0, coef_set->band1); |
1434 | m98088_eq_band(codec, 0, 1, coef_set->band2); | 1434 | m98088_eq_band(component, 0, 1, coef_set->band2); |
1435 | m98088_eq_band(codec, 0, 2, coef_set->band3); | 1435 | m98088_eq_band(component, 0, 2, coef_set->band3); |
1436 | m98088_eq_band(codec, 0, 3, coef_set->band4); | 1436 | m98088_eq_band(component, 0, 3, coef_set->band4); |
1437 | m98088_eq_band(codec, 0, 4, coef_set->band5); | 1437 | m98088_eq_band(component, 0, 4, coef_set->band5); |
1438 | 1438 | ||
1439 | /* Restore the original on/off state */ | 1439 | /* Restore the original on/off state */ |
1440 | snd_soc_update_bits(codec, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, save); | 1440 | snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, save); |
1441 | } | 1441 | } |
1442 | 1442 | ||
1443 | static void max98088_setup_eq2(struct snd_soc_codec *codec) | 1443 | static void max98088_setup_eq2(struct snd_soc_component *component) |
1444 | { | 1444 | { |
1445 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1445 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1446 | struct max98088_pdata *pdata = max98088->pdata; | 1446 | struct max98088_pdata *pdata = max98088->pdata; |
1447 | struct max98088_eq_cfg *coef_set; | 1447 | struct max98088_eq_cfg *coef_set; |
1448 | int best, best_val, save, i, sel, fs; | 1448 | int best, best_val, save, i, sel, fs; |
@@ -1467,34 +1467,34 @@ static void max98088_setup_eq2(struct snd_soc_codec *codec) | |||
1467 | } | 1467 | } |
1468 | } | 1468 | } |
1469 | 1469 | ||
1470 | dev_dbg(codec->dev, "Selected %s/%dHz for %dHz sample rate\n", | 1470 | dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", |
1471 | pdata->eq_cfg[best].name, | 1471 | pdata->eq_cfg[best].name, |
1472 | pdata->eq_cfg[best].rate, fs); | 1472 | pdata->eq_cfg[best].rate, fs); |
1473 | 1473 | ||
1474 | /* Disable EQ while configuring, and save current on/off state */ | 1474 | /* Disable EQ while configuring, and save current on/off state */ |
1475 | save = snd_soc_read(codec, M98088_REG_49_CFG_LEVEL); | 1475 | save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL); |
1476 | snd_soc_update_bits(codec, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0); | 1476 | snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0); |
1477 | 1477 | ||
1478 | coef_set = &pdata->eq_cfg[sel]; | 1478 | coef_set = &pdata->eq_cfg[sel]; |
1479 | 1479 | ||
1480 | m98088_eq_band(codec, 1, 0, coef_set->band1); | 1480 | m98088_eq_band(component, 1, 0, coef_set->band1); |
1481 | m98088_eq_band(codec, 1, 1, coef_set->band2); | 1481 | m98088_eq_band(component, 1, 1, coef_set->band2); |
1482 | m98088_eq_band(codec, 1, 2, coef_set->band3); | 1482 | m98088_eq_band(component, 1, 2, coef_set->band3); |
1483 | m98088_eq_band(codec, 1, 3, coef_set->band4); | 1483 | m98088_eq_band(component, 1, 3, coef_set->band4); |
1484 | m98088_eq_band(codec, 1, 4, coef_set->band5); | 1484 | m98088_eq_band(component, 1, 4, coef_set->band5); |
1485 | 1485 | ||
1486 | /* Restore the original on/off state */ | 1486 | /* Restore the original on/off state */ |
1487 | snd_soc_update_bits(codec, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, | 1487 | snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, |
1488 | save); | 1488 | save); |
1489 | } | 1489 | } |
1490 | 1490 | ||
1491 | static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol, | 1491 | static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol, |
1492 | struct snd_ctl_elem_value *ucontrol) | 1492 | struct snd_ctl_elem_value *ucontrol) |
1493 | { | 1493 | { |
1494 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 1494 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
1495 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1495 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1496 | struct max98088_pdata *pdata = max98088->pdata; | 1496 | struct max98088_pdata *pdata = max98088->pdata; |
1497 | int channel = max98088_get_channel(codec, kcontrol->id.name); | 1497 | int channel = max98088_get_channel(component, kcontrol->id.name); |
1498 | struct max98088_cdata *cdata; | 1498 | struct max98088_cdata *cdata; |
1499 | int sel = ucontrol->value.enumerated.item[0]; | 1499 | int sel = ucontrol->value.enumerated.item[0]; |
1500 | 1500 | ||
@@ -1510,10 +1510,10 @@ static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol, | |||
1510 | 1510 | ||
1511 | switch (channel) { | 1511 | switch (channel) { |
1512 | case 0: | 1512 | case 0: |
1513 | max98088_setup_eq1(codec); | 1513 | max98088_setup_eq1(component); |
1514 | break; | 1514 | break; |
1515 | case 1: | 1515 | case 1: |
1516 | max98088_setup_eq2(codec); | 1516 | max98088_setup_eq2(component); |
1517 | break; | 1517 | break; |
1518 | } | 1518 | } |
1519 | 1519 | ||
@@ -1523,9 +1523,9 @@ static int max98088_put_eq_enum(struct snd_kcontrol *kcontrol, | |||
1523 | static int max98088_get_eq_enum(struct snd_kcontrol *kcontrol, | 1523 | static int max98088_get_eq_enum(struct snd_kcontrol *kcontrol, |
1524 | struct snd_ctl_elem_value *ucontrol) | 1524 | struct snd_ctl_elem_value *ucontrol) |
1525 | { | 1525 | { |
1526 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); | 1526 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
1527 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1527 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1528 | int channel = max98088_get_channel(codec, kcontrol->id.name); | 1528 | int channel = max98088_get_channel(component, kcontrol->id.name); |
1529 | struct max98088_cdata *cdata; | 1529 | struct max98088_cdata *cdata; |
1530 | 1530 | ||
1531 | if (channel < 0) | 1531 | if (channel < 0) |
@@ -1536,9 +1536,9 @@ static int max98088_get_eq_enum(struct snd_kcontrol *kcontrol, | |||
1536 | return 0; | 1536 | return 0; |
1537 | } | 1537 | } |
1538 | 1538 | ||
1539 | static void max98088_handle_eq_pdata(struct snd_soc_codec *codec) | 1539 | static void max98088_handle_eq_pdata(struct snd_soc_component *component) |
1540 | { | 1540 | { |
1541 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1541 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1542 | struct max98088_pdata *pdata = max98088->pdata; | 1542 | struct max98088_pdata *pdata = max98088->pdata; |
1543 | struct max98088_eq_cfg *cfg; | 1543 | struct max98088_eq_cfg *cfg; |
1544 | unsigned int cfgcnt; | 1544 | unsigned int cfgcnt; |
@@ -1591,19 +1591,19 @@ static void max98088_handle_eq_pdata(struct snd_soc_codec *codec) | |||
1591 | max98088->eq_enum.texts = max98088->eq_texts; | 1591 | max98088->eq_enum.texts = max98088->eq_texts; |
1592 | max98088->eq_enum.items = max98088->eq_textcnt; | 1592 | max98088->eq_enum.items = max98088->eq_textcnt; |
1593 | 1593 | ||
1594 | ret = snd_soc_add_codec_controls(codec, controls, ARRAY_SIZE(controls)); | 1594 | ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls)); |
1595 | if (ret != 0) | 1595 | if (ret != 0) |
1596 | dev_err(codec->dev, "Failed to add EQ control: %d\n", ret); | 1596 | dev_err(component->dev, "Failed to add EQ control: %d\n", ret); |
1597 | } | 1597 | } |
1598 | 1598 | ||
1599 | static void max98088_handle_pdata(struct snd_soc_codec *codec) | 1599 | static void max98088_handle_pdata(struct snd_soc_component *component) |
1600 | { | 1600 | { |
1601 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1601 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1602 | struct max98088_pdata *pdata = max98088->pdata; | 1602 | struct max98088_pdata *pdata = max98088->pdata; |
1603 | u8 regval = 0; | 1603 | u8 regval = 0; |
1604 | 1604 | ||
1605 | if (!pdata) { | 1605 | if (!pdata) { |
1606 | dev_dbg(codec->dev, "No platform data\n"); | 1606 | dev_dbg(component->dev, "No platform data\n"); |
1607 | return; | 1607 | return; |
1608 | } | 1608 | } |
1609 | 1609 | ||
@@ -1616,21 +1616,21 @@ static void max98088_handle_pdata(struct snd_soc_codec *codec) | |||
1616 | 1616 | ||
1617 | max98088->digmic = (regval ? 1 : 0); | 1617 | max98088->digmic = (regval ? 1 : 0); |
1618 | 1618 | ||
1619 | snd_soc_write(codec, M98088_REG_48_CFG_MIC, regval); | 1619 | snd_soc_component_write(component, M98088_REG_48_CFG_MIC, regval); |
1620 | 1620 | ||
1621 | /* Configure receiver output */ | 1621 | /* Configure receiver output */ |
1622 | regval = ((pdata->receiver_mode) ? M98088_REC_LINEMODE : 0); | 1622 | regval = ((pdata->receiver_mode) ? M98088_REC_LINEMODE : 0); |
1623 | snd_soc_update_bits(codec, M98088_REG_2A_MIC_REC_CNTL, | 1623 | snd_soc_component_update_bits(component, M98088_REG_2A_MIC_REC_CNTL, |
1624 | M98088_REC_LINEMODE_MASK, regval); | 1624 | M98088_REC_LINEMODE_MASK, regval); |
1625 | 1625 | ||
1626 | /* Configure equalizers */ | 1626 | /* Configure equalizers */ |
1627 | if (pdata->eq_cfgcnt) | 1627 | if (pdata->eq_cfgcnt) |
1628 | max98088_handle_eq_pdata(codec); | 1628 | max98088_handle_eq_pdata(component); |
1629 | } | 1629 | } |
1630 | 1630 | ||
1631 | static int max98088_probe(struct snd_soc_codec *codec) | 1631 | static int max98088_probe(struct snd_soc_component *component) |
1632 | { | 1632 | { |
1633 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1633 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1634 | struct max98088_cdata *cdata; | 1634 | struct max98088_cdata *cdata; |
1635 | int ret = 0; | 1635 | int ret = 0; |
1636 | 1636 | ||
@@ -1658,60 +1658,59 @@ static int max98088_probe(struct snd_soc_codec *codec) | |||
1658 | max98088->mic1pre = 0; | 1658 | max98088->mic1pre = 0; |
1659 | max98088->mic2pre = 0; | 1659 | max98088->mic2pre = 0; |
1660 | 1660 | ||
1661 | ret = snd_soc_read(codec, M98088_REG_FF_REV_ID); | 1661 | ret = snd_soc_component_read32(component, M98088_REG_FF_REV_ID); |
1662 | if (ret < 0) { | 1662 | if (ret < 0) { |
1663 | dev_err(codec->dev, "Failed to read device revision: %d\n", | 1663 | dev_err(component->dev, "Failed to read device revision: %d\n", |
1664 | ret); | 1664 | ret); |
1665 | goto err_access; | 1665 | goto err_access; |
1666 | } | 1666 | } |
1667 | dev_info(codec->dev, "revision %c\n", ret - 0x40 + 'A'); | 1667 | dev_info(component->dev, "revision %c\n", ret - 0x40 + 'A'); |
1668 | 1668 | ||
1669 | snd_soc_write(codec, M98088_REG_51_PWR_SYS, M98088_PWRSV); | 1669 | snd_soc_component_write(component, M98088_REG_51_PWR_SYS, M98088_PWRSV); |
1670 | 1670 | ||
1671 | snd_soc_write(codec, M98088_REG_0F_IRQ_ENABLE, 0x00); | 1671 | snd_soc_component_write(component, M98088_REG_0F_IRQ_ENABLE, 0x00); |
1672 | 1672 | ||
1673 | snd_soc_write(codec, M98088_REG_22_MIX_DAC, | 1673 | snd_soc_component_write(component, M98088_REG_22_MIX_DAC, |
1674 | M98088_DAI1L_TO_DACL|M98088_DAI2L_TO_DACL| | 1674 | M98088_DAI1L_TO_DACL|M98088_DAI2L_TO_DACL| |
1675 | M98088_DAI1R_TO_DACR|M98088_DAI2R_TO_DACR); | 1675 | M98088_DAI1R_TO_DACR|M98088_DAI2R_TO_DACR); |
1676 | 1676 | ||
1677 | snd_soc_write(codec, M98088_REG_4E_BIAS_CNTL, 0xF0); | 1677 | snd_soc_component_write(component, M98088_REG_4E_BIAS_CNTL, 0xF0); |
1678 | snd_soc_write(codec, M98088_REG_50_DAC_BIAS2, 0x0F); | 1678 | snd_soc_component_write(component, M98088_REG_50_DAC_BIAS2, 0x0F); |
1679 | 1679 | ||
1680 | snd_soc_write(codec, M98088_REG_16_DAI1_IOCFG, | 1680 | snd_soc_component_write(component, M98088_REG_16_DAI1_IOCFG, |
1681 | M98088_S1NORMAL|M98088_SDATA); | 1681 | M98088_S1NORMAL|M98088_SDATA); |
1682 | 1682 | ||
1683 | snd_soc_write(codec, M98088_REG_1E_DAI2_IOCFG, | 1683 | snd_soc_component_write(component, M98088_REG_1E_DAI2_IOCFG, |
1684 | M98088_S2NORMAL|M98088_SDATA); | 1684 | M98088_S2NORMAL|M98088_SDATA); |
1685 | 1685 | ||
1686 | max98088_handle_pdata(codec); | 1686 | max98088_handle_pdata(component); |
1687 | 1687 | ||
1688 | err_access: | 1688 | err_access: |
1689 | return ret; | 1689 | return ret; |
1690 | } | 1690 | } |
1691 | 1691 | ||
1692 | static int max98088_remove(struct snd_soc_codec *codec) | 1692 | static void max98088_remove(struct snd_soc_component *component) |
1693 | { | 1693 | { |
1694 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | 1694 | struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); |
1695 | 1695 | ||
1696 | kfree(max98088->eq_texts); | 1696 | kfree(max98088->eq_texts); |
1697 | |||
1698 | return 0; | ||
1699 | } | 1697 | } |
1700 | 1698 | ||
1701 | static const struct snd_soc_codec_driver soc_codec_dev_max98088 = { | 1699 | static const struct snd_soc_component_driver soc_component_dev_max98088 = { |
1702 | .probe = max98088_probe, | 1700 | .probe = max98088_probe, |
1703 | .remove = max98088_remove, | 1701 | .remove = max98088_remove, |
1704 | .set_bias_level = max98088_set_bias_level, | 1702 | .set_bias_level = max98088_set_bias_level, |
1705 | .suspend_bias_off = true, | 1703 | .controls = max98088_snd_controls, |
1706 | 1704 | .num_controls = ARRAY_SIZE(max98088_snd_controls), | |
1707 | .component_driver = { | 1705 | .dapm_widgets = max98088_dapm_widgets, |
1708 | .controls = max98088_snd_controls, | 1706 | .num_dapm_widgets = ARRAY_SIZE(max98088_dapm_widgets), |
1709 | .num_controls = ARRAY_SIZE(max98088_snd_controls), | 1707 | .dapm_routes = max98088_audio_map, |
1710 | .dapm_widgets = max98088_dapm_widgets, | 1708 | .num_dapm_routes = ARRAY_SIZE(max98088_audio_map), |
1711 | .num_dapm_widgets = ARRAY_SIZE(max98088_dapm_widgets), | 1709 | .suspend_bias_off = 1, |
1712 | .dapm_routes = max98088_audio_map, | 1710 | .idle_bias_on = 1, |
1713 | .num_dapm_routes = ARRAY_SIZE(max98088_audio_map), | 1711 | .use_pmdown_time = 1, |
1714 | }, | 1712 | .endianness = 1, |
1713 | .non_legacy_dai_naming = 1, | ||
1715 | }; | 1714 | }; |
1716 | 1715 | ||
1717 | static int max98088_i2c_probe(struct i2c_client *i2c, | 1716 | static int max98088_i2c_probe(struct i2c_client *i2c, |
@@ -1734,17 +1733,11 @@ static int max98088_i2c_probe(struct i2c_client *i2c, | |||
1734 | i2c_set_clientdata(i2c, max98088); | 1733 | i2c_set_clientdata(i2c, max98088); |
1735 | max98088->pdata = i2c->dev.platform_data; | 1734 | max98088->pdata = i2c->dev.platform_data; |
1736 | 1735 | ||
1737 | ret = snd_soc_register_codec(&i2c->dev, | 1736 | ret = devm_snd_soc_register_component(&i2c->dev, |
1738 | &soc_codec_dev_max98088, &max98088_dai[0], 2); | 1737 | &soc_component_dev_max98088, &max98088_dai[0], 2); |
1739 | return ret; | 1738 | return ret; |
1740 | } | 1739 | } |
1741 | 1740 | ||
1742 | static int max98088_i2c_remove(struct i2c_client *client) | ||
1743 | { | ||
1744 | snd_soc_unregister_codec(&client->dev); | ||
1745 | return 0; | ||
1746 | } | ||
1747 | |||
1748 | static const struct i2c_device_id max98088_i2c_id[] = { | 1741 | static const struct i2c_device_id max98088_i2c_id[] = { |
1749 | { "max98088", MAX98088 }, | 1742 | { "max98088", MAX98088 }, |
1750 | { "max98089", MAX98089 }, | 1743 | { "max98089", MAX98089 }, |
@@ -1757,7 +1750,6 @@ static struct i2c_driver max98088_i2c_driver = { | |||
1757 | .name = "max98088", | 1750 | .name = "max98088", |
1758 | }, | 1751 | }, |
1759 | .probe = max98088_i2c_probe, | 1752 | .probe = max98088_i2c_probe, |
1760 | .remove = max98088_i2c_remove, | ||
1761 | .id_table = max98088_i2c_id, | 1753 | .id_table = max98088_i2c_id, |
1762 | }; | 1754 | }; |
1763 | 1755 | ||