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authoramy.shih <amy.shih@advantech.com.tw>2019-09-12 07:33:00 -0400
committerGuenter Roeck <linux@roeck-us.net>2019-09-12 14:52:08 -0400
commit3b710d7ae5d5138a0d4d876a4ea12bfbb8055efb (patch)
tree1a9a735f34b25274006b66d6c55465a3f8900aa4
parentffd96868ac5d4c22bba1ba2175d124cb2775f3f7 (diff)
hwmon: (nct7904) Fix incorrect SMI status register setting of LTD temperature and fan.
According to datasheet, the SMI status register setting of LTD temperature is SMI_STS3, and the SMI status register setting of fan is SMI_STS5 and SMI_STS6. Signed-off-by: amy.shih <amy.shih@advantech.com.tw> Link: https://lore.kernel.org/r/20190912113300.4714-1-Amy.Shih@advantech.com.tw Signed-off-by: Guenter Roeck <linux@roeck-us.net>
-rw-r--r--drivers/hwmon/nct7904.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index ce688ab4fce2..95b447cfa24c 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -51,6 +51,7 @@
51#define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */ 51#define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */
52#define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */ 52#define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */
53#define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */ 53#define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */
54#define SMI_STS3_REG 0xC3 /* Bank 0; SMI Status Register */
54#define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */ 55#define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */
55#define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */ 56#define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */
56#define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */ 57#define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */
@@ -210,7 +211,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
210 return 0; 211 return 0;
211 case hwmon_fan_alarm: 212 case hwmon_fan_alarm:
212 ret = nct7904_read_reg(data, BANK_0, 213 ret = nct7904_read_reg(data, BANK_0,
213 SMI_STS7_REG + (channel >> 3)); 214 SMI_STS5_REG + (channel >> 3));
214 if (ret < 0) 215 if (ret < 0)
215 return ret; 216 return ret;
216 *val = (ret >> (channel & 0x07)) & 1; 217 *val = (ret >> (channel & 0x07)) & 1;
@@ -351,7 +352,13 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
351 *val = sign_extend32(temp, 10) * 125; 352 *val = sign_extend32(temp, 10) * 125;
352 return 0; 353 return 0;
353 case hwmon_temp_alarm: 354 case hwmon_temp_alarm:
354 if (channel < 5) { 355 if (channel == 4) {
356 ret = nct7904_read_reg(data, BANK_0,
357 SMI_STS3_REG);
358 if (ret < 0)
359 return ret;
360 *val = (ret >> 1) & 1;
361 } else if (channel < 4) {
355 ret = nct7904_read_reg(data, BANK_0, 362 ret = nct7904_read_reg(data, BANK_0,
356 SMI_STS1_REG); 363 SMI_STS1_REG);
357 if (ret < 0) 364 if (ret < 0)