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authorDouglas Anderson <dianders@chromium.org>2017-12-12 13:30:31 -0500
committerFelipe Balbi <felipe.balbi@linux.intel.com>2017-12-13 04:27:53 -0500
commit38d2b5fb75c15923fb89c32134516a623515bce4 (patch)
tree42186c421271b50e0431e9fab9e5141417512905
parentf2830ad455ec0fdc386baeb9d654f7095bf849da (diff)
usb: dwc2: host: Don't retry NAKed transactions right away
On rk3288-veyron devices on Chrome OS it was found that plugging in an Arduino-based USB device could cause the system to lockup, especially if the CPU Frequency was at one of the slower operating points (like 100 MHz / 200 MHz). Upon tracing, I found that the following was happening: * The USB device (full speed) was connected to a high speed hub and then to the rk3288. Thus, we were dealing with split transactions, which is all handled in software on dwc2. * Userspace was initiating a BULK IN transfer * When we sent the SSPLIT (to start the split transaction), we got an ACK. Good. Then we issued the CSPLIT. * When we sent the CSPLIT, we got back a NAK. We immediately (from the interrupt handler) started to retry and sent another SSPLIT. * The device kept NAKing our CSPLIT, so we kept ping-ponging between sending a SSPLIT and a CSPLIT, each time sending from the interrupt handler. * The handling of the interrupts was (because of the low CPU speed and the inefficiency of the dwc2 interrupt handler) was actually taking _longer_ than it took the other side to send the ACK/NAK. Thus we were _always_ in the USB interrupt routine. * The fact that USB interrupts were always going off was preventing other things from happening in the system. This included preventing the system from being able to transition to a higher CPU frequency. As I understand it, there is no requirement to retry super quickly after a NAK, we just have to retry sometime in the future. Thus one solution to the above is to just add a delay between getting a NAK and retrying the transmission. If this delay is sufficiently long to get out of the interrupt routine then the rest of the system will be able to make forward progress. Even a 25 us delay would probably be enough, but we'll be extra conservative and try to delay 1 ms (the exact amount depends on HZ and the accuracy of the jiffy and how close the current jiffy is to ticking, but could be as much as 20 ms or as little as 1 ms). Presumably adding a delay like this could impact the USB throughput, so we only add the delay with repeated NAKs. NOTE: Upon further testing of a pl2303 serial adapter, I found that this fix may help with problems there. Specifically I found that the pl2303 serial adapters tend to respond with a NAK when they have nothing to say and thus we end with this same sequence. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-rw-r--r--drivers/usb/dwc2/core.h1
-rw-r--r--drivers/usb/dwc2/hcd.c7
-rw-r--r--drivers/usb/dwc2/hcd.h9
-rw-r--r--drivers/usb/dwc2/hcd_intr.c20
-rw-r--r--drivers/usb/dwc2/hcd_queue.c81
5 files changed, 114 insertions, 4 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index f22f2e9d0759..2ed3b01f7d5b 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -968,6 +968,7 @@ struct dwc2_hsotg {
968 } flags; 968 } flags;
969 969
970 struct list_head non_periodic_sched_inactive; 970 struct list_head non_periodic_sched_inactive;
971 struct list_head non_periodic_sched_waiting;
971 struct list_head non_periodic_sched_active; 972 struct list_head non_periodic_sched_active;
972 struct list_head *non_periodic_qh_ptr; 973 struct list_head *non_periodic_qh_ptr;
973 struct list_head periodic_sched_inactive; 974 struct list_head periodic_sched_inactive;
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 7b6eb0ad513b..a5d72fcd1603 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -659,6 +659,10 @@ static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
659 list_for_each_entry(qh, &hsotg->non_periodic_sched_inactive, 659 list_for_each_entry(qh, &hsotg->non_periodic_sched_inactive,
660 qh_list_entry) 660 qh_list_entry)
661 dev_dbg(hsotg->dev, " %p\n", qh); 661 dev_dbg(hsotg->dev, " %p\n", qh);
662 dev_dbg(hsotg->dev, " NP waiting sched:\n");
663 list_for_each_entry(qh, &hsotg->non_periodic_sched_waiting,
664 qh_list_entry)
665 dev_dbg(hsotg->dev, " %p\n", qh);
662 dev_dbg(hsotg->dev, " NP active sched:\n"); 666 dev_dbg(hsotg->dev, " NP active sched:\n");
663 list_for_each_entry(qh, &hsotg->non_periodic_sched_active, 667 list_for_each_entry(qh, &hsotg->non_periodic_sched_active,
664 qh_list_entry) 668 qh_list_entry)
@@ -1818,6 +1822,7 @@ static void dwc2_qh_list_free(struct dwc2_hsotg *hsotg,
1818static void dwc2_kill_all_urbs(struct dwc2_hsotg *hsotg) 1822static void dwc2_kill_all_urbs(struct dwc2_hsotg *hsotg)
1819{ 1823{
1820 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_inactive); 1824 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_inactive);
1825 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_waiting);
1821 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_active); 1826 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->non_periodic_sched_active);
1822 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_inactive); 1827 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_inactive);
1823 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_ready); 1828 dwc2_kill_urbs_in_qh_list(hsotg, &hsotg->periodic_sched_ready);
@@ -4998,6 +5003,7 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
4998 5003
4999 /* Free memory for QH/QTD lists */ 5004 /* Free memory for QH/QTD lists */
5000 dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_inactive); 5005 dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_inactive);
5006 dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_waiting);
5001 dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_active); 5007 dwc2_qh_list_free(hsotg, &hsotg->non_periodic_sched_active);
5002 dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_inactive); 5008 dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_inactive);
5003 dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_ready); 5009 dwc2_qh_list_free(hsotg, &hsotg->periodic_sched_ready);
@@ -5159,6 +5165,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
5159 5165
5160 /* Initialize the non-periodic schedule */ 5166 /* Initialize the non-periodic schedule */
5161 INIT_LIST_HEAD(&hsotg->non_periodic_sched_inactive); 5167 INIT_LIST_HEAD(&hsotg->non_periodic_sched_inactive);
5168 INIT_LIST_HEAD(&hsotg->non_periodic_sched_waiting);
5162 INIT_LIST_HEAD(&hsotg->non_periodic_sched_active); 5169 INIT_LIST_HEAD(&hsotg->non_periodic_sched_active);
5163 5170
5164 /* Initialize the periodic schedule */ 5171 /* Initialize the periodic schedule */
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 78e9e01051b5..ad60e46e66e1 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -314,12 +314,16 @@ struct dwc2_hs_transfer_time {
314 * descriptor and indicates original XferSize value for the 314 * descriptor and indicates original XferSize value for the
315 * descriptor 315 * descriptor
316 * @unreserve_timer: Timer for releasing periodic reservation. 316 * @unreserve_timer: Timer for releasing periodic reservation.
317 * @wait_timer: Timer used to wait before re-queuing.
317 * @dwc2_tt: Pointer to our tt info (or NULL if no tt). 318 * @dwc2_tt: Pointer to our tt info (or NULL if no tt).
318 * @ttport: Port number within our tt. 319 * @ttport: Port number within our tt.
319 * @tt_buffer_dirty True if clear_tt_buffer_complete is pending 320 * @tt_buffer_dirty True if clear_tt_buffer_complete is pending
320 * @unreserve_pending: True if we planned to unreserve but haven't yet. 321 * @unreserve_pending: True if we planned to unreserve but haven't yet.
321 * @schedule_low_speed: True if we have a low/full speed component (either the 322 * @schedule_low_speed: True if we have a low/full speed component (either the
322 * host is in low/full speed mode or do_split). 323 * host is in low/full speed mode or do_split).
324 * @want_wait: We should wait before re-queuing; only matters for non-
325 * periodic transfers and is ignored for periodic ones.
326 * @wait_timer_cancel: Set to true to cancel the wait_timer.
323 * 327 *
324 * A Queue Head (QH) holds the static characteristics of an endpoint and 328 * A Queue Head (QH) holds the static characteristics of an endpoint and
325 * maintains a list of transfers (QTDs) for that endpoint. A QH structure may 329 * maintains a list of transfers (QTDs) for that endpoint. A QH structure may
@@ -354,11 +358,14 @@ struct dwc2_qh {
354 u32 desc_list_sz; 358 u32 desc_list_sz;
355 u32 *n_bytes; 359 u32 *n_bytes;
356 struct timer_list unreserve_timer; 360 struct timer_list unreserve_timer;
361 struct timer_list wait_timer;
357 struct dwc2_tt *dwc_tt; 362 struct dwc2_tt *dwc_tt;
358 int ttport; 363 int ttport;
359 unsigned tt_buffer_dirty:1; 364 unsigned tt_buffer_dirty:1;
360 unsigned unreserve_pending:1; 365 unsigned unreserve_pending:1;
361 unsigned schedule_low_speed:1; 366 unsigned schedule_low_speed:1;
367 unsigned want_wait:1;
368 unsigned wait_timer_cancel:1;
362}; 369};
363 370
364/** 371/**
@@ -389,6 +396,7 @@ struct dwc2_qh {
389 * @n_desc: Number of DMA descriptors for this QTD 396 * @n_desc: Number of DMA descriptors for this QTD
390 * @isoc_frame_index_last: Last activated frame (packet) index, used in 397 * @isoc_frame_index_last: Last activated frame (packet) index, used in
391 * descriptor DMA mode only 398 * descriptor DMA mode only
399 * @num_naks: Number of NAKs received on this QTD.
392 * @urb: URB for this transfer 400 * @urb: URB for this transfer
393 * @qh: Queue head for this QTD 401 * @qh: Queue head for this QTD
394 * @qtd_list_entry: For linking to the QH's list of QTDs 402 * @qtd_list_entry: For linking to the QH's list of QTDs
@@ -419,6 +427,7 @@ struct dwc2_qtd {
419 u8 error_count; 427 u8 error_count;
420 u8 n_desc; 428 u8 n_desc;
421 u16 isoc_frame_index_last; 429 u16 isoc_frame_index_last;
430 u16 num_naks;
422 struct dwc2_hcd_urb *urb; 431 struct dwc2_hcd_urb *urb;
423 struct dwc2_qh *qh; 432 struct dwc2_qh *qh;
424 struct list_head qtd_list_entry; 433 struct list_head qtd_list_entry;
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index 916d991b96b8..a5dfd9d8bd9a 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -53,6 +53,12 @@
53#include "core.h" 53#include "core.h"
54#include "hcd.h" 54#include "hcd.h"
55 55
56/*
57 * If we get this many NAKs on a split transaction we'll slow down
58 * retransmission. A 1 here means delay after the first NAK.
59 */
60#define DWC2_NAKS_BEFORE_DELAY 3
61
56/* This function is for debug only */ 62/* This function is for debug only */
57static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg) 63static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg)
58{ 64{
@@ -1201,11 +1207,25 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
1201 /* 1207 /*
1202 * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and 1208 * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and
1203 * interrupt. Re-start the SSPLIT transfer. 1209 * interrupt. Re-start the SSPLIT transfer.
1210 *
1211 * Normally for non-periodic transfers we'll retry right away, but to
1212 * avoid interrupt storms we'll wait before retrying if we've got
1213 * several NAKs. If we didn't do this we'd retry directly from the
1214 * interrupt handler and could end up quickly getting another
1215 * interrupt (another NAK), which we'd retry.
1216 *
1217 * Note that in DMA mode software only gets involved to re-send NAKed
1218 * transfers for split transactions, so we only need to apply this
1219 * delaying logic when handling splits. In non-DMA mode presumably we
1220 * might want a similar delay if someone can demonstrate this problem
1221 * affects that code path too.
1204 */ 1222 */
1205 if (chan->do_split) { 1223 if (chan->do_split) {
1206 if (chan->complete_split) 1224 if (chan->complete_split)
1207 qtd->error_count = 0; 1225 qtd->error_count = 0;
1208 qtd->complete_split = 0; 1226 qtd->complete_split = 0;
1227 qtd->num_naks++;
1228 qtd->qh->want_wait = qtd->num_naks >= DWC2_NAKS_BEFORE_DELAY;
1209 dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_NAK); 1229 dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_NAK);
1210 goto handle_nak_done; 1230 goto handle_nak_done;
1211 } 1231 }
diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c
index fcd1676c7f0b..e34ad5e65350 100644
--- a/drivers/usb/dwc2/hcd_queue.c
+++ b/drivers/usb/dwc2/hcd_queue.c
@@ -58,6 +58,9 @@
58/* Wait this long before releasing periodic reservation */ 58/* Wait this long before releasing periodic reservation */
59#define DWC2_UNRESERVE_DELAY (msecs_to_jiffies(5)) 59#define DWC2_UNRESERVE_DELAY (msecs_to_jiffies(5))
60 60
61/* If we get a NAK, wait this long before retrying */
62#define DWC2_RETRY_WAIT_DELAY (msecs_to_jiffies(1))
63
61/** 64/**
62 * dwc2_periodic_channel_available() - Checks that a channel is available for a 65 * dwc2_periodic_channel_available() - Checks that a channel is available for a
63 * periodic transfer 66 * periodic transfer
@@ -1441,6 +1444,55 @@ static void dwc2_deschedule_periodic(struct dwc2_hsotg *hsotg,
1441} 1444}
1442 1445
1443/** 1446/**
1447 * dwc2_wait_timer_fn() - Timer function to re-queue after waiting
1448 *
1449 * As per the spec, a NAK indicates that "a function is temporarily unable to
1450 * transmit or receive data, but will eventually be able to do so without need
1451 * of host intervention".
1452 *
1453 * That means that when we encounter a NAK we're supposed to retry.
1454 *
1455 * ...but if we retry right away (from the interrupt handler that saw the NAK)
1456 * then we can end up with an interrupt storm (if the other side keeps NAKing
1457 * us) because on slow enough CPUs it could take us longer to get out of the
1458 * interrupt routine than it takes for the device to send another NAK. That
1459 * leads to a constant stream of NAK interrupts and the CPU locks.
1460 *
1461 * ...so instead of retrying right away in the case of a NAK we'll set a timer
1462 * to retry some time later. This function handles that timer and moves the
1463 * qh back to the "inactive" list, then queues transactions.
1464 *
1465 * @t: Pointer to wait_timer in a qh.
1466 */
1467static void dwc2_wait_timer_fn(struct timer_list *t)
1468{
1469 struct dwc2_qh *qh = from_timer(qh, t, wait_timer);
1470 struct dwc2_hsotg *hsotg = qh->hsotg;
1471 unsigned long flags;
1472
1473 spin_lock_irqsave(&hsotg->lock, flags);
1474
1475 /*
1476 * We'll set wait_timer_cancel to true if we want to cancel this
1477 * operation in dwc2_hcd_qh_unlink().
1478 */
1479 if (!qh->wait_timer_cancel) {
1480 enum dwc2_transaction_type tr_type;
1481
1482 qh->want_wait = false;
1483
1484 list_move(&qh->qh_list_entry,
1485 &hsotg->non_periodic_sched_inactive);
1486
1487 tr_type = dwc2_hcd_select_transactions(hsotg);
1488 if (tr_type != DWC2_TRANSACTION_NONE)
1489 dwc2_hcd_queue_transactions(hsotg, tr_type);
1490 }
1491
1492 spin_unlock_irqrestore(&hsotg->lock, flags);
1493}
1494
1495/**
1444 * dwc2_qh_init() - Initializes a QH structure 1496 * dwc2_qh_init() - Initializes a QH structure
1445 * 1497 *
1446 * @hsotg: The HCD state structure for the DWC OTG controller 1498 * @hsotg: The HCD state structure for the DWC OTG controller
@@ -1468,6 +1520,7 @@ static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1468 /* Initialize QH */ 1520 /* Initialize QH */
1469 qh->hsotg = hsotg; 1521 qh->hsotg = hsotg;
1470 timer_setup(&qh->unreserve_timer, dwc2_unreserve_timer_fn, 0); 1522 timer_setup(&qh->unreserve_timer, dwc2_unreserve_timer_fn, 0);
1523 timer_setup(&qh->wait_timer, dwc2_wait_timer_fn, 0);
1471 qh->ep_type = ep_type; 1524 qh->ep_type = ep_type;
1472 qh->ep_is_in = ep_is_in; 1525 qh->ep_is_in = ep_is_in;
1473 1526
@@ -1628,6 +1681,16 @@ void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1628 dwc2_do_unreserve(hsotg, qh); 1681 dwc2_do_unreserve(hsotg, qh);
1629 spin_unlock_irqrestore(&hsotg->lock, flags); 1682 spin_unlock_irqrestore(&hsotg->lock, flags);
1630 } 1683 }
1684
1685 /*
1686 * We don't have the lock so we can safely wait until the wait timer
1687 * finishes. Of course, at this point in time we'd better have set
1688 * wait_timer_active to false so if this timer was still pending it
1689 * won't do anything anyway, but we want it to finish before we free
1690 * memory.
1691 */
1692 del_timer_sync(&qh->wait_timer);
1693
1631 dwc2_host_put_tt_info(hsotg, qh->dwc_tt); 1694 dwc2_host_put_tt_info(hsotg, qh->dwc_tt);
1632 1695
1633 if (qh->desc_list) 1696 if (qh->desc_list)
@@ -1663,9 +1726,16 @@ int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1663 qh->start_active_frame = hsotg->frame_number; 1726 qh->start_active_frame = hsotg->frame_number;
1664 qh->next_active_frame = qh->start_active_frame; 1727 qh->next_active_frame = qh->start_active_frame;
1665 1728
1666 /* Always start in inactive schedule */ 1729 if (qh->want_wait) {
1667 list_add_tail(&qh->qh_list_entry, 1730 list_add_tail(&qh->qh_list_entry,
1668 &hsotg->non_periodic_sched_inactive); 1731 &hsotg->non_periodic_sched_waiting);
1732 qh->wait_timer_cancel = false;
1733 mod_timer(&qh->wait_timer,
1734 jiffies + DWC2_RETRY_WAIT_DELAY + 1);
1735 } else {
1736 list_add_tail(&qh->qh_list_entry,
1737 &hsotg->non_periodic_sched_inactive);
1738 }
1669 return 0; 1739 return 0;
1670 } 1740 }
1671 1741
@@ -1695,6 +1765,9 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1695 1765
1696 dev_vdbg(hsotg->dev, "%s()\n", __func__); 1766 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1697 1767
1768 /* If the wait_timer is pending, this will stop it from acting */
1769 qh->wait_timer_cancel = true;
1770
1698 if (list_empty(&qh->qh_list_entry)) 1771 if (list_empty(&qh->qh_list_entry))
1699 /* QH is not in a schedule */ 1772 /* QH is not in a schedule */
1700 return; 1773 return;
@@ -1903,7 +1976,7 @@ void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1903 if (dwc2_qh_is_non_per(qh)) { 1976 if (dwc2_qh_is_non_per(qh)) {
1904 dwc2_hcd_qh_unlink(hsotg, qh); 1977 dwc2_hcd_qh_unlink(hsotg, qh);
1905 if (!list_empty(&qh->qtd_list)) 1978 if (!list_empty(&qh->qtd_list))
1906 /* Add back to inactive non-periodic schedule */ 1979 /* Add back to inactive/waiting non-periodic schedule */
1907 dwc2_hcd_qh_add(hsotg, qh); 1980 dwc2_hcd_qh_add(hsotg, qh);
1908 return; 1981 return;
1909 } 1982 }