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authorJames Smart <jsmart2021@gmail.com>2019-01-28 14:14:33 -0500
committerMartin K. Petersen <martin.petersen@oracle.com>2019-02-05 22:29:49 -0500
commit32517fc0975bf8dd3967e43c2a6350f038a3af28 (patch)
tree564dc9138630ddef0af8fcc83dbc4ef1c57b1acb
parentcb733e358787b7386bd1aeec088a35e03c53da3b (diff)
scsi: lpfc: Rework EQ/CQ processing to address interrupt coalescing
When driving high iop counts, auto_imax coalescing kicks in and drives the performance to extremely small iops levels. There are two issues: 1) auto_imax is enabled by default. The auto algorithm, when iops gets high, divides the iops by the hdwq count and uses that value to calculate EQ_Delay. The EQ_Delay is set uniformly on all EQs whether they have load or not. The EQ_delay is only manipulated every 5s (a long time). Thus there were large 5s swings of no interrupt delay followed by large/maximum delay, before repeating. 2) When processing a CQ, the driver got mixed up on the rate of when to ring the doorbell to keep the chip appraised of the eqe or cqe consumption as well as how how long to sit in the thread and process queue entries. Currently, the driver capped its work at 64 entries (very small) and exited/rearmed the CQ. Thus, on heavy loads, additional overheads were taken to exit and re-enter the interrupt handler. Worse, if in the large/maximum coalescing windows,k it could be a while before getting back to servicing. The issues are corrected by the following: - A change in defaults. Auto_imax is turned OFF and fcp_imax is set to 0. Thus all interrupts are immediate. - Cleanup of field names and their meanings. Existing names were non-intuitive or used for duplicate things. - Added max_proc_limit field, to control the length of time the handlers would service completions. - Reworked EQ handling: Added common routine that walks eq, applying notify interval and max processing limits. Use queue_claimed to claim ownership of the queue while processing. Always rearm the queue whenever the common routine is called. Rework queue element processing, namely to eliminate hba_index vs host_index. Only one index is necessary. The queue entry can be marked invalid and the host_index updated immediately after eqe processing. After rework, xx_release routines are now DB write functions. Renamed the routines as such. Moved lpfc_sli4_eq_flush(), which does similar action, to same area. Replaced the 2 individual loops that walk an eq with a call to the common routine. Slightly revised lpfc_sli4_hba_handle_eqe() calling syntax. Added per-cpu counters to detect interrupt rates and scale interrupt coalescing values. - Reworked CQ handling: Added common routine that walks cq, applying notify interval and max processing limits. Use queue_claimed to claim ownership of the queue while processing. Always rearm the queue whenever the common routine is called. Rework queue element processing, namely to eliminate hba_index vs host_index. Only one index is necessary. The queue entry can be marked invalid and the host_index updated immediately after cqe processing. After rework, xx_release routines are now DB write functions. Renamed the routines as such. Replaced the 3 individual loops that walk a cq with a call to the common routine. Redefined lpfc_sli4_sp_handle_mcqe() to commong handler definition with queue reference. Add increment for mbox completion to handler. - Added a new module/sysfs attribute: lpfc_cq_max_proc_limit To allow dynamic changing of the CQ max_proc_limit value being used. Although this leaves an EQ as an immediate interrupt, that interrupt will only occur if a CQ bound to it is in an armed state and has cqe's to process. By staying in the cq processing routine longer, high loads will avoid generating more interrupts as they will only rearm as the processing thread exits. The immediately interrupt is also beneficial to idle or lower-processing CQ's as they get serviced immediately without being penalized by sharing an EQ with a more loaded CQ. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/lpfc/lpfc.h25
-rw-r--r--drivers/scsi/lpfc/lpfc_attr.c141
-rw-r--r--drivers/scsi/lpfc/lpfc_debugfs.c22
-rw-r--r--drivers/scsi/lpfc/lpfc_hw4.h9
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c205
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c733
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h70
7 files changed, 729 insertions, 476 deletions
diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
index 9fd2811ffa8b..0bc498172add 100644
--- a/drivers/scsi/lpfc/lpfc.h
+++ b/drivers/scsi/lpfc/lpfc.h
@@ -686,6 +686,7 @@ struct lpfc_hba {
686 struct lpfc_sli4_hba sli4_hba; 686 struct lpfc_sli4_hba sli4_hba;
687 687
688 struct workqueue_struct *wq; 688 struct workqueue_struct *wq;
689 struct delayed_work eq_delay_work;
689 690
690 struct lpfc_sli sli; 691 struct lpfc_sli sli;
691 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 692 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
@@ -789,7 +790,6 @@ struct lpfc_hba {
789 uint8_t nvmet_support; /* driver supports NVMET */ 790 uint8_t nvmet_support; /* driver supports NVMET */
790#define LPFC_NVMET_MAX_PORTS 32 791#define LPFC_NVMET_MAX_PORTS 32
791 uint8_t mds_diags_support; 792 uint8_t mds_diags_support;
792 uint32_t initial_imax;
793 uint8_t bbcredit_support; 793 uint8_t bbcredit_support;
794 uint8_t enab_exp_wqcq_pages; 794 uint8_t enab_exp_wqcq_pages;
795 795
@@ -817,6 +817,8 @@ struct lpfc_hba {
817 uint32_t cfg_use_msi; 817 uint32_t cfg_use_msi;
818 uint32_t cfg_auto_imax; 818 uint32_t cfg_auto_imax;
819 uint32_t cfg_fcp_imax; 819 uint32_t cfg_fcp_imax;
820 uint32_t cfg_cq_poll_threshold;
821 uint32_t cfg_cq_max_proc_limit;
820 uint32_t cfg_fcp_cpu_map; 822 uint32_t cfg_fcp_cpu_map;
821 uint32_t cfg_hdw_queue; 823 uint32_t cfg_hdw_queue;
822 uint32_t cfg_irq_chann; 824 uint32_t cfg_irq_chann;
@@ -1084,7 +1086,6 @@ struct lpfc_hba {
1084 1086
1085 uint8_t temp_sensor_support; 1087 uint8_t temp_sensor_support;
1086 /* Fields used for heart beat. */ 1088 /* Fields used for heart beat. */
1087 unsigned long last_eqdelay_time;
1088 unsigned long last_completion_time; 1089 unsigned long last_completion_time;
1089 unsigned long skipped_hb; 1090 unsigned long skipped_hb;
1090 struct timer_list hb_tmofunc; 1091 struct timer_list hb_tmofunc;
@@ -1287,3 +1288,23 @@ lpfc_phba_elsring(struct lpfc_hba *phba)
1287 } 1288 }
1288 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1289 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1289} 1290}
1291
1292/**
1293 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1294 * @phba: Pointer to HBA context object.
1295 * @q: The Event Queue to update.
1296 * @delay: The delay value (in us) to be written.
1297 *
1298 **/
1299static inline void
1300lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1301 u32 delay)
1302{
1303 struct lpfc_register reg_data;
1304
1305 reg_data.word0 = 0;
1306 bf_set(lpfc_sliport_eqdelay_id, &reg_data, eq->queue_id);
1307 bf_set(lpfc_sliport_eqdelay_delay, &reg_data, delay);
1308 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1309 eq->q_mode = delay;
1310}
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index ed8caeefe3a2..2864cb53b1e8 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -4935,6 +4935,7 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr,
4935 struct Scsi_Host *shost = class_to_shost(dev); 4935 struct Scsi_Host *shost = class_to_shost(dev);
4936 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4936 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4937 struct lpfc_hba *phba = vport->phba; 4937 struct lpfc_hba *phba = vport->phba;
4938 struct lpfc_eq_intr_info *eqi;
4938 uint32_t usdelay; 4939 uint32_t usdelay;
4939 int val = 0, i; 4940 int val = 0, i;
4940 4941
@@ -4956,8 +4957,18 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr,
4956 if (val && (val < LPFC_MIN_IMAX || val > LPFC_MAX_IMAX)) 4957 if (val && (val < LPFC_MIN_IMAX || val > LPFC_MAX_IMAX))
4957 return -EINVAL; 4958 return -EINVAL;
4958 4959
4960 phba->cfg_auto_imax = (val) ? 0 : 1;
4961 if (phba->cfg_fcp_imax && !val) {
4962 queue_delayed_work(phba->wq, &phba->eq_delay_work,
4963 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
4964
4965 for_each_present_cpu(i) {
4966 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
4967 eqi->icnt = 0;
4968 }
4969 }
4970
4959 phba->cfg_fcp_imax = (uint32_t)val; 4971 phba->cfg_fcp_imax = (uint32_t)val;
4960 phba->initial_imax = phba->cfg_fcp_imax;
4961 4972
4962 if (phba->cfg_fcp_imax) 4973 if (phba->cfg_fcp_imax)
4963 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 4974 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
@@ -5020,15 +5031,119 @@ lpfc_fcp_imax_init(struct lpfc_hba *phba, int val)
5020 5031
5021static DEVICE_ATTR_RW(lpfc_fcp_imax); 5032static DEVICE_ATTR_RW(lpfc_fcp_imax);
5022 5033
5034/**
5035 * lpfc_cq_max_proc_limit_store
5036 *
5037 * @dev: class device that is converted into a Scsi_host.
5038 * @attr: device attribute, not used.
5039 * @buf: string with the cq max processing limit of cqes
5040 * @count: unused variable.
5041 *
5042 * Description:
5043 * If val is in a valid range, then set value on each cq
5044 *
5045 * Returns:
5046 * The length of the buf: if successful
5047 * -ERANGE: if val is not in the valid range
5048 * -EINVAL: if bad value format or intended mode is not supported.
5049 **/
5050static ssize_t
5051lpfc_cq_max_proc_limit_store(struct device *dev, struct device_attribute *attr,
5052 const char *buf, size_t count)
5053{
5054 struct Scsi_Host *shost = class_to_shost(dev);
5055 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
5056 struct lpfc_hba *phba = vport->phba;
5057 struct lpfc_queue *eq, *cq;
5058 unsigned long val;
5059 int i;
5060
5061 /* cq_max_proc_limit is only valid for SLI4 */
5062 if (phba->sli_rev != LPFC_SLI_REV4)
5063 return -EINVAL;
5064
5065 /* Sanity check on user data */
5066 if (!isdigit(buf[0]))
5067 return -EINVAL;
5068 if (kstrtoul(buf, 0, &val))
5069 return -EINVAL;
5070
5071 if (val < LPFC_CQ_MIN_PROC_LIMIT || val > LPFC_CQ_MAX_PROC_LIMIT)
5072 return -ERANGE;
5073
5074 phba->cfg_cq_max_proc_limit = (uint32_t)val;
5075
5076 /* set the values on the cq's */
5077 for (i = 0; i < phba->cfg_irq_chann; i++) {
5078 eq = phba->sli4_hba.hdwq[i].hba_eq;
5079 if (!eq)
5080 continue;
5081
5082 list_for_each_entry(cq, &eq->child_list, list)
5083 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
5084 cq->entry_count);
5085 }
5086
5087 return strlen(buf);
5088}
5089
5023/* 5090/*
5024 * lpfc_auto_imax: Controls Auto-interrupt coalescing values support. 5091 * lpfc_cq_max_proc_limit: The maximum number CQE entries processed in an
5025 * 0 No auto_imax support 5092 * itteration of CQ processing.
5026 * 1 auto imax on
5027 * Auto imax will change the value of fcp_imax on a per EQ basis, using
5028 * the EQ Delay Multiplier, depending on the activity for that EQ.
5029 * Value range [0,1]. Default value is 1.
5030 */ 5093 */
5031LPFC_ATTR_RW(auto_imax, 1, 0, 1, "Enable Auto imax"); 5094static int lpfc_cq_max_proc_limit = LPFC_CQ_DEF_MAX_PROC_LIMIT;
5095module_param(lpfc_cq_max_proc_limit, int, 0644);
5096MODULE_PARM_DESC(lpfc_cq_max_proc_limit,
5097 "Set the maximum number CQEs processed in an iteration of "
5098 "CQ processing");
5099lpfc_param_show(cq_max_proc_limit)
5100
5101/*
5102 * lpfc_cq_poll_threshold: Set the threshold of CQE completions in a
5103 * single handler call which should request a polled completion rather
5104 * than re-enabling interrupts.
5105 */
5106LPFC_ATTR_RW(cq_poll_threshold, LPFC_CQ_DEF_THRESHOLD_TO_POLL,
5107 LPFC_CQ_MIN_THRESHOLD_TO_POLL,
5108 LPFC_CQ_MAX_THRESHOLD_TO_POLL,
5109 "CQE Processing Threshold to enable Polling");
5110
5111/**
5112 * lpfc_cq_max_proc_limit_init - Set the initial cq max_proc_limit
5113 * @phba: lpfc_hba pointer.
5114 * @val: entry limit
5115 *
5116 * Description:
5117 * If val is in a valid range, then initialize the adapter's maximum
5118 * value.
5119 *
5120 * Returns:
5121 * Always returns 0 for success, even if value not always set to
5122 * requested value. If value out of range or not supported, will fall
5123 * back to default.
5124 **/
5125static int
5126lpfc_cq_max_proc_limit_init(struct lpfc_hba *phba, int val)
5127{
5128 phba->cfg_cq_max_proc_limit = LPFC_CQ_DEF_MAX_PROC_LIMIT;
5129
5130 if (phba->sli_rev != LPFC_SLI_REV4)
5131 return 0;
5132
5133 if (val >= LPFC_CQ_MIN_PROC_LIMIT && val <= LPFC_CQ_MAX_PROC_LIMIT) {
5134 phba->cfg_cq_max_proc_limit = val;
5135 return 0;
5136 }
5137
5138 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5139 "0371 "LPFC_DRIVER_NAME"_cq_max_proc_limit: "
5140 "%d out of range, using default\n",
5141 phba->cfg_cq_max_proc_limit);
5142
5143 return 0;
5144}
5145
5146static DEVICE_ATTR_RW(lpfc_cq_max_proc_limit);
5032 5147
5033/** 5148/**
5034 * lpfc_state_show - Display current driver CPU affinity 5149 * lpfc_state_show - Display current driver CPU affinity
@@ -5788,8 +5903,9 @@ struct device_attribute *lpfc_hba_attrs[] = {
5788 &dev_attr_lpfc_use_msi, 5903 &dev_attr_lpfc_use_msi,
5789 &dev_attr_lpfc_nvme_oas, 5904 &dev_attr_lpfc_nvme_oas,
5790 &dev_attr_lpfc_nvme_embed_cmd, 5905 &dev_attr_lpfc_nvme_embed_cmd,
5791 &dev_attr_lpfc_auto_imax,
5792 &dev_attr_lpfc_fcp_imax, 5906 &dev_attr_lpfc_fcp_imax,
5907 &dev_attr_lpfc_cq_poll_threshold,
5908 &dev_attr_lpfc_cq_max_proc_limit,
5793 &dev_attr_lpfc_fcp_cpu_map, 5909 &dev_attr_lpfc_fcp_cpu_map,
5794 &dev_attr_lpfc_hdw_queue, 5910 &dev_attr_lpfc_hdw_queue,
5795 &dev_attr_lpfc_irq_chann, 5911 &dev_attr_lpfc_irq_chann,
@@ -6834,8 +6950,9 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
6834 lpfc_use_msi_init(phba, lpfc_use_msi); 6950 lpfc_use_msi_init(phba, lpfc_use_msi);
6835 lpfc_nvme_oas_init(phba, lpfc_nvme_oas); 6951 lpfc_nvme_oas_init(phba, lpfc_nvme_oas);
6836 lpfc_nvme_embed_cmd_init(phba, lpfc_nvme_embed_cmd); 6952 lpfc_nvme_embed_cmd_init(phba, lpfc_nvme_embed_cmd);
6837 lpfc_auto_imax_init(phba, lpfc_auto_imax);
6838 lpfc_fcp_imax_init(phba, lpfc_fcp_imax); 6953 lpfc_fcp_imax_init(phba, lpfc_fcp_imax);
6954 lpfc_cq_poll_threshold_init(phba, lpfc_cq_poll_threshold);
6955 lpfc_cq_max_proc_limit_init(phba, lpfc_cq_max_proc_limit);
6839 lpfc_fcp_cpu_map_init(phba, lpfc_fcp_cpu_map); 6956 lpfc_fcp_cpu_map_init(phba, lpfc_fcp_cpu_map);
6840 lpfc_enable_hba_reset_init(phba, lpfc_enable_hba_reset); 6957 lpfc_enable_hba_reset_init(phba, lpfc_enable_hba_reset);
6841 lpfc_enable_hba_heartbeat_init(phba, lpfc_enable_hba_heartbeat); 6958 lpfc_enable_hba_heartbeat_init(phba, lpfc_enable_hba_heartbeat);
@@ -6888,9 +7005,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
6888 phba->cfg_enable_fc4_type |= LPFC_ENABLE_FCP; 7005 phba->cfg_enable_fc4_type |= LPFC_ENABLE_FCP;
6889 } 7006 }
6890 7007
6891 if (phba->cfg_auto_imax && !phba->cfg_fcp_imax) 7008 phba->cfg_auto_imax = (phba->cfg_fcp_imax) ? 0 : 1;
6892 phba->cfg_auto_imax = 0;
6893 phba->initial_imax = phba->cfg_fcp_imax;
6894 7009
6895 phba->cfg_enable_pbde = 0; 7010 phba->cfg_enable_pbde = 0;
6896 7011
diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c
index 72076b2cd4ff..16b461778e59 100644
--- a/drivers/scsi/lpfc/lpfc_debugfs.c
+++ b/drivers/scsi/lpfc/lpfc_debugfs.c
@@ -3766,10 +3766,10 @@ __lpfc_idiag_print_wq(struct lpfc_queue *qp, char *wqtype,
3766 (unsigned long long)qp->q_cnt_4); 3766 (unsigned long long)qp->q_cnt_4);
3767 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, 3767 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
3768 "\t\tWQID[%02d], QE-CNT[%04d], QE-SZ[%04d], " 3768 "\t\tWQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
3769 "HST-IDX[%04d], PRT-IDX[%04d], PST[%03d]", 3769 "HST-IDX[%04d], PRT-IDX[%04d], NTFI[%03d]",
3770 qp->queue_id, qp->entry_count, 3770 qp->queue_id, qp->entry_count,
3771 qp->entry_size, qp->host_index, 3771 qp->entry_size, qp->host_index,
3772 qp->hba_index, qp->entry_repost); 3772 qp->hba_index, qp->notify_interval);
3773 len += snprintf(pbuffer + len, 3773 len += snprintf(pbuffer + len,
3774 LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n"); 3774 LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n");
3775 return len; 3775 return len;
@@ -3819,10 +3819,10 @@ __lpfc_idiag_print_cq(struct lpfc_queue *qp, char *cqtype,
3819 qp->q_cnt_3, (unsigned long long)qp->q_cnt_4); 3819 qp->q_cnt_3, (unsigned long long)qp->q_cnt_4);
3820 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, 3820 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
3821 "\tCQID[%02d], QE-CNT[%04d], QE-SZ[%04d], " 3821 "\tCQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
3822 "HST-IDX[%04d], PRT-IDX[%04d], PST[%03d]", 3822 "HST-IDX[%04d], NTFI[%03d], PLMT[%03d]",
3823 qp->queue_id, qp->entry_count, 3823 qp->queue_id, qp->entry_count,
3824 qp->entry_size, qp->host_index, 3824 qp->entry_size, qp->host_index,
3825 qp->hba_index, qp->entry_repost); 3825 qp->notify_interval, qp->max_proc_limit);
3826 3826
3827 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n"); 3827 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n");
3828 3828
@@ -3845,15 +3845,15 @@ __lpfc_idiag_print_rqpair(struct lpfc_queue *qp, struct lpfc_queue *datqp,
3845 qp->q_cnt_3, (unsigned long long)qp->q_cnt_4); 3845 qp->q_cnt_3, (unsigned long long)qp->q_cnt_4);
3846 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, 3846 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
3847 "\t\tHQID[%02d], QE-CNT[%04d], QE-SZ[%04d], " 3847 "\t\tHQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
3848 "HST-IDX[%04d], PRT-IDX[%04d], PST[%03d]\n", 3848 "HST-IDX[%04d], PRT-IDX[%04d], NTFI[%03d]\n",
3849 qp->queue_id, qp->entry_count, qp->entry_size, 3849 qp->queue_id, qp->entry_count, qp->entry_size,
3850 qp->host_index, qp->hba_index, qp->entry_repost); 3850 qp->host_index, qp->hba_index, qp->notify_interval);
3851 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, 3851 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
3852 "\t\tDQID[%02d], QE-CNT[%04d], QE-SZ[%04d], " 3852 "\t\tDQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
3853 "HST-IDX[%04d], PRT-IDX[%04d], PST[%03d]\n", 3853 "HST-IDX[%04d], PRT-IDX[%04d], NTFI[%03d]\n",
3854 datqp->queue_id, datqp->entry_count, 3854 datqp->queue_id, datqp->entry_count,
3855 datqp->entry_size, datqp->host_index, 3855 datqp->entry_size, datqp->host_index,
3856 datqp->hba_index, datqp->entry_repost); 3856 datqp->hba_index, datqp->notify_interval);
3857 return len; 3857 return len;
3858} 3858}
3859 3859
@@ -3934,10 +3934,10 @@ __lpfc_idiag_print_eq(struct lpfc_queue *qp, char *eqtype,
3934 (unsigned long long)qp->q_cnt_4, qp->q_mode); 3934 (unsigned long long)qp->q_cnt_4, qp->q_mode);
3935 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, 3935 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
3936 "EQID[%02d], QE-CNT[%04d], QE-SZ[%04d], " 3936 "EQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
3937 "HST-IDX[%04d], PRT-IDX[%04d], PST[%03d] AFFIN[%03d]", 3937 "HST-IDX[%04d], NTFI[%03d], PLMT[%03d], AFFIN[%03d]",
3938 qp->queue_id, qp->entry_count, qp->entry_size, 3938 qp->queue_id, qp->entry_count, qp->entry_size,
3939 qp->host_index, qp->hba_index, qp->entry_repost, 3939 qp->host_index, qp->notify_interval,
3940 qp->chann); 3940 qp->max_proc_limit, qp->chann);
3941 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n"); 3941 len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n");
3942 3942
3943 return len; 3943 return len;
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 665852291a4f..c9a056ef321a 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -208,7 +208,14 @@ struct lpfc_sli_intf {
208/* Configuration of Interrupts / sec for entire HBA port */ 208/* Configuration of Interrupts / sec for entire HBA port */
209#define LPFC_MIN_IMAX 5000 209#define LPFC_MIN_IMAX 5000
210#define LPFC_MAX_IMAX 5000000 210#define LPFC_MAX_IMAX 5000000
211#define LPFC_DEF_IMAX 150000 211#define LPFC_DEF_IMAX 0
212
213#define LPFC_IMAX_THRESHOLD 1000
214#define LPFC_MAX_AUTO_EQ_DELAY 120
215#define LPFC_EQ_DELAY_STEP 15
216#define LPFC_EQD_ISR_TRIGGER 20000
217/* 1s intervals */
218#define LPFC_EQ_DELAY_MSECS 1000
212 219
213#define LPFC_MIN_CPU_MAP 0 220#define LPFC_MIN_CPU_MAP 0
214#define LPFC_MAX_CPU_MAP 1 221#define LPFC_MAX_CPU_MAP 1
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 22aec1a9b689..3fa7240a8e31 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -1251,6 +1251,69 @@ lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1251 return; 1251 return;
1252} 1252}
1253 1253
1254static void
1255lpfc_hb_eq_delay_work(struct work_struct *work)
1256{
1257 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1258 struct lpfc_hba, eq_delay_work);
1259 struct lpfc_eq_intr_info *eqi, *eqi_new;
1260 struct lpfc_queue *eq, *eq_next;
1261 unsigned char *eqcnt = NULL;
1262 uint32_t usdelay;
1263 int i;
1264
1265 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING)
1266 return;
1267
1268 if (phba->link_state == LPFC_HBA_ERROR ||
1269 phba->pport->fc_flag & FC_OFFLINE_MODE)
1270 goto requeue;
1271
1272 eqcnt = kcalloc(num_possible_cpus(), sizeof(unsigned char),
1273 GFP_KERNEL);
1274 if (!eqcnt)
1275 goto requeue;
1276
1277 for (i = 0; i < phba->cfg_irq_chann; i++) {
1278 eq = phba->sli4_hba.hdwq[i].hba_eq;
1279 if (eq && eqcnt[eq->last_cpu] < 2)
1280 eqcnt[eq->last_cpu]++;
1281 continue;
1282 }
1283
1284 for_each_present_cpu(i) {
1285 if (phba->cfg_irq_chann > 1 && eqcnt[i] < 2)
1286 continue;
1287
1288 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1289
1290 usdelay = (eqi->icnt / LPFC_IMAX_THRESHOLD) *
1291 LPFC_EQ_DELAY_STEP;
1292 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1293 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1294
1295 eqi->icnt = 0;
1296
1297 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1298 if (eq->last_cpu != i) {
1299 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1300 eq->last_cpu);
1301 list_move_tail(&eq->cpu_list, &eqi_new->list);
1302 continue;
1303 }
1304 if (usdelay != eq->q_mode)
1305 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1306 usdelay);
1307 }
1308 }
1309
1310 kfree(eqcnt);
1311
1312requeue:
1313 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1314 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1315}
1316
1254/** 1317/**
1255 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1318 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1256 * @phba: pointer to lpfc hba data structure. 1319 * @phba: pointer to lpfc hba data structure.
@@ -1303,16 +1366,6 @@ lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1303 int retval, i; 1366 int retval, i;
1304 struct lpfc_sli *psli = &phba->sli; 1367 struct lpfc_sli *psli = &phba->sli;
1305 LIST_HEAD(completions); 1368 LIST_HEAD(completions);
1306 struct lpfc_queue *qp;
1307 unsigned long time_elapsed;
1308 uint32_t tick_cqe, max_cqe, val;
1309 uint64_t tot, data1, data2, data3;
1310 struct lpfc_nvmet_tgtport *tgtp;
1311 struct lpfc_register reg_data;
1312 struct nvme_fc_local_port *localport;
1313 struct lpfc_nvme_lport *lport;
1314 struct lpfc_fc4_ctrl_stat *cstat;
1315 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
1316 1369
1317 if (phba->cfg_xri_rebalancing) { 1370 if (phba->cfg_xri_rebalancing) {
1318 /* Multi-XRI pools handler */ 1371 /* Multi-XRI pools handler */
@@ -1332,104 +1385,6 @@ lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1332 (phba->pport->fc_flag & FC_OFFLINE_MODE)) 1385 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1333 return; 1386 return;
1334 1387
1335 if (phba->cfg_auto_imax) {
1336 if (!phba->last_eqdelay_time) {
1337 phba->last_eqdelay_time = jiffies;
1338 goto skip_eqdelay;
1339 }
1340 time_elapsed = jiffies - phba->last_eqdelay_time;
1341 phba->last_eqdelay_time = jiffies;
1342
1343 tot = 0xffff;
1344 /* Check outstanding IO count */
1345 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1346 if (phba->nvmet_support) {
1347 tgtp = phba->targetport->private;
1348 /* Calculate outstanding IOs */
1349 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1350 tot += atomic_read(&tgtp->xmt_fcp_release);
1351 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
1352 } else {
1353 localport = phba->pport->localport;
1354 if (!localport || !localport->private)
1355 goto skip_eqdelay;
1356 lport = (struct lpfc_nvme_lport *)
1357 localport->private;
1358 tot = 0;
1359 for (i = 0;
1360 i < phba->cfg_hdw_queue; i++) {
1361 cstat =
1362 &phba->sli4_hba.hdwq[i].nvme_cstat;
1363 data1 = cstat->input_requests;
1364 data2 = cstat->output_requests;
1365 data3 = cstat->control_requests;
1366 tot += (data1 + data2 + data3);
1367 tot -= cstat->io_cmpls;
1368 }
1369 }
1370 }
1371
1372 /* Interrupts per sec per EQ */
1373 val = phba->cfg_fcp_imax / phba->cfg_irq_chann;
1374 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1375
1376 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1377 max_cqe = time_elapsed * tick_cqe;
1378
1379 for (i = 0; i < phba->cfg_irq_chann; i++) {
1380 /* Fast-path EQ */
1381 qp = phba->sli4_hba.hdwq[i].hba_eq;
1382 if (!qp)
1383 continue;
1384
1385 /* Use no EQ delay if we don't have many outstanding
1386 * IOs, or if we are only processing 1 CQE/ISR or less.
1387 * Otherwise, assume we can process up to lpfc_fcp_imax
1388 * interrupts per HBA.
1389 */
1390 if (tot < LPFC_NODELAY_MAX_IO ||
1391 qp->EQ_cqe_cnt <= max_cqe)
1392 val = 0;
1393 else
1394 val = phba->cfg_fcp_imax;
1395
1396 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1397 /* Use EQ Delay Register method */
1398
1399 /* Convert for EQ Delay register */
1400 if (val) {
1401 /* First, interrupts per sec per EQ */
1402 val = phba->cfg_fcp_imax /
1403 phba->cfg_irq_chann;
1404
1405 /* us delay between each interrupt */
1406 val = LPFC_SEC_TO_USEC / val;
1407 }
1408 if (val != qp->q_mode) {
1409 reg_data.word0 = 0;
1410 bf_set(lpfc_sliport_eqdelay_id,
1411 &reg_data, qp->queue_id);
1412 bf_set(lpfc_sliport_eqdelay_delay,
1413 &reg_data, val);
1414 writel(reg_data.word0, eqdreg);
1415 }
1416 } else {
1417 /* Use mbox command method */
1418 if (val != qp->q_mode)
1419 lpfc_modify_hba_eq_delay(phba, i,
1420 1, val);
1421 }
1422
1423 /*
1424 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1425 * between interrupts for EQDR.
1426 */
1427 qp->q_mode = val;
1428 qp->EQ_cqe_cnt = 0;
1429 }
1430 }
1431
1432skip_eqdelay:
1433 spin_lock_irq(&phba->pport->work_port_lock); 1388 spin_lock_irq(&phba->pport->work_port_lock);
1434 1389
1435 if (time_after(phba->last_completion_time + 1390 if (time_after(phba->last_completion_time +
@@ -2986,6 +2941,7 @@ lpfc_stop_hba_timers(struct lpfc_hba *phba)
2986{ 2941{
2987 if (phba->pport) 2942 if (phba->pport)
2988 lpfc_stop_vport_timers(phba->pport); 2943 lpfc_stop_vport_timers(phba->pport);
2944 cancel_delayed_work_sync(&phba->eq_delay_work);
2989 del_timer_sync(&phba->sli.mbox_tmo); 2945 del_timer_sync(&phba->sli.mbox_tmo);
2990 del_timer_sync(&phba->fabric_block_timer); 2946 del_timer_sync(&phba->fabric_block_timer);
2991 del_timer_sync(&phba->eratt_poll); 2947 del_timer_sync(&phba->eratt_poll);
@@ -6234,6 +6190,8 @@ lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
6234 /* Heartbeat timer */ 6190 /* Heartbeat timer */
6235 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 6191 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
6236 6192
6193 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
6194
6237 return 0; 6195 return 0;
6238} 6196}
6239 6197
@@ -6849,6 +6807,13 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
6849 goto out_free_hba_eq_hdl; 6807 goto out_free_hba_eq_hdl;
6850 } 6808 }
6851 6809
6810 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
6811 if (!phba->sli4_hba.eq_info) {
6812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6813 "3321 Failed allocation for per_cpu stats\n");
6814 rc = -ENOMEM;
6815 goto out_free_hba_cpu_map;
6816 }
6852 /* 6817 /*
6853 * Enable sr-iov virtual functions if supported and configured 6818 * Enable sr-iov virtual functions if supported and configured
6854 * through the module parameter. 6819 * through the module parameter.
@@ -6868,6 +6833,8 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
6868 6833
6869 return 0; 6834 return 0;
6870 6835
6836out_free_hba_cpu_map:
6837 kfree(phba->sli4_hba.cpu_map);
6871out_free_hba_eq_hdl: 6838out_free_hba_eq_hdl:
6872 kfree(phba->sli4_hba.hba_eq_hdl); 6839 kfree(phba->sli4_hba.hba_eq_hdl);
6873out_free_fcf_rr_bmask: 6840out_free_fcf_rr_bmask:
@@ -6897,6 +6864,8 @@ lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6897{ 6864{
6898 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 6865 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6899 6866
6867 free_percpu(phba->sli4_hba.eq_info);
6868
6900 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 6869 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6901 kfree(phba->sli4_hba.cpu_map); 6870 kfree(phba->sli4_hba.cpu_map);
6902 phba->sli4_hba.num_present_cpu = 0; 6871 phba->sli4_hba.num_present_cpu = 0;
@@ -8753,6 +8722,7 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
8753 struct lpfc_queue *qdesc; 8722 struct lpfc_queue *qdesc;
8754 int idx, eqidx; 8723 int idx, eqidx;
8755 struct lpfc_sli4_hdw_queue *qp; 8724 struct lpfc_sli4_hdw_queue *qp;
8725 struct lpfc_eq_intr_info *eqi;
8756 8726
8757 /* 8727 /*
8758 * Create HBA Record arrays. 8728 * Create HBA Record arrays.
@@ -8865,6 +8835,9 @@ lpfc_sli4_queue_create(struct lpfc_hba *phba)
8865 qdesc->chann = lpfc_find_cpu_handle(phba, eqidx, 8835 qdesc->chann = lpfc_find_cpu_handle(phba, eqidx,
8866 LPFC_FIND_BY_EQ); 8836 LPFC_FIND_BY_EQ);
8867 phba->sli4_hba.hdwq[idx].hba_eq = qdesc; 8837 phba->sli4_hba.hdwq[idx].hba_eq = qdesc;
8838 qdesc->last_cpu = qdesc->chann;
8839 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
8840 list_add(&qdesc->cpu_list, &eqi->list);
8868 } 8841 }
8869 8842
8870 8843
@@ -10246,13 +10219,13 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
10246 case LPFC_SLI_INTF_IF_TYPE_0: 10219 case LPFC_SLI_INTF_IF_TYPE_0:
10247 case LPFC_SLI_INTF_IF_TYPE_2: 10220 case LPFC_SLI_INTF_IF_TYPE_2:
10248 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 10221 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
10249 phba->sli4_hba.sli4_eq_release = lpfc_sli4_eq_release; 10222 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
10250 phba->sli4_hba.sli4_cq_release = lpfc_sli4_cq_release; 10223 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
10251 break; 10224 break;
10252 case LPFC_SLI_INTF_IF_TYPE_6: 10225 case LPFC_SLI_INTF_IF_TYPE_6:
10253 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 10226 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
10254 phba->sli4_hba.sli4_eq_release = lpfc_sli4_if6_eq_release; 10227 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
10255 phba->sli4_hba.sli4_cq_release = lpfc_sli4_if6_cq_release; 10228 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
10256 break; 10229 break;
10257 default: 10230 default:
10258 break; 10231 break;
@@ -10773,6 +10746,14 @@ lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
10773 cpup++; 10746 cpup++;
10774 } 10747 }
10775 10748
10749 for_each_possible_cpu(i) {
10750 struct lpfc_eq_intr_info *eqi =
10751 per_cpu_ptr(phba->sli4_hba.eq_info, i);
10752
10753 INIT_LIST_HEAD(&eqi->list);
10754 eqi->icnt = 0;
10755 }
10756
10776 /* 10757 /*
10777 * If the number of IRQ vectors == number of CPUs, 10758 * If the number of IRQ vectors == number of CPUs,
10778 * mapping is pretty simple: 1 to 1. 10759 * mapping is pretty simple: 1 to 1.
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index a3477cecb0c9..ec385d3413f2 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -78,12 +78,13 @@ static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *); 78 struct hbq_dmabuf *);
79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport, 79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf); 80 struct hbq_dmabuf *dmabuf);
81static int lpfc_sli4_fp_handle_cqe(struct lpfc_hba *, struct lpfc_queue *, 81static bool lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba,
82 struct lpfc_cqe *); 82 struct lpfc_queue *cq, struct lpfc_cqe *cqe);
83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *, 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
84 int); 84 int);
85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, 85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
86 struct lpfc_eqe *eqe, uint32_t qidx); 86 struct lpfc_queue *eq,
87 struct lpfc_eqe *eqe);
87static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba); 88static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
88static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba); 89static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
89static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba, 90static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba,
@@ -160,7 +161,7 @@ lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
160 } 161 }
161 q->WQ_posted++; 162 q->WQ_posted++;
162 /* set consumption flag every once in a while */ 163 /* set consumption flag every once in a while */
163 if (!((q->host_index + 1) % q->entry_repost)) 164 if (!((q->host_index + 1) % q->notify_interval))
164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1); 165 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
165 else 166 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0); 167 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
@@ -325,29 +326,16 @@ lpfc_sli4_mq_release(struct lpfc_queue *q)
325static struct lpfc_eqe * 326static struct lpfc_eqe *
326lpfc_sli4_eq_get(struct lpfc_queue *q) 327lpfc_sli4_eq_get(struct lpfc_queue *q)
327{ 328{
328 struct lpfc_hba *phba;
329 struct lpfc_eqe *eqe; 329 struct lpfc_eqe *eqe;
330 uint32_t idx;
331 330
332 /* sanity check on queue memory */ 331 /* sanity check on queue memory */
333 if (unlikely(!q)) 332 if (unlikely(!q))
334 return NULL; 333 return NULL;
335 phba = q->phba; 334 eqe = q->qe[q->host_index].eqe;
336 eqe = q->qe[q->hba_index].eqe;
337 335
338 /* If the next EQE is not valid then we are done */ 336 /* If the next EQE is not valid then we are done */
339 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid) 337 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
340 return NULL; 338 return NULL;
341 /* If the host has not yet processed the next entry then we are done */
342 idx = ((q->hba_index + 1) % q->entry_count);
343 if (idx == q->host_index)
344 return NULL;
345
346 q->hba_index = idx;
347 /* if the index wrapped around, toggle the valid bit */
348 if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
349 q->qe_valid = (q->qe_valid) ? 0 : 1;
350
351 339
352 /* 340 /*
353 * insert barrier for instruction interlock : data from the hardware 341 * insert barrier for instruction interlock : data from the hardware
@@ -397,44 +385,25 @@ lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
397} 385}
398 386
399/** 387/**
400 * lpfc_sli4_eq_release - Indicates the host has finished processing an EQ 388 * lpfc_sli4_write_eq_db - write EQ DB for eqe's consumed or arm state
389 * @phba: adapter with EQ
401 * @q: The Event Queue that the host has completed processing for. 390 * @q: The Event Queue that the host has completed processing for.
391 * @count: Number of elements that have been consumed
402 * @arm: Indicates whether the host wants to arms this CQ. 392 * @arm: Indicates whether the host wants to arms this CQ.
403 * 393 *
404 * This routine will mark all Event Queue Entries on @q, from the last 394 * This routine will notify the HBA, by ringing the doorbell, that count
405 * known completed entry to the last entry that was processed, as completed 395 * number of EQEs have been processed. The @arm parameter indicates whether
406 * by clearing the valid bit for each completion queue entry. Then it will 396 * the queue should be rearmed when ringing the doorbell.
407 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
408 * The internal host index in the @q will be updated by this routine to indicate
409 * that the host has finished processing the entries. The @arm parameter
410 * indicates that the queue should be rearmed when ringing the doorbell.
411 *
412 * This function will return the number of EQEs that were popped.
413 **/ 397 **/
414uint32_t 398void
415lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm) 399lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
400 uint32_t count, bool arm)
416{ 401{
417 uint32_t released = 0;
418 struct lpfc_hba *phba;
419 struct lpfc_eqe *temp_eqe;
420 struct lpfc_register doorbell; 402 struct lpfc_register doorbell;
421 403
422 /* sanity check on queue memory */ 404 /* sanity check on queue memory */
423 if (unlikely(!q)) 405 if (unlikely(!q || (count == 0 && !arm)))
424 return 0; 406 return;
425 phba = q->phba;
426
427 /* while there are valid entries */
428 while (q->hba_index != q->host_index) {
429 if (!phba->sli4_hba.pc_sli4_params.eqav) {
430 temp_eqe = q->qe[q->host_index].eqe;
431 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
432 }
433 released++;
434 q->host_index = ((q->host_index + 1) % q->entry_count);
435 }
436 if (unlikely(released == 0 && !arm))
437 return 0;
438 407
439 /* ring doorbell for number popped */ 408 /* ring doorbell for number popped */
440 doorbell.word0 = 0; 409 doorbell.word0 = 0;
@@ -442,7 +411,7 @@ lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
442 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1); 411 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
443 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1); 412 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
444 } 413 }
445 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released); 414 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
446 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT); 415 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
447 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell, 416 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
448 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT)); 417 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
@@ -451,60 +420,112 @@ lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
451 /* PCI read to flush PCI pipeline on re-arming for INTx mode */ 420 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
452 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM)) 421 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
453 readl(q->phba->sli4_hba.EQDBregaddr); 422 readl(q->phba->sli4_hba.EQDBregaddr);
454 return released;
455} 423}
456 424
457/** 425/**
458 * lpfc_sli4_if6_eq_release - Indicates the host has finished processing an EQ 426 * lpfc_sli4_if6_write_eq_db - write EQ DB for eqe's consumed or arm state
427 * @phba: adapter with EQ
459 * @q: The Event Queue that the host has completed processing for. 428 * @q: The Event Queue that the host has completed processing for.
429 * @count: Number of elements that have been consumed
460 * @arm: Indicates whether the host wants to arms this CQ. 430 * @arm: Indicates whether the host wants to arms this CQ.
461 * 431 *
462 * This routine will mark all Event Queue Entries on @q, from the last 432 * This routine will notify the HBA, by ringing the doorbell, that count
463 * known completed entry to the last entry that was processed, as completed 433 * number of EQEs have been processed. The @arm parameter indicates whether
464 * by clearing the valid bit for each completion queue entry. Then it will 434 * the queue should be rearmed when ringing the doorbell.
465 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
466 * The internal host index in the @q will be updated by this routine to indicate
467 * that the host has finished processing the entries. The @arm parameter
468 * indicates that the queue should be rearmed when ringing the doorbell.
469 *
470 * This function will return the number of EQEs that were popped.
471 **/ 435 **/
472uint32_t 436void
473lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm) 437lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
438 uint32_t count, bool arm)
474{ 439{
475 uint32_t released = 0;
476 struct lpfc_hba *phba;
477 struct lpfc_eqe *temp_eqe;
478 struct lpfc_register doorbell; 440 struct lpfc_register doorbell;
479 441
480 /* sanity check on queue memory */ 442 /* sanity check on queue memory */
481 if (unlikely(!q)) 443 if (unlikely(!q || (count == 0 && !arm)))
482 return 0; 444 return;
483 phba = q->phba;
484
485 /* while there are valid entries */
486 while (q->hba_index != q->host_index) {
487 if (!phba->sli4_hba.pc_sli4_params.eqav) {
488 temp_eqe = q->qe[q->host_index].eqe;
489 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
490 }
491 released++;
492 q->host_index = ((q->host_index + 1) % q->entry_count);
493 }
494 if (unlikely(released == 0 && !arm))
495 return 0;
496 445
497 /* ring doorbell for number popped */ 446 /* ring doorbell for number popped */
498 doorbell.word0 = 0; 447 doorbell.word0 = 0;
499 if (arm) 448 if (arm)
500 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1); 449 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
501 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, released); 450 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, count);
502 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id); 451 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
503 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr); 452 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
504 /* PCI read to flush PCI pipeline on re-arming for INTx mode */ 453 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
505 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM)) 454 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
506 readl(q->phba->sli4_hba.EQDBregaddr); 455 readl(q->phba->sli4_hba.EQDBregaddr);
507 return released; 456}
457
458static void
459__lpfc_sli4_consume_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
460 struct lpfc_eqe *eqe)
461{
462 if (!phba->sli4_hba.pc_sli4_params.eqav)
463 bf_set_le32(lpfc_eqe_valid, eqe, 0);
464
465 eq->host_index = ((eq->host_index + 1) % eq->entry_count);
466
467 /* if the index wrapped around, toggle the valid bit */
468 if (phba->sli4_hba.pc_sli4_params.eqav && !eq->host_index)
469 eq->qe_valid = (eq->qe_valid) ? 0 : 1;
470}
471
472static void
473lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
474{
475 struct lpfc_eqe *eqe;
476 uint32_t count = 0;
477
478 /* walk all the EQ entries and drop on the floor */
479 eqe = lpfc_sli4_eq_get(eq);
480 while (eqe) {
481 __lpfc_sli4_consume_eqe(phba, eq, eqe);
482 count++;
483 eqe = lpfc_sli4_eq_get(eq);
484 }
485
486 /* Clear and re-arm the EQ */
487 phba->sli4_hba.sli4_write_eq_db(phba, eq, count, LPFC_QUEUE_REARM);
488}
489
490static int
491lpfc_sli4_process_eq(struct lpfc_hba *phba, struct lpfc_queue *eq)
492{
493 struct lpfc_eqe *eqe;
494 int count = 0, consumed = 0;
495
496 if (cmpxchg(&eq->queue_claimed, 0, 1) != 0)
497 goto rearm_and_exit;
498
499 eqe = lpfc_sli4_eq_get(eq);
500 while (eqe) {
501 lpfc_sli4_hba_handle_eqe(phba, eq, eqe);
502 __lpfc_sli4_consume_eqe(phba, eq, eqe);
503
504 consumed++;
505 if (!(++count % eq->max_proc_limit))
506 break;
507
508 if (!(count % eq->notify_interval)) {
509 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed,
510 LPFC_QUEUE_NOARM);
511 consumed = 0;
512 }
513
514 eqe = lpfc_sli4_eq_get(eq);
515 }
516 eq->EQ_processed += count;
517
518 /* Track the max number of EQEs processed in 1 intr */
519 if (count > eq->EQ_max_eqe)
520 eq->EQ_max_eqe = count;
521
522 eq->queue_claimed = 0;
523
524rearm_and_exit:
525 /* Always clear and re-arm the EQ */
526 phba->sli4_hba.sli4_write_eq_db(phba, eq, consumed, LPFC_QUEUE_REARM);
527
528 return count;
508} 529}
509 530
510/** 531/**
@@ -519,28 +540,16 @@ lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
519static struct lpfc_cqe * 540static struct lpfc_cqe *
520lpfc_sli4_cq_get(struct lpfc_queue *q) 541lpfc_sli4_cq_get(struct lpfc_queue *q)
521{ 542{
522 struct lpfc_hba *phba;
523 struct lpfc_cqe *cqe; 543 struct lpfc_cqe *cqe;
524 uint32_t idx;
525 544
526 /* sanity check on queue memory */ 545 /* sanity check on queue memory */
527 if (unlikely(!q)) 546 if (unlikely(!q))
528 return NULL; 547 return NULL;
529 phba = q->phba; 548 cqe = q->qe[q->host_index].cqe;
530 cqe = q->qe[q->hba_index].cqe;
531 549
532 /* If the next CQE is not valid then we are done */ 550 /* If the next CQE is not valid then we are done */
533 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid) 551 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
534 return NULL; 552 return NULL;
535 /* If the host has not yet processed the next entry then we are done */
536 idx = ((q->hba_index + 1) % q->entry_count);
537 if (idx == q->host_index)
538 return NULL;
539
540 q->hba_index = idx;
541 /* if the index wrapped around, toggle the valid bit */
542 if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
543 q->qe_valid = (q->qe_valid) ? 0 : 1;
544 553
545 /* 554 /*
546 * insert barrier for instruction interlock : data from the hardware 555 * insert barrier for instruction interlock : data from the hardware
@@ -554,107 +563,81 @@ lpfc_sli4_cq_get(struct lpfc_queue *q)
554 return cqe; 563 return cqe;
555} 564}
556 565
566static void
567__lpfc_sli4_consume_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
568 struct lpfc_cqe *cqe)
569{
570 if (!phba->sli4_hba.pc_sli4_params.cqav)
571 bf_set_le32(lpfc_cqe_valid, cqe, 0);
572
573 cq->host_index = ((cq->host_index + 1) % cq->entry_count);
574
575 /* if the index wrapped around, toggle the valid bit */
576 if (phba->sli4_hba.pc_sli4_params.cqav && !cq->host_index)
577 cq->qe_valid = (cq->qe_valid) ? 0 : 1;
578}
579
557/** 580/**
558 * lpfc_sli4_cq_release - Indicates the host has finished processing a CQ 581 * lpfc_sli4_write_cq_db - write cq DB for entries consumed or arm state.
582 * @phba: the adapter with the CQ
559 * @q: The Completion Queue that the host has completed processing for. 583 * @q: The Completion Queue that the host has completed processing for.
584 * @count: the number of elements that were consumed
560 * @arm: Indicates whether the host wants to arms this CQ. 585 * @arm: Indicates whether the host wants to arms this CQ.
561 * 586 *
562 * This routine will mark all Completion queue entries on @q, from the last 587 * This routine will notify the HBA, by ringing the doorbell, that the
563 * known completed entry to the last entry that was processed, as completed 588 * CQEs have been processed. The @arm parameter specifies whether the
564 * by clearing the valid bit for each completion queue entry. Then it will 589 * queue should be rearmed when ringing the doorbell.
565 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
566 * The internal host index in the @q will be updated by this routine to indicate
567 * that the host has finished processing the entries. The @arm parameter
568 * indicates that the queue should be rearmed when ringing the doorbell.
569 *
570 * This function will return the number of CQEs that were released.
571 **/ 590 **/
572uint32_t 591void
573lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm) 592lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
593 uint32_t count, bool arm)
574{ 594{
575 uint32_t released = 0;
576 struct lpfc_hba *phba;
577 struct lpfc_cqe *temp_qe;
578 struct lpfc_register doorbell; 595 struct lpfc_register doorbell;
579 596
580 /* sanity check on queue memory */ 597 /* sanity check on queue memory */
581 if (unlikely(!q)) 598 if (unlikely(!q || (count == 0 && !arm)))
582 return 0; 599 return;
583 phba = q->phba;
584
585 /* while there are valid entries */
586 while (q->hba_index != q->host_index) {
587 if (!phba->sli4_hba.pc_sli4_params.cqav) {
588 temp_qe = q->qe[q->host_index].cqe;
589 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
590 }
591 released++;
592 q->host_index = ((q->host_index + 1) % q->entry_count);
593 }
594 if (unlikely(released == 0 && !arm))
595 return 0;
596 600
597 /* ring doorbell for number popped */ 601 /* ring doorbell for number popped */
598 doorbell.word0 = 0; 602 doorbell.word0 = 0;
599 if (arm) 603 if (arm)
600 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1); 604 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
601 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released); 605 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, count);
602 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION); 606 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
603 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell, 607 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
604 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT)); 608 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
605 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id); 609 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
606 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr); 610 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
607 return released;
608} 611}
609 612
610/** 613/**
611 * lpfc_sli4_if6_cq_release - Indicates the host has finished processing a CQ 614 * lpfc_sli4_if6_write_cq_db - write cq DB for entries consumed or arm state.
615 * @phba: the adapter with the CQ
612 * @q: The Completion Queue that the host has completed processing for. 616 * @q: The Completion Queue that the host has completed processing for.
617 * @count: the number of elements that were consumed
613 * @arm: Indicates whether the host wants to arms this CQ. 618 * @arm: Indicates whether the host wants to arms this CQ.
614 * 619 *
615 * This routine will mark all Completion queue entries on @q, from the last 620 * This routine will notify the HBA, by ringing the doorbell, that the
616 * known completed entry to the last entry that was processed, as completed 621 * CQEs have been processed. The @arm parameter specifies whether the
617 * by clearing the valid bit for each completion queue entry. Then it will 622 * queue should be rearmed when ringing the doorbell.
618 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
619 * The internal host index in the @q will be updated by this routine to indicate
620 * that the host has finished processing the entries. The @arm parameter
621 * indicates that the queue should be rearmed when ringing the doorbell.
622 *
623 * This function will return the number of CQEs that were released.
624 **/ 623 **/
625uint32_t 624void
626lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm) 625lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
626 uint32_t count, bool arm)
627{ 627{
628 uint32_t released = 0;
629 struct lpfc_hba *phba;
630 struct lpfc_cqe *temp_qe;
631 struct lpfc_register doorbell; 628 struct lpfc_register doorbell;
632 629
633 /* sanity check on queue memory */ 630 /* sanity check on queue memory */
634 if (unlikely(!q)) 631 if (unlikely(!q || (count == 0 && !arm)))
635 return 0; 632 return;
636 phba = q->phba;
637
638 /* while there are valid entries */
639 while (q->hba_index != q->host_index) {
640 if (!phba->sli4_hba.pc_sli4_params.cqav) {
641 temp_qe = q->qe[q->host_index].cqe;
642 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
643 }
644 released++;
645 q->host_index = ((q->host_index + 1) % q->entry_count);
646 }
647 if (unlikely(released == 0 && !arm))
648 return 0;
649 633
650 /* ring doorbell for number popped */ 634 /* ring doorbell for number popped */
651 doorbell.word0 = 0; 635 doorbell.word0 = 0;
652 if (arm) 636 if (arm)
653 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1); 637 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
654 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, released); 638 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, count);
655 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id); 639 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
656 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr); 640 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
657 return released;
658} 641}
659 642
660/** 643/**
@@ -703,15 +686,15 @@ lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
703 hq->RQ_buf_posted++; 686 hq->RQ_buf_posted++;
704 687
705 /* Ring The Header Receive Queue Doorbell */ 688 /* Ring The Header Receive Queue Doorbell */
706 if (!(hq->host_index % hq->entry_repost)) { 689 if (!(hq->host_index % hq->notify_interval)) {
707 doorbell.word0 = 0; 690 doorbell.word0 = 0;
708 if (hq->db_format == LPFC_DB_RING_FORMAT) { 691 if (hq->db_format == LPFC_DB_RING_FORMAT) {
709 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell, 692 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
710 hq->entry_repost); 693 hq->notify_interval);
711 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id); 694 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
712 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) { 695 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
713 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell, 696 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
714 hq->entry_repost); 697 hq->notify_interval);
715 bf_set(lpfc_rq_db_list_fm_index, &doorbell, 698 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
716 hq->host_index); 699 hq->host_index);
717 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id); 700 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
@@ -5571,30 +5554,30 @@ lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5571 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba; 5554 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
5572 struct lpfc_sli4_hdw_queue *qp; 5555 struct lpfc_sli4_hdw_queue *qp;
5573 5556
5574 sli4_hba->sli4_cq_release(sli4_hba->mbx_cq, LPFC_QUEUE_REARM); 5557 sli4_hba->sli4_write_cq_db(phba, sli4_hba->mbx_cq, 0, LPFC_QUEUE_REARM);
5575 sli4_hba->sli4_cq_release(sli4_hba->els_cq, LPFC_QUEUE_REARM); 5558 sli4_hba->sli4_write_cq_db(phba, sli4_hba->els_cq, 0, LPFC_QUEUE_REARM);
5576 if (sli4_hba->nvmels_cq) 5559 if (sli4_hba->nvmels_cq)
5577 sli4_hba->sli4_cq_release(sli4_hba->nvmels_cq, 5560 sli4_hba->sli4_write_cq_db(phba, sli4_hba->nvmels_cq, 0,
5578 LPFC_QUEUE_REARM); 5561 LPFC_QUEUE_REARM);
5579 5562
5580 qp = sli4_hba->hdwq; 5563 qp = sli4_hba->hdwq;
5581 if (sli4_hba->hdwq) { 5564 if (sli4_hba->hdwq) {
5582 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 5565 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
5583 sli4_hba->sli4_cq_release(qp[qidx].fcp_cq, 5566 sli4_hba->sli4_write_cq_db(phba, qp[qidx].fcp_cq, 0,
5584 LPFC_QUEUE_REARM); 5567 LPFC_QUEUE_REARM);
5585 sli4_hba->sli4_cq_release(qp[qidx].nvme_cq, 5568 sli4_hba->sli4_write_cq_db(phba, qp[qidx].nvme_cq, 0,
5586 LPFC_QUEUE_REARM); 5569 LPFC_QUEUE_REARM);
5587 } 5570 }
5588 5571
5589 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) 5572 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++)
5590 sli4_hba->sli4_eq_release(qp[qidx].hba_eq, 5573 sli4_hba->sli4_write_eq_db(phba, qp[qidx].hba_eq,
5591 LPFC_QUEUE_REARM); 5574 0, LPFC_QUEUE_REARM);
5592 } 5575 }
5593 5576
5594 if (phba->nvmet_support) { 5577 if (phba->nvmet_support) {
5595 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) { 5578 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
5596 sli4_hba->sli4_cq_release( 5579 sli4_hba->sli4_write_cq_db(phba,
5597 sli4_hba->nvmet_cqset[qidx], 5580 sli4_hba->nvmet_cqset[qidx], 0,
5598 LPFC_QUEUE_REARM); 5581 LPFC_QUEUE_REARM);
5599 } 5582 }
5600 } 5583 }
@@ -7698,6 +7681,11 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7698 phba->hb_outstanding = 0; 7681 phba->hb_outstanding = 0;
7699 phba->last_completion_time = jiffies; 7682 phba->last_completion_time = jiffies;
7700 7683
7684 /* start eq_delay heartbeat */
7685 if (phba->cfg_auto_imax)
7686 queue_delayed_work(phba->wq, &phba->eq_delay_work,
7687 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
7688
7701 /* Start error attention (ERATT) polling timer */ 7689 /* Start error attention (ERATT) polling timer */
7702 mod_timer(&phba->eratt_poll, 7690 mod_timer(&phba->eratt_poll,
7703 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); 7691 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
@@ -7869,7 +7857,6 @@ lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7869 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba; 7857 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
7870 uint32_t eqidx; 7858 uint32_t eqidx;
7871 struct lpfc_queue *fpeq = NULL; 7859 struct lpfc_queue *fpeq = NULL;
7872 struct lpfc_eqe *eqe;
7873 bool mbox_pending; 7860 bool mbox_pending;
7874 7861
7875 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4)) 7862 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
@@ -7903,14 +7890,11 @@ lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7903 */ 7890 */
7904 7891
7905 if (mbox_pending) 7892 if (mbox_pending)
7906 while ((eqe = lpfc_sli4_eq_get(fpeq))) { 7893 /* process and rearm the EQ */
7907 lpfc_sli4_hba_handle_eqe(phba, eqe, eqidx); 7894 lpfc_sli4_process_eq(phba, fpeq);
7908 fpeq->EQ_processed++; 7895 else
7909 } 7896 /* Always clear and re-arm the EQ */
7910 7897 sli4_hba->sli4_write_eq_db(phba, fpeq, 0, LPFC_QUEUE_REARM);
7911 /* Always clear and re-arm the EQ */
7912
7913 sli4_hba->sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
7914 7898
7915 return mbox_pending; 7899 return mbox_pending;
7916 7900
@@ -13265,11 +13249,14 @@ out_no_mqe_complete:
13265 * Return: true if work posted to worker thread, otherwise false. 13249 * Return: true if work posted to worker thread, otherwise false.
13266 **/ 13250 **/
13267static bool 13251static bool
13268lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_cqe *cqe) 13252lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13253 struct lpfc_cqe *cqe)
13269{ 13254{
13270 struct lpfc_mcqe mcqe; 13255 struct lpfc_mcqe mcqe;
13271 bool workposted; 13256 bool workposted;
13272 13257
13258 cq->CQ_mbox++;
13259
13273 /* Copy the mailbox MCQE and convert endian order as needed */ 13260 /* Copy the mailbox MCQE and convert endian order as needed */
13274 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe)); 13261 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
13275 13262
@@ -13528,7 +13515,7 @@ out:
13528 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry 13515 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13529 * @phba: Pointer to HBA context object. 13516 * @phba: Pointer to HBA context object.
13530 * @cq: Pointer to the completion queue. 13517 * @cq: Pointer to the completion queue.
13531 * @wcqe: Pointer to a completion queue entry. 13518 * @cqe: Pointer to a completion queue entry.
13532 * 13519 *
13533 * This routine process a slow-path work-queue or receive queue completion queue 13520 * This routine process a slow-path work-queue or receive queue completion queue
13534 * entry. 13521 * entry.
@@ -13628,60 +13615,129 @@ lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13628} 13615}
13629 13616
13630/** 13617/**
13631 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry 13618 * __lpfc_sli4_process_cq - Process elements of a CQ
13632 * @phba: Pointer to HBA context object. 13619 * @phba: Pointer to HBA context object.
13620 * @cq: Pointer to CQ to be processed
13621 * @handler: Routine to process each cqe
13622 * @delay: Pointer to usdelay to set in case of rescheduling of the handler
13633 * 13623 *
13634 * This routine process a event queue entry from the slow-path event queue. 13624 * This routine processes completion queue entries in a CQ. While a valid
13635 * It will check the MajorCode and MinorCode to determine this is for a 13625 * queue element is found, the handler is called. During processing checks
13636 * completion event on a completion queue, if not, an error shall be logged 13626 * are made for periodic doorbell writes to let the hardware know of
13637 * and just return. Otherwise, it will get to the corresponding completion 13627 * element consumption.
13638 * queue and process all the entries on that completion queue, rearm the
13639 * completion queue, and then return.
13640 * 13628 *
13629 * If the max limit on cqes to process is hit, or there are no more valid
13630 * entries, the loop stops. If we processed a sufficient number of elements,
13631 * meaning there is sufficient load, rather than rearming and generating
13632 * another interrupt, a cq rescheduling delay will be set. A delay of 0
13633 * indicates no rescheduling.
13634 *
13635 * Returns True if work scheduled, False otherwise.
13641 **/ 13636 **/
13642static void 13637static bool
13643lpfc_sli4_sp_process_cq(struct work_struct *work) 13638__lpfc_sli4_process_cq(struct lpfc_hba *phba, struct lpfc_queue *cq,
13639 bool (*handler)(struct lpfc_hba *, struct lpfc_queue *,
13640 struct lpfc_cqe *), unsigned long *delay)
13644{ 13641{
13645 struct lpfc_queue *cq =
13646 container_of(work, struct lpfc_queue, spwork);
13647 struct lpfc_hba *phba = cq->phba;
13648 struct lpfc_cqe *cqe; 13642 struct lpfc_cqe *cqe;
13649 bool workposted = false; 13643 bool workposted = false;
13650 int ccount = 0; 13644 int count = 0, consumed = 0;
13645 bool arm = true;
13646
13647 /* default - no reschedule */
13648 *delay = 0;
13649
13650 if (cmpxchg(&cq->queue_claimed, 0, 1) != 0)
13651 goto rearm_and_exit;
13651 13652
13652 /* Process all the entries to the CQ */ 13653 /* Process all the entries to the CQ */
13654 cqe = lpfc_sli4_cq_get(cq);
13655 while (cqe) {
13656#if defined(CONFIG_SCSI_LPFC_DEBUG_FS) && defined(BUILD_NVME)
13657 if (phba->ktime_on)
13658 cq->isr_timestamp = ktime_get_ns();
13659 else
13660 cq->isr_timestamp = 0;
13661#endif
13662 workposted |= handler(phba, cq, cqe);
13663 __lpfc_sli4_consume_cqe(phba, cq, cqe);
13664
13665 consumed++;
13666 if (!(++count % cq->max_proc_limit))
13667 break;
13668
13669 if (!(count % cq->notify_interval)) {
13670 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13671 LPFC_QUEUE_NOARM);
13672 consumed = 0;
13673 }
13674
13675 cqe = lpfc_sli4_cq_get(cq);
13676 }
13677 if (count >= phba->cfg_cq_poll_threshold) {
13678 *delay = 1;
13679 arm = false;
13680 }
13681
13682 /* Track the max number of CQEs processed in 1 EQ */
13683 if (count > cq->CQ_max_cqe)
13684 cq->CQ_max_cqe = count;
13685
13686 cq->assoc_qp->EQ_cqe_cnt += count;
13687
13688 /* Catch the no cq entry condition */
13689 if (unlikely(count == 0))
13690 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13691 "0369 No entry from completion queue "
13692 "qid=%d\n", cq->queue_id);
13693
13694 cq->queue_claimed = 0;
13695
13696rearm_and_exit:
13697 phba->sli4_hba.sli4_write_cq_db(phba, cq, consumed,
13698 arm ? LPFC_QUEUE_REARM : LPFC_QUEUE_NOARM);
13699
13700 return workposted;
13701}
13702
13703/**
13704 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13705 * @cq: pointer to CQ to process
13706 *
13707 * This routine calls the cq processing routine with a handler specific
13708 * to the type of queue bound to it.
13709 *
13710 * The CQ routine returns two values: the first is the calling status,
13711 * which indicates whether work was queued to the background discovery
13712 * thread. If true, the routine should wakeup the discovery thread;
13713 * the second is the delay parameter. If non-zero, rather than rearming
13714 * the CQ and yet another interrupt, the CQ handler should be queued so
13715 * that it is processed in a subsequent polling action. The value of
13716 * the delay indicates when to reschedule it.
13717 **/
13718static void
13719__lpfc_sli4_sp_process_cq(struct lpfc_queue *cq)
13720{
13721 struct lpfc_hba *phba = cq->phba;
13722 unsigned long delay;
13723 bool workposted = false;
13724
13725 /* Process and rearm the CQ */
13653 switch (cq->type) { 13726 switch (cq->type) {
13654 case LPFC_MCQ: 13727 case LPFC_MCQ:
13655 while ((cqe = lpfc_sli4_cq_get(cq))) { 13728 workposted |= __lpfc_sli4_process_cq(phba, cq,
13656 workposted |= lpfc_sli4_sp_handle_mcqe(phba, cqe); 13729 lpfc_sli4_sp_handle_mcqe,
13657 if (!(++ccount % cq->entry_repost)) 13730 &delay);
13658 break;
13659 cq->CQ_mbox++;
13660 }
13661 break; 13731 break;
13662 case LPFC_WCQ: 13732 case LPFC_WCQ:
13663 while ((cqe = lpfc_sli4_cq_get(cq))) { 13733 if (cq->subtype == LPFC_FCP || cq->subtype == LPFC_NVME)
13664 if (cq->subtype == LPFC_FCP || 13734 workposted |= __lpfc_sli4_process_cq(phba, cq,
13665 cq->subtype == LPFC_NVME) { 13735 lpfc_sli4_fp_handle_cqe,
13666#ifdef CONFIG_SCSI_LPFC_DEBUG_FS 13736 &delay);
13667 if (phba->ktime_on) 13737 else
13668 cq->isr_timestamp = ktime_get_ns(); 13738 workposted |= __lpfc_sli4_process_cq(phba, cq,
13669 else 13739 lpfc_sli4_sp_handle_cqe,
13670 cq->isr_timestamp = 0; 13740 &delay);
13671#endif
13672 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq,
13673 cqe);
13674 } else {
13675 workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
13676 cqe);
13677 }
13678 if (!(++ccount % cq->entry_repost))
13679 break;
13680 }
13681
13682 /* Track the max number of CQEs processed in 1 EQ */
13683 if (ccount > cq->CQ_max_cqe)
13684 cq->CQ_max_cqe = ccount;
13685 break; 13741 break;
13686 default: 13742 default:
13687 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 13743 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
@@ -13690,14 +13746,14 @@ lpfc_sli4_sp_process_cq(struct work_struct *work)
13690 return; 13746 return;
13691 } 13747 }
13692 13748
13693 /* Catch the no cq entry condition, log an error */ 13749 if (delay) {
13694 if (unlikely(ccount == 0)) 13750 if (!queue_delayed_work_on(cq->chann, phba->wq,
13695 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 13751 &cq->sched_spwork, delay))
13696 "0371 No entry from the CQ: identifier " 13752 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13697 "(x%x), type (%d)\n", cq->queue_id, cq->type); 13753 "0394 Cannot schedule soft IRQ "
13698 13754 "for cqid=%d on CPU %d\n",
13699 /* In any case, flash and re-arm the RCQ */ 13755 cq->queue_id, cq->chann);
13700 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM); 13756 }
13701 13757
13702 /* wake up worker thread if there are works to be done */ 13758 /* wake up worker thread if there are works to be done */
13703 if (workposted) 13759 if (workposted)
@@ -13705,6 +13761,36 @@ lpfc_sli4_sp_process_cq(struct work_struct *work)
13705} 13761}
13706 13762
13707/** 13763/**
13764 * lpfc_sli4_sp_process_cq - slow-path work handler when started by
13765 * interrupt
13766 * @work: pointer to work element
13767 *
13768 * translates from the work handler and calls the slow-path handler.
13769 **/
13770static void
13771lpfc_sli4_sp_process_cq(struct work_struct *work)
13772{
13773 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, spwork);
13774
13775 __lpfc_sli4_sp_process_cq(cq);
13776}
13777
13778/**
13779 * lpfc_sli4_dly_sp_process_cq - slow-path work handler when started by timer
13780 * @work: pointer to work element
13781 *
13782 * translates from the work handler and calls the slow-path handler.
13783 **/
13784static void
13785lpfc_sli4_dly_sp_process_cq(struct work_struct *work)
13786{
13787 struct lpfc_queue *cq = container_of(to_delayed_work(work),
13788 struct lpfc_queue, sched_spwork);
13789
13790 __lpfc_sli4_sp_process_cq(cq);
13791}
13792
13793/**
13708 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry 13794 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
13709 * @phba: Pointer to HBA context object. 13795 * @phba: Pointer to HBA context object.
13710 * @cq: Pointer to associated CQ 13796 * @cq: Pointer to associated CQ
@@ -13935,13 +14021,16 @@ out:
13935 14021
13936/** 14022/**
13937 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry 14023 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
14024 * @phba: adapter with cq
13938 * @cq: Pointer to the completion queue. 14025 * @cq: Pointer to the completion queue.
13939 * @eqe: Pointer to fast-path completion queue entry. 14026 * @eqe: Pointer to fast-path completion queue entry.
13940 * 14027 *
13941 * This routine process a fast-path work queue completion entry from fast-path 14028 * This routine process a fast-path work queue completion entry from fast-path
13942 * event queue for FCP command response completion. 14029 * event queue for FCP command response completion.
14030 *
14031 * Return: true if work posted to worker thread, otherwise false.
13943 **/ 14032 **/
13944static int 14033static bool
13945lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq, 14034lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13946 struct lpfc_cqe *cqe) 14035 struct lpfc_cqe *cqe)
13947{ 14036{
@@ -14008,10 +14097,11 @@ lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
14008 * completion queue, and then return. 14097 * completion queue, and then return.
14009 **/ 14098 **/
14010static void 14099static void
14011lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe, 14100lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_queue *eq,
14012 uint32_t qidx) 14101 struct lpfc_eqe *eqe)
14013{ 14102{
14014 struct lpfc_queue *cq = NULL; 14103 struct lpfc_queue *cq = NULL;
14104 uint32_t qidx = eq->hdwq;
14015 uint16_t cqid, id; 14105 uint16_t cqid, id;
14016 14106
14017 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) { 14107 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
@@ -14074,72 +14164,74 @@ work_cq:
14074} 14164}
14075 14165
14076/** 14166/**
14077 * lpfc_sli4_hba_process_cq - Process a fast-path event queue entry 14167 * __lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14078 * @phba: Pointer to HBA context object. 14168 * @cq: Pointer to CQ to be processed
14079 * @eqe: Pointer to fast-path event queue entry.
14080 * 14169 *
14081 * This routine process a event queue entry from the fast-path event queue. 14170 * This routine calls the cq processing routine with the handler for
14082 * It will check the MajorCode and MinorCode to determine this is for a 14171 * fast path CQEs.
14083 * completion event on a completion queue, if not, an error shall be logged 14172 *
14084 * and just return. Otherwise, it will get to the corresponding completion 14173 * The CQ routine returns two values: the first is the calling status,
14085 * queue and process all the entries on the completion queue, rearm the 14174 * which indicates whether work was queued to the background discovery
14086 * completion queue, and then return. 14175 * thread. If true, the routine should wakeup the discovery thread;
14176 * the second is the delay parameter. If non-zero, rather than rearming
14177 * the CQ and yet another interrupt, the CQ handler should be queued so
14178 * that it is processed in a subsequent polling action. The value of
14179 * the delay indicates when to reschedule it.
14087 **/ 14180 **/
14088static void 14181static void
14089lpfc_sli4_hba_process_cq(struct work_struct *work) 14182__lpfc_sli4_hba_process_cq(struct lpfc_queue *cq)
14090{ 14183{
14091 struct lpfc_queue *cq =
14092 container_of(work, struct lpfc_queue, irqwork);
14093 struct lpfc_hba *phba = cq->phba; 14184 struct lpfc_hba *phba = cq->phba;
14094 struct lpfc_cqe *cqe; 14185 unsigned long delay;
14095 bool workposted = false; 14186 bool workposted = false;
14096 int ccount = 0;
14097
14098 /* Process all the entries to the CQ */
14099 while ((cqe = lpfc_sli4_cq_get(cq))) {
14100#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
14101 if (phba->ktime_on)
14102 cq->isr_timestamp = ktime_get_ns();
14103 else
14104 cq->isr_timestamp = 0;
14105#endif
14106 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq, cqe);
14107 if (!(++ccount % cq->entry_repost))
14108 break;
14109 }
14110
14111 /* Track the max number of CQEs processed in 1 EQ */
14112 if (ccount > cq->CQ_max_cqe)
14113 cq->CQ_max_cqe = ccount;
14114 cq->assoc_qp->EQ_cqe_cnt += ccount;
14115 14187
14116 /* Catch the no cq entry condition */ 14188 /* process and rearm the CQ */
14117 if (unlikely(ccount == 0)) 14189 workposted |= __lpfc_sli4_process_cq(phba, cq, lpfc_sli4_fp_handle_cqe,
14118 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 14190 &delay);
14119 "0369 No entry from fast-path completion "
14120 "queue fcpcqid=%d\n", cq->queue_id);
14121 14191
14122 /* In any case, flash and re-arm the CQ */ 14192 if (delay) {
14123 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM); 14193 if (!queue_delayed_work_on(cq->chann, phba->wq,
14194 &cq->sched_irqwork, delay))
14195 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14196 "0367 Cannot schedule soft IRQ "
14197 "for cqid=%d on CPU %d\n",
14198 cq->queue_id, cq->chann);
14199 }
14124 14200
14125 /* wake up worker thread if there are works to be done */ 14201 /* wake up worker thread if there are works to be done */
14126 if (workposted) 14202 if (workposted)
14127 lpfc_worker_wake_up(phba); 14203 lpfc_worker_wake_up(phba);
14128} 14204}
14129 14205
14206/**
14207 * lpfc_sli4_hba_process_cq - fast-path work handler when started by
14208 * interrupt
14209 * @work: pointer to work element
14210 *
14211 * translates from the work handler and calls the fast-path handler.
14212 **/
14130static void 14213static void
14131lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq) 14214lpfc_sli4_hba_process_cq(struct work_struct *work)
14132{ 14215{
14133 struct lpfc_eqe *eqe; 14216 struct lpfc_queue *cq = container_of(work, struct lpfc_queue, irqwork);
14134
14135 /* walk all the EQ entries and drop on the floor */
14136 while ((eqe = lpfc_sli4_eq_get(eq)))
14137 ;
14138 14217
14139 /* Clear and re-arm the EQ */ 14218 __lpfc_sli4_hba_process_cq(cq);
14140 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
14141} 14219}
14142 14220
14221/**
14222 * lpfc_sli4_hba_process_cq - fast-path work handler when started by timer
14223 * @work: pointer to work element
14224 *
14225 * translates from the work handler and calls the fast-path handler.
14226 **/
14227static void
14228lpfc_sli4_dly_hba_process_cq(struct work_struct *work)
14229{
14230 struct lpfc_queue *cq = container_of(to_delayed_work(work),
14231 struct lpfc_queue, sched_irqwork);
14232
14233 __lpfc_sli4_hba_process_cq(cq);
14234}
14143 14235
14144/** 14236/**
14145 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device 14237 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
@@ -14173,10 +14265,11 @@ lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
14173 struct lpfc_hba *phba; 14265 struct lpfc_hba *phba;
14174 struct lpfc_hba_eq_hdl *hba_eq_hdl; 14266 struct lpfc_hba_eq_hdl *hba_eq_hdl;
14175 struct lpfc_queue *fpeq; 14267 struct lpfc_queue *fpeq;
14176 struct lpfc_eqe *eqe;
14177 unsigned long iflag; 14268 unsigned long iflag;
14178 int ecount = 0; 14269 int ecount = 0;
14179 int hba_eqidx; 14270 int hba_eqidx;
14271 struct lpfc_eq_intr_info *eqi;
14272 uint32_t icnt;
14180 14273
14181 /* Get the driver's phba structure from the dev_id */ 14274 /* Get the driver's phba structure from the dev_id */
14182 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id; 14275 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
@@ -14204,22 +14297,19 @@ lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
14204 return IRQ_NONE; 14297 return IRQ_NONE;
14205 } 14298 }
14206 14299
14207 /* 14300 eqi = phba->sli4_hba.eq_info;
14208 * Process all the event on FCP fast-path EQ 14301 icnt = this_cpu_inc_return(eqi->icnt);
14209 */ 14302 fpeq->last_cpu = smp_processor_id();
14210 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
14211 lpfc_sli4_hba_handle_eqe(phba, eqe, hba_eqidx);
14212 if (!(++ecount % fpeq->entry_repost))
14213 break;
14214 fpeq->EQ_processed++;
14215 }
14216 14303
14217 /* Track the max number of EQEs processed in 1 intr */ 14304 if (icnt > LPFC_EQD_ISR_TRIGGER &&
14218 if (ecount > fpeq->EQ_max_eqe) 14305 phba->cfg_irq_chann == 1 &&
14219 fpeq->EQ_max_eqe = ecount; 14306 phba->cfg_auto_imax &&
14307 fpeq->q_mode != LPFC_MAX_AUTO_EQ_DELAY &&
14308 phba->sli.sli_flag & LPFC_SLI_USE_EQDR)
14309 lpfc_sli4_mod_hba_eq_delay(phba, fpeq, LPFC_MAX_AUTO_EQ_DELAY);
14220 14310
14221 /* Always clear and re-arm the fast-path EQ */ 14311 /* process and rearm the EQ */
14222 phba->sli4_hba.sli4_eq_release(fpeq, LPFC_QUEUE_REARM); 14312 ecount = lpfc_sli4_process_eq(phba, fpeq);
14223 14313
14224 if (unlikely(ecount == 0)) { 14314 if (unlikely(ecount == 0)) {
14225 fpeq->EQ_no_entry++; 14315 fpeq->EQ_no_entry++;
@@ -14307,6 +14397,9 @@ lpfc_sli4_queue_free(struct lpfc_queue *queue)
14307 kfree(queue->rqbp); 14397 kfree(queue->rqbp);
14308 } 14398 }
14309 14399
14400 if (!list_empty(&queue->cpu_list))
14401 list_del(&queue->cpu_list);
14402
14310 if (!list_empty(&queue->wq_list)) 14403 if (!list_empty(&queue->wq_list))
14311 list_del(&queue->wq_list); 14404 list_del(&queue->wq_list);
14312 14405
@@ -14355,6 +14448,7 @@ lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14355 INIT_LIST_HEAD(&queue->wqfull_list); 14448 INIT_LIST_HEAD(&queue->wqfull_list);
14356 INIT_LIST_HEAD(&queue->page_list); 14449 INIT_LIST_HEAD(&queue->page_list);
14357 INIT_LIST_HEAD(&queue->child_list); 14450 INIT_LIST_HEAD(&queue->child_list);
14451 INIT_LIST_HEAD(&queue->cpu_list);
14358 14452
14359 /* Set queue parameters now. If the system cannot provide memory 14453 /* Set queue parameters now. If the system cannot provide memory
14360 * resources, the free routine needs to know what was allocated. 14454 * resources, the free routine needs to know what was allocated.
@@ -14387,8 +14481,10 @@ lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14387 } 14481 }
14388 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq); 14482 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14389 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq); 14483 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
14484 INIT_DELAYED_WORK(&queue->sched_irqwork, lpfc_sli4_dly_hba_process_cq);
14485 INIT_DELAYED_WORK(&queue->sched_spwork, lpfc_sli4_dly_sp_process_cq);
14390 14486
14391 /* entry_repost will be set during q creation */ 14487 /* notify_interval will be set during q creation */
14392 14488
14393 return queue; 14489 return queue;
14394out_fail: 14490out_fail:
@@ -14457,7 +14553,6 @@ lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14457 int cnt = 0, rc, length; 14553 int cnt = 0, rc, length;
14458 uint32_t shdr_status, shdr_add_status; 14554 uint32_t shdr_status, shdr_add_status;
14459 uint32_t dmult; 14555 uint32_t dmult;
14460 struct lpfc_register reg_data;
14461 int qidx; 14556 int qidx;
14462 union lpfc_sli4_cfg_shdr *shdr; 14557 union lpfc_sli4_cfg_shdr *shdr;
14463 14558
@@ -14478,16 +14573,7 @@ lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14478 if (!eq) 14573 if (!eq)
14479 continue; 14574 continue;
14480 14575
14481 /* save value last set */ 14576 lpfc_sli4_mod_hba_eq_delay(phba, eq, usdelay);
14482 eq->q_mode = usdelay;
14483
14484 /* write register */
14485 reg_data.word0 = 0;
14486 bf_set(lpfc_sliport_eqdelay_id, &reg_data,
14487 eq->queue_id);
14488 bf_set(lpfc_sliport_eqdelay_delay, &reg_data, usdelay);
14489 writel(reg_data.word0,
14490 phba->sli4_hba.u.if_type2.EQDregaddr);
14491 14577
14492 if (++cnt >= numq) 14578 if (++cnt >= numq)
14493 break; 14579 break;
@@ -14673,8 +14759,8 @@ lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
14673 if (eq->queue_id == 0xFFFF) 14759 if (eq->queue_id == 0xFFFF)
14674 status = -ENXIO; 14760 status = -ENXIO;
14675 eq->host_index = 0; 14761 eq->host_index = 0;
14676 eq->hba_index = 0; 14762 eq->notify_interval = LPFC_EQ_NOTIFY_INTRVL;
14677 eq->entry_repost = LPFC_EQ_REPOST; 14763 eq->max_proc_limit = LPFC_EQ_MAX_PROC_LIMIT;
14678 14764
14679 mempool_free(mbox, phba->mbox_mem_pool); 14765 mempool_free(mbox, phba->mbox_mem_pool);
14680 return status; 14766 return status;
@@ -14814,8 +14900,8 @@ lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14814 cq->assoc_qid = eq->queue_id; 14900 cq->assoc_qid = eq->queue_id;
14815 cq->assoc_qp = eq; 14901 cq->assoc_qp = eq;
14816 cq->host_index = 0; 14902 cq->host_index = 0;
14817 cq->hba_index = 0; 14903 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
14818 cq->entry_repost = LPFC_CQ_REPOST; 14904 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit, cq->entry_count);
14819 14905
14820 if (cq->queue_id > phba->sli4_hba.cq_max) 14906 if (cq->queue_id > phba->sli4_hba.cq_max)
14821 phba->sli4_hba.cq_max = cq->queue_id; 14907 phba->sli4_hba.cq_max = cq->queue_id;
@@ -15026,8 +15112,9 @@ lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
15026 cq->assoc_qid = eq->queue_id; 15112 cq->assoc_qid = eq->queue_id;
15027 cq->assoc_qp = eq; 15113 cq->assoc_qp = eq;
15028 cq->host_index = 0; 15114 cq->host_index = 0;
15029 cq->hba_index = 0; 15115 cq->notify_interval = LPFC_CQ_NOTIFY_INTRVL;
15030 cq->entry_repost = LPFC_CQ_REPOST; 15116 cq->max_proc_limit = min(phba->cfg_cq_max_proc_limit,
15117 cq->entry_count);
15031 cq->chann = idx; 15118 cq->chann = idx;
15032 15119
15033 rc = 0; 15120 rc = 0;
@@ -15279,7 +15366,6 @@ lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15279 mq->subtype = subtype; 15366 mq->subtype = subtype;
15280 mq->host_index = 0; 15367 mq->host_index = 0;
15281 mq->hba_index = 0; 15368 mq->hba_index = 0;
15282 mq->entry_repost = LPFC_MQ_REPOST;
15283 15369
15284 /* link the mq onto the parent cq child list */ 15370 /* link the mq onto the parent cq child list */
15285 list_add_tail(&mq->list, &cq->child_list); 15371 list_add_tail(&mq->list, &cq->child_list);
@@ -15545,7 +15631,7 @@ lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15545 wq->subtype = subtype; 15631 wq->subtype = subtype;
15546 wq->host_index = 0; 15632 wq->host_index = 0;
15547 wq->hba_index = 0; 15633 wq->hba_index = 0;
15548 wq->entry_repost = LPFC_RELEASE_NOTIFICATION_INTERVAL; 15634 wq->notify_interval = LPFC_WQ_NOTIFY_INTRVL;
15549 15635
15550 /* link the wq onto the parent cq child list */ 15636 /* link the wq onto the parent cq child list */
15551 list_add_tail(&wq->list, &cq->child_list); 15637 list_add_tail(&wq->list, &cq->child_list);
@@ -15739,7 +15825,7 @@ lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15739 hrq->subtype = subtype; 15825 hrq->subtype = subtype;
15740 hrq->host_index = 0; 15826 hrq->host_index = 0;
15741 hrq->hba_index = 0; 15827 hrq->hba_index = 0;
15742 hrq->entry_repost = LPFC_RQ_REPOST; 15828 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
15743 15829
15744 /* now create the data queue */ 15830 /* now create the data queue */
15745 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE, 15831 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
@@ -15832,7 +15918,7 @@ lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15832 drq->subtype = subtype; 15918 drq->subtype = subtype;
15833 drq->host_index = 0; 15919 drq->host_index = 0;
15834 drq->hba_index = 0; 15920 drq->hba_index = 0;
15835 drq->entry_repost = LPFC_RQ_REPOST; 15921 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
15836 15922
15837 /* link the header and data RQs onto the parent cq child list */ 15923 /* link the header and data RQs onto the parent cq child list */
15838 list_add_tail(&hrq->list, &cq->child_list); 15924 list_add_tail(&hrq->list, &cq->child_list);
@@ -15990,7 +16076,7 @@ lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15990 hrq->subtype = subtype; 16076 hrq->subtype = subtype;
15991 hrq->host_index = 0; 16077 hrq->host_index = 0;
15992 hrq->hba_index = 0; 16078 hrq->hba_index = 0;
15993 hrq->entry_repost = LPFC_RQ_REPOST; 16079 hrq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
15994 16080
15995 drq->db_format = LPFC_DB_RING_FORMAT; 16081 drq->db_format = LPFC_DB_RING_FORMAT;
15996 drq->db_regaddr = phba->sli4_hba.RQDBregaddr; 16082 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
@@ -15999,7 +16085,7 @@ lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15999 drq->subtype = subtype; 16085 drq->subtype = subtype;
16000 drq->host_index = 0; 16086 drq->host_index = 0;
16001 drq->hba_index = 0; 16087 drq->hba_index = 0;
16002 drq->entry_repost = LPFC_RQ_REPOST; 16088 drq->notify_interval = LPFC_RQ_NOTIFY_INTRVL;
16003 16089
16004 list_add_tail(&hrq->list, &cq->child_list); 16090 list_add_tail(&hrq->list, &cq->child_list);
16005 list_add_tail(&drq->list, &cq->child_list); 16091 list_add_tail(&drq->list, &cq->child_list);
@@ -16059,6 +16145,7 @@ lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16059 /* sanity check on queue memory */ 16145 /* sanity check on queue memory */
16060 if (!eq) 16146 if (!eq)
16061 return -ENODEV; 16147 return -ENODEV;
16148
16062 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL); 16149 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16063 if (!mbox) 16150 if (!mbox)
16064 return -ENOMEM; 16151 return -ENOMEM;
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index accccca3a027..20566c506e5f 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -154,14 +154,41 @@ struct lpfc_queue {
154 struct list_head child_list; 154 struct list_head child_list;
155 struct list_head page_list; 155 struct list_head page_list;
156 struct list_head sgl_list; 156 struct list_head sgl_list;
157 struct list_head cpu_list;
157 uint32_t entry_count; /* Number of entries to support on the queue */ 158 uint32_t entry_count; /* Number of entries to support on the queue */
158 uint32_t entry_size; /* Size of each queue entry. */ 159 uint32_t entry_size; /* Size of each queue entry. */
159 uint32_t entry_repost; /* Count of entries before doorbell is rung */ 160 uint32_t notify_interval; /* Queue Notification Interval
160#define LPFC_EQ_REPOST 8 161 * For chip->host queues (EQ, CQ, RQ):
161#define LPFC_MQ_REPOST 8 162 * specifies the interval (number of
162#define LPFC_CQ_REPOST 64 163 * entries) where the doorbell is rung to
163#define LPFC_RQ_REPOST 64 164 * notify the chip of entry consumption.
164#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */ 165 * For host->chip queues (WQ):
166 * specifies the interval (number of
167 * entries) where consumption CQE is
168 * requested to indicate WQ entries
169 * consumed by the chip.
170 * Not used on an MQ.
171 */
172#define LPFC_EQ_NOTIFY_INTRVL 16
173#define LPFC_CQ_NOTIFY_INTRVL 16
174#define LPFC_WQ_NOTIFY_INTRVL 16
175#define LPFC_RQ_NOTIFY_INTRVL 16
176 uint32_t max_proc_limit; /* Queue Processing Limit
177 * For chip->host queues (EQ, CQ):
178 * specifies the maximum number of
179 * entries to be consumed in one
180 * processing iteration sequence. Queue
181 * will be rearmed after each iteration.
182 * Not used on an MQ, RQ or WQ.
183 */
184#define LPFC_EQ_MAX_PROC_LIMIT 256
185#define LPFC_CQ_MIN_PROC_LIMIT 64
186#define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096
187#define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024
188#define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64
189#define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT
190#define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT
191 uint32_t queue_claimed; /* indicates queue is being processed */
165 uint32_t queue_id; /* Queue ID assigned by the hardware */ 192 uint32_t queue_id; /* Queue ID assigned by the hardware */
166 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 193 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
167 uint32_t host_index; /* The host's index for putting or getting */ 194 uint32_t host_index; /* The host's index for putting or getting */
@@ -217,11 +244,14 @@ struct lpfc_queue {
217#define RQ_buf_posted q_cnt_3 244#define RQ_buf_posted q_cnt_3
218#define RQ_rcv_buf q_cnt_4 245#define RQ_rcv_buf q_cnt_4
219 246
220 struct work_struct irqwork; 247 struct work_struct irqwork;
221 struct work_struct spwork; 248 struct work_struct spwork;
249 struct delayed_work sched_irqwork;
250 struct delayed_work sched_spwork;
222 251
223 uint64_t isr_timestamp; 252 uint64_t isr_timestamp;
224 uint16_t hdwq; 253 uint16_t hdwq;
254 uint16_t last_cpu; /* most recent cpu */
225 uint8_t qe_valid; 255 uint8_t qe_valid;
226 struct lpfc_queue *assoc_qp; 256 struct lpfc_queue *assoc_qp;
227 union sli4_qe qe[1]; /* array to index entries (must be last) */ 257 union sli4_qe qe[1]; /* array to index entries (must be last) */
@@ -608,6 +638,11 @@ struct lpfc_lock_stat {
608}; 638};
609#endif 639#endif
610 640
641struct lpfc_eq_intr_info {
642 struct list_head list;
643 uint32_t icnt;
644};
645
611/* SLI4 HBA data structure entries */ 646/* SLI4 HBA data structure entries */
612struct lpfc_sli4_hdw_queue { 647struct lpfc_sli4_hdw_queue {
613 /* Pointers to the constructed SLI4 queues */ 648 /* Pointers to the constructed SLI4 queues */
@@ -749,8 +784,10 @@ struct lpfc_sli4_hba {
749 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 784 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */
750 785
751 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 786 void (*sli4_eq_clr_intr)(struct lpfc_queue *q);
752 uint32_t (*sli4_eq_release)(struct lpfc_queue *q, bool arm); 787 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq,
753 uint32_t (*sli4_cq_release)(struct lpfc_queue *q, bool arm); 788 uint32_t count, bool arm);
789 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq,
790 uint32_t count, bool arm);
754 791
755 /* Pointers to the constructed SLI4 queues */ 792 /* Pointers to the constructed SLI4 queues */
756 struct lpfc_sli4_hdw_queue *hdwq; 793 struct lpfc_sli4_hdw_queue *hdwq;
@@ -856,6 +893,7 @@ struct lpfc_sli4_hba {
856 uint16_t num_online_cpu; 893 uint16_t num_online_cpu;
857 uint16_t num_present_cpu; 894 uint16_t num_present_cpu;
858 uint16_t curr_disp_cpu; 895 uint16_t curr_disp_cpu;
896 struct lpfc_eq_intr_info __percpu *eq_info;
859 uint32_t conf_trunk; 897 uint32_t conf_trunk;
860#define lpfc_conf_trunk_port0_WORD conf_trunk 898#define lpfc_conf_trunk_port0_WORD conf_trunk
861#define lpfc_conf_trunk_port0_SHIFT 0 899#define lpfc_conf_trunk_port0_SHIFT 0
@@ -1020,11 +1058,15 @@ int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
1020int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1058int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba);
1021int lpfc_sli4_init_vpi(struct lpfc_vport *); 1059int lpfc_sli4_init_vpi(struct lpfc_vport *);
1022inline void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1060inline void lpfc_sli4_eq_clr_intr(struct lpfc_queue *);
1023uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); 1061void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1024uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); 1062 uint32_t count, bool arm);
1063void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1064 uint32_t count, bool arm);
1025inline void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1065inline void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q);
1026uint32_t lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm); 1066void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1027uint32_t lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm); 1067 uint32_t count, bool arm);
1068void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1069 uint32_t count, bool arm);
1028void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1070void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
1029int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1071int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
1030int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1072int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);