diff options
author | Olivier Grenie <olivier.grenie@dibcom.fr> | 2011-08-05 09:39:15 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-11-24 17:47:45 -0500 |
commit | 2e802861403c95ad6a566ff6d7a1a1a45d29c30e (patch) | |
tree | 9b4f8454d68a692b9ad248dbddba571c87883643 | |
parent | dd7aaa4d9d97a8571bcfa498e90b9daf540db1cf (diff) |
[media] dib7000p/dib0090: update the driver
This patch intends to update the dib7000p and dib0090 driver in order to
improve the performances.
Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/dvb/dvb-usb/dib0700_devices.c | 8 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib0090.c | 15 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib0090.h | 8 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib7000p.c | 318 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib7000p.h | 7 |
5 files changed, 197 insertions, 159 deletions
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c index f313182eb9d5..771dfdaa232c 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_devices.c +++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c | |||
@@ -2092,6 +2092,14 @@ static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_para | |||
2092 | return 0; | 2092 | return 0; |
2093 | } | 2093 | } |
2094 | 2094 | ||
2095 | static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart) | ||
2096 | { | ||
2097 | deb_info("AGC restart callback: %d", restart); | ||
2098 | if (restart == 0) /* before AGC startup */ | ||
2099 | dib0090_set_dc_servo(fe, 1); | ||
2100 | return 0; | ||
2101 | } | ||
2102 | |||
2095 | static struct dib0090_wbd_slope dib7090_wbd_table[] = { | 2103 | static struct dib0090_wbd_slope dib7090_wbd_table[] = { |
2096 | { 380, 81, 850, 64, 540, 4}, | 2104 | { 380, 81, 850, 64, 540, 4}, |
2097 | { 860, 51, 866, 21, 375, 4}, | 2105 | { 860, 51, 866, 21, 375, 4}, |
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c index b174d1c78583..9030f3dc95f9 100644 --- a/drivers/media/dvb/frontends/dib0090.c +++ b/drivers/media/dvb/frontends/dib0090.c | |||
@@ -1112,13 +1112,21 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe) | |||
1112 | else | 1112 | else |
1113 | dib0090_write_reg(state, 0x32, (0 << 11)); | 1113 | dib0090_write_reg(state, 0x32, (0 << 11)); |
1114 | 1114 | ||
1115 | dib0090_write_reg(state, 0x04, 0x01); | 1115 | dib0090_write_reg(state, 0x04, 0x03); |
1116 | dib0090_write_reg(state, 0x39, (1 << 10)); | 1116 | dib0090_write_reg(state, 0x39, (1 << 10)); |
1117 | } | 1117 | } |
1118 | } | 1118 | } |
1119 | 1119 | ||
1120 | EXPORT_SYMBOL(dib0090_pwm_gain_reset); | 1120 | EXPORT_SYMBOL(dib0090_pwm_gain_reset); |
1121 | 1121 | ||
1122 | void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff) | ||
1123 | { | ||
1124 | struct dib0090_state *state = fe->tuner_priv; | ||
1125 | if (DC_servo_cutoff < 4) | ||
1126 | dib0090_write_reg(state, 0x04, DC_servo_cutoff); | ||
1127 | } | ||
1128 | EXPORT_SYMBOL(dib0090_set_dc_servo); | ||
1129 | |||
1122 | static u32 dib0090_get_slow_adc_val(struct dib0090_state *state) | 1130 | static u32 dib0090_get_slow_adc_val(struct dib0090_state *state) |
1123 | { | 1131 | { |
1124 | u16 adc_val = dib0090_read_reg(state, 0x1d); | 1132 | u16 adc_val = dib0090_read_reg(state, 0x1d); |
@@ -1505,7 +1513,10 @@ static int dib0090_reset(struct dvb_frontend *fe) | |||
1505 | dib0090_set_EFUSE(state); | 1513 | dib0090_set_EFUSE(state); |
1506 | 1514 | ||
1507 | /* Congigure in function of the crystal */ | 1515 | /* Congigure in function of the crystal */ |
1508 | if (state->config->io.clock_khz >= 24000) | 1516 | if (state->config->force_crystal_mode != 0) |
1517 | dib0090_write_reg(state, 0x14, | ||
1518 | state->config->force_crystal_mode & 3); | ||
1519 | else if (state->config->io.clock_khz >= 24000) | ||
1509 | dib0090_write_reg(state, 0x14, 1); | 1520 | dib0090_write_reg(state, 0x14, 1); |
1510 | else | 1521 | else |
1511 | dib0090_write_reg(state, 0x14, 2); | 1522 | dib0090_write_reg(state, 0x14, 2); |
diff --git a/drivers/media/dvb/frontends/dib0090.h b/drivers/media/dvb/frontends/dib0090.h index 13d85244ec16..648318ae40d2 100644 --- a/drivers/media/dvb/frontends/dib0090.h +++ b/drivers/media/dvb/frontends/dib0090.h | |||
@@ -71,6 +71,8 @@ struct dib0090_config { | |||
71 | u8 fref_clock_ratio; | 71 | u8 fref_clock_ratio; |
72 | u16 force_cband_input; | 72 | u16 force_cband_input; |
73 | struct dib0090_wbd_slope *wbd; | 73 | struct dib0090_wbd_slope *wbd; |
74 | u8 is_dib7090e; | ||
75 | u8 force_crystal_mode; | ||
74 | }; | 76 | }; |
75 | 77 | ||
76 | #if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE)) | 78 | #if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE)) |
@@ -83,6 +85,7 @@ extern int dib0090_gain_control(struct dvb_frontend *fe); | |||
83 | extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe); | 85 | extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe); |
84 | extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state); | 86 | extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state); |
85 | extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt); | 87 | extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt); |
88 | extern void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff); | ||
86 | #else | 89 | #else |
87 | static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config) | 90 | static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config) |
88 | { | 91 | { |
@@ -134,6 +137,11 @@ static inline void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u | |||
134 | { | 137 | { |
135 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 138 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
136 | } | 139 | } |
140 | |||
141 | static inline void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff) | ||
142 | { | ||
143 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
144 | } | ||
137 | #endif | 145 | #endif |
138 | 146 | ||
139 | #endif | 147 | #endif |
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index ce8534ff142e..08e62a4c9603 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
@@ -70,6 +70,8 @@ struct dib7000p_state { | |||
70 | u8 i2c_write_buffer[4]; | 70 | u8 i2c_write_buffer[4]; |
71 | u8 i2c_read_buffer[2]; | 71 | u8 i2c_read_buffer[2]; |
72 | struct mutex i2c_buffer_lock; | 72 | struct mutex i2c_buffer_lock; |
73 | |||
74 | u8 input_mode_mpeg; | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | enum dib7000p_power_mode { | 77 | enum dib7000p_power_mode { |
@@ -78,8 +80,18 @@ enum dib7000p_power_mode { | |||
78 | DIB7000P_POWER_INTERFACE_ONLY, | 80 | DIB7000P_POWER_INTERFACE_ONLY, |
79 | }; | 81 | }; |
80 | 82 | ||
83 | /* dib7090 specific fonctions */ | ||
84 | #define MPEG_ON_DIBTX 1 | ||
85 | #define DIV_ON_DIBTX 2 | ||
86 | #define ADC_ON_DIBTX 3 | ||
87 | #define DEMOUT_ON_HOSTBUS 4 | ||
88 | #define DIBTX_ON_HOSTBUS 5 | ||
89 | #define MPEG_ON_HOSTBUS 6 | ||
90 | |||
81 | static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode); | 91 | static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode); |
82 | static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff); | 92 | static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff); |
93 | static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode); | ||
94 | static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode); | ||
83 | 95 | ||
84 | static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg) | 96 | static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg) |
85 | { | 97 | { |
@@ -276,17 +288,23 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p | |||
276 | dib7000p_write_word(state, 774, reg_774); | 288 | dib7000p_write_word(state, 774, reg_774); |
277 | dib7000p_write_word(state, 775, reg_775); | 289 | dib7000p_write_word(state, 775, reg_775); |
278 | dib7000p_write_word(state, 776, reg_776); | 290 | dib7000p_write_word(state, 776, reg_776); |
279 | dib7000p_write_word(state, 899, reg_899); | ||
280 | dib7000p_write_word(state, 1280, reg_1280); | 291 | dib7000p_write_word(state, 1280, reg_1280); |
292 | if (state->version != SOC7090) | ||
293 | dib7000p_write_word(state, 899, reg_899); | ||
281 | 294 | ||
282 | return 0; | 295 | return 0; |
283 | } | 296 | } |
284 | 297 | ||
285 | static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no) | 298 | static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no) |
286 | { | 299 | { |
287 | u16 reg_908 = dib7000p_read_word(state, 908), reg_909 = dib7000p_read_word(state, 909); | 300 | u16 reg_908 = 0, reg_909 = 0; |
288 | u16 reg; | 301 | u16 reg; |
289 | 302 | ||
303 | if (state->version != SOC7090) { | ||
304 | reg_908 = dib7000p_read_word(state, 908); | ||
305 | reg_909 = dib7000p_read_word(state, 909); | ||
306 | } | ||
307 | |||
290 | switch (no) { | 308 | switch (no) { |
291 | case DIBX000_SLOW_ADC_ON: | 309 | case DIBX000_SLOW_ADC_ON: |
292 | if (state->version == SOC7090) { | 310 | if (state->version == SOC7090) { |
@@ -342,8 +360,10 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad | |||
342 | reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4; | 360 | reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4; |
343 | reg_908 |= (state->cfg.enable_current_mirror & 1) << 7; | 361 | reg_908 |= (state->cfg.enable_current_mirror & 1) << 7; |
344 | 362 | ||
345 | dib7000p_write_word(state, 908, reg_908); | 363 | if (state->version != SOC7090) { |
346 | dib7000p_write_word(state, 909, reg_909); | 364 | dib7000p_write_word(state, 908, reg_908); |
365 | dib7000p_write_word(state, 909, reg_909); | ||
366 | } | ||
347 | } | 367 | } |
348 | 368 | ||
349 | static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw) | 369 | static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw) |
@@ -519,7 +539,7 @@ static u16 dib7000p_defaults[] = { | |||
519 | // auto search configuration | 539 | // auto search configuration |
520 | 3, 2, | 540 | 3, 2, |
521 | 0x0004, | 541 | 0x0004, |
522 | 0x1000, | 542 | (1<<3)|(1<<11)|(1<<12)|(1<<13), |
523 | 0x0814, /* Equal Lock */ | 543 | 0x0814, /* Equal Lock */ |
524 | 544 | ||
525 | 12, 6, | 545 | 12, 6, |
@@ -595,13 +615,6 @@ static u16 dib7000p_defaults[] = { | |||
595 | 1, 235, | 615 | 1, 235, |
596 | 0x0062, | 616 | 0x0062, |
597 | 617 | ||
598 | 2, 901, | ||
599 | 0x0006, | ||
600 | (3 << 10) | (1 << 6), | ||
601 | |||
602 | 1, 905, | ||
603 | 0x2c8e, | ||
604 | |||
605 | 0, | 618 | 0, |
606 | }; | 619 | }; |
607 | 620 | ||
@@ -618,15 +631,18 @@ static int dib7000p_demod_reset(struct dib7000p_state *state) | |||
618 | dib7000p_write_word(state, 770, 0xffff); | 631 | dib7000p_write_word(state, 770, 0xffff); |
619 | dib7000p_write_word(state, 771, 0xffff); | 632 | dib7000p_write_word(state, 771, 0xffff); |
620 | dib7000p_write_word(state, 772, 0x001f); | 633 | dib7000p_write_word(state, 772, 0x001f); |
621 | dib7000p_write_word(state, 898, 0x0003); | ||
622 | dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); | 634 | dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); |
623 | 635 | ||
624 | dib7000p_write_word(state, 770, 0); | 636 | dib7000p_write_word(state, 770, 0); |
625 | dib7000p_write_word(state, 771, 0); | 637 | dib7000p_write_word(state, 771, 0); |
626 | dib7000p_write_word(state, 772, 0); | 638 | dib7000p_write_word(state, 772, 0); |
627 | dib7000p_write_word(state, 898, 0); | ||
628 | dib7000p_write_word(state, 1280, 0); | 639 | dib7000p_write_word(state, 1280, 0); |
629 | 640 | ||
641 | if (state->version != SOC7090) { | ||
642 | dib7000p_write_word(state, 898, 0x0003); | ||
643 | dib7000p_write_word(state, 898, 0); | ||
644 | } | ||
645 | |||
630 | /* default */ | 646 | /* default */ |
631 | dib7000p_reset_pll(state); | 647 | dib7000p_reset_pll(state); |
632 | 648 | ||
@@ -640,7 +656,7 @@ static int dib7000p_demod_reset(struct dib7000p_state *state) | |||
640 | dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ | 656 | dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ |
641 | dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ | 657 | dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ |
642 | dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ | 658 | dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ |
643 | dib7000p_write_word(state, 273, (1<<6) | 30); | 659 | dib7000p_write_word(state, 273, (0<<6) | 30); |
644 | } | 660 | } |
645 | if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0) | 661 | if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0) |
646 | dprintk("OUTPUT_MODE could not be reset."); | 662 | dprintk("OUTPUT_MODE could not be reset."); |
@@ -655,7 +671,7 @@ static int dib7000p_demod_reset(struct dib7000p_state *state) | |||
655 | dib7000p_set_bandwidth(state, 8000); | 671 | dib7000p_set_bandwidth(state, 8000); |
656 | 672 | ||
657 | if (state->version == SOC7090) { | 673 | if (state->version == SOC7090) { |
658 | dib7000p_write_word(state, 36, 0x5755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */ | 674 | dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */ |
659 | } else { | 675 | } else { |
660 | if (state->cfg.tuner_is_baseband) | 676 | if (state->cfg.tuner_is_baseband) |
661 | dib7000p_write_word(state, 36, 0x0755); | 677 | dib7000p_write_word(state, 36, 0x0755); |
@@ -664,6 +680,11 @@ static int dib7000p_demod_reset(struct dib7000p_state *state) | |||
664 | } | 680 | } |
665 | 681 | ||
666 | dib7000p_write_tab(state, dib7000p_defaults); | 682 | dib7000p_write_tab(state, dib7000p_defaults); |
683 | if (state->version != SOC7090) { | ||
684 | dib7000p_write_word(state, 901, 0x0006); | ||
685 | dib7000p_write_word(state, 902, (3 << 10) | (1 << 6)); | ||
686 | dib7000p_write_word(state, 905, 0x2c8e); | ||
687 | } | ||
667 | 688 | ||
668 | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); | 689 | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); |
669 | 690 | ||
@@ -1080,9 +1101,12 @@ static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_fron | |||
1080 | dib7000p_set_channel(state, &schan, 7); | 1101 | dib7000p_set_channel(state, &schan, 7); |
1081 | 1102 | ||
1082 | factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); | 1103 | factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); |
1083 | if (factor >= 5000) | 1104 | if (factor >= 5000) { |
1084 | factor = 1; | 1105 | if (state->version == SOC7090) |
1085 | else | 1106 | factor = 2; |
1107 | else | ||
1108 | factor = 1; | ||
1109 | } else | ||
1086 | factor = 6; | 1110 | factor = 6; |
1087 | 1111 | ||
1088 | value = 30 * internal * factor; | 1112 | value = 30 * internal * factor; |
@@ -1323,7 +1347,7 @@ static int dib7000p_sleep(struct dvb_frontend *demod) | |||
1323 | { | 1347 | { |
1324 | struct dib7000p_state *state = demod->demodulator_priv; | 1348 | struct dib7000p_state *state = demod->demodulator_priv; |
1325 | if (state->version == SOC7090) | 1349 | if (state->version == SOC7090) |
1326 | return dib7090_set_output_mode(demod, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); | 1350 | return dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); |
1327 | return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); | 1351 | return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); |
1328 | } | 1352 | } |
1329 | 1353 | ||
@@ -1445,10 +1469,9 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa | |||
1445 | struct dib7000p_state *state = fe->demodulator_priv; | 1469 | struct dib7000p_state *state = fe->demodulator_priv; |
1446 | int time, ret; | 1470 | int time, ret; |
1447 | 1471 | ||
1448 | if (state->version == SOC7090) { | 1472 | if (state->version == SOC7090) |
1449 | dib7090_set_diversity_in(fe, 0); | 1473 | dib7090_set_diversity_in(fe, 0); |
1450 | dib7090_set_output_mode(fe, OUTMODE_HIGH_Z); | 1474 | else |
1451 | } else | ||
1452 | dib7000p_set_output_mode(state, OUTMODE_HIGH_Z); | 1475 | dib7000p_set_output_mode(state, OUTMODE_HIGH_Z); |
1453 | 1476 | ||
1454 | /* maybe the parameter has been changed */ | 1477 | /* maybe the parameter has been changed */ |
@@ -1485,9 +1508,13 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa | |||
1485 | ret = dib7000p_tune(fe, fep); | 1508 | ret = dib7000p_tune(fe, fep); |
1486 | 1509 | ||
1487 | /* make this a config parameter */ | 1510 | /* make this a config parameter */ |
1488 | if (state->version == SOC7090) | 1511 | if (state->version == SOC7090) { |
1489 | dib7090_set_output_mode(fe, state->cfg.output_mode); | 1512 | dib7090_set_output_mode(fe, state->cfg.output_mode); |
1490 | else | 1513 | if (state->cfg.enMpegOutput == 0) { |
1514 | dib7090_setDibTxMux(state, MPEG_ON_DIBTX); | ||
1515 | dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); | ||
1516 | } | ||
1517 | } else | ||
1491 | dib7000p_set_output_mode(state, state->cfg.output_mode); | 1518 | dib7000p_set_output_mode(state, state->cfg.output_mode); |
1492 | 1519 | ||
1493 | return ret; | 1520 | return ret; |
@@ -1933,10 +1960,10 @@ static int dib7090_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[] | |||
1933 | apb_address = 915; | 1960 | apb_address = 915; |
1934 | break; | 1961 | break; |
1935 | case 0x27: | 1962 | case 0x27: |
1936 | apb_address = 916; | 1963 | apb_address = 917; |
1937 | break; | 1964 | break; |
1938 | case 0x28: | 1965 | case 0x28: |
1939 | apb_address = 917; | 1966 | apb_address = 916; |
1940 | break; | 1967 | break; |
1941 | case 0x1d: | 1968 | case 0x1d: |
1942 | i = ((dib7000p_read_word(state, 72) >> 12) & 0x3); | 1969 | i = ((dib7000p_read_word(state, 72) >> 12) & 0x3); |
@@ -2031,12 +2058,7 @@ static u32 dib7090_calcSyncFreq(u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 | |||
2031 | 2058 | ||
2032 | static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 synchroMode, u32 syncWord, u32 syncSize) | 2059 | static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 synchroMode, u32 syncWord, u32 syncSize) |
2033 | { | 2060 | { |
2034 | u8 index_buf; | ||
2035 | u16 rx_copy_buf[22]; | ||
2036 | |||
2037 | dprintk("Configure DibStream Tx"); | 2061 | dprintk("Configure DibStream Tx"); |
2038 | for (index_buf = 0; index_buf < 22; index_buf++) | ||
2039 | rx_copy_buf[index_buf] = dib7000p_read_word(state, 1536+index_buf); | ||
2040 | 2062 | ||
2041 | dib7000p_write_word(state, 1615, 1); | 2063 | dib7000p_write_word(state, 1615, 1); |
2042 | dib7000p_write_word(state, 1603, P_Kin); | 2064 | dib7000p_write_word(state, 1603, P_Kin); |
@@ -2048,9 +2070,6 @@ static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout | |||
2048 | dib7000p_write_word(state, 1612, syncSize); | 2070 | dib7000p_write_word(state, 1612, syncSize); |
2049 | dib7000p_write_word(state, 1615, 0); | 2071 | dib7000p_write_word(state, 1615, 0); |
2050 | 2072 | ||
2051 | for (index_buf = 0; index_buf < 22; index_buf++) | ||
2052 | dib7000p_write_word(state, 1536+index_buf, rx_copy_buf[index_buf]); | ||
2053 | |||
2054 | return 0; | 2073 | return 0; |
2055 | } | 2074 | } |
2056 | 2075 | ||
@@ -2077,109 +2096,121 @@ static int dib7090_cfg_DibRx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout | |||
2077 | return 0; | 2096 | return 0; |
2078 | } | 2097 | } |
2079 | 2098 | ||
2080 | static int dib7090_enDivOnHostBus(struct dib7000p_state *state) | 2099 | static void dib7090_enMpegMux(struct dib7000p_state *state, int onoff) |
2081 | { | ||
2082 | u16 reg; | ||
2083 | |||
2084 | dprintk("Enable Diversity on host bus"); | ||
2085 | reg = (1 << 8) | (1 << 5); | ||
2086 | dib7000p_write_word(state, 1288, reg); | ||
2087 | |||
2088 | return dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0); | ||
2089 | } | ||
2090 | |||
2091 | static int dib7090_enAdcOnHostBus(struct dib7000p_state *state) | ||
2092 | { | ||
2093 | u16 reg; | ||
2094 | |||
2095 | dprintk("Enable ADC on host bus"); | ||
2096 | reg = (1 << 7) | (1 << 5); | ||
2097 | dib7000p_write_word(state, 1288, reg); | ||
2098 | |||
2099 | return dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0); | ||
2100 | } | ||
2101 | |||
2102 | static int dib7090_enMpegOnHostBus(struct dib7000p_state *state) | ||
2103 | { | 2100 | { |
2104 | u16 reg; | 2101 | u16 reg_1287 = dib7000p_read_word(state, 1287); |
2105 | |||
2106 | dprintk("Enable Mpeg on host bus"); | ||
2107 | reg = (1 << 9) | (1 << 5); | ||
2108 | dib7000p_write_word(state, 1288, reg); | ||
2109 | 2102 | ||
2110 | return dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0); | 2103 | switch (onoff) { |
2111 | } | 2104 | case 1: |
2105 | reg_1287 &= ~(1<<7); | ||
2106 | break; | ||
2107 | case 0: | ||
2108 | reg_1287 |= (1<<7); | ||
2109 | break; | ||
2110 | } | ||
2112 | 2111 | ||
2113 | static int dib7090_enMpegInput(struct dib7000p_state *state) | 2112 | dib7000p_write_word(state, 1287, reg_1287); |
2114 | { | ||
2115 | dprintk("Enable Mpeg input"); | ||
2116 | return dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); /*outputRate = 8 */ | ||
2117 | } | 2113 | } |
2118 | 2114 | ||
2119 | static int dib7090_enMpegMux(struct dib7000p_state *state, u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2) | 2115 | static void dib7090_configMpegMux(struct dib7000p_state *state, |
2116 | u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2) | ||
2120 | { | 2117 | { |
2121 | u16 reg = (1 << 7) | ((pulseWidth & 0x1f) << 2) | ((enSerialMode & 0x1) << 1) | (enSerialClkDiv2 & 0x1); | ||
2122 | |||
2123 | dprintk("Enable Mpeg mux"); | 2118 | dprintk("Enable Mpeg mux"); |
2124 | dib7000p_write_word(state, 1287, reg); | ||
2125 | 2119 | ||
2126 | reg &= ~(1 << 7); | 2120 | dib7090_enMpegMux(state, 0); |
2127 | dib7000p_write_word(state, 1287, reg); | ||
2128 | 2121 | ||
2129 | reg = (1 << 4); | 2122 | /* If the input mode is MPEG do not divide the serial clock */ |
2130 | dib7000p_write_word(state, 1288, reg); | 2123 | if ((enSerialMode == 1) && (state->input_mode_mpeg == 1)) |
2124 | enSerialClkDiv2 = 0; | ||
2131 | 2125 | ||
2132 | return 0; | 2126 | dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2) |
2127 | | ((enSerialMode & 0x1) << 1) | ||
2128 | | (enSerialClkDiv2 & 0x1)); | ||
2129 | |||
2130 | dib7090_enMpegMux(state, 1); | ||
2133 | } | 2131 | } |
2134 | 2132 | ||
2135 | static int dib7090_disableMpegMux(struct dib7000p_state *state) | 2133 | static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode) |
2136 | { | 2134 | { |
2137 | u16 reg; | 2135 | u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 7); |
2138 | |||
2139 | dprintk("Disable Mpeg mux"); | ||
2140 | dib7000p_write_word(state, 1288, 0); | ||
2141 | 2136 | ||
2142 | reg = dib7000p_read_word(state, 1287); | 2137 | switch (mode) { |
2143 | reg &= ~(1 << 7); | 2138 | case MPEG_ON_DIBTX: |
2144 | dib7000p_write_word(state, 1287, reg); | 2139 | dprintk("SET MPEG ON DIBSTREAM TX"); |
2145 | 2140 | dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0); | |
2146 | return 0; | 2141 | reg_1288 |= (1<<9); |
2142 | break; | ||
2143 | case DIV_ON_DIBTX: | ||
2144 | dprintk("SET DIV_OUT ON DIBSTREAM TX"); | ||
2145 | dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0); | ||
2146 | reg_1288 |= (1<<8); | ||
2147 | break; | ||
2148 | case ADC_ON_DIBTX: | ||
2149 | dprintk("SET ADC_OUT ON DIBSTREAM TX"); | ||
2150 | dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0); | ||
2151 | reg_1288 |= (1<<7); | ||
2152 | break; | ||
2153 | default: | ||
2154 | break; | ||
2155 | } | ||
2156 | dib7000p_write_word(state, 1288, reg_1288); | ||
2147 | } | 2157 | } |
2148 | 2158 | ||
2149 | static int dib7090_set_input_mode(struct dvb_frontend *fe, int mode) | 2159 | static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode) |
2150 | { | 2160 | { |
2151 | struct dib7000p_state *state = fe->demodulator_priv; | 2161 | u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 4); |
2152 | 2162 | ||
2153 | switch (mode) { | 2163 | switch (mode) { |
2154 | case INPUT_MODE_DIVERSITY: | 2164 | case DEMOUT_ON_HOSTBUS: |
2155 | dprintk("Enable diversity INPUT"); | 2165 | dprintk("SET DEM OUT OLD INTERF ON HOST BUS"); |
2156 | dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0); | 2166 | dib7090_enMpegMux(state, 0); |
2167 | reg_1288 |= (1<<6); | ||
2168 | break; | ||
2169 | case DIBTX_ON_HOSTBUS: | ||
2170 | dprintk("SET DIBSTREAM TX ON HOST BUS"); | ||
2171 | dib7090_enMpegMux(state, 0); | ||
2172 | reg_1288 |= (1<<5); | ||
2157 | break; | 2173 | break; |
2158 | case INPUT_MODE_MPEG: | 2174 | case MPEG_ON_HOSTBUS: |
2159 | dprintk("Enable Mpeg INPUT"); | 2175 | dprintk("SET MPEG MUX ON HOST BUS"); |
2160 | dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); /*outputRate = 8 */ | 2176 | reg_1288 |= (1<<4); |
2161 | break; | 2177 | break; |
2162 | case INPUT_MODE_OFF: | ||
2163 | default: | 2178 | default: |
2164 | dprintk("Disable INPUT"); | ||
2165 | dib7090_cfg_DibRx(state, 0, 0, 0, 0, 0, 0, 0); | ||
2166 | break; | 2179 | break; |
2167 | } | 2180 | } |
2168 | return 0; | 2181 | dib7000p_write_word(state, 1288, reg_1288); |
2169 | } | 2182 | } |
2170 | 2183 | ||
2171 | static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff) | 2184 | int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff) |
2172 | { | 2185 | { |
2186 | struct dib7000p_state *state = fe->demodulator_priv; | ||
2187 | u16 reg_1287; | ||
2188 | |||
2173 | switch (onoff) { | 2189 | switch (onoff) { |
2174 | case 0: /* only use the internal way - not the diversity input */ | 2190 | case 0: /* only use the internal way - not the diversity input */ |
2175 | dib7090_set_input_mode(fe, INPUT_MODE_MPEG); | 2191 | dprintk("%s mode OFF : by default Enable Mpeg INPUT", __func__); |
2176 | break; | 2192 | dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); |
2177 | case 1: /* both ways */ | 2193 | |
2178 | case 2: /* only the diversity input */ | 2194 | /* Do not divide the serial clock of MPEG MUX */ |
2179 | dib7090_set_input_mode(fe, INPUT_MODE_DIVERSITY); | 2195 | /* in SERIAL MODE in case input mode MPEG is used */ |
2180 | break; | 2196 | reg_1287 = dib7000p_read_word(state, 1287); |
2197 | /* enSerialClkDiv2 == 1 ? */ | ||
2198 | if ((reg_1287 & 0x1) == 1) { | ||
2199 | /* force enSerialClkDiv2 = 0 */ | ||
2200 | reg_1287 &= ~0x1; | ||
2201 | dib7000p_write_word(state, 1287, reg_1287); | ||
2202 | } | ||
2203 | state->input_mode_mpeg = 1; | ||
2204 | break; | ||
2205 | case 1: /* both ways */ | ||
2206 | case 2: /* only the diversity input */ | ||
2207 | dprintk("%s ON : Enable diversity INPUT", __func__); | ||
2208 | dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0); | ||
2209 | state->input_mode_mpeg = 0; | ||
2210 | break; | ||
2181 | } | 2211 | } |
2182 | 2212 | ||
2213 | dib7000p_set_diversity_in(&state->demod, onoff); | ||
2183 | return 0; | 2214 | return 0; |
2184 | } | 2215 | } |
2185 | 2216 | ||
@@ -2204,69 +2235,63 @@ static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode) | |||
2204 | 2235 | ||
2205 | case OUTMODE_MPEG2_SERIAL: | 2236 | case OUTMODE_MPEG2_SERIAL: |
2206 | if (prefer_mpeg_mux_use) { | 2237 | if (prefer_mpeg_mux_use) { |
2207 | dprintk("Sip 7090P setting output mode TS_SERIAL using Mpeg Mux"); | 2238 | dprintk("setting output mode TS_SERIAL using Mpeg Mux"); |
2208 | dib7090_enMpegOnHostBus(state); | 2239 | dib7090_configMpegMux(state, 3, 1, 1); |
2209 | dib7090_enMpegInput(state); | 2240 | dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS); |
2210 | if (state->cfg.enMpegOutput == 1) | 2241 | } else {/* Use Smooth block */ |
2211 | dib7090_enMpegMux(state, 3, 1, 1); | 2242 | dprintk("setting output mode TS_SERIAL using Smooth bloc"); |
2212 | 2243 | dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); | |
2213 | } else { /* Use Smooth block */ | 2244 | outreg |= (2<<6) | (0 << 1); |
2214 | dprintk("Sip 7090P setting output mode TS_SERIAL using Smooth bloc"); | ||
2215 | dib7090_disableMpegMux(state); | ||
2216 | dib7000p_write_word(state, 1288, (1 << 6)); | ||
2217 | outreg |= (2 << 6) | (0 << 1); | ||
2218 | } | 2245 | } |
2219 | break; | 2246 | break; |
2220 | 2247 | ||
2221 | case OUTMODE_MPEG2_PAR_GATED_CLK: | 2248 | case OUTMODE_MPEG2_PAR_GATED_CLK: |
2222 | if (prefer_mpeg_mux_use) { | 2249 | if (prefer_mpeg_mux_use) { |
2223 | dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Mpeg Mux"); | 2250 | dprintk("setting output mode TS_PARALLEL_GATED using Mpeg Mux"); |
2224 | dib7090_enMpegOnHostBus(state); | 2251 | dib7090_configMpegMux(state, 2, 0, 0); |
2225 | dib7090_enMpegInput(state); | 2252 | dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS); |
2226 | if (state->cfg.enMpegOutput == 1) | 2253 | } else { /* Use Smooth block */ |
2227 | dib7090_enMpegMux(state, 2, 0, 0); | 2254 | dprintk("setting output mode TS_PARALLEL_GATED using Smooth block"); |
2228 | } else { /* Use Smooth block */ | 2255 | dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); |
2229 | dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Smooth block"); | 2256 | outreg |= (0<<6); |
2230 | dib7090_disableMpegMux(state); | ||
2231 | dib7000p_write_word(state, 1288, (1 << 6)); | ||
2232 | outreg |= (0 << 6); | ||
2233 | } | 2257 | } |
2234 | break; | 2258 | break; |
2235 | 2259 | ||
2236 | case OUTMODE_MPEG2_PAR_CONT_CLK: /* Using Smooth block only */ | 2260 | case OUTMODE_MPEG2_PAR_CONT_CLK: /* Using Smooth block only */ |
2237 | dprintk("Sip 7090P setting output mode TS_PARALLEL_CONT using Smooth block"); | 2261 | dprintk("setting output mode TS_PARALLEL_CONT using Smooth block"); |
2238 | dib7090_disableMpegMux(state); | 2262 | dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); |
2239 | dib7000p_write_word(state, 1288, (1 << 6)); | 2263 | outreg |= (1<<6); |
2240 | outreg |= (1 << 6); | ||
2241 | break; | 2264 | break; |
2242 | 2265 | ||
2243 | case OUTMODE_MPEG2_FIFO: /* Using Smooth block because not supported by new Mpeg Mux bloc */ | 2266 | case OUTMODE_MPEG2_FIFO: /* Using Smooth block because not supported by new Mpeg Mux bloc */ |
2244 | dprintk("Sip 7090P setting output mode TS_FIFO using Smooth block"); | 2267 | dprintk("setting output mode TS_FIFO using Smooth block"); |
2245 | dib7090_disableMpegMux(state); | 2268 | dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS); |
2246 | dib7000p_write_word(state, 1288, (1 << 6)); | 2269 | outreg |= (5<<6); |
2247 | outreg |= (5 << 6); | ||
2248 | smo_mode |= (3 << 1); | 2270 | smo_mode |= (3 << 1); |
2249 | fifo_threshold = 512; | 2271 | fifo_threshold = 512; |
2250 | break; | 2272 | break; |
2251 | 2273 | ||
2252 | case OUTMODE_DIVERSITY: | 2274 | case OUTMODE_DIVERSITY: |
2253 | dprintk("Sip 7090P setting output mode MODE_DIVERSITY"); | 2275 | dprintk("setting output mode MODE_DIVERSITY"); |
2254 | dib7090_disableMpegMux(state); | 2276 | dib7090_setDibTxMux(state, DIV_ON_DIBTX); |
2255 | dib7090_enDivOnHostBus(state); | 2277 | dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); |
2256 | break; | 2278 | break; |
2257 | 2279 | ||
2258 | case OUTMODE_ANALOG_ADC: | 2280 | case OUTMODE_ANALOG_ADC: |
2259 | dprintk("Sip 7090P setting output mode MODE_ANALOG_ADC"); | 2281 | dprintk("setting output mode MODE_ANALOG_ADC"); |
2260 | dib7090_enAdcOnHostBus(state); | 2282 | dib7090_setDibTxMux(state, ADC_ON_DIBTX); |
2283 | dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS); | ||
2261 | break; | 2284 | break; |
2262 | } | 2285 | } |
2286 | if (mode != OUTMODE_HIGH_Z) | ||
2287 | outreg |= (1 << 10); | ||
2263 | 2288 | ||
2264 | if (state->cfg.output_mpeg2_in_188_bytes) | 2289 | if (state->cfg.output_mpeg2_in_188_bytes) |
2265 | smo_mode |= (1 << 5); | 2290 | smo_mode |= (1 << 5); |
2266 | 2291 | ||
2267 | ret |= dib7000p_write_word(state, 235, smo_mode); | 2292 | ret |= dib7000p_write_word(state, 235, smo_mode); |
2268 | ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ | 2293 | ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ |
2269 | ret |= dib7000p_write_word(state, 1286, outreg | (1 << 10)); /* allways set Dout active = 1 !!! */ | 2294 | ret |= dib7000p_write_word(state, 1286, outreg); |
2270 | 2295 | ||
2271 | return ret; | 2296 | return ret; |
2272 | } | 2297 | } |
@@ -2296,13 +2321,6 @@ int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff) | |||
2296 | } | 2321 | } |
2297 | EXPORT_SYMBOL(dib7090_tuner_sleep); | 2322 | EXPORT_SYMBOL(dib7090_tuner_sleep); |
2298 | 2323 | ||
2299 | int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart) | ||
2300 | { | ||
2301 | dprintk("AGC restart callback: %d", restart); | ||
2302 | return 0; | ||
2303 | } | ||
2304 | EXPORT_SYMBOL(dib7090_agc_restart); | ||
2305 | |||
2306 | int dib7090_get_adc_power(struct dvb_frontend *fe) | 2324 | int dib7090_get_adc_power(struct dvb_frontend *fe) |
2307 | { | 2325 | { |
2308 | return dib7000p_get_adc_power(fe); | 2326 | return dib7000p_get_adc_power(fe); |
diff --git a/drivers/media/dvb/frontends/dib7000p.h b/drivers/media/dvb/frontends/dib7000p.h index 0179f9474bac..58f907ccf845 100644 --- a/drivers/media/dvb/frontends/dib7000p.h +++ b/drivers/media/dvb/frontends/dib7000p.h | |||
@@ -56,7 +56,6 @@ extern int dib7000p_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff); | |||
56 | extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff); | 56 | extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff); |
57 | extern int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw); | 57 | extern int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw); |
58 | extern u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf); | 58 | extern u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf); |
59 | extern int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart); | ||
60 | extern int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff); | 59 | extern int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff); |
61 | extern int dib7090_get_adc_power(struct dvb_frontend *fe); | 60 | extern int dib7090_get_adc_power(struct dvb_frontend *fe); |
62 | extern struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe); | 61 | extern struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe); |
@@ -122,12 +121,6 @@ static inline u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf) | |||
122 | return 0; | 121 | return 0; |
123 | } | 122 | } |
124 | 123 | ||
125 | static inline int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart) | ||
126 | { | ||
127 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
128 | return -ENODEV; | ||
129 | } | ||
130 | |||
131 | static inline int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff) | 124 | static inline int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff) |
132 | { | 125 | { |
133 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 126 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |