diff options
author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-11-07 14:19:45 -0500 |
---|---|---|
committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-12-03 06:29:55 -0500 |
commit | 226e6b866d741a8cfb7486e7f0767fe4e018413c (patch) | |
tree | 1a23404a81a9656d7e7f04eaa2d7ae75d4a1bd1b | |
parent | 9381fc5d655d172af737b5f16749a63e4b931040 (diff) |
gpio: pch: Convert to dev_pm_ops
Convert the legacy system PM callbacks to new ones. Meanwhile, remove the
redundant calls to the PCI for changing a power state since it's done by bus
code.
While here, remove weird indentation with backslash in use.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-rw-r--r-- | drivers/gpio/gpio-pch.c | 53 |
1 files changed, 13 insertions, 40 deletions
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 789e60ea2ac5..350f95fa7bc9 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c | |||
@@ -171,11 +171,10 @@ static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | |||
171 | return 0; | 171 | return 0; |
172 | } | 172 | } |
173 | 173 | ||
174 | #ifdef CONFIG_PM | ||
175 | /* | 174 | /* |
176 | * Save register configuration and disable interrupts. | 175 | * Save register configuration and disable interrupts. |
177 | */ | 176 | */ |
178 | static void pch_gpio_save_reg_conf(struct pch_gpio *chip) | 177 | static void __maybe_unused pch_gpio_save_reg_conf(struct pch_gpio *chip) |
179 | { | 178 | { |
180 | chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); | 179 | chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); |
181 | chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); | 180 | chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); |
@@ -185,14 +184,13 @@ static void pch_gpio_save_reg_conf(struct pch_gpio *chip) | |||
185 | if (chip->ioh == INTEL_EG20T_PCH) | 184 | if (chip->ioh == INTEL_EG20T_PCH) |
186 | chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); | 185 | chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); |
187 | if (chip->ioh == OKISEMI_ML7223n_IOH) | 186 | if (chip->ioh == OKISEMI_ML7223n_IOH) |
188 | chip->pch_gpio_reg.gpio_use_sel_reg =\ | 187 | chip->pch_gpio_reg.gpio_use_sel_reg = ioread32(&chip->reg->gpio_use_sel); |
189 | ioread32(&chip->reg->gpio_use_sel); | ||
190 | } | 188 | } |
191 | 189 | ||
192 | /* | 190 | /* |
193 | * This function restores the register configuration of the GPIO device. | 191 | * This function restores the register configuration of the GPIO device. |
194 | */ | 192 | */ |
195 | static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) | 193 | static void __maybe_unused pch_gpio_restore_reg_conf(struct pch_gpio *chip) |
196 | { | 194 | { |
197 | iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); | 195 | iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); |
198 | iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); | 196 | iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); |
@@ -204,10 +202,8 @@ static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) | |||
204 | if (chip->ioh == INTEL_EG20T_PCH) | 202 | if (chip->ioh == INTEL_EG20T_PCH) |
205 | iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1); | 203 | iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1); |
206 | if (chip->ioh == OKISEMI_ML7223n_IOH) | 204 | if (chip->ioh == OKISEMI_ML7223n_IOH) |
207 | iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, | 205 | iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, &chip->reg->gpio_use_sel); |
208 | &chip->reg->gpio_use_sel); | ||
209 | } | 206 | } |
210 | #endif | ||
211 | 207 | ||
212 | static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) | 208 | static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
213 | { | 209 | { |
@@ -431,10 +427,9 @@ static int pch_gpio_probe(struct pci_dev *pdev, | |||
431 | return pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); | 427 | return pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); |
432 | } | 428 | } |
433 | 429 | ||
434 | #ifdef CONFIG_PM | 430 | static int __maybe_unused pch_gpio_suspend(struct device *dev) |
435 | static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) | ||
436 | { | 431 | { |
437 | s32 ret; | 432 | struct pci_dev *pdev = to_pci_dev(dev); |
438 | struct pch_gpio *chip = pci_get_drvdata(pdev); | 433 | struct pch_gpio *chip = pci_get_drvdata(pdev); |
439 | unsigned long flags; | 434 | unsigned long flags; |
440 | 435 | ||
@@ -442,36 +437,15 @@ static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) | |||
442 | pch_gpio_save_reg_conf(chip); | 437 | pch_gpio_save_reg_conf(chip); |
443 | spin_unlock_irqrestore(&chip->spinlock, flags); | 438 | spin_unlock_irqrestore(&chip->spinlock, flags); |
444 | 439 | ||
445 | ret = pci_save_state(pdev); | ||
446 | if (ret) { | ||
447 | dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); | ||
448 | return ret; | ||
449 | } | ||
450 | pci_disable_device(pdev); | ||
451 | pci_set_power_state(pdev, PCI_D0); | ||
452 | ret = pci_enable_wake(pdev, PCI_D0, 1); | ||
453 | if (ret) | ||
454 | dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); | ||
455 | |||
456 | return 0; | 440 | return 0; |
457 | } | 441 | } |
458 | 442 | ||
459 | static int pch_gpio_resume(struct pci_dev *pdev) | 443 | static int __maybe_unused pch_gpio_resume(struct device *dev) |
460 | { | 444 | { |
461 | s32 ret; | 445 | struct pci_dev *pdev = to_pci_dev(dev); |
462 | struct pch_gpio *chip = pci_get_drvdata(pdev); | 446 | struct pch_gpio *chip = pci_get_drvdata(pdev); |
463 | unsigned long flags; | 447 | unsigned long flags; |
464 | 448 | ||
465 | ret = pci_enable_wake(pdev, PCI_D0, 0); | ||
466 | |||
467 | pci_set_power_state(pdev, PCI_D0); | ||
468 | ret = pci_enable_device(pdev); | ||
469 | if (ret) { | ||
470 | dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); | ||
471 | return ret; | ||
472 | } | ||
473 | pci_restore_state(pdev); | ||
474 | |||
475 | spin_lock_irqsave(&chip->spinlock, flags); | 449 | spin_lock_irqsave(&chip->spinlock, flags); |
476 | iowrite32(0x01, &chip->reg->reset); | 450 | iowrite32(0x01, &chip->reg->reset); |
477 | iowrite32(0x00, &chip->reg->reset); | 451 | iowrite32(0x00, &chip->reg->reset); |
@@ -480,10 +454,8 @@ static int pch_gpio_resume(struct pci_dev *pdev) | |||
480 | 454 | ||
481 | return 0; | 455 | return 0; |
482 | } | 456 | } |
483 | #else | 457 | |
484 | #define pch_gpio_suspend NULL | 458 | static SIMPLE_DEV_PM_OPS(pch_gpio_pm_ops, pch_gpio_suspend, pch_gpio_resume); |
485 | #define pch_gpio_resume NULL | ||
486 | #endif | ||
487 | 459 | ||
488 | #define PCI_VENDOR_ID_ROHM 0x10DB | 460 | #define PCI_VENDOR_ID_ROHM 0x10DB |
489 | static const struct pci_device_id pch_gpio_pcidev_id[] = { | 461 | static const struct pci_device_id pch_gpio_pcidev_id[] = { |
@@ -499,8 +471,9 @@ static struct pci_driver pch_gpio_driver = { | |||
499 | .name = "pch_gpio", | 471 | .name = "pch_gpio", |
500 | .id_table = pch_gpio_pcidev_id, | 472 | .id_table = pch_gpio_pcidev_id, |
501 | .probe = pch_gpio_probe, | 473 | .probe = pch_gpio_probe, |
502 | .suspend = pch_gpio_suspend, | 474 | .driver = { |
503 | .resume = pch_gpio_resume | 475 | .pm = &pch_gpio_pm_ops, |
476 | }, | ||
504 | }; | 477 | }; |
505 | 478 | ||
506 | module_pci_driver(pch_gpio_driver); | 479 | module_pci_driver(pch_gpio_driver); |