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authorLinus Walleij <linus.walleij@linaro.org>2015-12-04 08:02:58 -0500
committerLinus Walleij <linus.walleij@linaro.org>2016-01-05 05:21:00 -0500
commit0f4630f3720e7e6e921bf525c8357fea7ef3dbab (patch)
tree61c1904593d1ee424464c2d57668ba0fd2fbcbb4
parent3208b0f0c010b26e4d461a3bca59989d03ed9087 (diff)
gpio: generic: factor into gpio_chip struct
The separate struct bgpio_chip has been a pain to handle, both by being confusingly similar in name to struct gpio_chip and for being contained inside a struct so that struct gpio_chip is contained in a struct contained in a struct, making several steps of dereferencing necessary. Make things simpler: include the fields directly into <linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix some of the member variables with bgpio_* and add proper kerneldoc while we're at it. Modify all users to handle the change and use a struct gpio_chip directly. And while we're at it: replace all container_of() dereferencing by gpiochip_get_data() and registering the gpio_chip with gpiochip_add_data(). Cc: arm@kernel.org Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Kukjin Kim <kgene@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Cc: Rabin Vincent <rabin@rab.in> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c2
-rw-r--r--arch/arm/mach-clps711x/board-p720t.c2
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c2
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c2
-rw-r--r--drivers/gpio/gpio-74xx-mmio.c37
-rw-r--r--drivers/gpio/gpio-brcmstb.c80
-rw-r--r--drivers/gpio/gpio-clps711x.c28
-rw-r--r--drivers/gpio/gpio-dwapb.c92
-rw-r--r--drivers/gpio/gpio-ep93xx.c25
-rw-r--r--drivers/gpio/gpio-etraxfs.c49
-rw-r--r--drivers/gpio/gpio-ge.c24
-rw-r--r--drivers/gpio/gpio-generic.c292
-rw-r--r--drivers/gpio/gpio-grgpio.c73
-rw-r--r--drivers/gpio/gpio-moxart.c29
-rw-r--r--drivers/gpio/gpio-mxc.c27
-rw-r--r--drivers/gpio/gpio-mxs.c33
-rw-r--r--drivers/gpio/gpio-sodaville.c13
-rw-r--r--drivers/gpio/gpio-xgene-sb.c40
-rw-r--r--drivers/mfd/vexpress-sysreg.c8
-rw-r--r--include/linux/basic_mmio_gpio.h80
-rw-r--r--include/linux/gpio/driver.h54
22 files changed, 442 insertions, 552 deletions
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index c3d964221767..ba3d7d1b28f8 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -31,7 +31,7 @@
31#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
32#include <linux/mtd/nand-gpio.h> 32#include <linux/mtd/nand-gpio.h>
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/basic_mmio_gpio.h> 34#include <linux/gpio/driver.h>
35 35
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/sizes.h> 37#include <asm/sizes.h>
diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c
index e68dd629bda2..80a16a8b3776 100644
--- a/arch/arm/mach-clps711x/board-p720t.c
+++ b/arch/arm/mach-clps711x/board-p720t.c
@@ -28,7 +28,7 @@
28#include <linux/leds.h> 28#include <linux/leds.h>
29#include <linux/sizes.h> 29#include <linux/sizes.h>
30#include <linux/backlight.h> 30#include <linux/backlight.h>
31#include <linux/basic_mmio_gpio.h> 31#include <linux/gpio/driver.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/mtd/nand-gpio.h> 34#include <linux/mtd/nand-gpio.h>
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 703ce31d7379..9986f9a697c8 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -17,7 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/mtd/mtd.h> 18#include <linux/mtd/mtd.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/basic_mmio_gpio.h> 20#include <linux/gpio/driver.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/regulator/fixed.h> 22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h> 23#include <linux/regulator/machine.h>
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index a95499ea8706..97e66558c238 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -11,7 +11,7 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/basic_mmio_gpio.h> 14#include <linux/gpio/driver.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index f776adcdaee8..723f47fefc81 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -29,7 +29,7 @@
29#include <linux/pwm_backlight.h> 29#include <linux/pwm_backlight.h>
30#include <linux/dm9000.h> 30#include <linux/dm9000.h>
31#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
32#include <linux/basic_mmio_gpio.h> 32#include <linux/gpio/driver.h>
33#include <linux/spi/spi.h> 33#include <linux/spi/spi.h>
34 34
35#include <linux/platform_data/pca953x.h> 35#include <linux/platform_data/pca953x.h>
diff --git a/drivers/gpio/gpio-74xx-mmio.c b/drivers/gpio/gpio-74xx-mmio.c
index 6b186829087c..372b0e01adc6 100644
--- a/drivers/gpio/gpio-74xx-mmio.c
+++ b/drivers/gpio/gpio-74xx-mmio.c
@@ -10,10 +10,9 @@
10 */ 10 */
11 11
12#include <linux/err.h> 12#include <linux/err.h>
13#include <linux/gpio.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/of_device.h> 14#include <linux/of_device.h>
16#include <linux/basic_mmio_gpio.h> 15#include <linux/gpio/driver.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
18 17
19#define MMIO_74XX_DIR_IN (0 << 8) 18#define MMIO_74XX_DIR_IN (0 << 8)
@@ -21,7 +20,7 @@
21#define MMIO_74XX_BIT_CNT(x) ((x) & 0xff) 20#define MMIO_74XX_BIT_CNT(x) ((x) & 0xff)
22 21
23struct mmio_74xx_gpio_priv { 22struct mmio_74xx_gpio_priv {
24 struct bgpio_chip bgc; 23 struct gpio_chip gc;
25 unsigned flags; 24 unsigned flags;
26}; 25};
27 26
@@ -78,30 +77,23 @@ static const struct of_device_id mmio_74xx_gpio_ids[] = {
78}; 77};
79MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids); 78MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids);
80 79
81static inline struct mmio_74xx_gpio_priv *to_74xx_gpio(struct gpio_chip *gc)
82{
83 struct bgpio_chip *bgc = to_bgpio_chip(gc);
84
85 return container_of(bgc, struct mmio_74xx_gpio_priv, bgc);
86}
87
88static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset) 80static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset)
89{ 81{
90 struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); 82 struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
91 83
92 return (priv->flags & MMIO_74XX_DIR_OUT) ? GPIOF_DIR_OUT : GPIOF_DIR_IN; 84 return !(priv->flags & MMIO_74XX_DIR_OUT);
93} 85}
94 86
95static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio) 87static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio)
96{ 88{
97 struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); 89 struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
98 90
99 return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0; 91 return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0;
100} 92}
101 93
102static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 94static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
103{ 95{
104 struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); 96 struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
105 97
106 if (priv->flags & MMIO_74XX_DIR_OUT) { 98 if (priv->flags & MMIO_74XX_DIR_OUT) {
107 gc->set(gc, gpio, val); 99 gc->set(gc, gpio, val);
@@ -134,28 +126,29 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev)
134 126
135 priv->flags = (uintptr_t) of_id->data; 127 priv->flags = (uintptr_t) of_id->data;
136 128
137 err = bgpio_init(&priv->bgc, &pdev->dev, 129 err = bgpio_init(&priv->gc, &pdev->dev,
138 DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8), 130 DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8),
139 dat, NULL, NULL, NULL, NULL, 0); 131 dat, NULL, NULL, NULL, NULL, 0);
140 if (err) 132 if (err)
141 return err; 133 return err;
142 134
143 priv->bgc.gc.direction_input = mmio_74xx_dir_in; 135 priv->gc.direction_input = mmio_74xx_dir_in;
144 priv->bgc.gc.direction_output = mmio_74xx_dir_out; 136 priv->gc.direction_output = mmio_74xx_dir_out;
145 priv->bgc.gc.get_direction = mmio_74xx_get_direction; 137 priv->gc.get_direction = mmio_74xx_get_direction;
146 priv->bgc.gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags); 138 priv->gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags);
147 priv->bgc.gc.owner = THIS_MODULE; 139 priv->gc.owner = THIS_MODULE;
148 140
149 platform_set_drvdata(pdev, priv); 141 platform_set_drvdata(pdev, priv);
150 142
151 return gpiochip_add(&priv->bgc.gc); 143 return gpiochip_add_data(&priv->gc, priv);
152} 144}
153 145
154static int mmio_74xx_gpio_remove(struct platform_device *pdev) 146static int mmio_74xx_gpio_remove(struct platform_device *pdev)
155{ 147{
156 struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev); 148 struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev);
157 149
158 return bgpio_remove(&priv->bgc); 150 gpiochip_remove(&priv->gc);
151 return 0;
159} 152}
160 153
161static struct platform_driver mmio_74xx_gpio_driver = { 154static struct platform_driver mmio_74xx_gpio_driver = {
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 4c64627c6bb5..dc3f0395693b 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -16,7 +16,6 @@
16#include <linux/of_device.h> 16#include <linux/of_device.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/basic_mmio_gpio.h>
20#include <linux/irqdomain.h> 19#include <linux/irqdomain.h>
21#include <linux/irqchip/chained_irq.h> 20#include <linux/irqchip/chained_irq.h>
22#include <linux/interrupt.h> 21#include <linux/interrupt.h>
@@ -35,7 +34,7 @@
35struct brcmstb_gpio_bank { 34struct brcmstb_gpio_bank {
36 struct list_head node; 35 struct list_head node;
37 int id; 36 int id;
38 struct bgpio_chip bgc; 37 struct gpio_chip gc;
39 struct brcmstb_gpio_priv *parent_priv; 38 struct brcmstb_gpio_priv *parent_priv;
40 u32 width; 39 u32 width;
41 struct irq_chip irq_chip; 40 struct irq_chip irq_chip;
@@ -57,37 +56,30 @@ struct brcmstb_gpio_priv {
57/* assumes MAX_GPIO_PER_BANK is a multiple of 2 */ 56/* assumes MAX_GPIO_PER_BANK is a multiple of 2 */
58#define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1)) 57#define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
59 58
60static inline struct brcmstb_gpio_bank *
61brcmstb_gpio_gc_to_bank(struct gpio_chip *gc)
62{
63 struct bgpio_chip *bgc = to_bgpio_chip(gc);
64 return container_of(bgc, struct brcmstb_gpio_bank, bgc);
65}
66
67static inline struct brcmstb_gpio_priv * 59static inline struct brcmstb_gpio_priv *
68brcmstb_gpio_gc_to_priv(struct gpio_chip *gc) 60brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
69{ 61{
70 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); 62 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
71 return bank->parent_priv; 63 return bank->parent_priv;
72} 64}
73 65
74static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, 66static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
75 unsigned int offset, bool enable) 67 unsigned int offset, bool enable)
76{ 68{
77 struct bgpio_chip *bgc = &bank->bgc; 69 struct gpio_chip *gc = &bank->gc;
78 struct brcmstb_gpio_priv *priv = bank->parent_priv; 70 struct brcmstb_gpio_priv *priv = bank->parent_priv;
79 u32 mask = bgc->pin2mask(bgc, offset); 71 u32 mask = gc->pin2mask(gc, offset);
80 u32 imask; 72 u32 imask;
81 unsigned long flags; 73 unsigned long flags;
82 74
83 spin_lock_irqsave(&bgc->lock, flags); 75 spin_lock_irqsave(&gc->bgpio_lock, flags);
84 imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id)); 76 imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));
85 if (enable) 77 if (enable)
86 imask |= mask; 78 imask |= mask;
87 else 79 else
88 imask &= ~mask; 80 imask &= ~mask;
89 bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask); 81 gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
90 spin_unlock_irqrestore(&bgc->lock, flags); 82 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
91} 83}
92 84
93/* -------------------- IRQ chip functions -------------------- */ 85/* -------------------- IRQ chip functions -------------------- */
@@ -95,7 +87,7 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
95static void brcmstb_gpio_irq_mask(struct irq_data *d) 87static void brcmstb_gpio_irq_mask(struct irq_data *d)
96{ 88{
97 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 89 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
98 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); 90 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
99 91
100 brcmstb_gpio_set_imask(bank, d->hwirq, false); 92 brcmstb_gpio_set_imask(bank, d->hwirq, false);
101} 93}
@@ -103,7 +95,7 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d)
103static void brcmstb_gpio_irq_unmask(struct irq_data *d) 95static void brcmstb_gpio_irq_unmask(struct irq_data *d)
104{ 96{
105 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 97 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
106 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); 98 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
107 99
108 brcmstb_gpio_set_imask(bank, d->hwirq, true); 100 brcmstb_gpio_set_imask(bank, d->hwirq, true);
109} 101}
@@ -111,7 +103,7 @@ static void brcmstb_gpio_irq_unmask(struct irq_data *d)
111static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type) 103static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
112{ 104{
113 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 105 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
114 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); 106 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
115 struct brcmstb_gpio_priv *priv = bank->parent_priv; 107 struct brcmstb_gpio_priv *priv = bank->parent_priv;
116 u32 mask = BIT(d->hwirq); 108 u32 mask = BIT(d->hwirq);
117 u32 edge_insensitive, iedge_insensitive; 109 u32 edge_insensitive, iedge_insensitive;
@@ -149,23 +141,23 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
149 return -EINVAL; 141 return -EINVAL;
150 } 142 }
151 143
152 spin_lock_irqsave(&bank->bgc.lock, flags); 144 spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
153 145
154 iedge_config = bank->bgc.read_reg(priv->reg_base + 146 iedge_config = bank->gc.read_reg(priv->reg_base +
155 GIO_EC(bank->id)) & ~mask; 147 GIO_EC(bank->id)) & ~mask;
156 iedge_insensitive = bank->bgc.read_reg(priv->reg_base + 148 iedge_insensitive = bank->gc.read_reg(priv->reg_base +
157 GIO_EI(bank->id)) & ~mask; 149 GIO_EI(bank->id)) & ~mask;
158 ilevel = bank->bgc.read_reg(priv->reg_base + 150 ilevel = bank->gc.read_reg(priv->reg_base +
159 GIO_LEVEL(bank->id)) & ~mask; 151 GIO_LEVEL(bank->id)) & ~mask;
160 152
161 bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id), 153 bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id),
162 iedge_config | edge_config); 154 iedge_config | edge_config);
163 bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id), 155 bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id),
164 iedge_insensitive | edge_insensitive); 156 iedge_insensitive | edge_insensitive);
165 bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id), 157 bank->gc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
166 ilevel | level); 158 ilevel | level);
167 159
168 spin_unlock_irqrestore(&bank->bgc.lock, flags); 160 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
169 return 0; 161 return 0;
170} 162}
171 163
@@ -210,29 +202,29 @@ static irqreturn_t brcmstb_gpio_wake_irq_handler(int irq, void *data)
210static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank) 202static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
211{ 203{
212 struct brcmstb_gpio_priv *priv = bank->parent_priv; 204 struct brcmstb_gpio_priv *priv = bank->parent_priv;
213 struct irq_domain *irq_domain = bank->bgc.gc.irqdomain; 205 struct irq_domain *irq_domain = bank->gc.irqdomain;
214 void __iomem *reg_base = priv->reg_base; 206 void __iomem *reg_base = priv->reg_base;
215 unsigned long status; 207 unsigned long status;
216 unsigned long flags; 208 unsigned long flags;
217 209
218 spin_lock_irqsave(&bank->bgc.lock, flags); 210 spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
219 while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) & 211 while ((status = bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) &
220 bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) { 212 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)))) {
221 int bit; 213 int bit;
222 214
223 for_each_set_bit(bit, &status, 32) { 215 for_each_set_bit(bit, &status, 32) {
224 u32 stat = bank->bgc.read_reg(reg_base + 216 u32 stat = bank->gc.read_reg(reg_base +
225 GIO_STAT(bank->id)); 217 GIO_STAT(bank->id));
226 if (bit >= bank->width) 218 if (bit >= bank->width)
227 dev_warn(&priv->pdev->dev, 219 dev_warn(&priv->pdev->dev,
228 "IRQ for invalid GPIO (bank=%d, offset=%d)\n", 220 "IRQ for invalid GPIO (bank=%d, offset=%d)\n",
229 bank->id, bit); 221 bank->id, bit);
230 bank->bgc.write_reg(reg_base + GIO_STAT(bank->id), 222 bank->gc.write_reg(reg_base + GIO_STAT(bank->id),
231 stat | BIT(bit)); 223 stat | BIT(bit));
232 generic_handle_irq(irq_find_mapping(irq_domain, bit)); 224 generic_handle_irq(irq_find_mapping(irq_domain, bit));
233 } 225 }
234 } 226 }
235 spin_unlock_irqrestore(&bank->bgc.lock, flags); 227 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
236} 228}
237 229
238/* Each UPG GIO block has one IRQ for all banks */ 230/* Each UPG GIO block has one IRQ for all banks */
@@ -303,9 +295,7 @@ static int brcmstb_gpio_remove(struct platform_device *pdev)
303 */ 295 */
304 list_for_each(pos, &priv->bank_list) { 296 list_for_each(pos, &priv->bank_list) {
305 bank = list_entry(pos, struct brcmstb_gpio_bank, node); 297 bank = list_entry(pos, struct brcmstb_gpio_bank, node);
306 ret = bgpio_remove(&bank->bgc); 298 gpiochip_remove(&bank->gc);
307 if (ret)
308 dev_err(&pdev->dev, "gpiochip_remove fail in cleanup\n");
309 } 299 }
310 if (priv->reboot_notifier.notifier_call) { 300 if (priv->reboot_notifier.notifier_call) {
311 ret = unregister_reboot_notifier(&priv->reboot_notifier); 301 ret = unregister_reboot_notifier(&priv->reboot_notifier);
@@ -320,7 +310,7 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
320 const struct of_phandle_args *gpiospec, u32 *flags) 310 const struct of_phandle_args *gpiospec, u32 *flags)
321{ 311{
322 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc); 312 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
323 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); 313 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
324 int offset; 314 int offset;
325 315
326 if (gc->of_gpio_n_cells != 2) { 316 if (gc->of_gpio_n_cells != 2) {
@@ -398,9 +388,9 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
398 if (priv->can_wake) 388 if (priv->can_wake)
399 bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake; 389 bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake;
400 390
401 gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0, 391 gpiochip_irqchip_add(&bank->gc, &bank->irq_chip, 0,
402 handle_simple_irq, IRQ_TYPE_NONE); 392 handle_simple_irq, IRQ_TYPE_NONE);
403 gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip, 393 gpiochip_set_chained_irqchip(&bank->gc, &bank->irq_chip,
404 priv->parent_irq, brcmstb_gpio_irq_handler); 394 priv->parent_irq, brcmstb_gpio_irq_handler);
405 395
406 return 0; 396 return 0;
@@ -451,7 +441,6 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
451 of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p, 441 of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
452 bank_width) { 442 bank_width) {
453 struct brcmstb_gpio_bank *bank; 443 struct brcmstb_gpio_bank *bank;
454 struct bgpio_chip *bgc;
455 struct gpio_chip *gc; 444 struct gpio_chip *gc;
456 445
457 bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL); 446 bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL);
@@ -473,8 +462,8 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
473 * Regs are 4 bytes wide, have data reg, no set/clear regs, 462 * Regs are 4 bytes wide, have data reg, no set/clear regs,
474 * and direction bits have 0 = output and 1 = input 463 * and direction bits have 0 = output and 1 = input
475 */ 464 */
476 bgc = &bank->bgc; 465 gc = &bank->gc;
477 err = bgpio_init(bgc, dev, 4, 466 err = bgpio_init(gc, dev, 4,
478 reg_base + GIO_DATA(bank->id), 467 reg_base + GIO_DATA(bank->id),
479 NULL, NULL, NULL, 468 NULL, NULL, NULL,
480 reg_base + GIO_IODIR(bank->id), 0); 469 reg_base + GIO_IODIR(bank->id), 0);
@@ -483,7 +472,6 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
483 goto fail; 472 goto fail;
484 } 473 }
485 474
486 gc = &bgc->gc;
487 gc->of_node = np; 475 gc->of_node = np;
488 gc->owner = THIS_MODULE; 476 gc->owner = THIS_MODULE;
489 gc->label = np->full_name; 477 gc->label = np->full_name;
@@ -497,9 +485,9 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
497 * Mask all interrupts by default, since wakeup interrupts may 485 * Mask all interrupts by default, since wakeup interrupts may
498 * be retained from S5 cold boot 486 * be retained from S5 cold boot
499 */ 487 */
500 bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0); 488 gc->write_reg(reg_base + GIO_MASK(bank->id), 0);
501 489
502 err = gpiochip_add(gc); 490 err = gpiochip_add_data(gc, bank);
503 if (err) { 491 if (err) {
504 dev_err(dev, "Could not add gpiochip for bank %d\n", 492 dev_err(dev, "Could not add gpiochip for bank %d\n",
505 bank->id); 493 bank->id);
diff --git a/drivers/gpio/gpio-clps711x.c b/drivers/gpio/gpio-clps711x.c
index b6908f1ff1ab..c84f9551f108 100644
--- a/drivers/gpio/gpio-clps711x.c
+++ b/drivers/gpio/gpio-clps711x.c
@@ -10,24 +10,23 @@
10 */ 10 */
11 11
12#include <linux/err.h> 12#include <linux/err.h>
13#include <linux/gpio.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/basic_mmio_gpio.h> 14#include <linux/gpio/driver.h>
16#include <linux/platform_device.h> 15#include <linux/platform_device.h>
17 16
18static int clps711x_gpio_probe(struct platform_device *pdev) 17static int clps711x_gpio_probe(struct platform_device *pdev)
19{ 18{
20 struct device_node *np = pdev->dev.of_node; 19 struct device_node *np = pdev->dev.of_node;
21 void __iomem *dat, *dir; 20 void __iomem *dat, *dir;
22 struct bgpio_chip *bgc; 21 struct gpio_chip *gc;
23 struct resource *res; 22 struct resource *res;
24 int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id; 23 int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id;
25 24
26 if ((id < 0) || (id > 4)) 25 if ((id < 0) || (id > 4))
27 return -ENODEV; 26 return -ENODEV;
28 27
29 bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); 28 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
30 if (!bgc) 29 if (!gc)
31 return -ENOMEM; 30 return -ENOMEM;
32 31
33 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 32 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -43,11 +42,11 @@ static int clps711x_gpio_probe(struct platform_device *pdev)
43 switch (id) { 42 switch (id) {
44 case 3: 43 case 3:
45 /* PORTD is inverted logic for direction register */ 44 /* PORTD is inverted logic for direction register */
46 err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL, 45 err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
47 NULL, dir, 0); 46 NULL, dir, 0);
48 break; 47 break;
49 default: 48 default:
50 err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL, 49 err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
51 dir, NULL, 0); 50 dir, NULL, 0);
52 break; 51 break;
53 } 52 }
@@ -58,24 +57,25 @@ static int clps711x_gpio_probe(struct platform_device *pdev)
58 switch (id) { 57 switch (id) {
59 case 4: 58 case 4:
60 /* PORTE is 3 lines only */ 59 /* PORTE is 3 lines only */
61 bgc->gc.ngpio = 3; 60 gc->ngpio = 3;
62 break; 61 break;
63 default: 62 default:
64 break; 63 break;
65 } 64 }
66 65
67 bgc->gc.base = id * 8; 66 gc->base = id * 8;
68 bgc->gc.owner = THIS_MODULE; 67 gc->owner = THIS_MODULE;
69 platform_set_drvdata(pdev, bgc); 68 platform_set_drvdata(pdev, gc);
70 69
71 return gpiochip_add(&bgc->gc); 70 return gpiochip_add_data(gc, NULL);
72} 71}
73 72
74static int clps711x_gpio_remove(struct platform_device *pdev) 73static int clps711x_gpio_remove(struct platform_device *pdev)
75{ 74{
76 struct bgpio_chip *bgc = platform_get_drvdata(pdev); 75 struct gpio_chip *gc = platform_get_drvdata(pdev);
77 76
78 return bgpio_remove(bgc); 77 gpiochip_remove(gc);
78 return 0;
79} 79}
80 80
81static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = { 81static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = {
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index fcd5b0acfc72..597de1ef497b 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -7,7 +7,9 @@
7 * 7 *
8 * All enquiries to support@picochip.com 8 * All enquiries to support@picochip.com
9 */ 9 */
10#include <linux/basic_mmio_gpio.h> 10#include <linux/gpio/driver.h>
11/* FIXME: for gpio_get_value(), replace this with direct register read */
12#include <linux/gpio.h>
11#include <linux/err.h> 13#include <linux/err.h>
12#include <linux/init.h> 14#include <linux/init.h>
13#include <linux/interrupt.h> 15#include <linux/interrupt.h>
@@ -66,7 +68,7 @@ struct dwapb_context {
66#endif 68#endif
67 69
68struct dwapb_gpio_port { 70struct dwapb_gpio_port {
69 struct bgpio_chip bgc; 71 struct gpio_chip gc;
70 bool is_registered; 72 bool is_registered;
71 struct dwapb_gpio *gpio; 73 struct dwapb_gpio *gpio;
72#ifdef CONFIG_PM_SLEEP 74#ifdef CONFIG_PM_SLEEP
@@ -83,33 +85,26 @@ struct dwapb_gpio {
83 struct irq_domain *domain; 85 struct irq_domain *domain;
84}; 86};
85 87
86static inline struct dwapb_gpio_port *
87to_dwapb_gpio_port(struct bgpio_chip *bgc)
88{
89 return container_of(bgc, struct dwapb_gpio_port, bgc);
90}
91
92static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) 88static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
93{ 89{
94 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 90 struct gpio_chip *gc = &gpio->ports[0].gc;
95 void __iomem *reg_base = gpio->regs; 91 void __iomem *reg_base = gpio->regs;
96 92
97 return bgc->read_reg(reg_base + offset); 93 return gc->read_reg(reg_base + offset);
98} 94}
99 95
100static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, 96static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
101 u32 val) 97 u32 val)
102{ 98{
103 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 99 struct gpio_chip *gc = &gpio->ports[0].gc;
104 void __iomem *reg_base = gpio->regs; 100 void __iomem *reg_base = gpio->regs;
105 101
106 bgc->write_reg(reg_base + offset, val); 102 gc->write_reg(reg_base + offset, val);
107} 103}
108 104
109static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 105static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
110{ 106{
111 struct bgpio_chip *bgc = to_bgpio_chip(gc); 107 struct dwapb_gpio_port *port = gpiochip_get_data(gc);
112 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
113 struct dwapb_gpio *gpio = port->gpio; 108 struct dwapb_gpio *gpio = port->gpio;
114 109
115 return irq_find_mapping(gpio->domain, offset); 110 return irq_find_mapping(gpio->domain, offset);
@@ -119,7 +114,7 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
119{ 114{
120 u32 v = dwapb_read(gpio, GPIO_INT_POLARITY); 115 u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
121 116
122 if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs)) 117 if (gpio_get_value(gpio->ports[0].gc.base + offs))
123 v &= ~BIT(offs); 118 v &= ~BIT(offs);
124 else 119 else
125 v |= BIT(offs); 120 v |= BIT(offs);
@@ -162,39 +157,39 @@ static void dwapb_irq_enable(struct irq_data *d)
162{ 157{
163 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 158 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
164 struct dwapb_gpio *gpio = igc->private; 159 struct dwapb_gpio *gpio = igc->private;
165 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 160 struct gpio_chip *gc = &gpio->ports[0].gc;
166 unsigned long flags; 161 unsigned long flags;
167 u32 val; 162 u32 val;
168 163
169 spin_lock_irqsave(&bgc->lock, flags); 164 spin_lock_irqsave(&gc->bgpio_lock, flags);
170 val = dwapb_read(gpio, GPIO_INTEN); 165 val = dwapb_read(gpio, GPIO_INTEN);
171 val |= BIT(d->hwirq); 166 val |= BIT(d->hwirq);
172 dwapb_write(gpio, GPIO_INTEN, val); 167 dwapb_write(gpio, GPIO_INTEN, val);
173 spin_unlock_irqrestore(&bgc->lock, flags); 168 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
174} 169}
175 170
176static void dwapb_irq_disable(struct irq_data *d) 171static void dwapb_irq_disable(struct irq_data *d)
177{ 172{
178 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 173 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
179 struct dwapb_gpio *gpio = igc->private; 174 struct dwapb_gpio *gpio = igc->private;
180 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 175 struct gpio_chip *gc = &gpio->ports[0].gc;
181 unsigned long flags; 176 unsigned long flags;
182 u32 val; 177 u32 val;
183 178
184 spin_lock_irqsave(&bgc->lock, flags); 179 spin_lock_irqsave(&gc->bgpio_lock, flags);
185 val = dwapb_read(gpio, GPIO_INTEN); 180 val = dwapb_read(gpio, GPIO_INTEN);
186 val &= ~BIT(d->hwirq); 181 val &= ~BIT(d->hwirq);
187 dwapb_write(gpio, GPIO_INTEN, val); 182 dwapb_write(gpio, GPIO_INTEN, val);
188 spin_unlock_irqrestore(&bgc->lock, flags); 183 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
189} 184}
190 185
191static int dwapb_irq_reqres(struct irq_data *d) 186static int dwapb_irq_reqres(struct irq_data *d)
192{ 187{
193 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 188 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
194 struct dwapb_gpio *gpio = igc->private; 189 struct dwapb_gpio *gpio = igc->private;
195 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 190 struct gpio_chip *gc = &gpio->ports[0].gc;
196 191
197 if (gpiochip_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) { 192 if (gpiochip_lock_as_irq(gc, irqd_to_hwirq(d))) {
198 dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", 193 dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n",
199 irqd_to_hwirq(d)); 194 irqd_to_hwirq(d));
200 return -EINVAL; 195 return -EINVAL;
@@ -206,16 +201,16 @@ static void dwapb_irq_relres(struct irq_data *d)
206{ 201{
207 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 202 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
208 struct dwapb_gpio *gpio = igc->private; 203 struct dwapb_gpio *gpio = igc->private;
209 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 204 struct gpio_chip *gc = &gpio->ports[0].gc;
210 205
211 gpiochip_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d)); 206 gpiochip_unlock_as_irq(gc, irqd_to_hwirq(d));
212} 207}
213 208
214static int dwapb_irq_set_type(struct irq_data *d, u32 type) 209static int dwapb_irq_set_type(struct irq_data *d, u32 type)
215{ 210{
216 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 211 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
217 struct dwapb_gpio *gpio = igc->private; 212 struct dwapb_gpio *gpio = igc->private;
218 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 213 struct gpio_chip *gc = &gpio->ports[0].gc;
219 int bit = d->hwirq; 214 int bit = d->hwirq;
220 unsigned long level, polarity, flags; 215 unsigned long level, polarity, flags;
221 216
@@ -223,7 +218,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
223 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) 218 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
224 return -EINVAL; 219 return -EINVAL;
225 220
226 spin_lock_irqsave(&bgc->lock, flags); 221 spin_lock_irqsave(&gc->bgpio_lock, flags);
227 level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); 222 level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
228 polarity = dwapb_read(gpio, GPIO_INT_POLARITY); 223 polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
229 224
@@ -254,7 +249,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
254 249
255 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); 250 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
256 dwapb_write(gpio, GPIO_INT_POLARITY, polarity); 251 dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
257 spin_unlock_irqrestore(&bgc->lock, flags); 252 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
258 253
259 return 0; 254 return 0;
260} 255}
@@ -262,13 +257,12 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
262static int dwapb_gpio_set_debounce(struct gpio_chip *gc, 257static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
263 unsigned offset, unsigned debounce) 258 unsigned offset, unsigned debounce)
264{ 259{
265 struct bgpio_chip *bgc = to_bgpio_chip(gc); 260 struct dwapb_gpio_port *port = gpiochip_get_data(gc);
266 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
267 struct dwapb_gpio *gpio = port->gpio; 261 struct dwapb_gpio *gpio = port->gpio;
268 unsigned long flags, val_deb; 262 unsigned long flags, val_deb;
269 unsigned long mask = bgc->pin2mask(bgc, offset); 263 unsigned long mask = gc->pin2mask(gc, offset);
270 264
271 spin_lock_irqsave(&bgc->lock, flags); 265 spin_lock_irqsave(&gc->bgpio_lock, flags);
272 266
273 val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); 267 val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
274 if (debounce) 268 if (debounce)
@@ -276,7 +270,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
276 else 270 else
277 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask); 271 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask);
278 272
279 spin_unlock_irqrestore(&bgc->lock, flags); 273 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
280 274
281 return 0; 275 return 0;
282} 276}
@@ -295,7 +289,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
295 struct dwapb_gpio_port *port, 289 struct dwapb_gpio_port *port,
296 struct dwapb_port_property *pp) 290 struct dwapb_port_property *pp)
297{ 291{
298 struct gpio_chip *gc = &port->bgc.gc; 292 struct gpio_chip *gc = &port->gc;
299 struct device_node *node = pp->node; 293 struct device_node *node = pp->node;
300 struct irq_chip_generic *irq_gc = NULL; 294 struct irq_chip_generic *irq_gc = NULL;
301 unsigned int hwirq, ngpio = gc->ngpio; 295 unsigned int hwirq, ngpio = gc->ngpio;
@@ -369,13 +363,13 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
369 for (hwirq = 0 ; hwirq < ngpio ; hwirq++) 363 for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
370 irq_create_mapping(gpio->domain, hwirq); 364 irq_create_mapping(gpio->domain, hwirq);
371 365
372 port->bgc.gc.to_irq = dwapb_gpio_to_irq; 366 port->gc.to_irq = dwapb_gpio_to_irq;
373} 367}
374 368
375static void dwapb_irq_teardown(struct dwapb_gpio *gpio) 369static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
376{ 370{
377 struct dwapb_gpio_port *port = &gpio->ports[0]; 371 struct dwapb_gpio_port *port = &gpio->ports[0];
378 struct gpio_chip *gc = &port->bgc.gc; 372 struct gpio_chip *gc = &port->gc;
379 unsigned int ngpio = gc->ngpio; 373 unsigned int ngpio = gc->ngpio;
380 irq_hw_number_t hwirq; 374 irq_hw_number_t hwirq;
381 375
@@ -412,7 +406,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
412 dirout = gpio->regs + GPIO_SWPORTA_DDR + 406 dirout = gpio->regs + GPIO_SWPORTA_DDR +
413 (pp->idx * GPIO_SWPORT_DDR_SIZE); 407 (pp->idx * GPIO_SWPORT_DDR_SIZE);
414 408
415 err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout, 409 err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout,
416 NULL, false); 410 NULL, false);
417 if (err) { 411 if (err) {
418 dev_err(gpio->dev, "failed to init gpio chip for %s\n", 412 dev_err(gpio->dev, "failed to init gpio chip for %s\n",
@@ -421,19 +415,19 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
421 } 415 }
422 416
423#ifdef CONFIG_OF_GPIO 417#ifdef CONFIG_OF_GPIO
424 port->bgc.gc.of_node = pp->node; 418 port->gc.of_node = pp->node;
425#endif 419#endif
426 port->bgc.gc.ngpio = pp->ngpio; 420 port->gc.ngpio = pp->ngpio;
427 port->bgc.gc.base = pp->gpio_base; 421 port->gc.base = pp->gpio_base;
428 422
429 /* Only port A support debounce */ 423 /* Only port A support debounce */
430 if (pp->idx == 0) 424 if (pp->idx == 0)
431 port->bgc.gc.set_debounce = dwapb_gpio_set_debounce; 425 port->gc.set_debounce = dwapb_gpio_set_debounce;
432 426
433 if (pp->irq) 427 if (pp->irq)
434 dwapb_configure_irqs(gpio, port, pp); 428 dwapb_configure_irqs(gpio, port, pp);
435 429
436 err = gpiochip_add(&port->bgc.gc); 430 err = gpiochip_add_data(&port->gc, port);
437 if (err) 431 if (err)
438 dev_err(gpio->dev, "failed to register gpiochip for %s\n", 432 dev_err(gpio->dev, "failed to register gpiochip for %s\n",
439 pp->name); 433 pp->name);
@@ -449,7 +443,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
449 443
450 for (m = 0; m < gpio->nr_ports; ++m) 444 for (m = 0; m < gpio->nr_ports; ++m)
451 if (gpio->ports[m].is_registered) 445 if (gpio->ports[m].is_registered)
452 gpiochip_remove(&gpio->ports[m].bgc.gc); 446 gpiochip_remove(&gpio->ports[m].gc);
453} 447}
454 448
455static struct dwapb_platform_data * 449static struct dwapb_platform_data *
@@ -591,11 +585,11 @@ static int dwapb_gpio_suspend(struct device *dev)
591{ 585{
592 struct platform_device *pdev = to_platform_device(dev); 586 struct platform_device *pdev = to_platform_device(dev);
593 struct dwapb_gpio *gpio = platform_get_drvdata(pdev); 587 struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
594 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 588 struct gpio_chip *gc = &gpio->ports[0].gc;
595 unsigned long flags; 589 unsigned long flags;
596 int i; 590 int i;
597 591
598 spin_lock_irqsave(&bgc->lock, flags); 592 spin_lock_irqsave(&gc->bgpio_lock, flags);
599 for (i = 0; i < gpio->nr_ports; i++) { 593 for (i = 0; i < gpio->nr_ports; i++) {
600 unsigned int offset; 594 unsigned int offset;
601 unsigned int idx = gpio->ports[i].idx; 595 unsigned int idx = gpio->ports[i].idx;
@@ -624,7 +618,7 @@ static int dwapb_gpio_suspend(struct device *dev)
624 dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); 618 dwapb_write(gpio, GPIO_INTMASK, 0xffffffff);
625 } 619 }
626 } 620 }
627 spin_unlock_irqrestore(&bgc->lock, flags); 621 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
628 622
629 return 0; 623 return 0;
630} 624}
@@ -633,11 +627,11 @@ static int dwapb_gpio_resume(struct device *dev)
633{ 627{
634 struct platform_device *pdev = to_platform_device(dev); 628 struct platform_device *pdev = to_platform_device(dev);
635 struct dwapb_gpio *gpio = platform_get_drvdata(pdev); 629 struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
636 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 630 struct gpio_chip *gc = &gpio->ports[0].gc;
637 unsigned long flags; 631 unsigned long flags;
638 int i; 632 int i;
639 633
640 spin_lock_irqsave(&bgc->lock, flags); 634 spin_lock_irqsave(&gc->bgpio_lock, flags);
641 for (i = 0; i < gpio->nr_ports; i++) { 635 for (i = 0; i < gpio->nr_ports; i++) {
642 unsigned int offset; 636 unsigned int offset;
643 unsigned int idx = gpio->ports[i].idx; 637 unsigned int idx = gpio->ports[i].idx;
@@ -666,7 +660,7 @@ static int dwapb_gpio_resume(struct device *dev)
666 dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); 660 dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
667 } 661 }
668 } 662 }
669 spin_unlock_irqrestore(&bgc->lock, flags); 663 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
670 664
671 return 0; 665 return 0;
672} 666}
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index 3e3947b35c83..ad279078fed7 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -16,10 +16,11 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/gpio.h>
20#include <linux/irq.h> 19#include <linux/irq.h>
21#include <linux/slab.h> 20#include <linux/slab.h>
22#include <linux/basic_mmio_gpio.h> 21#include <linux/gpio/driver.h>
22/* FIXME: this is here for gpio_to_irq() - get rid of this! */
23#include <linux/gpio.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
@@ -28,7 +29,7 @@
28 29
29struct ep93xx_gpio { 30struct ep93xx_gpio {
30 void __iomem *mmio_base; 31 void __iomem *mmio_base;
31 struct bgpio_chip bgc[8]; 32 struct gpio_chip gc[8];
32}; 33};
33 34
34/************************************************************************* 35/*************************************************************************
@@ -319,26 +320,26 @@ static int ep93xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
319 return 64 + gpio; 320 return 64 + gpio;
320} 321}
321 322
322static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev, 323static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
323 void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) 324 void __iomem *mmio_base, struct ep93xx_gpio_bank *bank)
324{ 325{
325 void __iomem *data = mmio_base + bank->data; 326 void __iomem *data = mmio_base + bank->data;
326 void __iomem *dir = mmio_base + bank->dir; 327 void __iomem *dir = mmio_base + bank->dir;
327 int err; 328 int err;
328 329
329 err = bgpio_init(bgc, dev, 1, data, NULL, NULL, dir, NULL, 0); 330 err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0);
330 if (err) 331 if (err)
331 return err; 332 return err;
332 333
333 bgc->gc.label = bank->label; 334 gc->label = bank->label;
334 bgc->gc.base = bank->base; 335 gc->base = bank->base;
335 336
336 if (bank->has_debounce) { 337 if (bank->has_debounce) {
337 bgc->gc.set_debounce = ep93xx_gpio_set_debounce; 338 gc->set_debounce = ep93xx_gpio_set_debounce;
338 bgc->gc.to_irq = ep93xx_gpio_to_irq; 339 gc->to_irq = ep93xx_gpio_to_irq;
339 } 340 }
340 341
341 return gpiochip_add(&bgc->gc); 342 return gpiochip_add_data(gc, NULL);
342} 343}
343 344
344static int ep93xx_gpio_probe(struct platform_device *pdev) 345static int ep93xx_gpio_probe(struct platform_device *pdev)
@@ -358,10 +359,10 @@ static int ep93xx_gpio_probe(struct platform_device *pdev)
358 return PTR_ERR(ep93xx_gpio->mmio_base); 359 return PTR_ERR(ep93xx_gpio->mmio_base);
359 360
360 for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) { 361 for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) {
361 struct bgpio_chip *bgc = &ep93xx_gpio->bgc[i]; 362 struct gpio_chip *gc = &ep93xx_gpio->gc[i];
362 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; 363 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i];
363 364
364 if (ep93xx_gpio_add_bank(bgc, &pdev->dev, 365 if (ep93xx_gpio_add_bank(gc, &pdev->dev,
365 ep93xx_gpio->mmio_base, bank)) 366 ep93xx_gpio->mmio_base, bank))
366 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n", 367 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
367 bank->label); 368 bank->label);
diff --git a/drivers/gpio/gpio-etraxfs.c b/drivers/gpio/gpio-etraxfs.c
index 5c15dd12172d..00b022c9acb3 100644
--- a/drivers/gpio/gpio-etraxfs.c
+++ b/drivers/gpio/gpio-etraxfs.c
@@ -1,12 +1,10 @@
1#include <linux/kernel.h> 1#include <linux/kernel.h>
2#include <linux/init.h> 2#include <linux/init.h>
3#include <linux/gpio.h>
4#include <linux/gpio/driver.h> 3#include <linux/gpio/driver.h>
5#include <linux/of_gpio.h> 4#include <linux/of_gpio.h>
6#include <linux/io.h> 5#include <linux/io.h>
7#include <linux/interrupt.h> 6#include <linux/interrupt.h>
8#include <linux/platform_device.h> 7#include <linux/platform_device.h>
9#include <linux/basic_mmio_gpio.h>
10 8
11#define ETRAX_FS_rw_pa_dout 0 9#define ETRAX_FS_rw_pa_dout 0
12#define ETRAX_FS_r_pa_din 4 10#define ETRAX_FS_r_pa_din 4
@@ -67,7 +65,7 @@ struct etraxfs_gpio_block {
67}; 65};
68 66
69struct etraxfs_gpio_chip { 67struct etraxfs_gpio_chip {
70 struct bgpio_chip bgc; 68 struct gpio_chip gc;
71 struct etraxfs_gpio_block *block; 69 struct etraxfs_gpio_block *block;
72}; 70};
73 71
@@ -176,11 +174,6 @@ static const struct etraxfs_gpio_info etraxfs_gpio_artpec3 = {
176 .rw_intr_pins = ARTPEC3_rw_intr_pins, 174 .rw_intr_pins = ARTPEC3_rw_intr_pins,
177}; 175};
178 176
179static struct etraxfs_gpio_chip *to_etraxfs(struct gpio_chip *gc)
180{
181 return container_of(gc, struct etraxfs_gpio_chip, bgc.gc);
182}
183
184static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc) 177static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc)
185{ 178{
186 return gc->label[0] - 'A'; 179 return gc->label[0] - 'A';
@@ -220,13 +213,13 @@ static unsigned int etraxfs_gpio_to_group_irq(unsigned int gpio)
220static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip, 213static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip,
221 unsigned int gpio) 214 unsigned int gpio)
222{ 215{
223 return 4 * etraxfs_gpio_chip_to_port(&chip->bgc.gc) + gpio / 8; 216 return 4 * etraxfs_gpio_chip_to_port(&chip->gc) + gpio / 8;
224} 217}
225 218
226static void etraxfs_gpio_irq_ack(struct irq_data *d) 219static void etraxfs_gpio_irq_ack(struct irq_data *d)
227{ 220{
228 struct etraxfs_gpio_chip *chip = 221 struct etraxfs_gpio_chip *chip =
229 to_etraxfs(irq_data_get_irq_chip_data(d)); 222 gpiochip_get_data(irq_data_get_irq_chip_data(d));
230 struct etraxfs_gpio_block *block = chip->block; 223 struct etraxfs_gpio_block *block = chip->block;
231 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 224 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
232 225
@@ -236,7 +229,7 @@ static void etraxfs_gpio_irq_ack(struct irq_data *d)
236static void etraxfs_gpio_irq_mask(struct irq_data *d) 229static void etraxfs_gpio_irq_mask(struct irq_data *d)
237{ 230{
238 struct etraxfs_gpio_chip *chip = 231 struct etraxfs_gpio_chip *chip =
239 to_etraxfs(irq_data_get_irq_chip_data(d)); 232 gpiochip_get_data(irq_data_get_irq_chip_data(d));
240 struct etraxfs_gpio_block *block = chip->block; 233 struct etraxfs_gpio_block *block = chip->block;
241 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 234 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
242 235
@@ -249,7 +242,7 @@ static void etraxfs_gpio_irq_mask(struct irq_data *d)
249static void etraxfs_gpio_irq_unmask(struct irq_data *d) 242static void etraxfs_gpio_irq_unmask(struct irq_data *d)
250{ 243{
251 struct etraxfs_gpio_chip *chip = 244 struct etraxfs_gpio_chip *chip =
252 to_etraxfs(irq_data_get_irq_chip_data(d)); 245 gpiochip_get_data(irq_data_get_irq_chip_data(d));
253 struct etraxfs_gpio_block *block = chip->block; 246 struct etraxfs_gpio_block *block = chip->block;
254 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 247 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
255 248
@@ -262,7 +255,7 @@ static void etraxfs_gpio_irq_unmask(struct irq_data *d)
262static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type) 255static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type)
263{ 256{
264 struct etraxfs_gpio_chip *chip = 257 struct etraxfs_gpio_chip *chip =
265 to_etraxfs(irq_data_get_irq_chip_data(d)); 258 gpiochip_get_data(irq_data_get_irq_chip_data(d));
266 struct etraxfs_gpio_block *block = chip->block; 259 struct etraxfs_gpio_block *block = chip->block;
267 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 260 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
268 u32 cfg; 261 u32 cfg;
@@ -299,7 +292,7 @@ static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type)
299static int etraxfs_gpio_irq_request_resources(struct irq_data *d) 292static int etraxfs_gpio_irq_request_resources(struct irq_data *d)
300{ 293{
301 struct etraxfs_gpio_chip *chip = 294 struct etraxfs_gpio_chip *chip =
302 to_etraxfs(irq_data_get_irq_chip_data(d)); 295 gpiochip_get_data(irq_data_get_irq_chip_data(d));
303 struct etraxfs_gpio_block *block = chip->block; 296 struct etraxfs_gpio_block *block = chip->block;
304 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 297 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
305 int ret = -EBUSY; 298 int ret = -EBUSY;
@@ -308,7 +301,7 @@ static int etraxfs_gpio_irq_request_resources(struct irq_data *d)
308 if (block->group[grpirq]) 301 if (block->group[grpirq])
309 goto out; 302 goto out;
310 303
311 ret = gpiochip_lock_as_irq(&chip->bgc.gc, d->hwirq); 304 ret = gpiochip_lock_as_irq(&chip->gc, d->hwirq);
312 if (ret) 305 if (ret)
313 goto out; 306 goto out;
314 307
@@ -330,13 +323,13 @@ out:
330static void etraxfs_gpio_irq_release_resources(struct irq_data *d) 323static void etraxfs_gpio_irq_release_resources(struct irq_data *d)
331{ 324{
332 struct etraxfs_gpio_chip *chip = 325 struct etraxfs_gpio_chip *chip =
333 to_etraxfs(irq_data_get_irq_chip_data(d)); 326 gpiochip_get_data(irq_data_get_irq_chip_data(d));
334 struct etraxfs_gpio_block *block = chip->block; 327 struct etraxfs_gpio_block *block = chip->block;
335 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); 328 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
336 329
337 spin_lock(&block->lock); 330 spin_lock(&block->lock);
338 block->group[grpirq] = 0; 331 block->group[grpirq] = 0;
339 gpiochip_unlock_as_irq(&chip->bgc.gc, d->hwirq); 332 gpiochip_unlock_as_irq(&chip->gc, d->hwirq);
340 spin_unlock(&block->lock); 333 spin_unlock(&block->lock);
341} 334}
342 335
@@ -419,7 +412,7 @@ static int etraxfs_gpio_probe(struct platform_device *pdev)
419 412
420 for (i = 0; i < info->num_ports; i++) { 413 for (i = 0; i < info->num_ports; i++) {
421 struct etraxfs_gpio_chip *chip = &chips[i]; 414 struct etraxfs_gpio_chip *chip = &chips[i];
422 struct bgpio_chip *bgc = &chip->bgc; 415 struct gpio_chip *gc = &chip->gc;
423 const struct etraxfs_gpio_port *port = &info->ports[i]; 416 const struct etraxfs_gpio_port *port = &info->ports[i];
424 unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET; 417 unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET;
425 void __iomem *dat = regs + port->din; 418 void __iomem *dat = regs + port->din;
@@ -433,7 +426,7 @@ static int etraxfs_gpio_probe(struct platform_device *pdev)
433 flags = BGPIOF_NO_OUTPUT; 426 flags = BGPIOF_NO_OUTPUT;
434 } 427 }
435 428
436 ret = bgpio_init(bgc, dev, 4, 429 ret = bgpio_init(gc, dev, 4,
437 dat, set, NULL, dirout, NULL, 430 dat, set, NULL, dirout, NULL,
438 flags); 431 flags);
439 if (ret) { 432 if (ret) {
@@ -442,28 +435,28 @@ static int etraxfs_gpio_probe(struct platform_device *pdev)
442 continue; 435 continue;
443 } 436 }
444 437
445 bgc->gc.ngpio = port->ngpio; 438 gc->ngpio = port->ngpio;
446 bgc->gc.label = port->label; 439 gc->label = port->label;
447 440
448 bgc->gc.of_node = dev->of_node; 441 gc->of_node = dev->of_node;
449 bgc->gc.of_gpio_n_cells = 3; 442 gc->of_gpio_n_cells = 3;
450 bgc->gc.of_xlate = etraxfs_gpio_of_xlate; 443 gc->of_xlate = etraxfs_gpio_of_xlate;
451 444
452 ret = gpiochip_add(&bgc->gc); 445 ret = gpiochip_add_data(gc, chip);
453 if (ret) { 446 if (ret) {
454 dev_err(dev, "Unable to register port %s\n", 447 dev_err(dev, "Unable to register port %s\n",
455 bgc->gc.label); 448 gc->label);
456 continue; 449 continue;
457 } 450 }
458 451
459 if (i > 0 && !allportsirq) 452 if (i > 0 && !allportsirq)
460 continue; 453 continue;
461 454
462 ret = gpiochip_irqchip_add(&bgc->gc, &etraxfs_gpio_irq_chip, 0, 455 ret = gpiochip_irqchip_add(gc, &etraxfs_gpio_irq_chip, 0,
463 handle_level_irq, IRQ_TYPE_NONE); 456 handle_level_irq, IRQ_TYPE_NONE);
464 if (ret) { 457 if (ret) {
465 dev_err(dev, "Unable to add irqchip to port %s\n", 458 dev_err(dev, "Unable to add irqchip to port %s\n",
466 bgc->gc.label); 459 gc->label);
467 } 460 }
468 } 461 }
469 462
diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c
index f9ac3f351753..cbbec838a9d1 100644
--- a/drivers/gpio/gpio-ge.c
+++ b/drivers/gpio/gpio-ge.c
@@ -24,7 +24,7 @@
24#include <linux/of_gpio.h> 24#include <linux/of_gpio.h>
25#include <linux/of_address.h> 25#include <linux/of_address.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/basic_mmio_gpio.h> 27#include <linux/gpio/driver.h>
28 28
29#define GEF_GPIO_DIRECT 0x00 29#define GEF_GPIO_DIRECT 0x00
30#define GEF_GPIO_IN 0x04 30#define GEF_GPIO_IN 0x04
@@ -55,19 +55,19 @@ static int __init gef_gpio_probe(struct platform_device *pdev)
55{ 55{
56 const struct of_device_id *of_id = 56 const struct of_device_id *of_id =
57 of_match_device(gef_gpio_ids, &pdev->dev); 57 of_match_device(gef_gpio_ids, &pdev->dev);
58 struct bgpio_chip *bgc; 58 struct gpio_chip *gc;
59 void __iomem *regs; 59 void __iomem *regs;
60 int ret; 60 int ret;
61 61
62 bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); 62 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
63 if (!bgc) 63 if (!gc)
64 return -ENOMEM; 64 return -ENOMEM;
65 65
66 regs = of_iomap(pdev->dev.of_node, 0); 66 regs = of_iomap(pdev->dev.of_node, 0);
67 if (!regs) 67 if (!regs)
68 return -ENOMEM; 68 return -ENOMEM;
69 69
70 ret = bgpio_init(bgc, &pdev->dev, 4, regs + GEF_GPIO_IN, 70 ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN,
71 regs + GEF_GPIO_OUT, NULL, NULL, 71 regs + GEF_GPIO_OUT, NULL, NULL,
72 regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER); 72 regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER);
73 if (ret) { 73 if (ret) {
@@ -76,20 +76,20 @@ static int __init gef_gpio_probe(struct platform_device *pdev)
76 } 76 }
77 77
78 /* Setup pointers to chip functions */ 78 /* Setup pointers to chip functions */
79 bgc->gc.label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name, 79 gc->label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name,
80 GFP_KERNEL); 80 GFP_KERNEL);
81 if (!bgc->gc.label) { 81 if (!gc->label) {
82 ret = -ENOMEM; 82 ret = -ENOMEM;
83 goto err0; 83 goto err0;
84 } 84 }
85 85
86 bgc->gc.base = -1; 86 gc->base = -1;
87 bgc->gc.ngpio = (u16)(uintptr_t)of_id->data; 87 gc->ngpio = (u16)(uintptr_t)of_id->data;
88 bgc->gc.of_gpio_n_cells = 2; 88 gc->of_gpio_n_cells = 2;
89 bgc->gc.of_node = pdev->dev.of_node; 89 gc->of_node = pdev->dev.of_node;
90 90
91 /* This function adds a memory mapped GPIO chip */ 91 /* This function adds a memory mapped GPIO chip */
92 ret = gpiochip_add(&bgc->gc); 92 ret = gpiochip_add_data(gc, NULL);
93 if (ret) 93 if (ret)
94 goto err0; 94 goto err0;
95 95
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c
index 053a7f0a83e6..2a4f2333a50b 100644
--- a/drivers/gpio/gpio-generic.c
+++ b/drivers/gpio/gpio-generic.c
@@ -56,12 +56,11 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.`
56#include <linux/log2.h> 56#include <linux/log2.h>
57#include <linux/ioport.h> 57#include <linux/ioport.h>
58#include <linux/io.h> 58#include <linux/io.h>
59#include <linux/gpio.h> 59#include <linux/gpio/driver.h>
60#include <linux/slab.h> 60#include <linux/slab.h>
61#include <linux/bitops.h> 61#include <linux/bitops.h>
62#include <linux/platform_device.h> 62#include <linux/platform_device.h>
63#include <linux/mod_devicetable.h> 63#include <linux/mod_devicetable.h>
64#include <linux/basic_mmio_gpio.h>
65 64
66static void bgpio_write8(void __iomem *reg, unsigned long data) 65static void bgpio_write8(void __iomem *reg, unsigned long data)
67{ 66{
@@ -125,33 +124,30 @@ static unsigned long bgpio_read32be(void __iomem *reg)
125 return ioread32be(reg); 124 return ioread32be(reg);
126} 125}
127 126
128static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin) 127static unsigned long bgpio_pin2mask(struct gpio_chip *gc, unsigned int pin)
129{ 128{
130 return BIT(pin); 129 return BIT(pin);
131} 130}
132 131
133static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc, 132static unsigned long bgpio_pin2mask_be(struct gpio_chip *gc,
134 unsigned int pin) 133 unsigned int pin)
135{ 134{
136 return BIT(bgc->bits - 1 - pin); 135 return BIT(gc->bgpio_bits - 1 - pin);
137} 136}
138 137
139static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) 138static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)
140{ 139{
141 struct bgpio_chip *bgc = to_bgpio_chip(gc); 140 unsigned long pinmask = gc->pin2mask(gc, gpio);
142 unsigned long pinmask = bgc->pin2mask(bgc, gpio);
143 141
144 if (bgc->dir & pinmask) 142 if (gc->bgpio_dir & pinmask)
145 return !!(bgc->read_reg(bgc->reg_set) & pinmask); 143 return !!(gc->read_reg(gc->reg_set) & pinmask);
146 else 144 else
147 return !!(bgc->read_reg(bgc->reg_dat) & pinmask); 145 return !!(gc->read_reg(gc->reg_dat) & pinmask);
148} 146}
149 147
150static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) 148static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
151{ 149{
152 struct bgpio_chip *bgc = to_bgpio_chip(gc); 150 return !!(gc->read_reg(gc->reg_dat) & gc->pin2mask(gc, gpio));
153
154 return !!(bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio));
155} 151}
156 152
157static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) 153static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)
@@ -160,53 +156,50 @@ static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)
160 156
161static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 157static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
162{ 158{
163 struct bgpio_chip *bgc = to_bgpio_chip(gc); 159 unsigned long mask = gc->pin2mask(gc, gpio);
164 unsigned long mask = bgc->pin2mask(bgc, gpio);
165 unsigned long flags; 160 unsigned long flags;
166 161
167 spin_lock_irqsave(&bgc->lock, flags); 162 spin_lock_irqsave(&gc->bgpio_lock, flags);
168 163
169 if (val) 164 if (val)
170 bgc->data |= mask; 165 gc->bgpio_data |= mask;
171 else 166 else
172 bgc->data &= ~mask; 167 gc->bgpio_data &= ~mask;
173 168
174 bgc->write_reg(bgc->reg_dat, bgc->data); 169 gc->write_reg(gc->reg_dat, gc->bgpio_data);
175 170
176 spin_unlock_irqrestore(&bgc->lock, flags); 171 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
177} 172}
178 173
179static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, 174static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
180 int val) 175 int val)
181{ 176{
182 struct bgpio_chip *bgc = to_bgpio_chip(gc); 177 unsigned long mask = gc->pin2mask(gc, gpio);
183 unsigned long mask = bgc->pin2mask(bgc, gpio);
184 178
185 if (val) 179 if (val)
186 bgc->write_reg(bgc->reg_set, mask); 180 gc->write_reg(gc->reg_set, mask);
187 else 181 else
188 bgc->write_reg(bgc->reg_clr, mask); 182 gc->write_reg(gc->reg_clr, mask);
189} 183}
190 184
191static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) 185static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
192{ 186{
193 struct bgpio_chip *bgc = to_bgpio_chip(gc); 187 unsigned long mask = gc->pin2mask(gc, gpio);
194 unsigned long mask = bgc->pin2mask(bgc, gpio);
195 unsigned long flags; 188 unsigned long flags;
196 189
197 spin_lock_irqsave(&bgc->lock, flags); 190 spin_lock_irqsave(&gc->bgpio_lock, flags);
198 191
199 if (val) 192 if (val)
200 bgc->data |= mask; 193 gc->bgpio_data |= mask;
201 else 194 else
202 bgc->data &= ~mask; 195 gc->bgpio_data &= ~mask;
203 196
204 bgc->write_reg(bgc->reg_set, bgc->data); 197 gc->write_reg(gc->reg_set, gc->bgpio_data);
205 198
206 spin_unlock_irqrestore(&bgc->lock, flags); 199 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
207} 200}
208 201
209static void bgpio_multiple_get_masks(struct bgpio_chip *bgc, 202static void bgpio_multiple_get_masks(struct gpio_chip *gc,
210 unsigned long *mask, unsigned long *bits, 203 unsigned long *mask, unsigned long *bits,
211 unsigned long *set_mask, 204 unsigned long *set_mask,
212 unsigned long *clear_mask) 205 unsigned long *clear_mask)
@@ -216,19 +209,19 @@ static void bgpio_multiple_get_masks(struct bgpio_chip *bgc,
216 *set_mask = 0; 209 *set_mask = 0;
217 *clear_mask = 0; 210 *clear_mask = 0;
218 211
219 for (i = 0; i < bgc->bits; i++) { 212 for (i = 0; i < gc->bgpio_bits; i++) {
220 if (*mask == 0) 213 if (*mask == 0)
221 break; 214 break;
222 if (__test_and_clear_bit(i, mask)) { 215 if (__test_and_clear_bit(i, mask)) {
223 if (test_bit(i, bits)) 216 if (test_bit(i, bits))
224 *set_mask |= bgc->pin2mask(bgc, i); 217 *set_mask |= gc->pin2mask(gc, i);
225 else 218 else
226 *clear_mask |= bgc->pin2mask(bgc, i); 219 *clear_mask |= gc->pin2mask(gc, i);
227 } 220 }
228 } 221 }
229} 222}
230 223
231static void bgpio_set_multiple_single_reg(struct bgpio_chip *bgc, 224static void bgpio_set_multiple_single_reg(struct gpio_chip *gc,
232 unsigned long *mask, 225 unsigned long *mask,
233 unsigned long *bits, 226 unsigned long *bits,
234 void __iomem *reg) 227 void __iomem *reg)
@@ -236,47 +229,42 @@ static void bgpio_set_multiple_single_reg(struct bgpio_chip *bgc,
236 unsigned long flags; 229 unsigned long flags;
237 unsigned long set_mask, clear_mask; 230 unsigned long set_mask, clear_mask;
238 231
239 spin_lock_irqsave(&bgc->lock, flags); 232 spin_lock_irqsave(&gc->bgpio_lock, flags);
240 233
241 bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask); 234 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
242 235
243 bgc->data |= set_mask; 236 gc->bgpio_data |= set_mask;
244 bgc->data &= ~clear_mask; 237 gc->bgpio_data &= ~clear_mask;
245 238
246 bgc->write_reg(reg, bgc->data); 239 gc->write_reg(reg, gc->bgpio_data);
247 240
248 spin_unlock_irqrestore(&bgc->lock, flags); 241 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
249} 242}
250 243
251static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 244static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
252 unsigned long *bits) 245 unsigned long *bits)
253{ 246{
254 struct bgpio_chip *bgc = to_bgpio_chip(gc); 247 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
255
256 bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_dat);
257} 248}
258 249
259static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, 250static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask,
260 unsigned long *bits) 251 unsigned long *bits)
261{ 252{
262 struct bgpio_chip *bgc = to_bgpio_chip(gc); 253 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
263
264 bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_set);
265} 254}
266 255
267static void bgpio_set_multiple_with_clear(struct gpio_chip *gc, 256static void bgpio_set_multiple_with_clear(struct gpio_chip *gc,
268 unsigned long *mask, 257 unsigned long *mask,
269 unsigned long *bits) 258 unsigned long *bits)
270{ 259{
271 struct bgpio_chip *bgc = to_bgpio_chip(gc);
272 unsigned long set_mask, clear_mask; 260 unsigned long set_mask, clear_mask;
273 261
274 bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask); 262 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
275 263
276 if (set_mask) 264 if (set_mask)
277 bgc->write_reg(bgc->reg_set, set_mask); 265 gc->write_reg(gc->reg_set, set_mask);
278 if (clear_mask) 266 if (clear_mask)
279 bgc->write_reg(bgc->reg_clr, clear_mask); 267 gc->write_reg(gc->reg_clr, clear_mask);
280} 268}
281 269
282static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) 270static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
@@ -300,111 +288,103 @@ static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
300 288
301static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 289static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
302{ 290{
303 struct bgpio_chip *bgc = to_bgpio_chip(gc);
304 unsigned long flags; 291 unsigned long flags;
305 292
306 spin_lock_irqsave(&bgc->lock, flags); 293 spin_lock_irqsave(&gc->bgpio_lock, flags);
307 294
308 bgc->dir &= ~bgc->pin2mask(bgc, gpio); 295 gc->bgpio_dir &= ~gc->pin2mask(gc, gpio);
309 bgc->write_reg(bgc->reg_dir, bgc->dir); 296 gc->write_reg(gc->reg_dir, gc->bgpio_dir);
310 297
311 spin_unlock_irqrestore(&bgc->lock, flags); 298 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
312 299
313 return 0; 300 return 0;
314} 301}
315 302
316static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) 303static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
317{ 304{
318 struct bgpio_chip *bgc = to_bgpio_chip(gc); 305 /* Return 0 if output, 1 of input */
319 306 return !(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio));
320 return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ?
321 GPIOF_DIR_OUT : GPIOF_DIR_IN;
322} 307}
323 308
324static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 309static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
325{ 310{
326 struct bgpio_chip *bgc = to_bgpio_chip(gc);
327 unsigned long flags; 311 unsigned long flags;
328 312
329 gc->set(gc, gpio, val); 313 gc->set(gc, gpio, val);
330 314
331 spin_lock_irqsave(&bgc->lock, flags); 315 spin_lock_irqsave(&gc->bgpio_lock, flags);
332 316
333 bgc->dir |= bgc->pin2mask(bgc, gpio); 317 gc->bgpio_dir |= gc->pin2mask(gc, gpio);
334 bgc->write_reg(bgc->reg_dir, bgc->dir); 318 gc->write_reg(gc->reg_dir, gc->bgpio_dir);
335 319
336 spin_unlock_irqrestore(&bgc->lock, flags); 320 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
337 321
338 return 0; 322 return 0;
339} 323}
340 324
341static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio) 325static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio)
342{ 326{
343 struct bgpio_chip *bgc = to_bgpio_chip(gc);
344 unsigned long flags; 327 unsigned long flags;
345 328
346 spin_lock_irqsave(&bgc->lock, flags); 329 spin_lock_irqsave(&gc->bgpio_lock, flags);
347 330
348 bgc->dir |= bgc->pin2mask(bgc, gpio); 331 gc->bgpio_dir |= gc->pin2mask(gc, gpio);
349 bgc->write_reg(bgc->reg_dir, bgc->dir); 332 gc->write_reg(gc->reg_dir, gc->bgpio_dir);
350 333
351 spin_unlock_irqrestore(&bgc->lock, flags); 334 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
352 335
353 return 0; 336 return 0;
354} 337}
355 338
356static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val) 339static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
357{ 340{
358 struct bgpio_chip *bgc = to_bgpio_chip(gc);
359 unsigned long flags; 341 unsigned long flags;
360 342
361 gc->set(gc, gpio, val); 343 gc->set(gc, gpio, val);
362 344
363 spin_lock_irqsave(&bgc->lock, flags); 345 spin_lock_irqsave(&gc->bgpio_lock, flags);
364 346
365 bgc->dir &= ~bgc->pin2mask(bgc, gpio); 347 gc->bgpio_dir &= ~gc->pin2mask(gc, gpio);
366 bgc->write_reg(bgc->reg_dir, bgc->dir); 348 gc->write_reg(gc->reg_dir, gc->bgpio_dir);
367 349
368 spin_unlock_irqrestore(&bgc->lock, flags); 350 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
369 351
370 return 0; 352 return 0;
371} 353}
372 354
373static int bgpio_get_dir_inv(struct gpio_chip *gc, unsigned int gpio) 355static int bgpio_get_dir_inv(struct gpio_chip *gc, unsigned int gpio)
374{ 356{
375 struct bgpio_chip *bgc = to_bgpio_chip(gc); 357 /* Return 0 if output, 1 if input */
376 358 return !!(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio));
377 return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ?
378 GPIOF_DIR_IN : GPIOF_DIR_OUT;
379} 359}
380 360
381static int bgpio_setup_accessors(struct device *dev, 361static int bgpio_setup_accessors(struct device *dev,
382 struct bgpio_chip *bgc, 362 struct gpio_chip *gc,
383 bool bit_be, 363 bool bit_be,
384 bool byte_be) 364 bool byte_be)
385{ 365{
386 366
387 switch (bgc->bits) { 367 switch (gc->bgpio_bits) {
388 case 8: 368 case 8:
389 bgc->read_reg = bgpio_read8; 369 gc->read_reg = bgpio_read8;
390 bgc->write_reg = bgpio_write8; 370 gc->write_reg = bgpio_write8;
391 break; 371 break;
392 case 16: 372 case 16:
393 if (byte_be) { 373 if (byte_be) {
394 bgc->read_reg = bgpio_read16be; 374 gc->read_reg = bgpio_read16be;
395 bgc->write_reg = bgpio_write16be; 375 gc->write_reg = bgpio_write16be;
396 } else { 376 } else {
397 bgc->read_reg = bgpio_read16; 377 gc->read_reg = bgpio_read16;
398 bgc->write_reg = bgpio_write16; 378 gc->write_reg = bgpio_write16;
399 } 379 }
400 break; 380 break;
401 case 32: 381 case 32:
402 if (byte_be) { 382 if (byte_be) {
403 bgc->read_reg = bgpio_read32be; 383 gc->read_reg = bgpio_read32be;
404 bgc->write_reg = bgpio_write32be; 384 gc->write_reg = bgpio_write32be;
405 } else { 385 } else {
406 bgc->read_reg = bgpio_read32; 386 gc->read_reg = bgpio_read32;
407 bgc->write_reg = bgpio_write32; 387 gc->write_reg = bgpio_write32;
408 } 388 }
409 break; 389 break;
410#if BITS_PER_LONG >= 64 390#if BITS_PER_LONG >= 64
@@ -414,17 +394,17 @@ static int bgpio_setup_accessors(struct device *dev,
414 "64 bit big endian byte order unsupported\n"); 394 "64 bit big endian byte order unsupported\n");
415 return -EINVAL; 395 return -EINVAL;
416 } else { 396 } else {
417 bgc->read_reg = bgpio_read64; 397 gc->read_reg = bgpio_read64;
418 bgc->write_reg = bgpio_write64; 398 gc->write_reg = bgpio_write64;
419 } 399 }
420 break; 400 break;
421#endif /* BITS_PER_LONG >= 64 */ 401#endif /* BITS_PER_LONG >= 64 */
422 default: 402 default:
423 dev_err(dev, "unsupported data width %u bits\n", bgc->bits); 403 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);
424 return -EINVAL; 404 return -EINVAL;
425 } 405 }
426 406
427 bgc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask; 407 gc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask;
428 408
429 return 0; 409 return 0;
430} 410}
@@ -451,44 +431,44 @@ static int bgpio_setup_accessors(struct device *dev,
451 * - an input direction register (named "dirin") where a 1 bit indicates 431 * - an input direction register (named "dirin") where a 1 bit indicates
452 * the GPIO is an input. 432 * the GPIO is an input.
453 */ 433 */
454static int bgpio_setup_io(struct bgpio_chip *bgc, 434static int bgpio_setup_io(struct gpio_chip *gc,
455 void __iomem *dat, 435 void __iomem *dat,
456 void __iomem *set, 436 void __iomem *set,
457 void __iomem *clr, 437 void __iomem *clr,
458 unsigned long flags) 438 unsigned long flags)
459{ 439{
460 440
461 bgc->reg_dat = dat; 441 gc->reg_dat = dat;
462 if (!bgc->reg_dat) 442 if (!gc->reg_dat)
463 return -EINVAL; 443 return -EINVAL;
464 444
465 if (set && clr) { 445 if (set && clr) {
466 bgc->reg_set = set; 446 gc->reg_set = set;
467 bgc->reg_clr = clr; 447 gc->reg_clr = clr;
468 bgc->gc.set = bgpio_set_with_clear; 448 gc->set = bgpio_set_with_clear;
469 bgc->gc.set_multiple = bgpio_set_multiple_with_clear; 449 gc->set_multiple = bgpio_set_multiple_with_clear;
470 } else if (set && !clr) { 450 } else if (set && !clr) {
471 bgc->reg_set = set; 451 gc->reg_set = set;
472 bgc->gc.set = bgpio_set_set; 452 gc->set = bgpio_set_set;
473 bgc->gc.set_multiple = bgpio_set_multiple_set; 453 gc->set_multiple = bgpio_set_multiple_set;
474 } else if (flags & BGPIOF_NO_OUTPUT) { 454 } else if (flags & BGPIOF_NO_OUTPUT) {
475 bgc->gc.set = bgpio_set_none; 455 gc->set = bgpio_set_none;
476 bgc->gc.set_multiple = NULL; 456 gc->set_multiple = NULL;
477 } else { 457 } else {
478 bgc->gc.set = bgpio_set; 458 gc->set = bgpio_set;
479 bgc->gc.set_multiple = bgpio_set_multiple; 459 gc->set_multiple = bgpio_set_multiple;
480 } 460 }
481 461
482 if (!(flags & BGPIOF_UNREADABLE_REG_SET) && 462 if (!(flags & BGPIOF_UNREADABLE_REG_SET) &&
483 (flags & BGPIOF_READ_OUTPUT_REG_SET)) 463 (flags & BGPIOF_READ_OUTPUT_REG_SET))
484 bgc->gc.get = bgpio_get_set; 464 gc->get = bgpio_get_set;
485 else 465 else
486 bgc->gc.get = bgpio_get; 466 gc->get = bgpio_get;
487 467
488 return 0; 468 return 0;
489} 469}
490 470
491static int bgpio_setup_direction(struct bgpio_chip *bgc, 471static int bgpio_setup_direction(struct gpio_chip *gc,
492 void __iomem *dirout, 472 void __iomem *dirout,
493 void __iomem *dirin, 473 void __iomem *dirin,
494 unsigned long flags) 474 unsigned long flags)
@@ -496,21 +476,21 @@ static int bgpio_setup_direction(struct bgpio_chip *bgc,
496 if (dirout && dirin) { 476 if (dirout && dirin) {
497 return -EINVAL; 477 return -EINVAL;
498 } else if (dirout) { 478 } else if (dirout) {
499 bgc->reg_dir = dirout; 479 gc->reg_dir = dirout;
500 bgc->gc.direction_output = bgpio_dir_out; 480 gc->direction_output = bgpio_dir_out;
501 bgc->gc.direction_input = bgpio_dir_in; 481 gc->direction_input = bgpio_dir_in;
502 bgc->gc.get_direction = bgpio_get_dir; 482 gc->get_direction = bgpio_get_dir;
503 } else if (dirin) { 483 } else if (dirin) {
504 bgc->reg_dir = dirin; 484 gc->reg_dir = dirin;
505 bgc->gc.direction_output = bgpio_dir_out_inv; 485 gc->direction_output = bgpio_dir_out_inv;
506 bgc->gc.direction_input = bgpio_dir_in_inv; 486 gc->direction_input = bgpio_dir_in_inv;
507 bgc->gc.get_direction = bgpio_get_dir_inv; 487 gc->get_direction = bgpio_get_dir_inv;
508 } else { 488 } else {
509 if (flags & BGPIOF_NO_OUTPUT) 489 if (flags & BGPIOF_NO_OUTPUT)
510 bgc->gc.direction_output = bgpio_dir_out_err; 490 gc->direction_output = bgpio_dir_out_err;
511 else 491 else
512 bgc->gc.direction_output = bgpio_simple_dir_out; 492 gc->direction_output = bgpio_simple_dir_out;
513 bgc->gc.direction_input = bgpio_simple_dir_in; 493 gc->direction_input = bgpio_simple_dir_in;
514 } 494 }
515 495
516 return 0; 496 return 0;
@@ -524,14 +504,7 @@ static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin)
524 return -EINVAL; 504 return -EINVAL;
525} 505}
526 506
527int bgpio_remove(struct bgpio_chip *bgc) 507int bgpio_init(struct gpio_chip *gc, struct device *dev,
528{
529 gpiochip_remove(&bgc->gc);
530 return 0;
531}
532EXPORT_SYMBOL_GPL(bgpio_remove);
533
534int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
535 unsigned long sz, void __iomem *dat, void __iomem *set, 508 unsigned long sz, void __iomem *dat, void __iomem *set,
536 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, 509 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
537 unsigned long flags) 510 unsigned long flags)
@@ -541,36 +514,36 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
541 if (!is_power_of_2(sz)) 514 if (!is_power_of_2(sz))
542 return -EINVAL; 515 return -EINVAL;
543 516
544 bgc->bits = sz * 8; 517 gc->bgpio_bits = sz * 8;
545 if (bgc->bits > BITS_PER_LONG) 518 if (gc->bgpio_bits > BITS_PER_LONG)
546 return -EINVAL; 519 return -EINVAL;
547 520
548 spin_lock_init(&bgc->lock); 521 spin_lock_init(&gc->bgpio_lock);
549 bgc->gc.parent = dev; 522 gc->parent = dev;
550 bgc->gc.label = dev_name(dev); 523 gc->label = dev_name(dev);
551 bgc->gc.base = -1; 524 gc->base = -1;
552 bgc->gc.ngpio = bgc->bits; 525 gc->ngpio = gc->bgpio_bits;
553 bgc->gc.request = bgpio_request; 526 gc->request = bgpio_request;
554 527
555 ret = bgpio_setup_io(bgc, dat, set, clr, flags); 528 ret = bgpio_setup_io(gc, dat, set, clr, flags);
556 if (ret) 529 if (ret)
557 return ret; 530 return ret;
558 531
559 ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN, 532 ret = bgpio_setup_accessors(dev, gc, flags & BGPIOF_BIG_ENDIAN,
560 flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER); 533 flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
561 if (ret) 534 if (ret)
562 return ret; 535 return ret;
563 536
564 ret = bgpio_setup_direction(bgc, dirout, dirin, flags); 537 ret = bgpio_setup_direction(gc, dirout, dirin, flags);
565 if (ret) 538 if (ret)
566 return ret; 539 return ret;
567 540
568 bgc->data = bgc->read_reg(bgc->reg_dat); 541 gc->bgpio_data = gc->read_reg(gc->reg_dat);
569 if (bgc->gc.set == bgpio_set_set && 542 if (gc->set == bgpio_set_set &&
570 !(flags & BGPIOF_UNREADABLE_REG_SET)) 543 !(flags & BGPIOF_UNREADABLE_REG_SET))
571 bgc->data = bgc->read_reg(bgc->reg_set); 544 gc->bgpio_data = gc->read_reg(gc->reg_set);
572 if (bgc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR)) 545 if (gc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR))
573 bgc->dir = bgc->read_reg(bgc->reg_dir); 546 gc->bgpio_dir = gc->read_reg(gc->reg_dir);
574 547
575 return ret; 548 return ret;
576} 549}
@@ -608,7 +581,7 @@ static int bgpio_pdev_probe(struct platform_device *pdev)
608 unsigned long sz; 581 unsigned long sz;
609 unsigned long flags = pdev->id_entry->driver_data; 582 unsigned long flags = pdev->id_entry->driver_data;
610 int err; 583 int err;
611 struct bgpio_chip *bgc; 584 struct gpio_chip *gc;
612 struct bgpio_pdata *pdata = dev_get_platdata(dev); 585 struct bgpio_pdata *pdata = dev_get_platdata(dev);
613 586
614 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); 587 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
@@ -637,32 +610,33 @@ static int bgpio_pdev_probe(struct platform_device *pdev)
637 if (IS_ERR(dirin)) 610 if (IS_ERR(dirin))
638 return PTR_ERR(dirin); 611 return PTR_ERR(dirin);
639 612
640 bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); 613 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
641 if (!bgc) 614 if (!gc)
642 return -ENOMEM; 615 return -ENOMEM;
643 616
644 err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, flags); 617 err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags);
645 if (err) 618 if (err)
646 return err; 619 return err;
647 620
648 if (pdata) { 621 if (pdata) {
649 if (pdata->label) 622 if (pdata->label)
650 bgc->gc.label = pdata->label; 623 gc->label = pdata->label;
651 bgc->gc.base = pdata->base; 624 gc->base = pdata->base;
652 if (pdata->ngpio > 0) 625 if (pdata->ngpio > 0)
653 bgc->gc.ngpio = pdata->ngpio; 626 gc->ngpio = pdata->ngpio;
654 } 627 }
655 628
656 platform_set_drvdata(pdev, bgc); 629 platform_set_drvdata(pdev, gc);
657 630
658 return gpiochip_add(&bgc->gc); 631 return gpiochip_add_data(gc, NULL);
659} 632}
660 633
661static int bgpio_pdev_remove(struct platform_device *pdev) 634static int bgpio_pdev_remove(struct platform_device *pdev)
662{ 635{
663 struct bgpio_chip *bgc = platform_get_drvdata(pdev); 636 struct gpio_chip *gc = platform_get_drvdata(pdev);
664 637
665 return bgpio_remove(bgc); 638 gpiochip_remove(gc);
639 return 0;
666} 640}
667 641
668static const struct platform_device_id bgpio_id_table[] = { 642static const struct platform_device_id bgpio_id_table[] = {
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c
index 801423fe8143..7847dd34f86f 100644
--- a/drivers/gpio/gpio-grgpio.c
+++ b/drivers/gpio/gpio-grgpio.c
@@ -31,7 +31,7 @@
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/err.h> 33#include <linux/err.h>
34#include <linux/basic_mmio_gpio.h> 34#include <linux/gpio/driver.h>
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <linux/irq.h> 36#include <linux/irq.h>
37#include <linux/irqdomain.h> 37#include <linux/irqdomain.h>
@@ -63,7 +63,7 @@ struct grgpio_lirq {
63}; 63};
64 64
65struct grgpio_priv { 65struct grgpio_priv {
66 struct bgpio_chip bgc; 66 struct gpio_chip gc;
67 void __iomem *regs; 67 void __iomem *regs;
68 struct device *dev; 68 struct device *dev;
69 69
@@ -92,29 +92,22 @@ struct grgpio_priv {
92 struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO]; 92 struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO];
93}; 93};
94 94
95static inline struct grgpio_priv *grgpio_gc_to_priv(struct gpio_chip *gc)
96{
97 struct bgpio_chip *bgc = to_bgpio_chip(gc);
98
99 return container_of(bgc, struct grgpio_priv, bgc);
100}
101
102static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset, 95static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset,
103 int val) 96 int val)
104{ 97{
105 struct bgpio_chip *bgc = &priv->bgc; 98 struct gpio_chip *gc = &priv->gc;
106 unsigned long mask = bgc->pin2mask(bgc, offset); 99 unsigned long mask = gc->pin2mask(gc, offset);
107 100
108 if (val) 101 if (val)
109 priv->imask |= mask; 102 priv->imask |= mask;
110 else 103 else
111 priv->imask &= ~mask; 104 priv->imask &= ~mask;
112 bgc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask); 105 gc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask);
113} 106}
114 107
115static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset) 108static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset)
116{ 109{
117 struct grgpio_priv *priv = grgpio_gc_to_priv(gc); 110 struct grgpio_priv *priv = gpiochip_get_data(gc);
118 111
119 if (offset >= gc->ngpio) 112 if (offset >= gc->ngpio)
120 return -ENXIO; 113 return -ENXIO;
@@ -158,15 +151,15 @@ static int grgpio_irq_set_type(struct irq_data *d, unsigned int type)
158 return -EINVAL; 151 return -EINVAL;
159 } 152 }
160 153
161 spin_lock_irqsave(&priv->bgc.lock, flags); 154 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
162 155
163 ipol = priv->bgc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask; 156 ipol = priv->gc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask;
164 iedge = priv->bgc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask; 157 iedge = priv->gc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask;
165 158
166 priv->bgc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol); 159 priv->gc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol);
167 priv->bgc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge); 160 priv->gc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge);
168 161
169 spin_unlock_irqrestore(&priv->bgc.lock, flags); 162 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
170 163
171 return 0; 164 return 0;
172} 165}
@@ -177,11 +170,11 @@ static void grgpio_irq_mask(struct irq_data *d)
177 int offset = d->hwirq; 170 int offset = d->hwirq;
178 unsigned long flags; 171 unsigned long flags;
179 172
180 spin_lock_irqsave(&priv->bgc.lock, flags); 173 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
181 174
182 grgpio_set_imask(priv, offset, 0); 175 grgpio_set_imask(priv, offset, 0);
183 176
184 spin_unlock_irqrestore(&priv->bgc.lock, flags); 177 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
185} 178}
186 179
187static void grgpio_irq_unmask(struct irq_data *d) 180static void grgpio_irq_unmask(struct irq_data *d)
@@ -190,11 +183,11 @@ static void grgpio_irq_unmask(struct irq_data *d)
190 int offset = d->hwirq; 183 int offset = d->hwirq;
191 unsigned long flags; 184 unsigned long flags;
192 185
193 spin_lock_irqsave(&priv->bgc.lock, flags); 186 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
194 187
195 grgpio_set_imask(priv, offset, 1); 188 grgpio_set_imask(priv, offset, 1);
196 189
197 spin_unlock_irqrestore(&priv->bgc.lock, flags); 190 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
198} 191}
199 192
200static struct irq_chip grgpio_irq_chip = { 193static struct irq_chip grgpio_irq_chip = {
@@ -207,12 +200,12 @@ static struct irq_chip grgpio_irq_chip = {
207static irqreturn_t grgpio_irq_handler(int irq, void *dev) 200static irqreturn_t grgpio_irq_handler(int irq, void *dev)
208{ 201{
209 struct grgpio_priv *priv = dev; 202 struct grgpio_priv *priv = dev;
210 int ngpio = priv->bgc.gc.ngpio; 203 int ngpio = priv->gc.ngpio;
211 unsigned long flags; 204 unsigned long flags;
212 int i; 205 int i;
213 int match = 0; 206 int match = 0;
214 207
215 spin_lock_irqsave(&priv->bgc.lock, flags); 208 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
216 209
217 /* 210 /*
218 * For each gpio line, call its interrupt handler if it its underlying 211 * For each gpio line, call its interrupt handler if it its underlying
@@ -228,7 +221,7 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev)
228 } 221 }
229 } 222 }
230 223
231 spin_unlock_irqrestore(&priv->bgc.lock, flags); 224 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
232 225
233 if (!match) 226 if (!match)
234 dev_warn(priv->dev, "No gpio line matched irq %d\n", irq); 227 dev_warn(priv->dev, "No gpio line matched irq %d\n", irq);
@@ -260,7 +253,7 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq,
260 dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n", 253 dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n",
261 irq, offset); 254 irq, offset);
262 255
263 spin_lock_irqsave(&priv->bgc.lock, flags); 256 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
264 257
265 /* Request underlying irq if not already requested */ 258 /* Request underlying irq if not already requested */
266 lirq->irq = irq; 259 lirq->irq = irq;
@@ -273,14 +266,14 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq,
273 "Could not request underlying irq %d\n", 266 "Could not request underlying irq %d\n",
274 uirq->uirq); 267 uirq->uirq);
275 268
276 spin_unlock_irqrestore(&priv->bgc.lock, flags); 269 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
277 270
278 return ret; 271 return ret;
279 } 272 }
280 } 273 }
281 uirq->refcnt++; 274 uirq->refcnt++;
282 275
283 spin_unlock_irqrestore(&priv->bgc.lock, flags); 276 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
284 277
285 /* Setup irq */ 278 /* Setup irq */
286 irq_set_chip_data(irq, priv); 279 irq_set_chip_data(irq, priv);
@@ -298,13 +291,13 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq)
298 struct grgpio_lirq *lirq; 291 struct grgpio_lirq *lirq;
299 struct grgpio_uirq *uirq; 292 struct grgpio_uirq *uirq;
300 unsigned long flags; 293 unsigned long flags;
301 int ngpio = priv->bgc.gc.ngpio; 294 int ngpio = priv->gc.ngpio;
302 int i; 295 int i;
303 296
304 irq_set_chip_and_handler(irq, NULL, NULL); 297 irq_set_chip_and_handler(irq, NULL, NULL);
305 irq_set_chip_data(irq, NULL); 298 irq_set_chip_data(irq, NULL);
306 299
307 spin_lock_irqsave(&priv->bgc.lock, flags); 300 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
308 301
309 /* Free underlying irq if last user unmapped */ 302 /* Free underlying irq if last user unmapped */
310 index = -1; 303 index = -1;
@@ -326,7 +319,7 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq)
326 free_irq(uirq->uirq, priv); 319 free_irq(uirq->uirq, priv);
327 } 320 }
328 321
329 spin_unlock_irqrestore(&priv->bgc.lock, flags); 322 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
330} 323}
331 324
332static const struct irq_domain_ops grgpio_irq_domain_ops = { 325static const struct irq_domain_ops grgpio_irq_domain_ops = {
@@ -341,7 +334,6 @@ static int grgpio_probe(struct platform_device *ofdev)
341 struct device_node *np = ofdev->dev.of_node; 334 struct device_node *np = ofdev->dev.of_node;
342 void __iomem *regs; 335 void __iomem *regs;
343 struct gpio_chip *gc; 336 struct gpio_chip *gc;
344 struct bgpio_chip *bgc;
345 struct grgpio_priv *priv; 337 struct grgpio_priv *priv;
346 struct resource *res; 338 struct resource *res;
347 int err; 339 int err;
@@ -359,8 +351,8 @@ static int grgpio_probe(struct platform_device *ofdev)
359 if (IS_ERR(regs)) 351 if (IS_ERR(regs))
360 return PTR_ERR(regs); 352 return PTR_ERR(regs);
361 353
362 bgc = &priv->bgc; 354 gc = &priv->gc;
363 err = bgpio_init(bgc, &ofdev->dev, 4, regs + GRGPIO_DATA, 355 err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA,
364 regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, 356 regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL,
365 BGPIOF_BIG_ENDIAN_BYTE_ORDER); 357 BGPIOF_BIG_ENDIAN_BYTE_ORDER);
366 if (err) { 358 if (err) {
@@ -369,10 +361,9 @@ static int grgpio_probe(struct platform_device *ofdev)
369 } 361 }
370 362
371 priv->regs = regs; 363 priv->regs = regs;
372 priv->imask = bgc->read_reg(regs + GRGPIO_IMASK); 364 priv->imask = gc->read_reg(regs + GRGPIO_IMASK);
373 priv->dev = &ofdev->dev; 365 priv->dev = &ofdev->dev;
374 366
375 gc = &bgc->gc;
376 gc->of_node = np; 367 gc->of_node = np;
377 gc->owner = THIS_MODULE; 368 gc->owner = THIS_MODULE;
378 gc->to_irq = grgpio_to_irq; 369 gc->to_irq = grgpio_to_irq;
@@ -435,7 +426,7 @@ static int grgpio_probe(struct platform_device *ofdev)
435 426
436 platform_set_drvdata(ofdev, priv); 427 platform_set_drvdata(ofdev, priv);
437 428
438 err = gpiochip_add(gc); 429 err = gpiochip_add_data(gc, priv);
439 if (err) { 430 if (err) {
440 dev_err(&ofdev->dev, "Could not add gpiochip\n"); 431 dev_err(&ofdev->dev, "Could not add gpiochip\n");
441 if (priv->domain) 432 if (priv->domain)
@@ -456,7 +447,7 @@ static int grgpio_remove(struct platform_device *ofdev)
456 int i; 447 int i;
457 int ret = 0; 448 int ret = 0;
458 449
459 spin_lock_irqsave(&priv->bgc.lock, flags); 450 spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
460 451
461 if (priv->domain) { 452 if (priv->domain) {
462 for (i = 0; i < GRGPIO_MAX_NGPIO; i++) { 453 for (i = 0; i < GRGPIO_MAX_NGPIO; i++) {
@@ -467,13 +458,13 @@ static int grgpio_remove(struct platform_device *ofdev)
467 } 458 }
468 } 459 }
469 460
470 gpiochip_remove(&priv->bgc.gc); 461 gpiochip_remove(&priv->gc);
471 462
472 if (priv->domain) 463 if (priv->domain)
473 irq_domain_remove(priv->domain); 464 irq_domain_remove(priv->domain);
474 465
475out: 466out:
476 spin_unlock_irqrestore(&priv->bgc.lock, flags); 467 spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
477 468
478 return ret; 469 return ret;
479} 470}
diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c
index 8942f4909a31..71c13c4e12b5 100644
--- a/drivers/gpio/gpio-moxart.c
+++ b/drivers/gpio/gpio-moxart.c
@@ -14,7 +14,6 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h>
18#include <linux/platform_device.h> 17#include <linux/platform_device.h>
19#include <linux/module.h> 18#include <linux/module.h>
20#include <linux/of_address.h> 19#include <linux/of_address.h>
@@ -23,7 +22,7 @@
23#include <linux/delay.h> 22#include <linux/delay.h>
24#include <linux/timer.h> 23#include <linux/timer.h>
25#include <linux/bitops.h> 24#include <linux/bitops.h>
26#include <linux/basic_mmio_gpio.h> 25#include <linux/gpio/driver.h>
27 26
28#define GPIO_DATA_OUT 0x00 27#define GPIO_DATA_OUT 0x00
29#define GPIO_DATA_IN 0x04 28#define GPIO_DATA_IN 0x04
@@ -33,12 +32,12 @@ static int moxart_gpio_probe(struct platform_device *pdev)
33{ 32{
34 struct device *dev = &pdev->dev; 33 struct device *dev = &pdev->dev;
35 struct resource *res; 34 struct resource *res;
36 struct bgpio_chip *bgc; 35 struct gpio_chip *gc;
37 void __iomem *base; 36 void __iomem *base;
38 int ret; 37 int ret;
39 38
40 bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL); 39 gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
41 if (!bgc) 40 if (!gc)
42 return -ENOMEM; 41 return -ENOMEM;
43 42
44 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 43 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -46,7 +45,7 @@ static int moxart_gpio_probe(struct platform_device *pdev)
46 if (IS_ERR(base)) 45 if (IS_ERR(base))
47 return PTR_ERR(base); 46 return PTR_ERR(base);
48 47
49 ret = bgpio_init(bgc, dev, 4, base + GPIO_DATA_IN, 48 ret = bgpio_init(gc, dev, 4, base + GPIO_DATA_IN,
50 base + GPIO_DATA_OUT, NULL, 49 base + GPIO_DATA_OUT, NULL,
51 base + GPIO_PIN_DIRECTION, NULL, 50 base + GPIO_PIN_DIRECTION, NULL,
52 BGPIOF_READ_OUTPUT_REG_SET); 51 BGPIOF_READ_OUTPUT_REG_SET);
@@ -55,16 +54,16 @@ static int moxart_gpio_probe(struct platform_device *pdev)
55 return ret; 54 return ret;
56 } 55 }
57 56
58 bgc->gc.label = "moxart-gpio"; 57 gc->label = "moxart-gpio";
59 bgc->gc.request = gpiochip_generic_request; 58 gc->request = gpiochip_generic_request;
60 bgc->gc.free = gpiochip_generic_free; 59 gc->free = gpiochip_generic_free;
61 bgc->data = bgc->read_reg(bgc->reg_set); 60 gc->bgpio_data = bgc->read_reg(bgc->reg_set);
62 bgc->gc.base = 0; 61 gc->base = 0;
63 bgc->gc.ngpio = 32; 62 gc->ngpio = 32;
64 bgc->gc.parent = dev; 63 gc->parent = dev;
65 bgc->gc.owner = THIS_MODULE; 64 gc->owner = THIS_MODULE;
66 65
67 ret = gpiochip_add(&bgc->gc); 66 ret = gpiochip_add_data(gc, NULL);
68 if (ret) { 67 if (ret) {
69 dev_err(dev, "%s: gpiochip_add failed\n", 68 dev_err(dev, "%s: gpiochip_add failed\n",
70 dev->of_node->full_name); 69 dev->of_node->full_name);
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 6ea8df6c7397..7fd21cb53c81 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -26,10 +26,11 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/irqdomain.h> 27#include <linux/irqdomain.h>
28#include <linux/irqchip/chained_irq.h> 28#include <linux/irqchip/chained_irq.h>
29#include <linux/gpio.h>
30#include <linux/platform_device.h> 29#include <linux/platform_device.h>
31#include <linux/slab.h> 30#include <linux/slab.h>
32#include <linux/basic_mmio_gpio.h> 31#include <linux/gpio/driver.h>
32/* FIXME: for gpio_get_value() replace this with direct register read */
33#include <linux/gpio.h>
33#include <linux/of.h> 34#include <linux/of.h>
34#include <linux/of_device.h> 35#include <linux/of_device.h>
35#include <linux/module.h> 36#include <linux/module.h>
@@ -64,7 +65,7 @@ struct mxc_gpio_port {
64 int irq; 65 int irq;
65 int irq_high; 66 int irq_high;
66 struct irq_domain *domain; 67 struct irq_domain *domain;
67 struct bgpio_chip bgc; 68 struct gpio_chip gc;
68 u32 both_edges; 69 u32 both_edges;
69}; 70};
70 71
@@ -172,7 +173,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
172 struct mxc_gpio_port *port = gc->private; 173 struct mxc_gpio_port *port = gc->private;
173 u32 bit, val; 174 u32 bit, val;
174 u32 gpio_idx = d->hwirq; 175 u32 gpio_idx = d->hwirq;
175 u32 gpio = port->bgc.gc.base + gpio_idx; 176 u32 gpio = port->gc.base + gpio_idx;
176 int edge; 177 int edge;
177 void __iomem *reg = port->base; 178 void __iomem *reg = port->base;
178 179
@@ -398,9 +399,7 @@ static void mxc_gpio_get_hw(struct platform_device *pdev)
398 399
399static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 400static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
400{ 401{
401 struct bgpio_chip *bgc = to_bgpio_chip(gc); 402 struct mxc_gpio_port *port = gpiochip_get_data(gc);
402 struct mxc_gpio_port *port =
403 container_of(bgc, struct mxc_gpio_port, bgc);
404 403
405 return irq_find_mapping(port->domain, offset); 404 return irq_find_mapping(port->domain, offset);
406} 405}
@@ -451,7 +450,7 @@ static int mxc_gpio_probe(struct platform_device *pdev)
451 port); 450 port);
452 } 451 }
453 452
454 err = bgpio_init(&port->bgc, &pdev->dev, 4, 453 err = bgpio_init(&port->gc, &pdev->dev, 4,
455 port->base + GPIO_PSR, 454 port->base + GPIO_PSR,
456 port->base + GPIO_DR, NULL, 455 port->base + GPIO_DR, NULL,
457 port->base + GPIO_GDIR, NULL, 456 port->base + GPIO_GDIR, NULL,
@@ -459,13 +458,13 @@ static int mxc_gpio_probe(struct platform_device *pdev)
459 if (err) 458 if (err)
460 goto out_bgio; 459 goto out_bgio;
461 460
462 port->bgc.gc.to_irq = mxc_gpio_to_irq; 461 port->gc.to_irq = mxc_gpio_to_irq;
463 port->bgc.gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 : 462 port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
464 pdev->id * 32; 463 pdev->id * 32;
465 464
466 err = gpiochip_add(&port->bgc.gc); 465 err = gpiochip_add_data(&port->gc, port);
467 if (err) 466 if (err)
468 goto out_bgpio_remove; 467 goto out_bgio;
469 468
470 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id()); 469 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
471 if (irq_base < 0) { 470 if (irq_base < 0) {
@@ -494,9 +493,7 @@ out_irqdomain_remove:
494out_irqdesc_free: 493out_irqdesc_free:
495 irq_free_descs(irq_base, 32); 494 irq_free_descs(irq_base, 32);
496out_gpiochip_remove: 495out_gpiochip_remove:
497 gpiochip_remove(&port->bgc.gc); 496 gpiochip_remove(&port->gc);
498out_bgpio_remove:
499 bgpio_remove(&port->bgc);
500out_bgio: 497out_bgio:
501 dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); 498 dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
502 return err; 499 return err;
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index a4288f428819..b9daa0bf32a4 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -26,13 +26,14 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/irqdomain.h> 28#include <linux/irqdomain.h>
29#include <linux/gpio.h>
30#include <linux/of.h> 29#include <linux/of.h>
31#include <linux/of_address.h> 30#include <linux/of_address.h>
32#include <linux/of_device.h> 31#include <linux/of_device.h>
33#include <linux/platform_device.h> 32#include <linux/platform_device.h>
34#include <linux/slab.h> 33#include <linux/slab.h>
35#include <linux/basic_mmio_gpio.h> 34#include <linux/gpio/driver.h>
35/* FIXME: for gpio_get_value(), replace this by direct register read */
36#include <linux/gpio.h>
36#include <linux/module.h> 37#include <linux/module.h>
37 38
38#define MXS_SET 0x4 39#define MXS_SET 0x4
@@ -64,7 +65,7 @@ struct mxs_gpio_port {
64 int id; 65 int id;
65 int irq; 66 int irq;
66 struct irq_domain *domain; 67 struct irq_domain *domain;
67 struct bgpio_chip bgc; 68 struct gpio_chip gc;
68 enum mxs_gpio_id devid; 69 enum mxs_gpio_id devid;
69 u32 both_edges; 70 u32 both_edges;
70}; 71};
@@ -93,7 +94,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
93 port->both_edges &= ~pin_mask; 94 port->both_edges &= ~pin_mask;
94 switch (type) { 95 switch (type) {
95 case IRQ_TYPE_EDGE_BOTH: 96 case IRQ_TYPE_EDGE_BOTH:
96 val = gpio_get_value(port->bgc.gc.base + d->hwirq); 97 val = gpio_get_value(port->gc.base + d->hwirq);
97 if (val) 98 if (val)
98 edge = GPIO_INT_FALL_EDGE; 99 edge = GPIO_INT_FALL_EDGE;
99 else 100 else
@@ -225,18 +226,14 @@ static int __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
225 226
226static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 227static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
227{ 228{
228 struct bgpio_chip *bgc = to_bgpio_chip(gc); 229 struct mxs_gpio_port *port = gpiochip_get_data(gc);
229 struct mxs_gpio_port *port =
230 container_of(bgc, struct mxs_gpio_port, bgc);
231 230
232 return irq_find_mapping(port->domain, offset); 231 return irq_find_mapping(port->domain, offset);
233} 232}
234 233
235static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset) 234static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
236{ 235{
237 struct bgpio_chip *bgc = to_bgpio_chip(gc); 236 struct mxs_gpio_port *port = gpiochip_get_data(gc);
238 struct mxs_gpio_port *port =
239 container_of(bgc, struct mxs_gpio_port, bgc);
240 u32 mask = 1 << offset; 237 u32 mask = 1 << offset;
241 u32 dir; 238 u32 dir;
242 239
@@ -330,26 +327,24 @@ static int mxs_gpio_probe(struct platform_device *pdev)
330 irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler, 327 irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler,
331 port); 328 port);
332 329
333 err = bgpio_init(&port->bgc, &pdev->dev, 4, 330 err = bgpio_init(&port->gc, &pdev->dev, 4,
334 port->base + PINCTRL_DIN(port), 331 port->base + PINCTRL_DIN(port),
335 port->base + PINCTRL_DOUT(port) + MXS_SET, 332 port->base + PINCTRL_DOUT(port) + MXS_SET,
336 port->base + PINCTRL_DOUT(port) + MXS_CLR, 333 port->base + PINCTRL_DOUT(port) + MXS_CLR,
337 port->base + PINCTRL_DOE(port), NULL, 0); 334 port->base + PINCTRL_DOE(port), NULL, 0);
338 if (err) 335 if (err)
339 goto out_irqdesc_free; 336 goto out_irqdomain_remove;
340 337
341 port->bgc.gc.to_irq = mxs_gpio_to_irq; 338 port->gc.to_irq = mxs_gpio_to_irq;
342 port->bgc.gc.get_direction = mxs_gpio_get_direction; 339 port->gc.get_direction = mxs_gpio_get_direction;
343 port->bgc.gc.base = port->id * 32; 340 port->gc.base = port->id * 32;
344 341
345 err = gpiochip_add(&port->bgc.gc); 342 err = gpiochip_add_data(&port->gc, port);
346 if (err) 343 if (err)
347 goto out_bgpio_remove; 344 goto out_irqdomain_remove;
348 345
349 return 0; 346 return 0;
350 347
351out_bgpio_remove:
352 bgpio_remove(&port->bgc);
353out_irqdomain_remove: 348out_irqdomain_remove:
354 irq_domain_remove(port->domain); 349 irq_domain_remove(port->domain);
355out_irqdesc_free: 350out_irqdesc_free:
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c
index 34b02b42ab9e..e3cb6772f6ec 100644
--- a/drivers/gpio/gpio-sodaville.c
+++ b/drivers/gpio/gpio-sodaville.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/gpio.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/io.h> 14#include <linux/io.h>
16#include <linux/irq.h> 15#include <linux/irq.h>
@@ -20,7 +19,7 @@
20#include <linux/pci.h> 19#include <linux/pci.h>
21#include <linux/platform_device.h> 20#include <linux/platform_device.h>
22#include <linux/of_irq.h> 21#include <linux/of_irq.h>
23#include <linux/basic_mmio_gpio.h> 22#include <linux/gpio/driver.h>
24 23
25#define DRV_NAME "sdv_gpio" 24#define DRV_NAME "sdv_gpio"
26#define SDV_NUM_PUB_GPIOS 12 25#define SDV_NUM_PUB_GPIOS 12
@@ -43,7 +42,7 @@ struct sdv_gpio_chip_data {
43 void __iomem *gpio_pub_base; 42 void __iomem *gpio_pub_base;
44 struct irq_domain *id; 43 struct irq_domain *id;
45 struct irq_chip_generic *gc; 44 struct irq_chip_generic *gc;
46 struct bgpio_chip bgpio; 45 struct gpio_chip chip;
47}; 46};
48 47
49static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) 48static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type)
@@ -226,14 +225,14 @@ static int sdv_gpio_probe(struct pci_dev *pdev,
226 writel(mux_val, sd->gpio_pub_base + GPMUXCTL); 225 writel(mux_val, sd->gpio_pub_base + GPMUXCTL);
227 } 226 }
228 227
229 ret = bgpio_init(&sd->bgpio, &pdev->dev, 4, 228 ret = bgpio_init(&sd->chip, &pdev->dev, 4,
230 sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR, 229 sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR,
231 NULL, sd->gpio_pub_base + GPOER, NULL, 0); 230 NULL, sd->gpio_pub_base + GPOER, NULL, 0);
232 if (ret) 231 if (ret)
233 goto unmap; 232 goto unmap;
234 sd->bgpio.gc.ngpio = SDV_NUM_PUB_GPIOS; 233 sd->chip.ngpio = SDV_NUM_PUB_GPIOS;
235 234
236 ret = gpiochip_add(&sd->bgpio.gc); 235 ret = gpiochip_add_data(&sd->chip, sd);
237 if (ret < 0) { 236 if (ret < 0) {
238 dev_err(&pdev->dev, "gpiochip_add() failed.\n"); 237 dev_err(&pdev->dev, "gpiochip_add() failed.\n");
239 goto unmap; 238 goto unmap;
@@ -265,7 +264,7 @@ static void sdv_gpio_remove(struct pci_dev *pdev)
265 free_irq(pdev->irq, sd); 264 free_irq(pdev->irq, sd);
266 irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); 265 irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
267 266
268 gpiochip_remove(&sd->bgpio.gc); 267 gpiochip_remove(&sd->chip);
269 pci_release_region(pdev, GPIO_BAR); 268 pci_release_region(pdev, GPIO_BAR);
270 iounmap(sd->gpio_pub_base); 269 iounmap(sd->gpio_pub_base);
271 pci_disable_device(pdev); 270 pci_disable_device(pdev);
diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index d57068b9083e..282004deb5d4 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -23,10 +23,8 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/of_gpio.h> 25#include <linux/of_gpio.h>
26#include <linux/gpio.h>
27#include <linux/gpio/driver.h> 26#include <linux/gpio/driver.h>
28#include <linux/acpi.h> 27#include <linux/acpi.h>
29#include <linux/basic_mmio_gpio.h>
30 28
31#include "gpiolib.h" 29#include "gpiolib.h"
32 30
@@ -43,38 +41,31 @@
43 41
44/** 42/**
45 * struct xgene_gpio_sb - GPIO-Standby private data structure. 43 * struct xgene_gpio_sb - GPIO-Standby private data structure.
46 * @bgc: memory-mapped GPIO controllers. 44 * @gc: memory-mapped GPIO controllers.
47 * @irq: Mapping GPIO pins and interrupt number 45 * @irq: Mapping GPIO pins and interrupt number
48 * nirq: Number of GPIO pins that supports interrupt 46 * nirq: Number of GPIO pins that supports interrupt
49 */ 47 */
50struct xgene_gpio_sb { 48struct xgene_gpio_sb {
51 struct bgpio_chip bgc; 49 struct gpio_chip gc;
52 u32 *irq; 50 u32 *irq;
53 u32 nirq; 51 u32 nirq;
54}; 52};
55 53
56static inline struct xgene_gpio_sb *to_xgene_gpio_sb(struct gpio_chip *gc) 54static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio, int val)
57{
58 struct bgpio_chip *bgc = to_bgpio_chip(gc);
59
60 return container_of(bgc, struct xgene_gpio_sb, bgc);
61}
62
63static void xgene_gpio_set_bit(struct bgpio_chip *bgc, void __iomem *reg, u32 gpio, int val)
64{ 55{
65 u32 data; 56 u32 data;
66 57
67 data = bgc->read_reg(reg); 58 data = gc->read_reg(reg);
68 if (val) 59 if (val)
69 data |= GPIO_MASK(gpio); 60 data |= GPIO_MASK(gpio);
70 else 61 else
71 data &= ~GPIO_MASK(gpio); 62 data &= ~GPIO_MASK(gpio);
72 bgc->write_reg(reg, data); 63 gc->write_reg(reg, data);
73} 64}
74 65
75static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) 66static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
76{ 67{
77 struct xgene_gpio_sb *priv = to_xgene_gpio_sb(gc); 68 struct xgene_gpio_sb *priv = gpiochip_get_data(gc);
78 69
79 if (priv->irq[gpio]) 70 if (priv->irq[gpio])
80 return priv->irq[gpio]; 71 return priv->irq[gpio];
@@ -99,15 +90,15 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
99 if (IS_ERR(regs)) 90 if (IS_ERR(regs))
100 return PTR_ERR(regs); 91 return PTR_ERR(regs);
101 92
102 ret = bgpio_init(&priv->bgc, &pdev->dev, 4, 93 ret = bgpio_init(&priv->gc, &pdev->dev, 4,
103 regs + MPA_GPIO_IN_ADDR, 94 regs + MPA_GPIO_IN_ADDR,
104 regs + MPA_GPIO_OUT_ADDR, NULL, 95 regs + MPA_GPIO_OUT_ADDR, NULL,
105 regs + MPA_GPIO_OE_ADDR, NULL, 0); 96 regs + MPA_GPIO_OE_ADDR, NULL, 0);
106 if (ret) 97 if (ret)
107 return ret; 98 return ret;
108 99
109 priv->bgc.gc.to_irq = apm_gpio_sb_to_irq; 100 priv->gc.to_irq = apm_gpio_sb_to_irq;
110 priv->bgc.gc.ngpio = XGENE_MAX_GPIO_DS; 101 priv->gc.ngpio = XGENE_MAX_GPIO_DS;
111 102
112 priv->nirq = XGENE_MAX_GPIO_DS_IRQ; 103 priv->nirq = XGENE_MAX_GPIO_DS_IRQ;
113 104
@@ -118,14 +109,14 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
118 109
119 for (i = 0; i < priv->nirq; i++) { 110 for (i = 0; i < priv->nirq; i++) {
120 priv->irq[default_lines[i]] = platform_get_irq(pdev, i); 111 priv->irq[default_lines[i]] = platform_get_irq(pdev, i);
121 xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_SEL_LO, 112 xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_SEL_LO,
122 default_lines[i] * 2, 1); 113 default_lines[i] * 2, 1);
123 xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_INT_LVL, i, 1); 114 xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_INT_LVL, i, 1);
124 } 115 }
125 116
126 platform_set_drvdata(pdev, priv); 117 platform_set_drvdata(pdev, priv);
127 118
128 ret = gpiochip_add(&priv->bgc.gc); 119 ret = gpiochip_add_data(&priv->gc, priv);
129 if (ret) 120 if (ret)
130 dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n"); 121 dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n");
131 else 122 else
@@ -133,7 +124,7 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
133 124
134 if (priv->nirq > 0) { 125 if (priv->nirq > 0) {
135 /* Register interrupt handlers for gpio signaled acpi events */ 126 /* Register interrupt handlers for gpio signaled acpi events */
136 acpi_gpiochip_request_interrupts(&priv->bgc.gc); 127 acpi_gpiochip_request_interrupts(&priv->gc);
137 } 128 }
138 129
139 return ret; 130 return ret;
@@ -144,10 +135,11 @@ static int xgene_gpio_sb_remove(struct platform_device *pdev)
144 struct xgene_gpio_sb *priv = platform_get_drvdata(pdev); 135 struct xgene_gpio_sb *priv = platform_get_drvdata(pdev);
145 136
146 if (priv->nirq > 0) { 137 if (priv->nirq > 0) {
147 acpi_gpiochip_free_interrupts(&priv->bgc.gc); 138 acpi_gpiochip_free_interrupts(&priv->gc);
148 } 139 }
149 140
150 return bgpio_remove(&priv->bgc); 141 gpiochip_remove(&priv->gc);
142 return 0;
151} 143}
152 144
153static const struct of_device_id xgene_gpio_sb_of_match[] = { 145static const struct of_device_id xgene_gpio_sb_of_match[] = {
diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c
index 3e628df9280c..855c0204f09a 100644
--- a/drivers/mfd/vexpress-sysreg.c
+++ b/drivers/mfd/vexpress-sysreg.c
@@ -11,7 +11,7 @@
11 * Copyright (C) 2012 ARM Limited 11 * Copyright (C) 2012 ARM Limited
12 */ 12 */
13 13
14#include <linux/basic_mmio_gpio.h> 14#include <linux/gpio/driver.h>
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/mfd/core.h> 17#include <linux/mfd/core.h>
@@ -164,7 +164,7 @@ static int vexpress_sysreg_probe(struct platform_device *pdev)
164{ 164{
165 struct resource *mem; 165 struct resource *mem;
166 void __iomem *base; 166 void __iomem *base;
167 struct bgpio_chip *mmc_gpio_chip; 167 struct gpio_chip *mmc_gpio_chip;
168 int master; 168 int master;
169 u32 dt_hbi; 169 u32 dt_hbi;
170 170
@@ -201,8 +201,8 @@ static int vexpress_sysreg_probe(struct platform_device *pdev)
201 return -ENOMEM; 201 return -ENOMEM;
202 bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI, 202 bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI,
203 NULL, NULL, NULL, NULL, 0); 203 NULL, NULL, NULL, NULL, 0);
204 mmc_gpio_chip->gc.ngpio = 2; 204 mmc_gpio_chip->ngpio = 2;
205 gpiochip_add(&mmc_gpio_chip->gc); 205 gpiochip_add(mmc_gpio_chip);
206 206
207 return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, 207 return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
208 vexpress_sysreg_cells, 208 vexpress_sysreg_cells,
diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h
deleted file mode 100644
index ed3768f4ecc7..000000000000
--- a/include/linux/basic_mmio_gpio.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * Basic memory-mapped GPIO controllers.
3 *
4 * Copyright 2008 MontaVista Software, Inc.
5 * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef __BASIC_MMIO_GPIO_H
14#define __BASIC_MMIO_GPIO_H
15
16#include <linux/gpio.h>
17#include <linux/types.h>
18#include <linux/compiler.h>
19#include <linux/spinlock_types.h>
20
21struct bgpio_pdata {
22 const char *label;
23 int base;
24 int ngpio;
25};
26
27struct device;
28
29struct bgpio_chip {
30 struct gpio_chip gc;
31
32 unsigned long (*read_reg)(void __iomem *reg);
33 void (*write_reg)(void __iomem *reg, unsigned long data);
34
35 void __iomem *reg_dat;
36 void __iomem *reg_set;
37 void __iomem *reg_clr;
38 void __iomem *reg_dir;
39
40 /* Number of bits (GPIOs): <register width> * 8. */
41 int bits;
42
43 /*
44 * Some GPIO controllers work with the big-endian bits notation,
45 * e.g. in a 8-bits register, GPIO7 is the least significant bit.
46 */
47 unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
48
49 /*
50 * Used to lock bgpio_chip->data. Also, this is needed to keep
51 * shadowed and real data registers writes together.
52 */
53 spinlock_t lock;
54
55 /* Shadowed data register to clear/set bits safely. */
56 unsigned long data;
57
58 /* Shadowed direction registers to clear/set direction safely. */
59 unsigned long dir;
60};
61
62static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
63{
64 return container_of(gc, struct bgpio_chip, gc);
65}
66
67int bgpio_remove(struct bgpio_chip *bgc);
68int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
69 unsigned long sz, void __iomem *dat, void __iomem *set,
70 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
71 unsigned long flags);
72
73#define BGPIOF_BIG_ENDIAN BIT(0)
74#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
75#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
76#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
77#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
78#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
79
80#endif /* __BASIC_MMIO_GPIO_H */
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index b833a5f9629a..e2d05fd0e6e3 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -8,6 +8,7 @@
8#include <linux/irqdomain.h> 8#include <linux/irqdomain.h>
9#include <linux/lockdep.h> 9#include <linux/lockdep.h>
10#include <linux/pinctrl/pinctrl.h> 10#include <linux/pinctrl/pinctrl.h>
11#include <linux/kconfig.h>
11 12
12struct device; 13struct device;
13struct gpio_desc; 14struct gpio_desc;
@@ -65,6 +66,23 @@ struct seq_file;
65 * registers. 66 * registers.
66 * @irq_not_threaded: flag must be set if @can_sleep is set but the 67 * @irq_not_threaded: flag must be set if @can_sleep is set but the
67 * IRQs don't need to be threaded 68 * IRQs don't need to be threaded
69 * @read_reg: reader function for generic GPIO
70 * @write_reg: writer function for generic GPIO
71 * @pin2mask: some generic GPIO controllers work with the big-endian bits
72 * notation, e.g. in a 8-bits register, GPIO7 is the least significant
73 * bit. This callback assigns the right bit mask.
74 * @reg_dat: data (in) register for generic GPIO
75 * @reg_set: output set register (out=high) for generic GPIO
76 * @reg_clk: output clear register (out=low) for generic GPIO
77 * @reg_dir: direction setting register for generic GPIO
78 * @bgpio_bits: number of register bits used for a generic GPIO i.e.
79 * <register width> * 8
80 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
81 * shadowed and real data registers writes together.
82 * @bgpio_data: shadowed data register for generic GPIO to clear/set bits
83 * safely.
84 * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
85 * direction safely.
68 * @irqchip: GPIO IRQ chip impl, provided by GPIO driver 86 * @irqchip: GPIO IRQ chip impl, provided by GPIO driver
69 * @irqdomain: Interrupt translation domain; responsible for mapping 87 * @irqdomain: Interrupt translation domain; responsible for mapping
70 * between GPIO hwirq number and linux irq number 88 * between GPIO hwirq number and linux irq number
@@ -128,6 +146,20 @@ struct gpio_chip {
128 bool can_sleep; 146 bool can_sleep;
129 bool irq_not_threaded; 147 bool irq_not_threaded;
130 148
149#if IS_ENABLED(CONFIG_GPIO_GENERIC)
150 unsigned long (*read_reg)(void __iomem *reg);
151 void (*write_reg)(void __iomem *reg, unsigned long data);
152 unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
153 void __iomem *reg_dat;
154 void __iomem *reg_set;
155 void __iomem *reg_clr;
156 void __iomem *reg_dir;
157 int bgpio_bits;
158 spinlock_t bgpio_lock;
159 unsigned long bgpio_data;
160 unsigned long bgpio_dir;
161#endif
162
131#ifdef CONFIG_GPIOLIB_IRQCHIP 163#ifdef CONFIG_GPIOLIB_IRQCHIP
132 /* 164 /*
133 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib 165 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
@@ -188,6 +220,28 @@ static inline void *gpiochip_get_data(struct gpio_chip *chip)
188 220
189struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); 221struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
190 222
223#if IS_ENABLED(CONFIG_GPIO_GENERIC)
224
225struct bgpio_pdata {
226 const char *label;
227 int base;
228 int ngpio;
229};
230
231int bgpio_init(struct gpio_chip *gc, struct device *dev,
232 unsigned long sz, void __iomem *dat, void __iomem *set,
233 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
234 unsigned long flags);
235
236#define BGPIOF_BIG_ENDIAN BIT(0)
237#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
238#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
239#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
240#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
241#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
242
243#endif
244
191#ifdef CONFIG_GPIOLIB_IRQCHIP 245#ifdef CONFIG_GPIOLIB_IRQCHIP
192 246
193void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 247void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-10 20:18:58 -0400