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authorOlof Johansson <olof@lixom.net>2016-07-06 01:22:58 -0400
committerOlof Johansson <olof@lixom.net>2016-07-06 01:22:58 -0400
commitdf92d2e39313d0af510cacef27e82be6a002b889 (patch)
tree8eae9f5680e114ec79d751331c7605e0a172323e
parentfa06f54a1837428e1b67ca3947fa939b7227c668 (diff)
parent44e7475d40eb26b8d3a6e2b2f7a5f12a5fe0942e (diff)
Merge tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v4.8 merge window: - A series of DSS platform_data fixes to prepare for DSS driver changes - Add tblck clck aliases for PWM - A series of trivial spelling corrections - Remove bogus eQEP, ePWM and eCAP hwmod entries - A series of McBSP sidetone fixes - Remove QSPI and DSS addresses from hwmod, these come from dts - Fix RSTST register offset for pruss - Make ti81xx_rtc_hwmod static - Remove wrongly defined RSTST offset for PER Domain, note that the subject for this one wrongly has "dts" in the subject - Add support for omap5 and dra7 workaround for 801819 - A series of patches to make kexec work for SMP omaps * tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (30 commits) ARM: OMAP2+: Fix build if CONFIG_SMP is not set ARM: OMAP4+: Allow kexec on SMP variants ARM: OMAP4+: Reset CPU1 properly for kexec ARM: OMAP4+: Prevent CPU1 related hang with kexec ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec ARM: dts: am43xx: Remove wrongly defined RSTST offset for PER Domain ARM: OMAP: make ti81xx_rtc_hwmod static ARM: AM43XX: hwmod: Fix RSTST register offset for pruss ARM: DRA7: hwmod: remove DSS addresses from hwmod ARM: DRA7: hwmod: Remove QSPI address space entry from hwmod ARM: OMAP2+: McBSP: Remove the old iclk allow/deny idle code ASoC: omap-mcbsp: sidetone: Use the new callback for iclk handling ASoC: omap-mcbsp: Rename omap_mcbsp_sysfs_remove() to omap_mcbsp_cleanup() ARM: OMAP3: pdata-quirks: Add support for McBSP2/3 sidetone handling ARM: OMAP3: McBSP: New callback for McBSP2/3 ICLK idle configuration ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries ARM: OMAP2+: Fix typo in sdrc.h ARM: OMAP2+: Fix typo in omap_device.c ARM: OMAP2+: Fix typo in omap4-common.c ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c2
-rw-r--r--arch/arm/mach-omap1/include/mach/mtd-xip.h2
-rw-r--r--arch/arm/mach-omap2/Kconfig8
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-rx51-video.c4
-rw-r--r--arch/arm/mach-omap2/cm3xxx.c2
-rw-r--r--arch/arm/mach-omap2/common.h8
-rw-r--r--arch/arm/mach-omap2/display.c2
-rw-r--r--arch/arm/mach-omap2/display.h5
-rw-r--r--arch/arm/mach-omap2/dss-common.c2
-rw-r--r--arch/arm/mach-omap2/io.c3
-rw-r--r--arch/arm/mach-omap2/mcbsp.c31
-rw-r--r--arch/arm/mach-omap2/mux34xx.c4
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S18
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c6
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c29
-rw-r--r--arch/arm/mach-omap2/omap-secure.h1
-rw-r--r--arch/arm/mach-omap2/omap-smp.c140
-rw-r--r--arch/arm/mach-omap2/omap4-common.c16
-rw-r--r--arch/arm/mach-omap2/omap_device.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c64
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c85
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c24
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_43xx_data.c54
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c41
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_81xx_data.c2
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c18
-rw-r--r--arch/arm/mach-omap2/prcm43xx.h1
-rw-r--r--arch/arm/mach-omap2/prm33xx.h2
-rw-r--r--arch/arm/mach-omap2/sdrc.h4
-rw-r--r--drivers/clk/ti/clk-33xx.c3
-rw-r--r--drivers/clk/ti/clk-43xx.c6
-rw-r--r--include/linux/platform_data/asoc-ti-mcbsp.h4
-rw-r--r--include/linux/platform_data/omapdss.h42
-rw-r--r--include/video/omapdss.h31
-rw-r--r--sound/soc/omap/mcbsp.c21
-rw-r--r--sound/soc/omap/mcbsp.h3
-rw-r--r--sound/soc/omap/omap-mcbsp.c5
41 files changed, 320 insertions, 409 deletions
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index d1f12095f315..acd6bf019c87 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -136,7 +136,7 @@ void __init ams_delta_init_fiq(void)
136 fiq_buffer[i] = 0; 136 fiq_buffer[i] = 0;
137 137
138 /* 138 /*
139 * FIQ mode r9 always points to the fiq_buffer, becauses the FIQ isr 139 * FIQ mode r9 always points to the fiq_buffer, because the FIQ isr
140 * will run in an unpredictable context. The fiq_buffer is the FIQ isr's 140 * will run in an unpredictable context. The fiq_buffer is the FIQ isr's
141 * only means of communication with the IRQ level and other kernel 141 * only means of communication with the IRQ level and other kernel
142 * context code. 142 * context code.
diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/include/mach/mtd-xip.h
index f82a8dcaad94..d09b2bc4920f 100644
--- a/arch/arm/mach-omap1/include/mach/mtd-xip.h
+++ b/arch/arm/mach-omap1/include/mach/mtd-xip.h
@@ -39,7 +39,7 @@ static inline unsigned long xip_omap_mpu_timer_read(int nr)
39#define xip_currtime() (~xip_omap_mpu_timer_read(0)) 39#define xip_currtime() (~xip_omap_mpu_timer_read(0))
40 40
41/* 41/*
42 * It's permitted to do approxmation for xip_elapsed_since macro 42 * It's permitted to do approximation for xip_elapsed_since macro
43 * (see linux/mtd/xip.h) 43 * (see linux/mtd/xip.h)
44 */ 44 */
45 45
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 0517f0c1581a..a63d3fe2ca46 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -240,4 +240,12 @@ endmenu
240 240
241endif 241endif
242 242
243config OMAP5_ERRATA_801819
244 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
245 depends on SOC_OMAP5 || SOC_DRA7XX
246 help
247 A livelock can occur in the L2 cache arbitration that might prevent
248 a snoop from completing. Under certain conditions this can cause the
249 system to deadlock.
250
243endmenu 251endmenu
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 04e276ce8413..cd820f5df028 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
8# Common support 8# Common support
9obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \ 9obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ 10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
11 omap_device.o sram.o drm.o 11 omap_device.o omap-headsmp.o sram.o drm.o
12 12
13hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ 13hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
14 omap_hwmod_common_data.o 14 omap_hwmod_common_data.o
@@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o
32 32
33# SMP support ONLY available for OMAP4 33# SMP support ONLY available for OMAP4
34 34
35smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o 35smp-$(CONFIG_SMP) += omap-smp.o
36smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 36smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
37omap-4-5-common = omap4-common.o omap-wakeupgen.o 37omap-4-5-common = omap4-common.o omap-wakeupgen.o
38obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o 38obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d9c3ffc39329..390795b334c3 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -39,7 +39,7 @@
39#include "gpmc.h" 39#include "gpmc.h"
40#include "gpmc-smsc911x.h" 40#include "gpmc-smsc911x.h"
41 41
42#include <video/omapdss.h> 42#include <linux/platform_data/omapdss.h>
43#include <video/omap-panel-data.h> 43#include <video/omap-panel-data.h>
44 44
45#include "board-flash.h" 45#include "board-flash.h"
@@ -47,6 +47,7 @@
47#include "hsmmc.h" 47#include "hsmmc.h"
48#include "control.h" 48#include "control.h"
49#include "common-board-devices.h" 49#include "common-board-devices.h"
50#include "display.h"
50 51
51#define LDP_SMSC911X_CS 1 52#define LDP_SMSC911X_CS 1
52#define LDP_SMSC911X_GPIO 152 53#define LDP_SMSC911X_GPIO 152
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index 9cfebc5c7455..180c6aa633bd 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -15,13 +15,14 @@
15#include <linux/spi/spi.h> 15#include <linux/spi/spi.h>
16#include <linux/mm.h> 16#include <linux/mm.h>
17#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <video/omapdss.h> 18#include <linux/platform_data/omapdss.h>
19#include <video/omap-panel-data.h> 19#include <video/omap-panel-data.h>
20 20
21#include <linux/platform_data/spi-omap2-mcspi.h> 21#include <linux/platform_data/spi-omap2-mcspi.h>
22 22
23#include "soc.h" 23#include "soc.h"
24#include "board-rx51.h" 24#include "board-rx51.h"
25#include "display.h"
25 26
26#include "mux.h" 27#include "mux.h"
27 28
@@ -32,7 +33,6 @@
32static struct connector_atv_platform_data rx51_tv_pdata = { 33static struct connector_atv_platform_data rx51_tv_pdata = {
33 .name = "tv", 34 .name = "tv",
34 .source = "venc.0", 35 .source = "venc.0",
35 .connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE,
36 .invert_polarity = false, 36 .invert_polarity = false,
37}; 37};
38 38
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 187fa4386718..d91ae8206d1e 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -649,7 +649,7 @@ void omap3_cm_save_scratchpad_contents(u32 *ptr)
649 /* 649 /*
650 * As per erratum i671, ROM code does not respect the PER DPLL 650 * As per erratum i671, ROM code does not respect the PER DPLL
651 * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1. 651 * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.
652 * Then, in anycase, clear these bits to avoid extra latencies. 652 * Then, in any case, clear these bits to avoid extra latencies.
653 */ 653 */
654 *ptr++ = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) & 654 *ptr++ = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &
655 ~OMAP3430_AUTO_PERIPH_DPLL_MASK; 655 ~OMAP3430_AUTO_PERIPH_DPLL_MASK;
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index f7666b9f3b21..deed42e1dd9c 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -257,18 +257,22 @@ extern void gic_dist_enable(void);
257extern bool gic_dist_disabled(void); 257extern bool gic_dist_disabled(void);
258extern void gic_timer_retrigger(void); 258extern void gic_timer_retrigger(void);
259extern void omap_smc1(u32 fn, u32 arg); 259extern void omap_smc1(u32 fn, u32 arg);
260extern void omap4_sar_ram_init(void);
260extern void __iomem *omap4_get_sar_ram_base(void); 261extern void __iomem *omap4_get_sar_ram_base(void);
262extern void omap4_mpuss_early_init(void);
261extern void omap_do_wfi(void); 263extern void omap_do_wfi(void);
262 264
263#ifdef CONFIG_SMP
264/* Needed for secondary core boot */
265extern void omap4_secondary_startup(void); 265extern void omap4_secondary_startup(void);
266extern void omap4460_secondary_startup(void); 266extern void omap4460_secondary_startup(void);
267
268#ifdef CONFIG_SMP
269/* Needed for secondary core boot */
267extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 270extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
268extern void omap_auxcoreboot_addr(u32 cpu_addr); 271extern void omap_auxcoreboot_addr(u32 cpu_addr);
269extern u32 omap_read_auxcoreboot0(void); 272extern u32 omap_read_auxcoreboot0(void);
270 273
271extern void omap4_cpu_die(unsigned int cpu); 274extern void omap4_cpu_die(unsigned int cpu);
275extern int omap4_cpu_kill(unsigned int cpu);
272 276
273extern const struct smp_operations omap4_smp_ops; 277extern const struct smp_operations omap4_smp_ops;
274 278
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 6ab13d18c636..70b3eaf085e4 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -29,7 +29,7 @@
29#include <linux/mfd/syscon.h> 29#include <linux/mfd/syscon.h>
30#include <linux/regmap.h> 30#include <linux/regmap.h>
31 31
32#include <video/omapdss.h> 32#include <linux/platform_data/omapdss.h>
33#include "omap_hwmod.h" 33#include "omap_hwmod.h"
34#include "omap_device.h" 34#include "omap_device.h"
35#include "omap-pm.h" 35#include "omap-pm.h"
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
index 7375854b16c7..78f253005279 100644
--- a/arch/arm/mach-omap2/display.h
+++ b/arch/arm/mach-omap2/display.h
@@ -33,4 +33,9 @@ int omap_init_vout(void);
33 33
34struct device_node * __init omapdss_find_dss_of_node(void); 34struct device_node * __init omapdss_find_dss_of_node(void);
35 35
36struct omap_dss_board_info;
37
38/* Init with the board info */
39int omap_display_init(struct omap_dss_board_info *board_data);
40
36#endif 41#endif
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index ea2be0f5953b..1d583bc0b1a9 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -27,7 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29 29
30#include <video/omapdss.h> 30#include <linux/platform_data/omapdss.h>
31#include <video/omap-panel-data.h> 31#include <video/omap-panel-data.h>
32 32
33#include "soc.h" 33#include "soc.h"
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 49de4dd227be..0e9acdd95d70 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -690,6 +690,8 @@ void __init omap4430_init_early(void)
690 omap4xxx_check_revision(); 690 omap4xxx_check_revision();
691 omap4xxx_check_features(); 691 omap4xxx_check_features();
692 omap2_prcm_base_init(); 692 omap2_prcm_base_init();
693 omap4_sar_ram_init();
694 omap4_mpuss_early_init();
693 omap4_pm_init_early(); 695 omap4_pm_init_early();
694 omap44xx_voltagedomains_init(); 696 omap44xx_voltagedomains_init();
695 omap44xx_powerdomains_init(); 697 omap44xx_powerdomains_init();
@@ -718,6 +720,7 @@ void __init omap5_init_early(void)
718 omap4_pm_init_early(); 720 omap4_pm_init_early();
719 omap2_prcm_base_init(); 721 omap2_prcm_base_init();
720 omap5xxx_check_revision(); 722 omap5xxx_check_revision();
723 omap4_sar_ram_init();
721 omap54xx_voltagedomains_init(); 724 omap54xx_voltagedomains_init();
722 omap54xx_powerdomains_init(); 725 omap54xx_powerdomains_init();
723 omap54xx_clockdomains_init(); 726 omap54xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b4ac3af1160c..fc04be74e064 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -34,18 +34,24 @@
34#include "cm3xxx.h" 34#include "cm3xxx.h"
35#include "cm-regbits-34xx.h" 35#include "cm-regbits-34xx.h"
36 36
37static struct clk *mcbsp_iclks[5]; 37static int omap3_mcbsp_force_ick_on(struct clk *clk, bool force_on)
38
39static int omap3_enable_st_clock(unsigned int id, bool enable)
40{ 38{
41 /* 39 if (!clk)
42 * Sidetone uses McBSP ICLK - which must not idle when sidetones 40 return 0;
43 * are enabled or sidetones start sounding ugly. 41
44 */ 42 if (force_on)
45 if (enable) 43 return omap2_clk_deny_idle(clk);
46 return omap2_clk_deny_idle(mcbsp_iclks[id]);
47 else 44 else
48 return omap2_clk_allow_idle(mcbsp_iclks[id]); 45 return omap2_clk_allow_idle(clk);
46}
47
48void __init omap3_mcbsp_init_pdata_callback(
49 struct omap_mcbsp_platform_data *pdata)
50{
51 if (!pdata)
52 return;
53
54 pdata->force_ick_on = omap3_mcbsp_force_ick_on;
49} 55}
50 56
51static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) 57static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
@@ -55,7 +61,6 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
55 struct omap_hwmod *oh_device[2]; 61 struct omap_hwmod *oh_device[2];
56 struct omap_mcbsp_platform_data *pdata = NULL; 62 struct omap_mcbsp_platform_data *pdata = NULL;
57 struct platform_device *pdev; 63 struct platform_device *pdev;
58 char clk_name[11];
59 64
60 sscanf(oh->name, "mcbsp%d", &id); 65 sscanf(oh->name, "mcbsp%d", &id);
61 66
@@ -96,9 +101,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
96 if (oh->dev_attr) { 101 if (oh->dev_attr) {
97 oh_device[1] = omap_hwmod_lookup(( 102 oh_device[1] = omap_hwmod_lookup((
98 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); 103 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
99 pdata->enable_st_clock = omap3_enable_st_clock; 104 pdata->force_ick_on = omap3_mcbsp_force_ick_on;
100 sprintf(clk_name, "mcbsp%d_ick", id);
101 mcbsp_iclks[id] = clk_get(NULL, clk_name);
102 count++; 105 count++;
103 } 106 }
104 pdev = omap_device_build_ss(name, id, oh_device, count, pdata, 107 pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index be271f1d585b..393e687f99e2 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -1266,7 +1266,7 @@ static struct omap_ball __initdata omap3_cus_ball[] = {
1266#endif 1266#endif
1267 1267
1268/* 1268/*
1269 * Signals different on CBB package comapared to superset 1269 * Signals different on CBB package compared to superset
1270 */ 1270 */
1271#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBB) 1271#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBB)
1272static struct omap_mux __initdata omap3_cbb_subset[] = { 1272static struct omap_mux __initdata omap3_cbb_subset[] = {
@@ -1597,7 +1597,7 @@ static struct omap_ball __initdata omap3_cbb_ball[] = {
1597#endif 1597#endif
1598 1598
1599/* 1599/*
1600 * Signals different on 36XX CBP package comapared to 34XX CBC package 1600 * Signals different on 36XX CBP package compared to 34XX CBC package
1601 */ 1601 */
1602#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP) 1602#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP)
1603static struct omap_mux __initdata omap36xx_cbp_subset[] = { 1603static struct omap_mux __initdata omap36xx_cbp_subset[] = {
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 6d1dffca6c7b..fe36ce2734d4 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -24,6 +24,16 @@
24#define AUX_CORE_BOOT0_PA 0x48281800 24#define AUX_CORE_BOOT0_PA 0x48281800
25#define API_HYP_ENTRY 0x102 25#define API_HYP_ENTRY 0x102
26 26
27ENTRY(omap_secondary_startup)
28#ifdef CONFIG_SMP
29 b secondary_startup
30#else
31/* Should never get here */
32again: wfi
33 b again
34#endif
35#ENDPROC(omap_secondary_startup)
36
27/* 37/*
28 * OMAP5 specific entry point for secondary CPU to jump from ROM 38 * OMAP5 specific entry point for secondary CPU to jump from ROM
29 * code. This routine also provides a holding flag into which 39 * code. This routine also provides a holding flag into which
@@ -39,7 +49,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
39 and r4, r4, #0x0f 49 and r4, r4, #0x0f
40 cmp r0, r4 50 cmp r0, r4
41 bne wait 51 bne wait
42 b secondary_startup 52 b omap_secondary_startup
43ENDPROC(omap5_secondary_startup) 53ENDPROC(omap5_secondary_startup)
44/* 54/*
45 * Same as omap5_secondary_startup except we call into the ROM to 55 * Same as omap5_secondary_startup except we call into the ROM to
@@ -59,7 +69,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
59 adr r0, hyp_boot 69 adr r0, hyp_boot
60 smc #0 70 smc #0
61hyp_boot: 71hyp_boot:
62 b secondary_startup 72 b omap_secondary_startup
63ENDPROC(omap5_secondary_hyp_startup) 73ENDPROC(omap5_secondary_hyp_startup)
64/* 74/*
65 * OMAP4 specific entry point for secondary CPU to jump from ROM 75 * OMAP4 specific entry point for secondary CPU to jump from ROM
@@ -82,7 +92,7 @@ hold: ldr r12,=0x103
82 * we've been released from the wait loop,secondary_stack 92 * we've been released from the wait loop,secondary_stack
83 * should now contain the SVC stack for this core 93 * should now contain the SVC stack for this core
84 */ 94 */
85 b secondary_startup 95 b omap_secondary_startup
86ENDPROC(omap4_secondary_startup) 96ENDPROC(omap4_secondary_startup)
87 97
88ENTRY(omap4460_secondary_startup) 98ENTRY(omap4460_secondary_startup)
@@ -119,5 +129,5 @@ hold_2: ldr r12,=0x103
119 * we've been released from the wait loop,secondary_stack 129 * we've been released from the wait loop,secondary_stack
120 * should now contain the SVC stack for this core 130 * should now contain the SVC stack for this core
121 */ 131 */
122 b secondary_startup 132 b omap_secondary_startup
123ENDPROC(omap4460_secondary_startup) 133ENDPROC(omap4460_secondary_startup)
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 593fec753b28..d3fb5661bb5d 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -64,3 +64,9 @@ void omap4_cpu_die(unsigned int cpu)
64 pr_debug("CPU%u: spurious wakeup call\n", cpu); 64 pr_debug("CPU%u: spurious wakeup call\n", cpu);
65 } 65 }
66} 66}
67
68/* Needed by kexec and platform_can_cpu_hotplug() */
69int omap4_cpu_kill(unsigned int cpu)
70{
71 return 1;
72}
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 65024af169d3..17515179e6ae 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -62,6 +62,8 @@
62#include "prm44xx.h" 62#include "prm44xx.h"
63#include "prm-regbits-44xx.h" 63#include "prm-regbits-44xx.h"
64 64
65static void __iomem *sar_base;
66
65#ifdef CONFIG_SMP 67#ifdef CONFIG_SMP
66 68
67struct omap4_cpu_pm_info { 69struct omap4_cpu_pm_info {
@@ -90,7 +92,6 @@ struct cpu_pm_ops {
90 92
91static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info); 93static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
92static struct powerdomain *mpuss_pd; 94static struct powerdomain *mpuss_pd;
93static void __iomem *sar_base;
94static u32 cpu_context_offset; 95static u32 cpu_context_offset;
95 96
96static int default_finish_suspend(unsigned long cpu_state) 97static int default_finish_suspend(unsigned long cpu_state)
@@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void)
366 return -ENODEV; 367 return -ENODEV;
367 } 368 }
368 369
369 if (cpu_is_omap44xx())
370 sar_base = omap4_get_sar_ram_base();
371
372 /* Initilaise per CPU PM information */ 370 /* Initilaise per CPU PM information */
373 pm_info = &per_cpu(omap4_pm_info, 0x0); 371 pm_info = &per_cpu(omap4_pm_info, 0x0);
374 if (sar_base) { 372 if (sar_base) {
@@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void)
444} 442}
445 443
446#endif 444#endif
445
446/*
447 * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
448 * current kernel's secondary_startup() early before
449 * clockdomains_init(). Otherwise clockdomain_init() can
450 * wake CPU1 and cause a hang.
451 */
452void __init omap4_mpuss_early_init(void)
453{
454 unsigned long startup_pa;
455
456 if (!cpu_is_omap44xx())
457 return;
458
459 sar_base = omap4_get_sar_ram_base();
460
461 if (cpu_is_omap443x())
462 startup_pa = virt_to_phys(omap4_secondary_startup);
463 else
464 startup_pa = virt_to_phys(omap4460_secondary_startup);
465
466 writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
467}
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index af2851fbcdf0..bae263fba640 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -46,6 +46,7 @@
46 46
47#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109 47#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
48#define OMAP5_MON_AMBA_IF_INDEX 0x108 48#define OMAP5_MON_AMBA_IF_INDEX 0x108
49#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
49 50
50/* Secure PPA(Primary Protected Application) APIs */ 51/* Secure PPA(Primary Protected Application) APIs */
51#define OMAP4_PPA_L2_POR_INDEX 0x23 52#define OMAP4_PPA_L2_POR_INDEX 0x23
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index c625cc10d9f9..d53a0def2d6c 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -40,16 +40,70 @@
40 40
41#define OMAP5_CORE_COUNT 0x2 41#define OMAP5_CORE_COUNT 0x2
42 42
43/* SCU base address */ 43struct omap_smp_config {
44static void __iomem *scu_base; 44 unsigned long cpu1_rstctrl_pa;
45 void __iomem *cpu1_rstctrl_va;
46 void __iomem *scu_base;
47 void *startup_addr;
48};
49
50static struct omap_smp_config cfg;
51
52static const struct omap_smp_config omap443x_cfg __initconst = {
53 .cpu1_rstctrl_pa = 0x4824380c,
54 .startup_addr = omap4_secondary_startup,
55};
56
57static const struct omap_smp_config omap446x_cfg __initconst = {
58 .cpu1_rstctrl_pa = 0x4824380c,
59 .startup_addr = omap4460_secondary_startup,
60};
61
62static const struct omap_smp_config omap5_cfg __initconst = {
63 .cpu1_rstctrl_pa = 0x48243810,
64 .startup_addr = omap5_secondary_startup,
65};
45 66
46static DEFINE_SPINLOCK(boot_lock); 67static DEFINE_SPINLOCK(boot_lock);
47 68
48void __iomem *omap4_get_scu_base(void) 69void __iomem *omap4_get_scu_base(void)
49{ 70{
50 return scu_base; 71 return cfg.scu_base;
51} 72}
52 73
74#ifdef CONFIG_OMAP5_ERRATA_801819
75void omap5_erratum_workaround_801819(void)
76{
77 u32 acr, revidr;
78 u32 acr_mask;
79
80 /* REVIDR[3] indicates erratum fix available on silicon */
81 asm volatile ("mrc p15, 0, %0, c0, c0, 6" : "=r" (revidr));
82 if (revidr & (0x1 << 3))
83 return;
84
85 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
86 /*
87 * BIT(27) - Disables streaming. All write-allocate lines allocate in
88 * the L1 or L2 cache.
89 * BIT(25) - Disables streaming. All write-allocate lines allocate in
90 * the L1 cache.
91 */
92 acr_mask = (0x3 << 25) | (0x3 << 27);
93 /* do we already have it done.. if yes, skip expensive smc */
94 if ((acr & acr_mask) == acr_mask)
95 return;
96
97 acr |= acr_mask;
98 omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr);
99
100 pr_debug("%s: ARM erratum workaround 801819 applied on CPU%d\n",
101 __func__, smp_processor_id());
102}
103#else
104static inline void omap5_erratum_workaround_801819(void) { }
105#endif
106
53static void omap4_secondary_init(unsigned int cpu) 107static void omap4_secondary_init(unsigned int cpu)
54{ 108{
55 /* 109 /*
@@ -60,16 +114,19 @@ static void omap4_secondary_init(unsigned int cpu)
60 * OMAP443X GP devices- SMP bit isn't accessible. 114 * OMAP443X GP devices- SMP bit isn't accessible.
61 * OMAP446X GP devices - SMP bit access is enabled on both CPUs. 115 * OMAP446X GP devices - SMP bit access is enabled on both CPUs.
62 */ 116 */
63 if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) 117 if (soc_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
64 omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX, 118 omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
65 4, 0, 0, 0, 0, 0); 119 4, 0, 0, 0, 0, 0);
66 120
67 /* 121 if (soc_is_omap54xx() || soc_is_dra7xx()) {
68 * Configure the CNTFRQ register for the secondary cpu's which 122 /*
69 * indicates the frequency of the cpu local timers. 123 * Configure the CNTFRQ register for the secondary cpu's which
70 */ 124 * indicates the frequency of the cpu local timers.
71 if (soc_is_omap54xx() || soc_is_dra7xx()) 125 */
72 set_cntfreq(); 126 set_cntfreq();
127 /* Configure ACR to disable streaming WA for 801819 */
128 omap5_erratum_workaround_801819();
129 }
73 130
74 /* 131 /*
75 * Synchronise with the boot thread. 132 * Synchronise with the boot thread.
@@ -186,9 +243,9 @@ static void __init omap4_smp_init_cpus(void)
186 * Currently we can't call ioremap here because 243 * Currently we can't call ioremap here because
187 * SoC detection won't work until after init_early. 244 * SoC detection won't work until after init_early.
188 */ 245 */
189 scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); 246 cfg.scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
190 BUG_ON(!scu_base); 247 BUG_ON(!cfg.scu_base);
191 ncores = scu_get_core_count(scu_base); 248 ncores = scu_get_core_count(cfg.scu_base);
192 } else if (cpu_id == CPU_CORTEX_A15) { 249 } else if (cpu_id == CPU_CORTEX_A15) {
193 ncores = OMAP5_CORE_COUNT; 250 ncores = OMAP5_CORE_COUNT;
194 } 251 }
@@ -206,18 +263,51 @@ static void __init omap4_smp_init_cpus(void)
206 263
207static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) 264static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
208{ 265{
209 void *startup_addr = omap4_secondary_startup;
210 void __iomem *base = omap_get_wakeupgen_base(); 266 void __iomem *base = omap_get_wakeupgen_base();
267 const struct omap_smp_config *c = NULL;
268
269 if (soc_is_omap443x())
270 c = &omap443x_cfg;
271 else if (soc_is_omap446x())
272 c = &omap446x_cfg;
273 else if (soc_is_dra74x() || soc_is_omap54xx())
274 c = &omap5_cfg;
275
276 if (!c) {
277 pr_err("%s Unknown SMP SoC?\n", __func__);
278 return;
279 }
280
281 /* Must preserve cfg.scu_base set earlier */
282 cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa;
283 cfg.startup_addr = c->startup_addr;
284
285 if (soc_is_dra74x() || soc_is_omap54xx()) {
286 if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
287 cfg.startup_addr = omap5_secondary_hyp_startup;
288 omap5_erratum_workaround_801819();
289 }
290
291 cfg.cpu1_rstctrl_va = ioremap(cfg.cpu1_rstctrl_pa, 4);
292 if (!cfg.cpu1_rstctrl_va)
293 return;
211 294
212 /* 295 /*
213 * Initialise the SCU and wake up the secondary core using 296 * Initialise the SCU and wake up the secondary core using
214 * wakeup_secondary(). 297 * wakeup_secondary().
215 */ 298 */
216 if (scu_base) 299 if (cfg.scu_base)
217 scu_enable(scu_base); 300 scu_enable(cfg.scu_base);
218 301
219 if (cpu_is_omap446x()) 302 /*
220 startup_addr = omap4460_secondary_startup; 303 * Reset CPU1 before configuring, otherwise kexec will
304 * end up trying to use old kernel startup address.
305 */
306 if (cfg.cpu1_rstctrl_va) {
307 writel_relaxed(1, cfg.cpu1_rstctrl_va);
308 readl_relaxed(cfg.cpu1_rstctrl_va);
309 writel_relaxed(0, cfg.cpu1_rstctrl_va);
310 }
221 311
222 /* 312 /*
223 * Write the address of secondary startup routine into the 313 * Write the address of secondary startup routine into the
@@ -226,19 +316,10 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
226 * A barrier is added to ensure that write buffer is drained 316 * A barrier is added to ensure that write buffer is drained
227 */ 317 */
228 if (omap_secure_apis_support()) 318 if (omap_secure_apis_support())
229 omap_auxcoreboot_addr(virt_to_phys(startup_addr)); 319 omap_auxcoreboot_addr(virt_to_phys(cfg.startup_addr));
230 else 320 else
231 /* 321 writel_relaxed(virt_to_phys(cfg.startup_addr),
232 * If the boot CPU is in HYP mode then start secondary 322 base + OMAP_AUX_CORE_BOOT_1);
233 * CPU in HYP mode as well.
234 */
235 if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
236 writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup),
237 base + OMAP_AUX_CORE_BOOT_1);
238 else
239 writel_relaxed(virt_to_phys(omap5_secondary_startup),
240 base + OMAP_AUX_CORE_BOOT_1);
241
242} 323}
243 324
244const struct smp_operations omap4_smp_ops __initconst = { 325const struct smp_operations omap4_smp_ops __initconst = {
@@ -248,5 +329,6 @@ const struct smp_operations omap4_smp_ops __initconst = {
248 .smp_boot_secondary = omap4_boot_secondary, 329 .smp_boot_secondary = omap4_boot_secondary,
249#ifdef CONFIG_HOTPLUG_CPU 330#ifdef CONFIG_HOTPLUG_CPU
250 .cpu_die = omap4_cpu_die, 331 .cpu_die = omap4_cpu_die,
332 .cpu_kill = omap4_cpu_kill,
251#endif 333#endif
252}; 334};
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 949696b6f17b..cf65ab8bb004 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -61,7 +61,7 @@ static phys_addr_t dram_sync_paddr;
61static u32 dram_sync_size; 61static u32 dram_sync_size;
62 62
63/* 63/*
64 * The OMAP4 bus structure contains asynchrnous bridges which can buffer 64 * The OMAP4 bus structure contains asynchronous bridges which can buffer
65 * data writes from the MPU. These asynchronous bridges can be found on 65 * data writes from the MPU. These asynchronous bridges can be found on
66 * paths between the MPU to EMIF, and the MPU to L3 interconnects. 66 * paths between the MPU to EMIF, and the MPU to L3 interconnects.
67 * 67 *
@@ -266,10 +266,11 @@ void __iomem *omap4_get_sar_ram_base(void)
266} 266}
267 267
268/* 268/*
269 * SAR RAM used to save and restore the HW 269 * SAR RAM used to save and restore the HW context in low power modes.
270 * context in low power modes 270 * Note that we need to initialize this very early for kexec. See
271 * omap4_mpuss_early_init().
271 */ 272 */
272static int __init omap4_sar_ram_init(void) 273void __init omap4_sar_ram_init(void)
273{ 274{
274 unsigned long sar_base; 275 unsigned long sar_base;
275 276
@@ -282,16 +283,13 @@ static int __init omap4_sar_ram_init(void)
282 else if (soc_is_omap54xx()) 283 else if (soc_is_omap54xx())
283 sar_base = OMAP54XX_SAR_RAM_BASE; 284 sar_base = OMAP54XX_SAR_RAM_BASE;
284 else 285 else
285 return -ENOMEM; 286 return;
286 287
287 /* Static mapping, never released */ 288 /* Static mapping, never released */
288 sar_ram_base = ioremap(sar_base, SZ_16K); 289 sar_ram_base = ioremap(sar_base, SZ_16K);
289 if (WARN_ON(!sar_ram_base)) 290 if (WARN_ON(!sar_ram_base))
290 return -ENOMEM; 291 return;
291
292 return 0;
293} 292}
294omap_early_initcall(omap4_sar_ram_init);
295 293
296static const struct of_device_id intc_match[] = { 294static const struct of_device_id intc_match[] = {
297 { .compatible = "ti,omap4-wugen-mpu", }, 295 { .compatible = "ti,omap4-wugen-mpu", },
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index f7ff3b9dad87..a7be05d83ec7 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -268,7 +268,7 @@ static int _omap_device_idle_hwmods(struct omap_device *od)
268 * function returns a value different than the value the caller got 268 * function returns a value different than the value the caller got
269 * the last time it called this function. 269 * the last time it called this function.
270 * 270 *
271 * If any hwmods exist for the omap_device assoiated with @pdev, 271 * If any hwmods exist for the omap_device associated with @pdev,
272 * return the context loss counter for that hwmod, otherwise return 272 * return the context loss counter for that hwmod, otherwise return
273 * zero. 273 * zero.
274 */ 274 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
index 7f737965f543..d3e61d1a02d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
@@ -36,17 +36,8 @@ extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio3;
36extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio; 36extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio;
37extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm; 37extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm;
38extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0; 38extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0;
39extern struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0;
40extern struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0;
41extern struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0;
42extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1; 39extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1;
43extern struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1;
44extern struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1;
45extern struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1;
46extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2; 40extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2;
47extern struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2;
48extern struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2;
49extern struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2;
50extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc; 41extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc;
51extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c2; 42extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c2;
52extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c3; 43extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c3;
@@ -98,17 +89,8 @@ extern struct omap_hwmod am33xx_dcan0_hwmod;
98extern struct omap_hwmod am33xx_dcan1_hwmod; 89extern struct omap_hwmod am33xx_dcan1_hwmod;
99extern struct omap_hwmod am33xx_elm_hwmod; 90extern struct omap_hwmod am33xx_elm_hwmod;
100extern struct omap_hwmod am33xx_epwmss0_hwmod; 91extern struct omap_hwmod am33xx_epwmss0_hwmod;
101extern struct omap_hwmod am33xx_ecap0_hwmod;
102extern struct omap_hwmod am33xx_eqep0_hwmod;
103extern struct omap_hwmod am33xx_ehrpwm0_hwmod;
104extern struct omap_hwmod am33xx_epwmss1_hwmod; 92extern struct omap_hwmod am33xx_epwmss1_hwmod;
105extern struct omap_hwmod am33xx_ecap1_hwmod;
106extern struct omap_hwmod am33xx_eqep1_hwmod;
107extern struct omap_hwmod am33xx_ehrpwm1_hwmod;
108extern struct omap_hwmod am33xx_epwmss2_hwmod; 93extern struct omap_hwmod am33xx_epwmss2_hwmod;
109extern struct omap_hwmod am33xx_ecap2_hwmod;
110extern struct omap_hwmod am33xx_eqep2_hwmod;
111extern struct omap_hwmod am33xx_ehrpwm2_hwmod;
112extern struct omap_hwmod am33xx_gpio1_hwmod; 94extern struct omap_hwmod am33xx_gpio1_hwmod;
113extern struct omap_hwmod am33xx_gpio2_hwmod; 95extern struct omap_hwmod am33xx_gpio2_hwmod;
114extern struct omap_hwmod am33xx_gpio3_hwmod; 96extern struct omap_hwmod am33xx_gpio3_hwmod;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
index 1c210cb2b8c1..10dff2f0086a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
@@ -176,28 +176,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
176 .user = OCP_USER_MPU, 176 .user = OCP_USER_MPU,
177}; 177};
178 178
179struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = {
180 .master = &am33xx_epwmss0_hwmod,
181 .slave = &am33xx_ecap0_hwmod,
182 .clk = "l4ls_gclk",
183 .user = OCP_USER_MPU,
184};
185
186struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0 = {
187 .master = &am33xx_epwmss0_hwmod,
188 .slave = &am33xx_eqep0_hwmod,
189 .clk = "l4ls_gclk",
190 .user = OCP_USER_MPU,
191};
192
193struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0 = {
194 .master = &am33xx_epwmss0_hwmod,
195 .slave = &am33xx_ehrpwm0_hwmod,
196 .clk = "l4ls_gclk",
197 .user = OCP_USER_MPU,
198};
199
200
201static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = { 179static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = {
202 { 180 {
203 .pa_start = 0x48302000, 181 .pa_start = 0x48302000,
@@ -215,27 +193,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
215 .user = OCP_USER_MPU, 193 .user = OCP_USER_MPU,
216}; 194};
217 195
218struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1 = {
219 .master = &am33xx_epwmss1_hwmod,
220 .slave = &am33xx_ecap1_hwmod,
221 .clk = "l4ls_gclk",
222 .user = OCP_USER_MPU,
223};
224
225struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1 = {
226 .master = &am33xx_epwmss1_hwmod,
227 .slave = &am33xx_eqep1_hwmod,
228 .clk = "l4ls_gclk",
229 .user = OCP_USER_MPU,
230};
231
232struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1 = {
233 .master = &am33xx_epwmss1_hwmod,
234 .slave = &am33xx_ehrpwm1_hwmod,
235 .clk = "l4ls_gclk",
236 .user = OCP_USER_MPU,
237};
238
239static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = { 196static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = {
240 { 197 {
241 .pa_start = 0x48304000, 198 .pa_start = 0x48304000,
@@ -253,27 +210,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
253 .user = OCP_USER_MPU, 210 .user = OCP_USER_MPU,
254}; 211};
255 212
256struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2 = {
257 .master = &am33xx_epwmss2_hwmod,
258 .slave = &am33xx_ecap2_hwmod,
259 .clk = "l4ls_gclk",
260 .user = OCP_USER_MPU,
261};
262
263struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2 = {
264 .master = &am33xx_epwmss2_hwmod,
265 .slave = &am33xx_eqep2_hwmod,
266 .clk = "l4ls_gclk",
267 .user = OCP_USER_MPU,
268};
269
270struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2 = {
271 .master = &am33xx_epwmss2_hwmod,
272 .slave = &am33xx_ehrpwm2_hwmod,
273 .clk = "l4ls_gclk",
274 .user = OCP_USER_MPU,
275};
276
277/* l3s cfg -> gpmc */ 213/* l3s cfg -> gpmc */
278struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { 214struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
279 .master = &am33xx_l3_s_hwmod, 215 .master = &am33xx_l3_s_hwmod,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index aed33621deeb..55c5878577f4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -449,18 +449,6 @@ struct omap_hwmod_class am33xx_epwmss_hwmod_class = {
449 .sysc = &am33xx_epwmss_sysc, 449 .sysc = &am33xx_epwmss_sysc,
450}; 450};
451 451
452static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
453 .name = "ecap",
454};
455
456static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
457 .name = "eqep",
458};
459
460struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
461 .name = "ehrpwm",
462};
463
464/* epwmss0 */ 452/* epwmss0 */
465struct omap_hwmod am33xx_epwmss0_hwmod = { 453struct omap_hwmod am33xx_epwmss0_hwmod = {
466 .name = "epwmss0", 454 .name = "epwmss0",
@@ -474,30 +462,6 @@ struct omap_hwmod am33xx_epwmss0_hwmod = {
474 }, 462 },
475}; 463};
476 464
477/* ecap0 */
478struct omap_hwmod am33xx_ecap0_hwmod = {
479 .name = "ecap0",
480 .class = &am33xx_ecap_hwmod_class,
481 .clkdm_name = "l4ls_clkdm",
482 .main_clk = "l4ls_gclk",
483};
484
485/* eqep0 */
486struct omap_hwmod am33xx_eqep0_hwmod = {
487 .name = "eqep0",
488 .class = &am33xx_eqep_hwmod_class,
489 .clkdm_name = "l4ls_clkdm",
490 .main_clk = "l4ls_gclk",
491};
492
493/* ehrpwm0 */
494struct omap_hwmod am33xx_ehrpwm0_hwmod = {
495 .name = "ehrpwm0",
496 .class = &am33xx_ehrpwm_hwmod_class,
497 .clkdm_name = "l4ls_clkdm",
498 .main_clk = "l4ls_gclk",
499};
500
501/* epwmss1 */ 465/* epwmss1 */
502struct omap_hwmod am33xx_epwmss1_hwmod = { 466struct omap_hwmod am33xx_epwmss1_hwmod = {
503 .name = "epwmss1", 467 .name = "epwmss1",
@@ -511,30 +475,6 @@ struct omap_hwmod am33xx_epwmss1_hwmod = {
511 }, 475 },
512}; 476};
513 477
514/* ecap1 */
515struct omap_hwmod am33xx_ecap1_hwmod = {
516 .name = "ecap1",
517 .class = &am33xx_ecap_hwmod_class,
518 .clkdm_name = "l4ls_clkdm",
519 .main_clk = "l4ls_gclk",
520};
521
522/* eqep1 */
523struct omap_hwmod am33xx_eqep1_hwmod = {
524 .name = "eqep1",
525 .class = &am33xx_eqep_hwmod_class,
526 .clkdm_name = "l4ls_clkdm",
527 .main_clk = "l4ls_gclk",
528};
529
530/* ehrpwm1 */
531struct omap_hwmod am33xx_ehrpwm1_hwmod = {
532 .name = "ehrpwm1",
533 .class = &am33xx_ehrpwm_hwmod_class,
534 .clkdm_name = "l4ls_clkdm",
535 .main_clk = "l4ls_gclk",
536};
537
538/* epwmss2 */ 478/* epwmss2 */
539struct omap_hwmod am33xx_epwmss2_hwmod = { 479struct omap_hwmod am33xx_epwmss2_hwmod = {
540 .name = "epwmss2", 480 .name = "epwmss2",
@@ -548,30 +488,6 @@ struct omap_hwmod am33xx_epwmss2_hwmod = {
548 }, 488 },
549}; 489};
550 490
551/* ecap2 */
552struct omap_hwmod am33xx_ecap2_hwmod = {
553 .name = "ecap2",
554 .class = &am33xx_ecap_hwmod_class,
555 .clkdm_name = "l4ls_clkdm",
556 .main_clk = "l4ls_gclk",
557};
558
559/* eqep2 */
560struct omap_hwmod am33xx_eqep2_hwmod = {
561 .name = "eqep2",
562 .class = &am33xx_eqep_hwmod_class,
563 .clkdm_name = "l4ls_clkdm",
564 .main_clk = "l4ls_gclk",
565};
566
567/* ehrpwm2 */
568struct omap_hwmod am33xx_ehrpwm2_hwmod = {
569 .name = "ehrpwm2",
570 .class = &am33xx_ehrpwm_hwmod_class,
571 .clkdm_name = "l4ls_clkdm",
572 .main_clk = "l4ls_gclk",
573};
574
575/* 491/*
576 * 'gpio' class: for gpio 0,1,2,3 492 * 'gpio' class: for gpio 0,1,2,3
577 */ 493 */
@@ -1476,6 +1392,7 @@ static void omap_hwmod_am43xx_rst(void)
1476{ 1392{
1477 RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET); 1393 RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET);
1478 RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); 1394 RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET);
1395 RSTST(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTST_OFFSET);
1479 RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); 1396 RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET);
1480} 1397}
1481 1398
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index cc0791d9125b..e1c2025d6d3e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -593,17 +593,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
593 &am33xx_l4_ls__spinlock, 593 &am33xx_l4_ls__spinlock,
594 &am33xx_l4_ls__elm, 594 &am33xx_l4_ls__elm,
595 &am33xx_l4_ls__epwmss0, 595 &am33xx_l4_ls__epwmss0,
596 &am33xx_epwmss0__ecap0,
597 &am33xx_epwmss0__eqep0,
598 &am33xx_epwmss0__ehrpwm0,
599 &am33xx_l4_ls__epwmss1, 596 &am33xx_l4_ls__epwmss1,
600 &am33xx_epwmss1__ecap1,
601 &am33xx_epwmss1__eqep1,
602 &am33xx_epwmss1__ehrpwm1,
603 &am33xx_l4_ls__epwmss2, 597 &am33xx_l4_ls__epwmss2,
604 &am33xx_epwmss2__ecap2,
605 &am33xx_epwmss2__eqep2,
606 &am33xx_epwmss2__ehrpwm2,
607 &am33xx_l3_s__gpmc, 598 &am33xx_l3_s__gpmc,
608 &am33xx_l3_main__lcdc, 599 &am33xx_l3_main__lcdc,
609 &am33xx_l4_ls__mcspi0, 600 &am33xx_l4_ls__mcspi0,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 9869a75c5d96..d72ee6185d5e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1322,16 +1322,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
1322 .name = "mcbsp2_sidetone", 1322 .name = "mcbsp2_sidetone",
1323 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 1323 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
1324 .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, 1324 .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs,
1325 .main_clk = "mcbsp2_fck", 1325 .main_clk = "mcbsp2_ick",
1326 .prcm = { 1326 .flags = HWMOD_NO_IDLEST,
1327 .omap2 = {
1328 .prcm_reg_id = 1,
1329 .module_bit = OMAP3430_EN_MCBSP2_SHIFT,
1330 .module_offs = OMAP3430_PER_MOD,
1331 .idlest_reg_id = 1,
1332 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
1333 },
1334 },
1335}; 1327};
1336 1328
1337/* mcbsp3_sidetone */ 1329/* mcbsp3_sidetone */
@@ -1344,16 +1336,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
1344 .name = "mcbsp3_sidetone", 1336 .name = "mcbsp3_sidetone",
1345 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 1337 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
1346 .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, 1338 .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs,
1347 .main_clk = "mcbsp3_fck", 1339 .main_clk = "mcbsp3_ick",
1348 .prcm = { 1340 .flags = HWMOD_NO_IDLEST,
1349 .omap2 = {
1350 .prcm_reg_id = 1,
1351 .module_bit = OMAP3430_EN_MCBSP3_SHIFT,
1352 .module_offs = OMAP3430_PER_MOD,
1353 .idlest_reg_id = 1,
1354 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
1355 },
1356 },
1357}; 1341};
1358 1342
1359/* SR common */ 1343/* SR common */
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 97fd399202dc..61f2f301d739 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -202,13 +202,6 @@ static struct omap_hwmod am43xx_epwmss3_hwmod = {
202 }, 202 },
203}; 203};
204 204
205static struct omap_hwmod am43xx_ehrpwm3_hwmod = {
206 .name = "ehrpwm3",
207 .class = &am33xx_ehrpwm_hwmod_class,
208 .clkdm_name = "l4ls_clkdm",
209 .main_clk = "l4ls_gclk",
210};
211
212static struct omap_hwmod am43xx_epwmss4_hwmod = { 205static struct omap_hwmod am43xx_epwmss4_hwmod = {
213 .name = "epwmss4", 206 .name = "epwmss4",
214 .class = &am33xx_epwmss_hwmod_class, 207 .class = &am33xx_epwmss_hwmod_class,
@@ -222,13 +215,6 @@ static struct omap_hwmod am43xx_epwmss4_hwmod = {
222 }, 215 },
223}; 216};
224 217
225static struct omap_hwmod am43xx_ehrpwm4_hwmod = {
226 .name = "ehrpwm4",
227 .class = &am33xx_ehrpwm_hwmod_class,
228 .clkdm_name = "l4ls_clkdm",
229 .main_clk = "l4ls_gclk",
230};
231
232static struct omap_hwmod am43xx_epwmss5_hwmod = { 218static struct omap_hwmod am43xx_epwmss5_hwmod = {
233 .name = "epwmss5", 219 .name = "epwmss5",
234 .class = &am33xx_epwmss_hwmod_class, 220 .class = &am33xx_epwmss_hwmod_class,
@@ -242,13 +228,6 @@ static struct omap_hwmod am43xx_epwmss5_hwmod = {
242 }, 228 },
243}; 229};
244 230
245static struct omap_hwmod am43xx_ehrpwm5_hwmod = {
246 .name = "ehrpwm5",
247 .class = &am33xx_ehrpwm_hwmod_class,
248 .clkdm_name = "l4ls_clkdm",
249 .main_clk = "l4ls_gclk",
250};
251
252static struct omap_hwmod am43xx_spi2_hwmod = { 231static struct omap_hwmod am43xx_spi2_hwmod = {
253 .name = "spi2", 232 .name = "spi2",
254 .class = &am33xx_spi_hwmod_class, 233 .class = &am33xx_spi_hwmod_class,
@@ -744,13 +723,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss3 = {
744 .user = OCP_USER_MPU, 723 .user = OCP_USER_MPU,
745}; 724};
746 725
747static struct omap_hwmod_ocp_if am43xx_epwmss3__ehrpwm3 = {
748 .master = &am43xx_epwmss3_hwmod,
749 .slave = &am43xx_ehrpwm3_hwmod,
750 .clk = "l4ls_gclk",
751 .user = OCP_USER_MPU,
752};
753
754static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = { 726static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
755 .master = &am33xx_l4_ls_hwmod, 727 .master = &am33xx_l4_ls_hwmod,
756 .slave = &am43xx_epwmss4_hwmod, 728 .slave = &am43xx_epwmss4_hwmod,
@@ -758,13 +730,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
758 .user = OCP_USER_MPU, 730 .user = OCP_USER_MPU,
759}; 731};
760 732
761static struct omap_hwmod_ocp_if am43xx_epwmss4__ehrpwm4 = {
762 .master = &am43xx_epwmss4_hwmod,
763 .slave = &am43xx_ehrpwm4_hwmod,
764 .clk = "l4ls_gclk",
765 .user = OCP_USER_MPU,
766};
767
768static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = { 733static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
769 .master = &am33xx_l4_ls_hwmod, 734 .master = &am33xx_l4_ls_hwmod,
770 .slave = &am43xx_epwmss5_hwmod, 735 .slave = &am43xx_epwmss5_hwmod,
@@ -772,13 +737,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
772 .user = OCP_USER_MPU, 737 .user = OCP_USER_MPU,
773}; 738};
774 739
775static struct omap_hwmod_ocp_if am43xx_epwmss5__ehrpwm5 = {
776 .master = &am43xx_epwmss5_hwmod,
777 .slave = &am43xx_ehrpwm5_hwmod,
778 .clk = "l4ls_gclk",
779 .user = OCP_USER_MPU,
780};
781
782static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = { 740static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = {
783 .master = &am33xx_l4_ls_hwmod, 741 .master = &am33xx_l4_ls_hwmod,
784 .slave = &am43xx_spi2_hwmod, 742 .slave = &am43xx_spi2_hwmod,
@@ -919,11 +877,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
919 &am43xx_l4_ls__timer10, 877 &am43xx_l4_ls__timer10,
920 &am43xx_l4_ls__timer11, 878 &am43xx_l4_ls__timer11,
921 &am43xx_l4_ls__epwmss3, 879 &am43xx_l4_ls__epwmss3,
922 &am43xx_epwmss3__ehrpwm3,
923 &am43xx_l4_ls__epwmss4, 880 &am43xx_l4_ls__epwmss4,
924 &am43xx_epwmss4__ehrpwm4,
925 &am43xx_l4_ls__epwmss5, 881 &am43xx_l4_ls__epwmss5,
926 &am43xx_epwmss5__ehrpwm5,
927 &am43xx_l4_ls__mcspi2, 882 &am43xx_l4_ls__mcspi2,
928 &am43xx_l4_ls__mcspi3, 883 &am43xx_l4_ls__mcspi3,
929 &am43xx_l4_ls__mcspi4, 884 &am43xx_l4_ls__mcspi4,
@@ -982,17 +937,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
982 &am33xx_l4_ls__spinlock, 937 &am33xx_l4_ls__spinlock,
983 &am33xx_l4_ls__elm, 938 &am33xx_l4_ls__elm,
984 &am33xx_l4_ls__epwmss0, 939 &am33xx_l4_ls__epwmss0,
985 &am33xx_epwmss0__ecap0,
986 &am33xx_epwmss0__eqep0,
987 &am33xx_epwmss0__ehrpwm0,
988 &am33xx_l4_ls__epwmss1, 940 &am33xx_l4_ls__epwmss1,
989 &am33xx_epwmss1__ecap1,
990 &am33xx_epwmss1__eqep1,
991 &am33xx_epwmss1__ehrpwm1,
992 &am33xx_l4_ls__epwmss2, 941 &am33xx_l4_ls__epwmss2,
993 &am33xx_epwmss2__ecap2,
994 &am33xx_epwmss2__eqep2,
995 &am33xx_epwmss2__ehrpwm2,
996 &am33xx_l3_s__gpmc, 942 &am33xx_l3_s__gpmc,
997 &am33xx_l4_ls__mcspi0, 943 &am33xx_l4_ls__mcspi0,
998 &am33xx_l4_ls__mcspi1, 944 &am33xx_l4_ls__mcspi1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index d0e7e5259ec3..1ab7096af8e2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2905,58 +2905,27 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__tptc1 = {
2905 .user = OCP_USER_MPU, 2905 .user = OCP_USER_MPU,
2906}; 2906};
2907 2907
2908static struct omap_hwmod_addr_space dra7xx_dss_addrs[] = {
2909 {
2910 .name = "family",
2911 .pa_start = 0x58000000,
2912 .pa_end = 0x5800007f,
2913 .flags = ADDR_TYPE_RT
2914 },
2915};
2916
2917/* l3_main_1 -> dss */ 2908/* l3_main_1 -> dss */
2918static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dss = { 2909static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dss = {
2919 .master = &dra7xx_l3_main_1_hwmod, 2910 .master = &dra7xx_l3_main_1_hwmod,
2920 .slave = &dra7xx_dss_hwmod, 2911 .slave = &dra7xx_dss_hwmod,
2921 .clk = "l3_iclk_div", 2912 .clk = "l3_iclk_div",
2922 .addr = dra7xx_dss_addrs,
2923 .user = OCP_USER_MPU | OCP_USER_SDMA, 2913 .user = OCP_USER_MPU | OCP_USER_SDMA,
2924}; 2914};
2925 2915
2926static struct omap_hwmod_addr_space dra7xx_dss_dispc_addrs[] = {
2927 {
2928 .name = "dispc",
2929 .pa_start = 0x58001000,
2930 .pa_end = 0x58001fff,
2931 .flags = ADDR_TYPE_RT
2932 },
2933};
2934
2935/* l3_main_1 -> dispc */ 2916/* l3_main_1 -> dispc */
2936static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dispc = { 2917static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dispc = {
2937 .master = &dra7xx_l3_main_1_hwmod, 2918 .master = &dra7xx_l3_main_1_hwmod,
2938 .slave = &dra7xx_dss_dispc_hwmod, 2919 .slave = &dra7xx_dss_dispc_hwmod,
2939 .clk = "l3_iclk_div", 2920 .clk = "l3_iclk_div",
2940 .addr = dra7xx_dss_dispc_addrs,
2941 .user = OCP_USER_MPU | OCP_USER_SDMA, 2921 .user = OCP_USER_MPU | OCP_USER_SDMA,
2942}; 2922};
2943 2923
2944static struct omap_hwmod_addr_space dra7xx_dss_hdmi_addrs[] = {
2945 {
2946 .name = "hdmi_wp",
2947 .pa_start = 0x58040000,
2948 .pa_end = 0x580400ff,
2949 .flags = ADDR_TYPE_RT
2950 },
2951 { }
2952};
2953
2954/* l3_main_1 -> dispc */ 2924/* l3_main_1 -> dispc */
2955static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = { 2925static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
2956 .master = &dra7xx_l3_main_1_hwmod, 2926 .master = &dra7xx_l3_main_1_hwmod,
2957 .slave = &dra7xx_dss_hdmi_hwmod, 2927 .slave = &dra7xx_dss_hdmi_hwmod,
2958 .clk = "l3_iclk_div", 2928 .clk = "l3_iclk_div",
2959 .addr = dra7xx_dss_hdmi_addrs,
2960 .user = OCP_USER_MPU | OCP_USER_SDMA, 2929 .user = OCP_USER_MPU | OCP_USER_SDMA,
2961}; 2930};
2962 2931
@@ -3410,21 +3379,11 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
3410 .user = OCP_USER_MPU | OCP_USER_SDMA, 3379 .user = OCP_USER_MPU | OCP_USER_SDMA,
3411}; 3380};
3412 3381
3413static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
3414 {
3415 .pa_start = 0x4b300000,
3416 .pa_end = 0x4b30007f,
3417 .flags = ADDR_TYPE_RT
3418 },
3419 { }
3420};
3421
3422/* l3_main_1 -> qspi */ 3382/* l3_main_1 -> qspi */
3423static struct omap_hwmod_ocp_if dra7xx_l3_main_1__qspi = { 3383static struct omap_hwmod_ocp_if dra7xx_l3_main_1__qspi = {
3424 .master = &dra7xx_l3_main_1_hwmod, 3384 .master = &dra7xx_l3_main_1_hwmod,
3425 .slave = &dra7xx_qspi_hwmod, 3385 .slave = &dra7xx_qspi_hwmod,
3426 .clk = "l3_iclk_div", 3386 .clk = "l3_iclk_div",
3427 .addr = dra7xx_qspi_addrs,
3428 .user = OCP_USER_MPU | OCP_USER_SDMA, 3387 .user = OCP_USER_MPU | OCP_USER_SDMA,
3429}; 3388};
3430 3389
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index df8327713d06..b82b77cff24c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -243,7 +243,7 @@ static struct omap_hwmod_class ti81xx_rtc_hwmod_class = {
243 .sysc = &ti81xx_rtc_sysc, 243 .sysc = &ti81xx_rtc_sysc,
244}; 244};
245 245
246struct omap_hwmod ti81xx_rtc_hwmod = { 246static struct omap_hwmod ti81xx_rtc_hwmod = {
247 .name = "rtc", 247 .name = "rtc",
248 .class = &ti81xx_rtc_hwmod_class, 248 .class = &ti81xx_rtc_hwmod_class,
249 .clkdm_name = "alwon_l3s_clkdm", 249 .clkdm_name = "alwon_l3s_clkdm",
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 6571ad959908..ab2b2b2b90e5 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -26,6 +26,7 @@
26#include <linux/platform_data/wkup_m3.h> 26#include <linux/platform_data/wkup_m3.h>
27#include <linux/platform_data/pwm_omap_dmtimer.h> 27#include <linux/platform_data/pwm_omap_dmtimer.h>
28#include <linux/platform_data/media/ir-rx51.h> 28#include <linux/platform_data/media/ir-rx51.h>
29#include <linux/platform_data/asoc-ti-mcbsp.h>
29#include <plat/dmtimer.h> 30#include <plat/dmtimer.h>
30 31
31#include "common.h" 32#include "common.h"
@@ -505,6 +506,16 @@ static struct platform_device __maybe_unused rx51_lirc_device = {
505 }, 506 },
506}; 507};
507 508
509#if IS_ENABLED(CONFIG_SND_OMAP_SOC_MCBSP)
510static struct omap_mcbsp_platform_data mcbsp_pdata;
511static void __init omap3_mcbsp_init(void)
512{
513 omap3_mcbsp_init_pdata_callback(&mcbsp_pdata);
514}
515#else
516static void __init omap3_mcbsp_init(void) {}
517#endif
518
508/* 519/*
509 * Few boards still need auxdata populated before we populate 520 * Few boards still need auxdata populated before we populate
510 * the dev entries in of_platform_populate(). 521 * the dev entries in of_platform_populate().
@@ -536,6 +547,11 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
536 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), 547 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
537 OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", 548 OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
538 &am35xx_emac_pdata), 549 &am35xx_emac_pdata),
550 /* McBSP modules with sidetone core */
551#if IS_ENABLED(CONFIG_SND_OMAP_SOC_MCBSP)
552 OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata),
553 OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata),
554#endif
539#endif 555#endif
540#ifdef CONFIG_SOC_AM33XX 556#ifdef CONFIG_SOC_AM33XX
541 OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3", 557 OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
@@ -608,6 +624,8 @@ void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
608 of_machine_is_compatible("ti,omap3")) 624 of_machine_is_compatible("ti,omap3"))
609 omap_sdrc_init(NULL, NULL); 625 omap_sdrc_init(NULL, NULL);
610 626
627 if (of_machine_is_compatible("ti,omap3"))
628 omap3_mcbsp_init();
611 pdata_quirks_check(auxdata_quirks); 629 pdata_quirks_check(auxdata_quirks);
612 of_platform_populate(NULL, omap_dt_match_table, 630 of_platform_populate(NULL, omap_dt_match_table,
613 omap_auxdata_lookup, NULL); 631 omap_auxdata_lookup, NULL);
diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index 7c34c44eb0ae..babb5db5a3a4 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -39,6 +39,7 @@
39 39
40/* RM RSTST offsets */ 40/* RM RSTST offsets */
41#define AM43XX_RM_GFX_RSTST_OFFSET 0x0014 41#define AM43XX_RM_GFX_RSTST_OFFSET 0x0014
42#define AM43XX_RM_PER_RSTST_OFFSET 0x0014
42#define AM43XX_RM_WKUP_RSTST_OFFSET 0x0014 43#define AM43XX_RM_WKUP_RSTST_OFFSET 0x0014
43 44
44/* CM instances */ 45/* CM instances */
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 2bc4ec52ba78..66302c6aba61 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -52,8 +52,6 @@
52/* PRM.PER_PRM register offsets */ 52/* PRM.PER_PRM register offsets */
53#define AM33XX_RM_PER_RSTCTRL_OFFSET 0x0000 53#define AM33XX_RM_PER_RSTCTRL_OFFSET 0x0000
54#define AM33XX_RM_PER_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0000) 54#define AM33XX_RM_PER_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0000)
55#define AM33XX_RM_PER_RSTST_OFFSET 0x0004
56#define AM33XX_RM_PER_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0004)
57#define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008 55#define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008
58#define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008) 56#define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
59#define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c 57#define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 645a2a46b213..f11500612983 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -175,8 +175,8 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
175 * don't adjust it down as your clock period increases the refresh interval 175 * don't adjust it down as your clock period increases the refresh interval
176 * will not be met. Setting all parameters for complete worst case may work, 176 * will not be met. Setting all parameters for complete worst case may work,
177 * but may cut memory performance by 2x. Due to errata the DLLs need to be 177 * but may cut memory performance by 2x. Due to errata the DLLs need to be
178 * unlocked and their value needs run time calibration. A dynamic call is 178 * unlocked and their value needs run time calibration. A dynamic call is
179 * need for that as no single right value exists acorss production samples. 179 * need for that as no single right value exists across production samples.
180 * 180 *
181 * Only the FULL speed values are given. Current code is such that rate 181 * Only the FULL speed values are given. Current code is such that rate
182 * changes must be made at DPLLoutx2. The actual value adjustment for low 182 * changes must be made at DPLLoutx2. The actual value adjustment for low
diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index ef2ec64fe547..0e47d95faf49 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -108,6 +108,9 @@ static struct ti_dt_clk am33xx_clks[] = {
108 DT_CLK("48300200.ehrpwm", "tbclk", "ehrpwm0_tbclk"), 108 DT_CLK("48300200.ehrpwm", "tbclk", "ehrpwm0_tbclk"),
109 DT_CLK("48302200.ehrpwm", "tbclk", "ehrpwm1_tbclk"), 109 DT_CLK("48302200.ehrpwm", "tbclk", "ehrpwm1_tbclk"),
110 DT_CLK("48304200.ehrpwm", "tbclk", "ehrpwm2_tbclk"), 110 DT_CLK("48304200.ehrpwm", "tbclk", "ehrpwm2_tbclk"),
111 DT_CLK("48300200.pwm", "tbclk", "ehrpwm0_tbclk"),
112 DT_CLK("48302200.pwm", "tbclk", "ehrpwm1_tbclk"),
113 DT_CLK("48304200.pwm", "tbclk", "ehrpwm2_tbclk"),
111 { .node_name = NULL }, 114 { .node_name = NULL },
112}; 115};
113 116
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 097fc90bf19a..7255aa818b1f 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -115,6 +115,12 @@ static struct ti_dt_clk am43xx_clks[] = {
115 DT_CLK("48306200.ehrpwm", "tbclk", "ehrpwm3_tbclk"), 115 DT_CLK("48306200.ehrpwm", "tbclk", "ehrpwm3_tbclk"),
116 DT_CLK("48308200.ehrpwm", "tbclk", "ehrpwm4_tbclk"), 116 DT_CLK("48308200.ehrpwm", "tbclk", "ehrpwm4_tbclk"),
117 DT_CLK("4830a200.ehrpwm", "tbclk", "ehrpwm5_tbclk"), 117 DT_CLK("4830a200.ehrpwm", "tbclk", "ehrpwm5_tbclk"),
118 DT_CLK("48300200.pwm", "tbclk", "ehrpwm0_tbclk"),
119 DT_CLK("48302200.pwm", "tbclk", "ehrpwm1_tbclk"),
120 DT_CLK("48304200.pwm", "tbclk", "ehrpwm2_tbclk"),
121 DT_CLK("48306200.pwm", "tbclk", "ehrpwm3_tbclk"),
122 DT_CLK("48308200.pwm", "tbclk", "ehrpwm4_tbclk"),
123 DT_CLK("4830a200.pwm", "tbclk", "ehrpwm5_tbclk"),
118 { .node_name = NULL }, 124 { .node_name = NULL },
119}; 125};
120 126
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h
index 3c73c045f8da..e684543254f3 100644
--- a/include/linux/platform_data/asoc-ti-mcbsp.h
+++ b/include/linux/platform_data/asoc-ti-mcbsp.h
@@ -44,7 +44,7 @@ struct omap_mcbsp_platform_data {
44 /* McBSP platform and instance specific features */ 44 /* McBSP platform and instance specific features */
45 bool has_wakeup; /* Wakeup capability */ 45 bool has_wakeup; /* Wakeup capability */
46 bool has_ccr; /* Transceiver has configuration control registers */ 46 bool has_ccr; /* Transceiver has configuration control registers */
47 int (*enable_st_clock)(unsigned int, bool); 47 int (*force_ick_on)(struct clk *clk, bool force_on);
48}; 48};
49 49
50/** 50/**
@@ -55,4 +55,6 @@ struct omap_mcbsp_dev_attr {
55 const char *sidetone; 55 const char *sidetone;
56}; 56};
57 57
58void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata);
59
58#endif 60#endif
diff --git a/include/linux/platform_data/omapdss.h b/include/linux/platform_data/omapdss.h
new file mode 100644
index 000000000000..dbb875abc44a
--- /dev/null
+++ b/include/linux/platform_data/omapdss.h
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2016 Texas Instruments, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __OMAPDSS_PDATA_H
11#define __OMAPDSS_PDATA_H
12
13enum omapdss_version {
14 OMAPDSS_VER_UNKNOWN = 0,
15 OMAPDSS_VER_OMAP24xx,
16 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
17 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
18 OMAPDSS_VER_OMAP3630,
19 OMAPDSS_VER_AM35xx,
20 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
21 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
22 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
23 OMAPDSS_VER_OMAP5,
24 OMAPDSS_VER_AM43xx,
25 OMAPDSS_VER_DRA7xx,
26};
27
28struct omap_dss_device;
29
30/* Board specific data */
31struct omap_dss_board_info {
32 int num_devices;
33 struct omap_dss_device **devices;
34 struct omap_dss_device *default_device;
35 const char *default_display_name;
36 int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask);
37 void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask);
38 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
39 enum omapdss_version version;
40};
41
42#endif /* __OMAPDSS_PDATA_H */
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 8e14ad7327c9..53ada70cf23c 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -22,6 +22,7 @@
22#include <linux/kobject.h> 22#include <linux/kobject.h>
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/platform_data/omapdss.h>
25 26
26#include <video/videomode.h> 27#include <video/videomode.h>
27 28
@@ -303,36 +304,6 @@ struct omap_dss_dsi_config {
303 enum omap_dss_dsi_trans_mode trans_mode; 304 enum omap_dss_dsi_trans_mode trans_mode;
304}; 305};
305 306
306enum omapdss_version {
307 OMAPDSS_VER_UNKNOWN = 0,
308 OMAPDSS_VER_OMAP24xx,
309 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
310 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
311 OMAPDSS_VER_OMAP3630,
312 OMAPDSS_VER_AM35xx,
313 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
314 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
315 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
316 OMAPDSS_VER_OMAP5,
317 OMAPDSS_VER_AM43xx,
318 OMAPDSS_VER_DRA7xx,
319};
320
321/* Board specific data */
322struct omap_dss_board_info {
323 int num_devices;
324 struct omap_dss_device **devices;
325 struct omap_dss_device *default_device;
326 const char *default_display_name;
327 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
328 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
329 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
330 enum omapdss_version version;
331};
332
333/* Init with the board info */
334extern int omap_display_init(struct omap_dss_board_info *board_data);
335
336struct omap_video_timings { 307struct omap_video_timings {
337 /* Unit: pixels */ 308 /* Unit: pixels */
338 u16 x_res; 309 u16 x_res;
diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c
index 4a16e778966b..76ce33199bf9 100644
--- a/sound/soc/omap/mcbsp.c
+++ b/sound/soc/omap/mcbsp.c
@@ -257,8 +257,8 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
257{ 257{
258 unsigned int w; 258 unsigned int w;
259 259
260 if (mcbsp->pdata->enable_st_clock) 260 if (mcbsp->pdata->force_ick_on)
261 mcbsp->pdata->enable_st_clock(mcbsp->id, 1); 261 mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, true);
262 262
263 /* Disable Sidetone clock auto-gating for normal operation */ 263 /* Disable Sidetone clock auto-gating for normal operation */
264 w = MCBSP_ST_READ(mcbsp, SYSCONFIG); 264 w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
@@ -287,8 +287,8 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
287 w = MCBSP_ST_READ(mcbsp, SYSCONFIG); 287 w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
288 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE); 288 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
289 289
290 if (mcbsp->pdata->enable_st_clock) 290 if (mcbsp->pdata->force_ick_on)
291 mcbsp->pdata->enable_st_clock(mcbsp->id, 0); 291 mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, false);
292} 292}
293 293
294static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) 294static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
@@ -946,6 +946,13 @@ static int omap_st_add(struct omap_mcbsp *mcbsp, struct resource *res)
946 if (!st_data) 946 if (!st_data)
947 return -ENOMEM; 947 return -ENOMEM;
948 948
949 st_data->mcbsp_iclk = clk_get(mcbsp->dev, "ick");
950 if (IS_ERR(st_data->mcbsp_iclk)) {
951 dev_warn(mcbsp->dev,
952 "Failed to get ick, sidetone might be broken\n");
953 st_data->mcbsp_iclk = NULL;
954 }
955
949 st_data->io_base_st = devm_ioremap(mcbsp->dev, res->start, 956 st_data->io_base_st = devm_ioremap(mcbsp->dev, res->start,
950 resource_size(res)); 957 resource_size(res));
951 if (!st_data->io_base_st) 958 if (!st_data->io_base_st)
@@ -1088,11 +1095,13 @@ err_thres:
1088 return ret; 1095 return ret;
1089} 1096}
1090 1097
1091void omap_mcbsp_sysfs_remove(struct omap_mcbsp *mcbsp) 1098void omap_mcbsp_cleanup(struct omap_mcbsp *mcbsp)
1092{ 1099{
1093 if (mcbsp->pdata->buffer_size) 1100 if (mcbsp->pdata->buffer_size)
1094 sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group); 1101 sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group);
1095 1102
1096 if (mcbsp->st_data) 1103 if (mcbsp->st_data) {
1097 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); 1104 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1105 clk_put(mcbsp->st_data->mcbsp_iclk);
1106 }
1098} 1107}
diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h
index 96d1b086bcf8..61e93b1c185d 100644
--- a/sound/soc/omap/mcbsp.h
+++ b/sound/soc/omap/mcbsp.h
@@ -280,6 +280,7 @@ struct omap_mcbsp_reg_cfg {
280 280
281struct omap_mcbsp_st_data { 281struct omap_mcbsp_st_data {
282 void __iomem *io_base_st; 282 void __iomem *io_base_st;
283 struct clk *mcbsp_iclk;
283 bool running; 284 bool running;
284 bool enabled; 285 bool enabled;
285 s16 taps[128]; /* Sidetone filter coefficients */ 286 s16 taps[128]; /* Sidetone filter coefficients */
@@ -349,6 +350,6 @@ int omap_st_disable(struct omap_mcbsp *mcbsp);
349int omap_st_is_enabled(struct omap_mcbsp *mcbsp); 350int omap_st_is_enabled(struct omap_mcbsp *mcbsp);
350 351
351int omap_mcbsp_init(struct platform_device *pdev); 352int omap_mcbsp_init(struct platform_device *pdev);
352void omap_mcbsp_sysfs_remove(struct omap_mcbsp *mcbsp); 353void omap_mcbsp_cleanup(struct omap_mcbsp *mcbsp);
353 354
354#endif /* __ASOC_MCBSP_H */ 355#endif /* __ASOC_MCBSP_H */
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index fd99d89de6a8..d018e966e533 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -788,6 +788,7 @@ static int asoc_mcbsp_probe(struct platform_device *pdev)
788 match = of_match_device(omap_mcbsp_of_match, &pdev->dev); 788 match = of_match_device(omap_mcbsp_of_match, &pdev->dev);
789 if (match) { 789 if (match) {
790 struct device_node *node = pdev->dev.of_node; 790 struct device_node *node = pdev->dev.of_node;
791 struct omap_mcbsp_platform_data *pdata_quirk = pdata;
791 int buffer_size; 792 int buffer_size;
792 793
793 pdata = devm_kzalloc(&pdev->dev, 794 pdata = devm_kzalloc(&pdev->dev,
@@ -799,6 +800,8 @@ static int asoc_mcbsp_probe(struct platform_device *pdev)
799 memcpy(pdata, match->data, sizeof(*pdata)); 800 memcpy(pdata, match->data, sizeof(*pdata));
800 if (!of_property_read_u32(node, "ti,buffer-size", &buffer_size)) 801 if (!of_property_read_u32(node, "ti,buffer-size", &buffer_size))
801 pdata->buffer_size = buffer_size; 802 pdata->buffer_size = buffer_size;
803 if (pdata_quirk)
804 pdata->force_ick_on = pdata_quirk->force_ick_on;
802 } else if (!pdata) { 805 } else if (!pdata) {
803 dev_err(&pdev->dev, "missing platform data.\n"); 806 dev_err(&pdev->dev, "missing platform data.\n");
804 return -EINVAL; 807 return -EINVAL;
@@ -832,7 +835,7 @@ static int asoc_mcbsp_remove(struct platform_device *pdev)
832 if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) 835 if (mcbsp->pdata->ops && mcbsp->pdata->ops->free)
833 mcbsp->pdata->ops->free(mcbsp->id); 836 mcbsp->pdata->ops->free(mcbsp->id);
834 837
835 omap_mcbsp_sysfs_remove(mcbsp); 838 omap_mcbsp_cleanup(mcbsp);
836 839
837 clk_put(mcbsp->fclk); 840 clk_put(mcbsp->fclk);
838 841
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 01:22:32 -0400