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authorOlof Johansson <olof@lixom.net>2019-06-25 08:52:25 -0400
committerOlof Johansson <olof@lixom.net>2019-06-25 08:52:25 -0400
commitd78cda5aa0a0a9b75b650150e258c277d3207d45 (patch)
treec3dc41be5acfbbdd14b8dd561f9e2201acc5407d
parent37937ee73ba4d24850df666261f5243d611d1cc5 (diff)
parent50b617a61874a136d9c4fd75e9cccc7e2f9a03c8 (diff)
Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: Amlogic updates for v5.3 Highlights: - new SoC: S922X (G12B family, A73/A53 big.LITTLE) - new board: Hardkernel odroid-N2 (SoC: G12B S922X) - add/use ethernet PHY interrupt/reset lines - G12A: add/enable audio, PWM, IR, i2c, SD/eMMC, WiFi, bluetooth, network - gxbb-vega-s95 board: fix WiFi/BT, enable more peripherals * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (79 commits) arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt line arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line arm64: dts: meson: g12a: sort sdio nodes correctly arm64: dts: meson-g12a-x96-max: add sound card arm64: dts: meson-g12b-odroid-n2: add sound card arm64: dts: meson: sei510: add sound card arm64: dts: meson: sei510: add max98357a DAC ASoC: meson: add tohdmitx DT bindings arm64: dts: meson: g12a: add the GPIO interrupt controller arm64: dts: meson-g12a-x96-max: bump bluetooth bus speed to 2Mbaud/s arm64: dts: meson-g12a-sei510: bump bluetooth bus speed to 2Mbaud/s arm64: dts: meson-g12a-x96-max: add 32k clock to bluetooth node arm64: dts: meson-g12a-sei510: add 32k clock to bluetooth node arm64: dts: meson-g12a-sei510: Enable Wifi SDIO module arm64: dts: meson-g12a-x96-max: Enable Wifi SDIO Module arm64: dts: meson-g12a-x96-max: add support for sdcard and emmc arm64: dts: meson: g12a: add SDIO controller ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/amlogic.txt142
-rw-r--r--Documentation/devicetree/bindings/arm/amlogic.yaml144
-rw-r--r--Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt28
-rw-r--r--Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt55
-rw-r--r--arch/arm64/boot/dts/amlogic/Makefile1
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-axg-s400.dts4
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-axg.dtsi35
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts401
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts122
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts257
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a.dtsi1799
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts386
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12b.dtsi82
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi4
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx.dtsi4
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts15
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts10
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts15
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts9
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi2
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi106
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi37
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi35
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts2
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts13
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts14
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts2
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi4
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl.dtsi35
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts38
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts12
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts13
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts14
-rw-r--r--drivers/clk/meson/g12a.c4
-rw-r--r--drivers/clk/meson/g12a.h2
-rw-r--r--drivers/clk/meson/meson8b.c10
-rw-r--r--include/dt-bindings/clock/g12a-clkc.h2
-rw-r--r--include/dt-bindings/sound/meson-g12a-tohdmitx.h13
38 files changed, 3521 insertions, 350 deletions
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
deleted file mode 100644
index 061f7b98a07f..000000000000
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ /dev/null
@@ -1,142 +0,0 @@
1Amlogic MesonX device tree bindings
2-------------------------------------------
3
4Work in progress statement:
5
6Device tree files and bindings applying to Amlogic SoCs and boards are
7considered "unstable". Any Amlogic device tree binding may change at
8any time. Be sure to use a device tree binary and a kernel image
9generated from the same source tree.
10
11Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
12stable binding/ABI.
13
14---------------------------------------------------------------
15
16Boards with the Amlogic Meson6 SoC shall have the following properties:
17 Required root node property:
18 compatible: "amlogic,meson6"
19
20Boards with the Amlogic Meson8 SoC shall have the following properties:
21 Required root node property:
22 compatible: "amlogic,meson8";
23
24Boards with the Amlogic Meson8b SoC shall have the following properties:
25 Required root node property:
26 compatible: "amlogic,meson8b";
27
28Boards with the Amlogic Meson8m2 SoC shall have the following properties:
29 Required root node property:
30 compatible: "amlogic,meson8m2";
31
32Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
33 Required root node property:
34 compatible: "amlogic,meson-gxbb";
35
36Boards with the Amlogic Meson GXL S905X SoC shall have the following properties:
37 Required root node property:
38 compatible: "amlogic,s905x", "amlogic,meson-gxl";
39
40Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
41 Required root node property:
42 compatible: "amlogic,s905d", "amlogic,meson-gxl";
43
44Boards with the Amlogic Meson GXL S805X SoC shall have the following properties:
45 Required root node property:
46 compatible: "amlogic,s805x", "amlogic,meson-gxl";
47
48Boards with the Amlogic Meson GXL S905W SoC shall have the following properties:
49 Required root node property:
50 compatible: "amlogic,s905w", "amlogic,meson-gxl";
51
52Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
53 Required root node property:
54 compatible: "amlogic,s912", "amlogic,meson-gxm";
55
56Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
57 Required root node property:
58 compatible: "amlogic,a113d", "amlogic,meson-axg";
59
60Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties:
61 Required root node property:
62 compatible: "amlogic,g12a";
63
64Board compatible values (alphabetically, grouped by SoC):
65
66 - "geniatech,atv1200" (Meson6)
67
68 - "minix,neo-x8" (Meson8)
69
70 - "endless,ec100" (Meson8b)
71 - "hardkernel,odroid-c1" (Meson8b)
72 - "tronfy,mxq" (Meson8b)
73
74 - "tronsmart,mxiii-plus" (Meson8m2)
75
76 - "amlogic,p200" (Meson gxbb)
77 - "amlogic,p201" (Meson gxbb)
78 - "friendlyarm,nanopi-k2" (Meson gxbb)
79 - "hardkernel,odroid-c2" (Meson gxbb)
80 - "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
81 - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb)
82 - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb)
83 - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb)
84 - "wetek,hub" (Meson gxbb)
85 - "wetek,play2" (Meson gxbb)
86
87 - "amlogic,p212" (Meson gxl s905x)
88 - "hwacom,amazetv" (Meson gxl s905x)
89 - "khadas,vim" (Meson gxl s905x)
90 - "libretech,cc" (Meson gxl s905x)
91
92 - "amlogic,p230" (Meson gxl s905d)
93 - "amlogic,p231" (Meson gxl s905d)
94 - "phicomm,n1" (Meson gxl s905d)
95
96 - "amlogic,p241" (Meson gxl s805x)
97 - "libretech,aml-s805x-ac" (Meson gxl s805x)
98
99 - "amlogic,p281" (Meson gxl s905w)
100 - "oranth,tx3-mini" (Meson gxl s905w)
101
102 - "amlogic,q200" (Meson gxm s912)
103 - "amlogic,q201" (Meson gxm s912)
104 - "khadas,vim2" (Meson gxm s912)
105 - "kingnovel,r-box-pro" (Meson gxm S912)
106 - "nexbox,a1" (Meson gxm s912)
107 - "tronsmart,vega-s96" (Meson gxm s912)
108
109 - "amlogic,s400" (Meson axg a113d)
110
111 - "amlogic,u200" (Meson g12a s905d2)
112 - "amediatech,x96-max" (Meson g12a s905x2)
113 - "seirobotics,sei510" (Meson g12a s905x2)
114
115Amlogic Meson Firmware registers Interface
116------------------------------------------
117
118The Meson SoCs have a register bank with status and data shared with the
119secure firmware.
120
121Required properties:
122 - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
123
124Properties should indentify components of this register interface :
125
126Meson GX SoC Information
127------------------------
128A firmware register encodes the SoC type, package and revision information on
129the Meson GX SoCs.
130If present, the following property should be added :
131
132Optional properties:
133 - amlogic,has-chip-id: If present, the interface gives the current SoC version.
134
135Example
136-------
137
138ao-secure@140 {
139 compatible = "amlogic,meson-gx-ao-secure", "syscon";
140 reg = <0x0 0x140 0x0 0x140>;
141 amlogic,has-chip-id;
142};
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
new file mode 100644
index 000000000000..325c6fd3566d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -0,0 +1,144 @@
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/amlogic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic MesonX device tree bindings
8
9maintainers:
10 - Kevin Hilman <khilman@baylibre.com>
11
12description: |+
13 Work in progress statement:
14
15 Device tree files and bindings applying to Amlogic SoCs and boards are
16 considered "unstable". Any Amlogic device tree binding may change at
17 any time. Be sure to use a device tree binary and a kernel image
18 generated from the same source tree.
19
20 Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
21 stable binding/ABI.
22
23properties:
24 $nodename:
25 const: '/'
26 compatible:
27 oneOf:
28 - description: Boards with the Amlogic Meson6 SoC
29 items:
30 - enum:
31 - geniatech,atv1200
32 - const: amlogic,meson6
33
34 - description: Boards with the Amlogic Meson8 SoC
35 items:
36 - enum:
37 - minix,neo-x8
38 - const: amlogic,meson8
39
40 - description: Boards with the Amlogic Meson8m2 SoC
41 items:
42 - enum:
43 - tronsmart,mxiii-plus
44 - const: amlogic,meson8m2
45
46 - description: Boards with the Amlogic Meson8b SoC
47 items:
48 - enum:
49 - endless,ec100
50 - hardkernel,odroid-c1
51 - tronfy,mxq
52 - const: amlogic,meson8b
53
54 - description: Boards with the Amlogic Meson GXBaby SoC
55 items:
56 - enum:
57 - amlogic,p200
58 - amlogic,p201
59 - friendlyarm,nanopi-k2
60 - hardkernel,odroid-c2
61 - nexbox,a95x
62 - wetek,hub
63 - wetek,play2
64 - const: amlogic,meson-gxbb
65
66 - description: Tronsmart Vega S95 devices
67 items:
68 - enum:
69 - tronsmart,vega-s95-pro
70 - tronsmart,vega-s95-meta
71 - tronsmart,vega-s95-telos
72 - const: tronsmart,vega-s95
73 - const: amlogic,meson-gxbb
74
75 - description: Boards with the Amlogic Meson GXL S805X SoC
76 items:
77 - enum:
78 - amlogic,p241
79 - libretech,aml-s805x-ac
80 - const: amlogic,s805x
81 - const: amlogic,meson-gxl
82
83 - description: Boards with the Amlogic Meson GXL S905W SoC
84 items:
85 - enum:
86 - amlogic,p281
87 - oranth,tx3-mini
88 - const: amlogic,s905w
89 - const: amlogic,meson-gxl
90
91 - description: Boards with the Amlogic Meson GXL S905X SoC
92 items:
93 - enum:
94 - amediatech,x96-max
95 - amlogic,p212
96 - hwacom,amazetv
97 - khadas,vim
98 - libretech,cc
99 - nexbox,a95x
100 - seirobotics,sei510
101 - const: amlogic,s905x
102 - const: amlogic,meson-gxl
103
104 - description: Boards with the Amlogic Meson GXL S905D SoC
105 items:
106 - enum:
107 - amlogic,p230
108 - amlogic,p231
109 - phicomm,n1
110 - const: amlogic,s905d
111 - const: amlogic,meson-gxl
112
113 - description: Boards with the Amlogic Meson GXM S912 SoC
114 items:
115 - enum:
116 - amlogic,q200
117 - amlogic,q201
118 - khadas,vim2
119 - kingnovel,r-box-pro
120 - nexbox,a1
121 - tronsmart,vega-s96
122 - const: amlogic,s912
123 - const: amlogic,meson-gxm
124
125 - description: Boards with the Amlogic Meson AXG A113D SoC
126 items:
127 - enum:
128 - amlogic,s400
129 - const: amlogic,a113d
130 - const: amlogic,meson-axg
131
132 - description: Boards with the Amlogic Meson G12A S905D2 SoC
133 items:
134 - enum:
135 - amlogic,u200
136 - const: amlogic,g12a
137
138 - description: Boards with the Amlogic Meson G12B S922X SoC
139 items:
140 - enum:
141 - hardkernel,odroid-n2
142 - const: amlogic,g12b
143
144...
diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
new file mode 100644
index 000000000000..c67d9f48fb91
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
@@ -0,0 +1,28 @@
1Amlogic Meson Firmware registers Interface
2------------------------------------------
3
4The Meson SoCs have a register bank with status and data shared with the
5secure firmware.
6
7Required properties:
8 - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
9
10Properties should indentify components of this register interface :
11
12Meson GX SoC Information
13------------------------
14A firmware register encodes the SoC type, package and revision information on
15the Meson GX SoCs.
16If present, the following property should be added :
17
18Optional properties:
19 - amlogic,has-chip-id: If present, the interface gives the current SoC version.
20
21Example
22-------
23
24ao-secure@140 {
25 compatible = "amlogic,meson-gx-ao-secure", "syscon";
26 reg = <0x0 0x140 0x0 0x140>;
27 amlogic,has-chip-id;
28};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt b/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt
new file mode 100644
index 000000000000..aa6c35570d31
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt
@@ -0,0 +1,55 @@
1* Amlogic HDMI Tx control glue
2
3Required properties:
4- compatible: "amlogic,g12a-tohdmitx"
5- reg: physical base address of the controller and length of memory
6 mapped region.
7- #sound-dai-cells: should be 1.
8
9Example on the S905X2 SoC:
10
11tohdmitx: audio-controller@744 {
12 compatible = "amlogic,g12a-tohdmitx";
13 reg = <0x0 0x744 0x0 0x4>;
14 #sound-dai-cells = <1>;
15};
16
17Example of an 'amlogic,axg-sound-card':
18
19sound {
20 compatible = "amlogic,axg-sound-card";
21
22[...]
23
24 dai-link-x {
25 sound-dai = <&tdmif_a>;
26 dai-format = "i2s";
27 dai-tdm-slot-tx-mask-0 = <1 1>;
28
29 codec-0 {
30 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
31 };
32
33 codec-1 {
34 sound-dai = <&external_dac>;
35 };
36 };
37
38 dai-link-y {
39 sound-dai = <&tdmif_c>;
40 dai-format = "i2s";
41 dai-tdm-slot-tx-mask-0 = <1 1>;
42
43 codec {
44 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
45 };
46 };
47
48 dai-link-z {
49 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
50
51 codec {
52 sound-dai = <&hdmi_tx>;
53 };
54 };
55};
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index e129c03ced14..07b861fe5fa5 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
3dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb 3dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
4dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb 4dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
5dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb 5dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
6dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
6dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb 7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb 8dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
8dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb 9dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index 75fe1a2c49d0..4cd2d5951822 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -482,8 +482,8 @@
482 482
483/* emmc storage */ 483/* emmc storage */
484&sd_emmc_c { 484&sd_emmc_c {
485 status = "disabled"; 485 status = "okay";
486 pinctrl-0 = <&emmc_pins>; 486 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
487 pinctrl-1 = <&emmc_clk_gate_pins>; 487 pinctrl-1 = <&emmc_clk_gate_pins>;
488 pinctrl-names = "default", "clk-gate"; 488 pinctrl-names = "default", "clk-gate";
489 489
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 34704fecf756..6219337033a0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -171,7 +171,9 @@
171 ranges; 171 ranges;
172 172
173 ethmac: ethernet@ff3f0000 { 173 ethmac: ethernet@ff3f0000 {
174 compatible = "amlogic,meson-axg-dwmac", "snps,dwmac"; 174 compatible = "amlogic,meson-axg-dwmac",
175 "snps,dwmac-3.70a",
176 "snps,dwmac";
175 reg = <0x0 0xff3f0000 0x0 0x10000 177 reg = <0x0 0xff3f0000 0x0 0x10000
176 0x0 0xff634540 0x0 0x8>; 178 0x0 0xff634540 0x0 0x8>;
177 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 179 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -299,7 +301,7 @@
299 }; 301 };
300 302
301 emmc_pins: emmc { 303 emmc_pins: emmc {
302 mux { 304 mux-0 {
303 groups = "emmc_nand_d0", 305 groups = "emmc_nand_d0",
304 "emmc_nand_d1", 306 "emmc_nand_d1",
305 "emmc_nand_d2", 307 "emmc_nand_d2",
@@ -308,14 +310,26 @@
308 "emmc_nand_d5", 310 "emmc_nand_d5",
309 "emmc_nand_d6", 311 "emmc_nand_d6",
310 "emmc_nand_d7", 312 "emmc_nand_d7",
311 "emmc_clk", 313 "emmc_cmd";
312 "emmc_cmd", 314 function = "emmc";
313 "emmc_ds"; 315 bias-pull-up;
316 };
317
318 mux-1 {
319 groups = "emmc_clk";
314 function = "emmc"; 320 function = "emmc";
315 bias-disable; 321 bias-disable;
316 }; 322 };
317 }; 323 };
318 324
325 emmc_ds_pins: emmc_ds {
326 mux {
327 groups = "emmc_ds";
328 function = "emmc";
329 bias-pull-down;
330 };
331 };
332
319 emmc_clk_gate_pins: emmc_clk_gate { 333 emmc_clk_gate_pins: emmc_clk_gate {
320 mux { 334 mux {
321 groups = "BOOT_8"; 335 groups = "BOOT_8";
@@ -559,13 +573,18 @@
559 }; 573 };
560 574
561 sdio_pins: sdio { 575 sdio_pins: sdio {
562 mux { 576 mux-0 {
563 groups = "sdio_d0", 577 groups = "sdio_d0",
564 "sdio_d1", 578 "sdio_d1",
565 "sdio_d2", 579 "sdio_d2",
566 "sdio_d3", 580 "sdio_d3",
567 "sdio_cmd", 581 "sdio_cmd";
568 "sdio_clk"; 582 function = "sdio";
583 bias-pull-up;
584 };
585
586 mux-1 {
587 groups = "sdio_clk";
569 function = "sdio"; 588 function = "sdio";
570 bias-disable; 589 bias-disable;
571 }; 590 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
index 34b40587e5ef..c7a87368850b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
@@ -9,15 +9,12 @@
9#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h> 10#include <dt-bindings/input/input.h>
11#include <dt-bindings/gpio/meson-g12a-gpio.h> 11#include <dt-bindings/gpio/meson-g12a-gpio.h>
12#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12 13
13/ { 14/ {
14 compatible = "seirobotics,sei510", "amlogic,g12a"; 15 compatible = "seirobotics,sei510", "amlogic,g12a";
15 model = "SEI Robotics SEI510"; 16 model = "SEI Robotics SEI510";
16 17
17 aliases {
18 serial0 = &uart_AO;
19 };
20
21 adc_keys { 18 adc_keys {
22 compatible = "adc-keys"; 19 compatible = "adc-keys";
23 io-channels = <&saradc 0>; 20 io-channels = <&saradc 0>;
@@ -31,13 +28,25 @@
31 }; 28 };
32 }; 29 };
33 30
34 ao_5v: regulator-ao_5v { 31 aliases {
35 compatible = "regulator-fixed"; 32 serial0 = &uart_AO;
36 regulator-name = "AO_5V"; 33 ethernet0 = &ethmac;
37 regulator-min-microvolt = <5000000>; 34 };
38 regulator-max-microvolt = <5000000>; 35
39 vin-supply = <&dc_in>; 36 mono_dac: audio-codec-0 {
40 regulator-always-on; 37 compatible = "maxim,max98357a";
38 #sound-dai-cells = <0>;
39 sound-name-prefix = "U16";
40 sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
41 };
42
43 dmics: audio-codec-1 {
44 #sound-dai-cells = <0>;
45 compatible = "dmic-codec";
46 num-channels = <2>;
47 wakeup-delay-ms = <50>;
48 status = "okay";
49 sound-name-prefix = "MIC";
41 }; 50 };
42 51
43 chosen { 52 chosen {
@@ -54,21 +63,9 @@
54 }; 63 };
55 }; 64 };
56 65
57 dc_in: regulator-dc_in { 66 emmc_pwrseq: emmc-pwrseq {
58 compatible = "regulator-fixed"; 67 compatible = "mmc-pwrseq-emmc";
59 regulator-name = "DC_IN"; 68 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <5000000>;
62 regulator-always-on;
63 };
64
65 emmc_1v8: regulator-emmc_1v8 {
66 compatible = "regulator-fixed";
67 regulator-name = "EMMC_1V8";
68 regulator-min-microvolt = <1800000>;
69 regulator-max-microvolt = <1800000>;
70 vin-supply = <&vddao_3v3>;
71 regulator-always-on;
72 }; 69 };
73 70
74 hdmi-connector { 71 hdmi-connector {
@@ -87,12 +84,30 @@
87 reg = <0x0 0x0 0x0 0x40000000>; 84 reg = <0x0 0x0 0x0 0x40000000>;
88 }; 85 };
89 86
90 reserved-memory { 87 ao_5v: regulator-ao_5v {
91 /* TEE Reserved Memory */ 88 compatible = "regulator-fixed";
92 bl32_reserved: bl32@5000000 { 89 regulator-name = "AO_5V";
93 reg = <0x0 0x05300000 0x0 0x2000000>; 90 regulator-min-microvolt = <5000000>;
94 no-map; 91 regulator-max-microvolt = <5000000>;
95 }; 92 vin-supply = <&dc_in>;
93 regulator-always-on;
94 };
95
96 dc_in: regulator-dc_in {
97 compatible = "regulator-fixed";
98 regulator-name = "DC_IN";
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101 regulator-always-on;
102 };
103
104 emmc_1v8: regulator-emmc_1v8 {
105 compatible = "regulator-fixed";
106 regulator-name = "EMMC_1V8";
107 regulator-min-microvolt = <1800000>;
108 regulator-max-microvolt = <1800000>;
109 vin-supply = <&vddao_3v3>;
110 regulator-always-on;
96 }; 111 };
97 112
98 vddao_3v3: regulator-vddao_3v3 { 113 vddao_3v3: regulator-vddao_3v3 {
@@ -122,6 +137,146 @@
122 vin-supply = <&vddao_3v3>; 137 vin-supply = <&vddao_3v3>;
123 regulator-always-on; 138 regulator-always-on;
124 }; 139 };
140
141 reserved-memory {
142 /* TEE Reserved Memory */
143 bl32_reserved: bl32@5000000 {
144 reg = <0x0 0x05300000 0x0 0x2000000>;
145 no-map;
146 };
147 };
148
149 sdio_pwrseq: sdio-pwrseq {
150 compatible = "mmc-pwrseq-simple";
151 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
152 clocks = <&wifi32k>;
153 clock-names = "ext_clock";
154 };
155
156 wifi32k: wifi32k {
157 compatible = "pwm-clock";
158 #clock-cells = <0>;
159 clock-frequency = <32768>;
160 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
161 };
162
163 sound {
164 compatible = "amlogic,axg-sound-card";
165 model = "G12A-SEI510";
166 audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
167 <&tdmin_a>, <&tdmin_b>;
168 audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
169 "TDMOUT_A IN 1", "FRDDR_B OUT 0",
170 "TDMOUT_A IN 2", "FRDDR_C OUT 0",
171 "TDM_A Playback", "TDMOUT_A OUT",
172 "TDMOUT_B IN 0", "FRDDR_A OUT 1",
173 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
174 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
175 "TDM_B Playback", "TDMOUT_B OUT",
176 "TODDR_A IN 4", "PDM Capture",
177 "TODDR_B IN 4", "PDM Capture",
178 "TODDR_C IN 4", "PDM Capture",
179 "TDMIN_A IN 0", "TDM_A Capture",
180 "TDMIN_A IN 3", "TDM_A Loopback",
181 "TDMIN_B IN 0", "TDM_A Capture",
182 "TDMIN_B IN 3", "TDM_A Loopback",
183 "TDMIN_A IN 1", "TDM_B Capture",
184 "TDMIN_A IN 4", "TDM_B Loopback",
185 "TDMIN_B IN 1", "TDM_B Capture",
186 "TDMIN_B IN 4", "TDM_B Loopback",
187 "TODDR_A IN 0", "TDMIN_A OUT",
188 "TODDR_B IN 0", "TDMIN_A OUT",
189 "TODDR_C IN 0", "TDMIN_A OUT",
190 "TODDR_A IN 1", "TDMIN_B OUT",
191 "TODDR_B IN 1", "TDMIN_B OUT",
192 "TODDR_C IN 1", "TDMIN_B OUT";
193
194 assigned-clocks = <&clkc CLKID_MPLL2>,
195 <&clkc CLKID_MPLL0>,
196 <&clkc CLKID_MPLL1>;
197 assigned-clock-parents = <0>, <0>, <0>;
198 assigned-clock-rates = <294912000>,
199 <270950400>,
200 <393216000>;
201 status = "okay";
202
203 dai-link-0 {
204 sound-dai = <&frddr_a>;
205 };
206
207 dai-link-1 {
208 sound-dai = <&frddr_b>;
209 };
210
211 dai-link-2 {
212 sound-dai = <&frddr_c>;
213 };
214
215 dai-link-3 {
216 sound-dai = <&toddr_a>;
217 };
218
219 dai-link-4 {
220 sound-dai = <&toddr_b>;
221 };
222
223 dai-link-5 {
224 sound-dai = <&toddr_c>;
225 };
226
227 /* internal speaker interface */
228 dai-link-6 {
229 sound-dai = <&tdmif_a>;
230 dai-format = "i2s";
231 dai-tdm-slot-tx-mask-0 = <1 1>;
232 mclk-fs = <256>;
233
234 codec-0 {
235 sound-dai = <&mono_dac>;
236 };
237
238 codec-1 {
239 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
240 };
241 };
242
243 /* 8ch hdmi interface */
244 dai-link-7 {
245 sound-dai = <&tdmif_b>;
246 dai-format = "i2s";
247 dai-tdm-slot-tx-mask-0 = <1 1>;
248 dai-tdm-slot-tx-mask-1 = <1 1>;
249 dai-tdm-slot-tx-mask-2 = <1 1>;
250 dai-tdm-slot-tx-mask-3 = <1 1>;
251 mclk-fs = <256>;
252
253 codec@0 {
254 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
255 };
256 };
257
258 /* internal digital mics */
259 dai-link-8 {
260 sound-dai = <&pdm>;
261
262 codec {
263 sound-dai = <&dmics>;
264 };
265 };
266
267 /* hdmi glue */
268 dai-link-9 {
269 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
270
271 codec {
272 sound-dai = <&hdmi_tx>;
273 };
274 };
275 };
276};
277
278&arb {
279 status = "okay";
125}; 280};
126 281
127&cec_AO { 282&cec_AO {
@@ -138,27 +293,32 @@
138 hdmi-phandle = <&hdmi_tx>; 293 hdmi-phandle = <&hdmi_tx>;
139}; 294};
140 295
296&clkc_audio {
297 status = "okay";
298};
299
141&cvbs_vdac_port { 300&cvbs_vdac_port {
142 cvbs_vdac_out: endpoint { 301 cvbs_vdac_out: endpoint {
143 remote-endpoint = <&cvbs_connector_in>; 302 remote-endpoint = <&cvbs_connector_in>;
144 }; 303 };
145}; 304};
146 305
147&saradc { 306&ethmac {
148 status = "okay"; 307 status = "okay";
149 vref-supply = <&vddio_ao1v8>; 308 phy-handle = <&internal_ephy>;
309 phy-mode = "rmii";
150}; 310};
151 311
152&uart_A { 312&frddr_a {
153 status = "okay"; 313 status = "okay";
154 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; 314};
155 pinctrl-names = "default";
156 uart-has-rtscts;
157 315
158 bluetooth { 316&frddr_b {
159 compatible = "brcm,bcm43438-bt"; 317 status = "okay";
160 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; 318};
161 }; 319
320&frddr_c {
321 status = "okay";
162}; 322};
163 323
164&hdmi_tx { 324&hdmi_tx {
@@ -173,6 +333,163 @@
173 }; 333 };
174}; 334};
175 335
336&i2c3 {
337 status = "okay";
338 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
339 pinctrl-names = "default";
340};
341
342&pwm_ef {
343 status = "okay";
344 pinctrl-0 = <&pwm_e_pins>;
345 pinctrl-names = "default";
346 clocks = <&xtal>;
347 clock-names = "clkin0";
348};
349
350&pdm {
351 pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
352 <&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
353 <&pdm_dclk_z_pins>;
354 pinctrl-names = "default";
355 status = "okay";
356};
357
358&saradc {
359 status = "okay";
360 vref-supply = <&vddio_ao1v8>;
361};
362
363/* SDIO */
364&sd_emmc_a {
365 status = "okay";
366 pinctrl-0 = <&sdio_pins>;
367 pinctrl-1 = <&sdio_clk_gate_pins>;
368 pinctrl-names = "default", "clk-gate";
369 #address-cells = <1>;
370 #size-cells = <0>;
371
372 bus-width = <4>;
373 cap-sd-highspeed;
374 sd-uhs-sdr50;
375 max-frequency = <100000000>;
376
377 non-removable;
378 disable-wp;
379
380 mmc-pwrseq = <&sdio_pwrseq>;
381
382 vmmc-supply = <&vddao_3v3>;
383 vqmmc-supply = <&vddio_ao1v8>;
384
385 brcmf: wifi@1 {
386 reg = <1>;
387 compatible = "brcm,bcm4329-fmac";
388 };
389};
390
391/* SD card */
392&sd_emmc_b {
393 status = "okay";
394 pinctrl-0 = <&sdcard_c_pins>;
395 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
396 pinctrl-names = "default", "clk-gate";
397
398 bus-width = <4>;
399 cap-sd-highspeed;
400 max-frequency = <50000000>;
401 disable-wp;
402
403 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
404 vmmc-supply = <&vddao_3v3>;
405 vqmmc-supply = <&vddao_3v3>;
406};
407
408/* eMMC */
409&sd_emmc_c {
410 status = "okay";
411 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
412 pinctrl-1 = <&emmc_clk_gate_pins>;
413 pinctrl-names = "default", "clk-gate";
414
415 bus-width = <8>;
416 cap-mmc-highspeed;
417 mmc-ddr-1_8v;
418 mmc-hs200-1_8v;
419 max-frequency = <200000000>;
420 non-removable;
421 disable-wp;
422
423 mmc-pwrseq = <&emmc_pwrseq>;
424 vmmc-supply = <&vddao_3v3>;
425 vqmmc-supply = <&emmc_1v8>;
426};
427
428&tdmif_a {
429 pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
430 pinctrl-names = "default";
431 status = "okay";
432
433 assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
434 <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
435 assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
436 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
437 assigned-clock-rates = <0>, <0>;
438};
439
440&tdmif_b {
441 status = "okay";
442};
443
444&tdmin_a {
445 status = "okay";
446};
447
448&tdmin_b {
449 status = "okay";
450};
451
452&tdmout_a {
453 status = "okay";
454};
455
456&tdmout_b {
457 status = "okay";
458};
459
460&toddr_a {
461 status = "okay";
462};
463
464&toddr_b {
465 status = "okay";
466};
467
468&toddr_c {
469 status = "okay";
470};
471
472&tohdmitx {
473 status = "okay";
474};
475
476&uart_A {
477 status = "okay";
478 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
479 pinctrl-names = "default";
480 uart-has-rtscts;
481
482 bluetooth {
483 compatible = "brcm,bcm43438-bt";
484 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
485 max-speed = <2000000>;
486 clocks = <&wifi32k>;
487 clock-names = "lpo";
488 vbat-supply = <&vddao_3v3>;
489 vddio-supply = <&vddio_ao1v8>;
490 };
491};
492
176&uart_AO { 493&uart_AO {
177 status = "okay"; 494 status = "okay";
178 pinctrl-0 = <&uart_ao_a_pins>; 495 pinctrl-0 = <&uart_ao_a_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
index 0e8045b8a915..8551fbd4a488 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -15,14 +15,12 @@
15 15
16 aliases { 16 aliases {
17 serial0 = &uart_AO; 17 serial0 = &uart_AO;
18 ethernet0 = &ethmac;
18 }; 19 };
20
19 chosen { 21 chosen {
20 stdout-path = "serial0:115200n8"; 22 stdout-path = "serial0:115200n8";
21 }; 23 };
22 memory@0 {
23 device_type = "memory";
24 reg = <0x0 0x0 0x0 0x40000000>;
25 };
26 24
27 cvbs-connector { 25 cvbs-connector {
28 compatible = "composite-video-connector"; 26 compatible = "composite-video-connector";
@@ -34,13 +32,9 @@
34 }; 32 };
35 }; 33 };
36 34
37 flash_1v8: regulator-flash_1v8 { 35 emmc_pwrseq: emmc-pwrseq {
38 compatible = "regulator-fixed"; 36 compatible = "mmc-pwrseq-emmc";
39 regulator-name = "FLASH_1V8"; 37 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
40 regulator-min-microvolt = <1800000>;
41 regulator-max-microvolt = <1800000>;
42 vin-supply = <&vcc_3v3>;
43 regulator-always-on;
44 }; 38 };
45 39
46 hdmi-connector { 40 hdmi-connector {
@@ -54,6 +48,20 @@
54 }; 48 };
55 }; 49 };
56 50
51 memory@0 {
52 device_type = "memory";
53 reg = <0x0 0x0 0x0 0x40000000>;
54 };
55
56 flash_1v8: regulator-flash_1v8 {
57 compatible = "regulator-fixed";
58 regulator-name = "FLASH_1V8";
59 regulator-min-microvolt = <1800000>;
60 regulator-max-microvolt = <1800000>;
61 vin-supply = <&vcc_3v3>;
62 regulator-always-on;
63 };
64
57 main_12v: regulator-main_12v { 65 main_12v: regulator-main_12v {
58 compatible = "regulator-fixed"; 66 compatible = "regulator-fixed";
59 regulator-name = "12V"; 67 regulator-name = "12V";
@@ -62,6 +70,17 @@
62 regulator-always-on; 70 regulator-always-on;
63 }; 71 };
64 72
73 usb_pwr_en: regulator-usb_pwr_en {
74 compatible = "regulator-fixed";
75 regulator-name = "USB_PWR_EN";
76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <5000000>;
78 vin-supply = <&vcc_5v>;
79
80 gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
83
65 vcc_1v8: regulator-vcc_1v8 { 84 vcc_1v8: regulator-vcc_1v8 {
66 compatible = "regulator-fixed"; 85 compatible = "regulator-fixed";
67 regulator-name = "VCC_1V8"; 86 regulator-name = "VCC_1V8";
@@ -92,17 +111,6 @@
92 enable-active-high; 111 enable-active-high;
93 }; 112 };
94 113
95 usb_pwr_en: regulator-usb_pwr_en {
96 compatible = "regulator-fixed";
97 regulator-name = "USB_PWR_EN";
98 regulator-min-microvolt = <5000000>;
99 regulator-max-microvolt = <5000000>;
100 vin-supply = <&vcc_5v>;
101
102 gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
103 enable-active-high;
104 };
105
106 vddao_1v8: regulator-vddao_1v8 { 114 vddao_1v8: regulator-vddao_1v8 {
107 compatible = "regulator-fixed"; 115 compatible = "regulator-fixed";
108 regulator-name = "VDDAO_1V8"; 116 regulator-name = "VDDAO_1V8";
@@ -143,6 +151,12 @@
143 }; 151 };
144}; 152};
145 153
154&ethmac {
155 status = "okay";
156 phy-handle = <&internal_ephy>;
157 phy-mode = "rmii";
158};
159
146&hdmi_tx { 160&hdmi_tx {
147 status = "okay"; 161 status = "okay";
148 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; 162 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
@@ -156,6 +170,70 @@
156 }; 170 };
157}; 171};
158 172
173&ir {
174 status = "okay";
175 pinctrl-0 = <&remote_input_ao_pins>;
176 pinctrl-names = "default";
177};
178
179/* i2c Touch */
180&i2c0 {
181 status = "okay";
182 pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
183 pinctrl-names = "default";
184};
185
186/* i2c CM */
187&i2c2 {
188 status = "okay";
189 pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
190 pinctrl-names = "default";
191};
192
193/* i2c Audio */
194&i2c3 {
195 status = "okay";
196 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
197 pinctrl-names = "default";
198};
199
200/* SD card */
201&sd_emmc_b {
202 status = "okay";
203 pinctrl-0 = <&sdcard_c_pins>;
204 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
205 pinctrl-names = "default", "clk-gate";
206
207 bus-width = <4>;
208 cap-sd-highspeed;
209 max-frequency = <50000000>;
210 disable-wp;
211
212 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
213 vmmc-supply = <&vddao_3v3>;
214 vqmmc-supply = <&vddao_3v3>;
215};
216
217/* eMMC */
218&sd_emmc_c {
219 status = "okay";
220 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
221 pinctrl-1 = <&emmc_clk_gate_pins>;
222 pinctrl-names = "default", "clk-gate";
223
224 bus-width = <8>;
225 cap-mmc-highspeed;
226 mmc-ddr-1_8v;
227 mmc-hs200-1_8v;
228 max-frequency = <200000000>;
229 non-removable;
230 disable-wp;
231
232 mmc-pwrseq = <&emmc_pwrseq>;
233 vmmc-supply = <&vcc_3v3>;
234 vqmmc-supply = <&flash_1v8>;
235};
236
159&uart_AO { 237&uart_AO {
160 status = "okay"; 238 status = "okay";
161 pinctrl-0 = <&uart_ao_a_pins>; 239 pinctrl-0 = <&uart_ao_a_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index b3d913f28f12..fe4013cca876 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -8,6 +8,7 @@
8#include "meson-g12a.dtsi" 8#include "meson-g12a.dtsi"
9#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/gpio/meson-g12a-gpio.h> 10#include <dt-bindings/gpio/meson-g12a-gpio.h>
11#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11 12
12/ { 13/ {
13 compatible = "amediatech,x96-max", "amlogic,u200", "amlogic,g12a"; 14 compatible = "amediatech,x96-max", "amlogic,u200", "amlogic,g12a";
@@ -15,7 +16,16 @@
15 16
16 aliases { 17 aliases {
17 serial0 = &uart_AO; 18 serial0 = &uart_AO;
19 ethernet0 = &ethmac;
18 }; 20 };
21
22 spdif_dit: audio-codec-1 {
23 #sound-dai-cells = <0>;
24 compatible = "linux,spdif-dit";
25 status = "okay";
26 sound-name-prefix = "DIT";
27 };
28
19 chosen { 29 chosen {
20 stdout-path = "serial0:115200n8"; 30 stdout-path = "serial0:115200n8";
21 }; 31 };
@@ -45,6 +55,18 @@
45 }; 55 };
46 }; 56 };
47 57
58 emmc_pwrseq: emmc-pwrseq {
59 compatible = "mmc-pwrseq-emmc";
60 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
61 };
62
63 sdio_pwrseq: sdio-pwrseq {
64 compatible = "mmc-pwrseq-simple";
65 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
66 clocks = <&wifi32k>;
67 clock-names = "ext_clock";
68 };
69
48 flash_1v8: regulator-flash_1v8 { 70 flash_1v8: regulator-flash_1v8 {
49 compatible = "regulator-fixed"; 71 compatible = "regulator-fixed";
50 regulator-name = "FLASH_1V8"; 72 regulator-name = "FLASH_1V8";
@@ -109,6 +131,97 @@
109 vin-supply = <&dc_in>; 131 vin-supply = <&dc_in>;
110 regulator-always-on; 132 regulator-always-on;
111 }; 133 };
134
135 sound {
136 compatible = "amlogic,axg-sound-card";
137 model = "G12A-X96-MAX";
138 audio-aux-devs = <&tdmout_b>;
139 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
140 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
141 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
142 "TDM_B Playback", "TDMOUT_B OUT",
143 "SPDIFOUT IN 0", "FRDDR_A OUT 3",
144 "SPDIFOUT IN 1", "FRDDR_B OUT 3",
145 "SPDIFOUT IN 2", "FRDDR_C OUT 3";
146
147 assigned-clocks = <&clkc CLKID_MPLL2>,
148 <&clkc CLKID_MPLL0>,
149 <&clkc CLKID_MPLL1>;
150 assigned-clock-parents = <0>, <0>, <0>;
151 assigned-clock-rates = <294912000>,
152 <270950400>,
153 <393216000>;
154 status = "okay";
155
156 dai-link-0 {
157 sound-dai = <&frddr_a>;
158 };
159
160 dai-link-1 {
161 sound-dai = <&frddr_b>;
162 };
163
164 dai-link-2 {
165 sound-dai = <&frddr_c>;
166 };
167
168 /* 8ch hdmi interface */
169 dai-link-3 {
170 sound-dai = <&tdmif_b>;
171 dai-format = "i2s";
172 dai-tdm-slot-tx-mask-0 = <1 1>;
173 dai-tdm-slot-tx-mask-1 = <1 1>;
174 dai-tdm-slot-tx-mask-2 = <1 1>;
175 dai-tdm-slot-tx-mask-3 = <1 1>;
176 mclk-fs = <256>;
177
178 codec {
179 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
180 };
181 };
182
183 /* spdif hdmi or toslink interface */
184 dai-link-4 {
185 sound-dai = <&spdifout>;
186
187 codec-0 {
188 sound-dai = <&spdif_dit>;
189 };
190
191 codec-1 {
192 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
193 };
194 };
195
196 /* spdif hdmi interface */
197 dai-link-5 {
198 sound-dai = <&spdifout_b>;
199
200 codec {
201 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
202 };
203 };
204
205 /* hdmi glue */
206 dai-link-6 {
207 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
208
209 codec {
210 sound-dai = <&hdmi_tx>;
211 };
212 };
213 };
214
215 wifi32k: wifi32k {
216 compatible = "pwm-clock";
217 #clock-cells = <0>;
218 clock-frequency = <32768>;
219 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
220 };
221};
222
223&arb {
224 status = "okay";
112}; 225};
113 226
114&cec_AO { 227&cec_AO {
@@ -125,12 +238,28 @@
125 hdmi-phandle = <&hdmi_tx>; 238 hdmi-phandle = <&hdmi_tx>;
126}; 239};
127 240
241&clkc_audio {
242 status = "okay";
243};
244
128&cvbs_vdac_port { 245&cvbs_vdac_port {
129 cvbs_vdac_out: endpoint { 246 cvbs_vdac_out: endpoint {
130 remote-endpoint = <&cvbs_connector_in>; 247 remote-endpoint = <&cvbs_connector_in>;
131 }; 248 };
132}; 249};
133 250
251&frddr_a {
252 status = "okay";
253};
254
255&frddr_b {
256 status = "okay";
257};
258
259&frddr_c {
260 status = "okay";
261};
262
134&hdmi_tx { 263&hdmi_tx {
135 status = "okay"; 264 status = "okay";
136 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; 265 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
@@ -144,6 +273,46 @@
144 }; 273 };
145}; 274};
146 275
276&ir {
277 status = "okay";
278 pinctrl-0 = <&remote_input_ao_pins>;
279 pinctrl-names = "default";
280};
281
282&ext_mdio {
283 external_phy: ethernet-phy@0 {
284 /* Realtek RTL8211F (0x001cc916) */
285 reg = <0>;
286 max-speed = <1000>;
287 eee-broken-1000t;
288
289 reset-assert-us = <10000>;
290 reset-deassert-us = <30000>;
291 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
292
293 interrupt-parent = <&gpio_intc>;
294 /* MAC_INTR on GPIOZ_14 */
295 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
296 };
297};
298
299&ethmac {
300 pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
301 pinctrl-names = "default";
302 status = "okay";
303 phy-mode = "rgmii";
304 phy-handle = <&external_phy>;
305 amlogic,tx-delay-ns = <2>;
306};
307
308&pwm_ef {
309 status = "okay";
310 pinctrl-0 = <&pwm_e_pins>;
311 pinctrl-names = "default";
312 clocks = <&xtal>;
313 clock-names = "clkin0";
314};
315
147&uart_A { 316&uart_A {
148 status = "okay"; 317 status = "okay";
149 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; 318 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
@@ -153,6 +322,9 @@
153 bluetooth { 322 bluetooth {
154 compatible = "brcm,bcm43438-bt"; 323 compatible = "brcm,bcm43438-bt";
155 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; 324 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
325 max-speed = <2000000>;
326 clocks = <&wifi32k>;
327 clock-names = "lpo";
156 }; 328 };
157}; 329};
158 330
@@ -166,3 +338,88 @@
166 status = "okay"; 338 status = "okay";
167 dr_mode = "host"; 339 dr_mode = "host";
168}; 340};
341
342/* SDIO */
343&sd_emmc_a {
344 status = "okay";
345 pinctrl-0 = <&sdio_pins>;
346 pinctrl-1 = <&sdio_clk_gate_pins>;
347 pinctrl-names = "default", "clk-gate";
348 #address-cells = <1>;
349 #size-cells = <0>;
350
351 bus-width = <4>;
352 cap-sd-highspeed;
353 sd-uhs-sdr50;
354 max-frequency = <100000000>;
355
356 non-removable;
357 disable-wp;
358
359 mmc-pwrseq = <&sdio_pwrseq>;
360
361 vmmc-supply = <&vddao_3v3>;
362 vqmmc-supply = <&vddao_1v8>;
363
364 brcmf: wifi@1 {
365 reg = <1>;
366 compatible = "brcm,bcm4329-fmac";
367 };
368};
369
370/* SD card */
371&sd_emmc_b {
372 status = "okay";
373 pinctrl-0 = <&sdcard_c_pins>;
374 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
375 pinctrl-names = "default", "clk-gate";
376
377 bus-width = <4>;
378 cap-sd-highspeed;
379 max-frequency = <100000000>;
380 disable-wp;
381
382 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
383 vmmc-supply = <&vddao_3v3>;
384 vqmmc-supply = <&vddao_3v3>;
385};
386
387/* eMMC */
388&sd_emmc_c {
389 status = "okay";
390 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
391 pinctrl-1 = <&emmc_clk_gate_pins>;
392 pinctrl-names = "default", "clk-gate";
393
394 bus-width = <8>;
395 cap-mmc-highspeed;
396 max-frequency = <100000000>;
397 non-removable;
398 disable-wp;
399
400 mmc-pwrseq = <&emmc_pwrseq>;
401 vmmc-supply = <&vcc_3v3>;
402 vqmmc-supply = <&flash_1v8>;
403};
404
405&spdifout {
406 pinctrl-0 = <&spdif_out_h_pins>;
407 pinctrl-names = "default";
408 status = "okay";
409};
410
411&spdifout_b {
412 status = "okay";
413};
414
415&tdmif_b {
416 status = "okay";
417};
418
419&tdmout_b {
420 status = "okay";
421};
422
423&tohdmitx {
424 status = "okay";
425};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index 9f72396ba710..f8d43e3dcf20 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -5,10 +5,12 @@
5 5
6#include <dt-bindings/phy/phy.h> 6#include <dt-bindings/phy/phy.h>
7#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/clock/axg-audio-clkc.h>
8#include <dt-bindings/clock/g12a-clkc.h> 9#include <dt-bindings/clock/g12a-clkc.h>
9#include <dt-bindings/clock/g12a-aoclkc.h> 10#include <dt-bindings/clock/g12a-aoclkc.h>
10#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
12#include <dt-bindings/reset/amlogic,meson-g12a-reset.h> 14#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 15
14/ { 16/ {
@@ -18,6 +20,39 @@
18 #address-cells = <2>; 20 #address-cells = <2>;
19 #size-cells = <2>; 21 #size-cells = <2>;
20 22
23 tdmif_a: audio-controller-0 {
24 compatible = "amlogic,axg-tdm-iface";
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "TDM_A";
27 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
29 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
30 clock-names = "mclk", "sclk", "lrclk";
31 status = "disabled";
32 };
33
34 tdmif_b: audio-controller-1 {
35 compatible = "amlogic,axg-tdm-iface";
36 #sound-dai-cells = <0>;
37 sound-name-prefix = "TDM_B";
38 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
40 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
41 clock-names = "mclk", "sclk", "lrclk";
42 status = "disabled";
43 };
44
45 tdmif_c: audio-controller-2 {
46 compatible = "amlogic,axg-tdm-iface";
47 #sound-dai-cells = <0>;
48 sound-name-prefix = "TDM_C";
49 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
51 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
52 clock-names = "mclk", "sclk", "lrclk";
53 status = "disabled";
54 };
55
21 cpus { 56 cpus {
22 #address-cells = <0x2>; 57 #address-cells = <0x2>;
23 #size-cells = <0x0>; 58 #size-cells = <0x0>;
@@ -102,6 +137,27 @@
102 #size-cells = <2>; 137 #size-cells = <2>;
103 ranges; 138 ranges;
104 139
140 ethmac: ethernet@ff3f0000 {
141 compatible = "amlogic,meson-axg-dwmac",
142 "snps,dwmac-3.70a",
143 "snps,dwmac";
144 reg = <0x0 0xff3f0000 0x0 0x10000
145 0x0 0xff634540 0x0 0x8>;
146 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
147 interrupt-names = "macirq";
148 clocks = <&clkc CLKID_ETH>,
149 <&clkc CLKID_FCLK_DIV2>,
150 <&clkc CLKID_MPLL2>;
151 clock-names = "stmmaceth", "clkin0", "clkin1";
152 status = "disabled";
153
154 mdio0: mdio {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 compatible = "snps,dwmac-mdio";
158 };
159 };
160
105 apb: bus@ff600000 { 161 apb: bus@ff600000 {
106 compatible = "simple-bus"; 162 compatible = "simple-bus";
107 reg = <0x0 0xff600000 0x0 0x200000>; 163 reg = <0x0 0xff600000 0x0 0x200000>;
@@ -123,6 +179,7 @@
123 clock-names = "isfr", "iahb", "venci"; 179 clock-names = "isfr", "iahb", "venci";
124 #address-cells = <1>; 180 #address-cells = <1>;
125 #size-cells = <0>; 181 #size-cells = <0>;
182 #sound-dai-cells = <0>;
126 status = "disabled"; 183 status = "disabled";
127 184
128 /* VPU VENC Input */ 185 /* VPU VENC Input */
@@ -140,6 +197,19 @@
140 }; 197 };
141 }; 198 };
142 199
200 apb_efuse: bus@30000 {
201 compatible = "simple-bus";
202 reg = <0x0 0x30000 0x0 0x2000>;
203 #address-cells = <2>;
204 #size-cells = <2>;
205 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
206
207 hwrng: rng@218 {
208 compatible = "amlogic,meson-rng";
209 reg = <0x0 0x218 0x0 0x4>;
210 };
211 };
212
143 periphs: bus@34400 { 213 periphs: bus@34400 {
144 compatible = "simple-bus"; 214 compatible = "simple-bus";
145 reg = <0x0 0x34400 0x0 0x400>; 215 reg = <0x0 0x34400 0x0 0x400>;
@@ -185,12 +255,55 @@
185 }; 255 };
186 }; 256 };
187 257
258 emmc_pins: emmc {
259 mux-0 {
260 groups = "emmc_nand_d0",
261 "emmc_nand_d1",
262 "emmc_nand_d2",
263 "emmc_nand_d3",
264 "emmc_nand_d4",
265 "emmc_nand_d5",
266 "emmc_nand_d6",
267 "emmc_nand_d7",
268 "emmc_cmd";
269 function = "emmc";
270 bias-pull-up;
271 drive-strength-microamp = <4000>;
272 };
273
274 mux-1 {
275 groups = "emmc_clk";
276 function = "emmc";
277 bias-disable;
278 drive-strength-microamp = <4000>;
279 };
280 };
281
282 emmc_ds_pins: emmc-ds {
283 mux {
284 groups = "emmc_nand_ds";
285 function = "emmc";
286 bias-pull-down;
287 drive-strength-microamp = <4000>;
288 };
289 };
290
291 emmc_clk_gate_pins: emmc_clk_gate {
292 mux {
293 groups = "BOOT_8";
294 function = "gpio_periphs";
295 bias-pull-down;
296 drive-strength-microamp = <4000>;
297 };
298 };
299
188 hdmitx_ddc_pins: hdmitx_ddc { 300 hdmitx_ddc_pins: hdmitx_ddc {
189 mux { 301 mux {
190 groups = "hdmitx_sda", 302 groups = "hdmitx_sda",
191 "hdmitx_sck"; 303 "hdmitx_sck";
192 function = "hdmitx"; 304 function = "hdmitx";
193 bias-disable; 305 bias-disable;
306 drive-strength-microamp = <4000>;
194 }; 307 };
195 }; 308 };
196 309
@@ -202,6 +315,1040 @@
202 }; 315 };
203 }; 316 };
204 317
318
319 i2c0_sda_c_pins: i2c0-sda-c {
320 mux {
321 groups = "i2c0_sda_c";
322 function = "i2c0";
323 bias-disable;
324 drive-strength-microamp = <3000>;
325
326 };
327 };
328
329 i2c0_sck_c_pins: i2c0-sck-c {
330 mux {
331 groups = "i2c0_sck_c";
332 function = "i2c0";
333 bias-disable;
334 drive-strength-microamp = <3000>;
335 };
336 };
337
338 i2c0_sda_z0_pins: i2c0-sda-z0 {
339 mux {
340 groups = "i2c0_sda_z0";
341 function = "i2c0";
342 bias-disable;
343 drive-strength-microamp = <3000>;
344 };
345 };
346
347 i2c0_sck_z1_pins: i2c0-sck-z1 {
348 mux {
349 groups = "i2c0_sck_z1";
350 function = "i2c0";
351 bias-disable;
352 drive-strength-microamp = <3000>;
353 };
354 };
355
356 i2c0_sda_z7_pins: i2c0-sda-z7 {
357 mux {
358 groups = "i2c0_sda_z7";
359 function = "i2c0";
360 bias-disable;
361 drive-strength-microamp = <3000>;
362 };
363 };
364
365 i2c0_sda_z8_pins: i2c0-sda-z8 {
366 mux {
367 groups = "i2c0_sda_z8";
368 function = "i2c0";
369 bias-disable;
370 drive-strength-microamp = <3000>;
371 };
372 };
373
374 i2c1_sda_x_pins: i2c1-sda-x {
375 mux {
376 groups = "i2c1_sda_x";
377 function = "i2c1";
378 bias-disable;
379 drive-strength-microamp = <3000>;
380 };
381 };
382
383 i2c1_sck_x_pins: i2c1-sck-x {
384 mux {
385 groups = "i2c1_sck_x";
386 function = "i2c1";
387 bias-disable;
388 drive-strength-microamp = <3000>;
389 };
390 };
391
392 i2c1_sda_h2_pins: i2c1-sda-h2 {
393 mux {
394 groups = "i2c1_sda_h2";
395 function = "i2c1";
396 bias-disable;
397 drive-strength-microamp = <3000>;
398 };
399 };
400
401 i2c1_sck_h3_pins: i2c1-sck-h3 {
402 mux {
403 groups = "i2c1_sck_h3";
404 function = "i2c1";
405 bias-disable;
406 drive-strength-microamp = <3000>;
407 };
408 };
409
410 i2c1_sda_h6_pins: i2c1-sda-h6 {
411 mux {
412 groups = "i2c1_sda_h6";
413 function = "i2c1";
414 bias-disable;
415 drive-strength-microamp = <3000>;
416 };
417 };
418
419 i2c1_sck_h7_pins: i2c1-sck-h7 {
420 mux {
421 groups = "i2c1_sck_h7";
422 function = "i2c1";
423 bias-disable;
424 drive-strength-microamp = <3000>;
425 };
426 };
427
428 i2c2_sda_x_pins: i2c2-sda-x {
429 mux {
430 groups = "i2c2_sda_x";
431 function = "i2c2";
432 bias-disable;
433 drive-strength-microamp = <3000>;
434 };
435 };
436
437 i2c2_sck_x_pins: i2c2-sck-x {
438 mux {
439 groups = "i2c2_sck_x";
440 function = "i2c2";
441 bias-disable;
442 drive-strength-microamp = <3000>;
443 };
444 };
445
446 i2c2_sda_z_pins: i2c2-sda-z {
447 mux {
448 groups = "i2c2_sda_z";
449 function = "i2c2";
450 bias-disable;
451 drive-strength-microamp = <3000>;
452 };
453 };
454
455 i2c2_sck_z_pins: i2c2-sck-z {
456 mux {
457 groups = "i2c2_sck_z";
458 function = "i2c2";
459 bias-disable;
460 drive-strength-microamp = <3000>;
461 };
462 };
463
464 i2c3_sda_h_pins: i2c3-sda-h {
465 mux {
466 groups = "i2c3_sda_h";
467 function = "i2c3";
468 bias-disable;
469 drive-strength-microamp = <3000>;
470 };
471 };
472
473 i2c3_sck_h_pins: i2c3-sck-h {
474 mux {
475 groups = "i2c3_sck_h";
476 function = "i2c3";
477 bias-disable;
478 drive-strength-microamp = <3000>;
479 };
480 };
481
482 i2c3_sda_a_pins: i2c3-sda-a {
483 mux {
484 groups = "i2c3_sda_a";
485 function = "i2c3";
486 bias-disable;
487 drive-strength-microamp = <3000>;
488 };
489 };
490
491 i2c3_sck_a_pins: i2c3-sck-a {
492 mux {
493 groups = "i2c3_sck_a";
494 function = "i2c3";
495 bias-disable;
496 drive-strength-microamp = <3000>;
497 };
498 };
499
500 mclk0_a_pins: mclk0-a {
501 mux {
502 groups = "mclk0_a";
503 function = "mclk0";
504 bias-disable;
505 drive-strength-microamp = <3000>;
506 };
507 };
508
509 mclk1_a_pins: mclk1-a {
510 mux {
511 groups = "mclk1_a";
512 function = "mclk1";
513 bias-disable;
514 drive-strength-microamp = <3000>;
515 };
516 };
517
518 mclk1_x_pins: mclk1-x {
519 mux {
520 groups = "mclk1_x";
521 function = "mclk1";
522 bias-disable;
523 drive-strength-microamp = <3000>;
524 };
525 };
526
527 mclk1_z_pins: mclk1-z {
528 mux {
529 groups = "mclk1_z";
530 function = "mclk1";
531 bias-disable;
532 drive-strength-microamp = <3000>;
533 };
534 };
535
536 pdm_din0_a_pins: pdm-din0-a {
537 mux {
538 groups = "pdm_din0_a";
539 function = "pdm";
540 bias-disable;
541 };
542 };
543
544 pdm_din0_c_pins: pdm-din0-c {
545 mux {
546 groups = "pdm_din0_c";
547 function = "pdm";
548 bias-disable;
549 };
550 };
551
552 pdm_din0_x_pins: pdm-din0-x {
553 mux {
554 groups = "pdm_din0_x";
555 function = "pdm";
556 bias-disable;
557 };
558 };
559
560 pdm_din0_z_pins: pdm-din0-z {
561 mux {
562 groups = "pdm_din0_z";
563 function = "pdm";
564 bias-disable;
565 };
566 };
567
568 pdm_din1_a_pins: pdm-din1-a {
569 mux {
570 groups = "pdm_din1_a";
571 function = "pdm";
572 bias-disable;
573 };
574 };
575
576 pdm_din1_c_pins: pdm-din1-c {
577 mux {
578 groups = "pdm_din1_c";
579 function = "pdm";
580 bias-disable;
581 };
582 };
583
584 pdm_din1_x_pins: pdm-din1-x {
585 mux {
586 groups = "pdm_din1_x";
587 function = "pdm";
588 bias-disable;
589 };
590 };
591
592 pdm_din1_z_pins: pdm-din1-z {
593 mux {
594 groups = "pdm_din1_z";
595 function = "pdm";
596 bias-disable;
597 };
598 };
599
600 pdm_din2_a_pins: pdm-din2-a {
601 mux {
602 groups = "pdm_din2_a";
603 function = "pdm";
604 bias-disable;
605 };
606 };
607
608 pdm_din2_c_pins: pdm-din2-c {
609 mux {
610 groups = "pdm_din2_c";
611 function = "pdm";
612 bias-disable;
613 };
614 };
615
616 pdm_din2_x_pins: pdm-din2-x {
617 mux {
618 groups = "pdm_din2_x";
619 function = "pdm";
620 bias-disable;
621 };
622 };
623
624 pdm_din2_z_pins: pdm-din2-z {
625 mux {
626 groups = "pdm_din2_z";
627 function = "pdm";
628 bias-disable;
629 };
630 };
631
632 pdm_din3_a_pins: pdm-din3-a {
633 mux {
634 groups = "pdm_din3_a";
635 function = "pdm";
636 bias-disable;
637 };
638 };
639
640 pdm_din3_c_pins: pdm-din3-c {
641 mux {
642 groups = "pdm_din3_c";
643 function = "pdm";
644 bias-disable;
645 };
646 };
647
648 pdm_din3_x_pins: pdm-din3-x {
649 mux {
650 groups = "pdm_din3_x";
651 function = "pdm";
652 bias-disable;
653 };
654 };
655
656 pdm_din3_z_pins: pdm-din3-z {
657 mux {
658 groups = "pdm_din3_z";
659 function = "pdm";
660 bias-disable;
661 };
662 };
663
664 pdm_dclk_a_pins: pdm-dclk-a {
665 mux {
666 groups = "pdm_dclk_a";
667 function = "pdm";
668 bias-disable;
669 drive-strength-microamp = <500>;
670 };
671 };
672
673 pdm_dclk_c_pins: pdm-dclk-c {
674 mux {
675 groups = "pdm_dclk_c";
676 function = "pdm";
677 bias-disable;
678 drive-strength-microamp = <500>;
679 };
680 };
681
682 pdm_dclk_x_pins: pdm-dclk-x {
683 mux {
684 groups = "pdm_dclk_x";
685 function = "pdm";
686 bias-disable;
687 drive-strength-microamp = <500>;
688 };
689 };
690
691 pdm_dclk_z_pins: pdm-dclk-z {
692 mux {
693 groups = "pdm_dclk_z";
694 function = "pdm";
695 bias-disable;
696 drive-strength-microamp = <500>;
697 };
698 };
699
700 pwm_a_pins: pwm-a {
701 mux {
702 groups = "pwm_a";
703 function = "pwm_a";
704 bias-disable;
705 };
706 };
707
708 pwm_b_x7_pins: pwm-b-x7 {
709 mux {
710 groups = "pwm_b_x7";
711 function = "pwm_b";
712 bias-disable;
713 };
714 };
715
716 pwm_b_x19_pins: pwm-b-x19 {
717 mux {
718 groups = "pwm_b_x19";
719 function = "pwm_b";
720 bias-disable;
721 };
722 };
723
724 pwm_c_c_pins: pwm-c-c {
725 mux {
726 groups = "pwm_c_c";
727 function = "pwm_c";
728 bias-disable;
729 };
730 };
731
732 pwm_c_x5_pins: pwm-c-x5 {
733 mux {
734 groups = "pwm_c_x5";
735 function = "pwm_c";
736 bias-disable;
737 };
738 };
739
740 pwm_c_x8_pins: pwm-c-x8 {
741 mux {
742 groups = "pwm_c_x8";
743 function = "pwm_c";
744 bias-disable;
745 };
746 };
747
748 pwm_d_x3_pins: pwm-d-x3 {
749 mux {
750 groups = "pwm_d_x3";
751 function = "pwm_d";
752 bias-disable;
753 };
754 };
755
756 pwm_d_x6_pins: pwm-d-x6 {
757 mux {
758 groups = "pwm_d_x6";
759 function = "pwm_d";
760 bias-disable;
761 };
762 };
763
764 pwm_e_pins: pwm-e {
765 mux {
766 groups = "pwm_e";
767 function = "pwm_e";
768 bias-disable;
769 };
770 };
771
772 pwm_f_x_pins: pwm-f-x {
773 mux {
774 groups = "pwm_f_x";
775 function = "pwm_f";
776 bias-disable;
777 };
778 };
779
780 pwm_f_h_pins: pwm-f-h {
781 mux {
782 groups = "pwm_f_h";
783 function = "pwm_f";
784 bias-disable;
785 };
786 };
787
788 sdcard_c_pins: sdcard_c {
789 mux-0 {
790 groups = "sdcard_d0_c",
791 "sdcard_d1_c",
792 "sdcard_d2_c",
793 "sdcard_d3_c",
794 "sdcard_cmd_c";
795 function = "sdcard";
796 bias-pull-up;
797 drive-strength-microamp = <4000>;
798 };
799
800 mux-1 {
801 groups = "sdcard_clk_c";
802 function = "sdcard";
803 bias-disable;
804 drive-strength-microamp = <4000>;
805 };
806 };
807
808 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
809 mux {
810 groups = "GPIOC_4";
811 function = "gpio_periphs";
812 bias-pull-down;
813 drive-strength-microamp = <4000>;
814 };
815 };
816
817 sdcard_z_pins: sdcard_z {
818 mux-0 {
819 groups = "sdcard_d0_z",
820 "sdcard_d1_z",
821 "sdcard_d2_z",
822 "sdcard_d3_z",
823 "sdcard_cmd_z";
824 function = "sdcard";
825 bias-pull-up;
826 drive-strength-microamp = <4000>;
827 };
828
829 mux-1 {
830 groups = "sdcard_clk_z";
831 function = "sdcard";
832 bias-disable;
833 drive-strength-microamp = <4000>;
834 };
835 };
836
837 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
838 mux {
839 groups = "GPIOZ_6";
840 function = "gpio_periphs";
841 bias-pull-down;
842 drive-strength-microamp = <4000>;
843 };
844 };
845
846 sdio_pins: sdio {
847 mux {
848 groups = "sdio_d0",
849 "sdio_d1",
850 "sdio_d2",
851 "sdio_d3",
852 "sdio_clk",
853 "sdio_cmd";
854 function = "sdio";
855 bias-disable;
856 drive-strength-microamp = <4000>;
857 };
858 };
859
860 sdio_clk_gate_pins: sdio_clk_gate {
861 mux {
862 groups = "GPIOX_4";
863 function = "gpio_periphs";
864 bias-pull-down;
865 drive-strength-microamp = <4000>;
866 };
867 };
868
869 spdif_in_a10_pins: spdif-in-a10 {
870 mux {
871 groups = "spdif_in_a10";
872 function = "spdif_in";
873 bias-disable;
874 };
875 };
876
877 spdif_in_a12_pins: spdif-in-a12 {
878 mux {
879 groups = "spdif_in_a12";
880 function = "spdif_in";
881 bias-disable;
882 };
883 };
884
885 spdif_in_h_pins: spdif-in-h {
886 mux {
887 groups = "spdif_in_h";
888 function = "spdif_in";
889 bias-disable;
890 };
891 };
892
893 spdif_out_h_pins: spdif-out-h {
894 mux {
895 groups = "spdif_out_h";
896 function = "spdif_out";
897 drive-strength-microamp = <500>;
898 bias-disable;
899 };
900 };
901
902 spdif_out_a11_pins: spdif-out-a11 {
903 mux {
904 groups = "spdif_out_a11";
905 function = "spdif_out";
906 drive-strength-microamp = <500>;
907 bias-disable;
908 };
909 };
910
911 spdif_out_a13_pins: spdif-out-a13 {
912 mux {
913 groups = "spdif_out_a13";
914 function = "spdif_out";
915 drive-strength-microamp = <500>;
916 bias-disable;
917 };
918 };
919
920 tdm_a_din0_pins: tdm-a-din0 {
921 mux {
922 groups = "tdm_a_din0";
923 function = "tdm_a";
924 bias-disable;
925 };
926 };
927
928
929 tdm_a_din1_pins: tdm-a-din1 {
930 mux {
931 groups = "tdm_a_din1";
932 function = "tdm_a";
933 bias-disable;
934 };
935 };
936
937 tdm_a_dout0_pins: tdm-a-dout0 {
938 mux {
939 groups = "tdm_a_dout0";
940 function = "tdm_a";
941 bias-disable;
942 drive-strength-microamp = <3000>;
943 };
944 };
945
946 tdm_a_dout1_pins: tdm-a-dout1 {
947 mux {
948 groups = "tdm_a_dout1";
949 function = "tdm_a";
950 bias-disable;
951 drive-strength-microamp = <3000>;
952 };
953 };
954
955 tdm_a_fs_pins: tdm-a-fs {
956 mux {
957 groups = "tdm_a_fs";
958 function = "tdm_a";
959 bias-disable;
960 drive-strength-microamp = <3000>;
961 };
962 };
963
964 tdm_a_sclk_pins: tdm-a-sclk {
965 mux {
966 groups = "tdm_a_sclk";
967 function = "tdm_a";
968 bias-disable;
969 drive-strength-microamp = <3000>;
970 };
971 };
972
973 tdm_a_slv_fs_pins: tdm-a-slv-fs {
974 mux {
975 groups = "tdm_a_slv_fs";
976 function = "tdm_a";
977 bias-disable;
978 };
979 };
980
981
982 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
983 mux {
984 groups = "tdm_a_slv_sclk";
985 function = "tdm_a";
986 bias-disable;
987 };
988 };
989
990 tdm_b_din0_pins: tdm-b-din0 {
991 mux {
992 groups = "tdm_b_din0";
993 function = "tdm_b";
994 bias-disable;
995 };
996 };
997
998 tdm_b_din1_pins: tdm-b-din1 {
999 mux {
1000 groups = "tdm_b_din1";
1001 function = "tdm_b";
1002 bias-disable;
1003 };
1004 };
1005
1006 tdm_b_din2_pins: tdm-b-din2 {
1007 mux {
1008 groups = "tdm_b_din2";
1009 function = "tdm_b";
1010 bias-disable;
1011 };
1012 };
1013
1014 tdm_b_din3_a_pins: tdm-b-din3-a {
1015 mux {
1016 groups = "tdm_b_din3_a";
1017 function = "tdm_b";
1018 bias-disable;
1019 };
1020 };
1021
1022 tdm_b_din3_h_pins: tdm-b-din3-h {
1023 mux {
1024 groups = "tdm_b_din3_h";
1025 function = "tdm_b";
1026 bias-disable;
1027 };
1028 };
1029
1030 tdm_b_dout0_pins: tdm-b-dout0 {
1031 mux {
1032 groups = "tdm_b_dout0";
1033 function = "tdm_b";
1034 bias-disable;
1035 drive-strength-microamp = <3000>;
1036 };
1037 };
1038
1039 tdm_b_dout1_pins: tdm-b-dout1 {
1040 mux {
1041 groups = "tdm_b_dout1";
1042 function = "tdm_b";
1043 bias-disable;
1044 drive-strength-microamp = <3000>;
1045 };
1046 };
1047
1048 tdm_b_dout2_pins: tdm-b-dout2 {
1049 mux {
1050 groups = "tdm_b_dout2";
1051 function = "tdm_b";
1052 bias-disable;
1053 drive-strength-microamp = <3000>;
1054 };
1055 };
1056
1057 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1058 mux {
1059 groups = "tdm_b_dout3_a";
1060 function = "tdm_b";
1061 bias-disable;
1062 drive-strength-microamp = <3000>;
1063 };
1064 };
1065
1066 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1067 mux {
1068 groups = "tdm_b_dout3_h";
1069 function = "tdm_b";
1070 bias-disable;
1071 drive-strength-microamp = <3000>;
1072 };
1073 };
1074
1075 tdm_b_fs_pins: tdm-b-fs {
1076 mux {
1077 groups = "tdm_b_fs";
1078 function = "tdm_b";
1079 bias-disable;
1080 drive-strength-microamp = <3000>;
1081 };
1082 };
1083
1084 tdm_b_sclk_pins: tdm-b-sclk {
1085 mux {
1086 groups = "tdm_b_sclk";
1087 function = "tdm_b";
1088 bias-disable;
1089 drive-strength-microamp = <3000>;
1090 };
1091 };
1092
1093 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1094 mux {
1095 groups = "tdm_b_slv_fs";
1096 function = "tdm_b";
1097 bias-disable;
1098 };
1099 };
1100
1101 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1102 mux {
1103 groups = "tdm_b_slv_sclk";
1104 function = "tdm_b";
1105 bias-disable;
1106 };
1107 };
1108
1109 tdm_c_din0_a_pins: tdm-c-din0-a {
1110 mux {
1111 groups = "tdm_c_din0_a";
1112 function = "tdm_c";
1113 bias-disable;
1114 };
1115 };
1116
1117 tdm_c_din0_z_pins: tdm-c-din0-z {
1118 mux {
1119 groups = "tdm_c_din0_z";
1120 function = "tdm_c";
1121 bias-disable;
1122 };
1123 };
1124
1125 tdm_c_din1_a_pins: tdm-c-din1-a {
1126 mux {
1127 groups = "tdm_c_din1_a";
1128 function = "tdm_c";
1129 bias-disable;
1130 };
1131 };
1132
1133 tdm_c_din1_z_pins: tdm-c-din1-z {
1134 mux {
1135 groups = "tdm_c_din1_z";
1136 function = "tdm_c";
1137 bias-disable;
1138 };
1139 };
1140
1141 tdm_c_din2_a_pins: tdm-c-din2-a {
1142 mux {
1143 groups = "tdm_c_din2_a";
1144 function = "tdm_c";
1145 bias-disable;
1146 };
1147 };
1148
1149 eth_leds_pins: eth-leds {
1150 mux {
1151 groups = "eth_link_led",
1152 "eth_act_led";
1153 function = "eth";
1154 bias-disable;
1155 };
1156 };
1157
1158 eth_pins: eth {
1159 mux {
1160 groups = "eth_mdio",
1161 "eth_mdc",
1162 "eth_rgmii_rx_clk",
1163 "eth_rx_dv",
1164 "eth_rxd0",
1165 "eth_rxd1",
1166 "eth_txen",
1167 "eth_txd0",
1168 "eth_txd1";
1169 function = "eth";
1170 drive-strength-microamp = <4000>;
1171 bias-disable;
1172 };
1173 };
1174
1175 eth_rgmii_pins: eth-rgmii {
1176 mux {
1177 groups = "eth_rxd2_rgmii",
1178 "eth_rxd3_rgmii",
1179 "eth_rgmii_tx_clk",
1180 "eth_txd2_rgmii",
1181 "eth_txd3_rgmii";
1182 function = "eth";
1183 drive-strength-microamp = <4000>;
1184 bias-disable;
1185 };
1186 };
1187
1188 tdm_c_din2_z_pins: tdm-c-din2-z {
1189 mux {
1190 groups = "tdm_c_din2_z";
1191 function = "tdm_c";
1192 bias-disable;
1193 };
1194 };
1195
1196 tdm_c_din3_a_pins: tdm-c-din3-a {
1197 mux {
1198 groups = "tdm_c_din3_a";
1199 function = "tdm_c";
1200 bias-disable;
1201 };
1202 };
1203
1204 tdm_c_din3_z_pins: tdm-c-din3-z {
1205 mux {
1206 groups = "tdm_c_din3_z";
1207 function = "tdm_c";
1208 bias-disable;
1209 };
1210 };
1211
1212 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1213 mux {
1214 groups = "tdm_c_dout0_a";
1215 function = "tdm_c";
1216 bias-disable;
1217 drive-strength-microamp = <3000>;
1218 };
1219 };
1220
1221 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1222 mux {
1223 groups = "tdm_c_dout0_z";
1224 function = "tdm_c";
1225 bias-disable;
1226 drive-strength-microamp = <3000>;
1227 };
1228 };
1229
1230 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1231 mux {
1232 groups = "tdm_c_dout1_a";
1233 function = "tdm_c";
1234 bias-disable;
1235 drive-strength-microamp = <3000>;
1236 };
1237 };
1238
1239 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1240 mux {
1241 groups = "tdm_c_dout1_z";
1242 function = "tdm_c";
1243 bias-disable;
1244 drive-strength-microamp = <3000>;
1245 };
1246 };
1247
1248 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1249 mux {
1250 groups = "tdm_c_dout2_a";
1251 function = "tdm_c";
1252 bias-disable;
1253 drive-strength-microamp = <3000>;
1254 };
1255 };
1256
1257 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1258 mux {
1259 groups = "tdm_c_dout2_z";
1260 function = "tdm_c";
1261 bias-disable;
1262 drive-strength-microamp = <3000>;
1263 };
1264 };
1265
1266 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1267 mux {
1268 groups = "tdm_c_dout3_a";
1269 function = "tdm_c";
1270 bias-disable;
1271 drive-strength-microamp = <3000>;
1272 };
1273 };
1274
1275 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1276 mux {
1277 groups = "tdm_c_dout3_z";
1278 function = "tdm_c";
1279 bias-disable;
1280 drive-strength-microamp = <3000>;
1281 };
1282 };
1283
1284 tdm_c_fs_a_pins: tdm-c-fs-a {
1285 mux {
1286 groups = "tdm_c_fs_a";
1287 function = "tdm_c";
1288 bias-disable;
1289 drive-strength-microamp = <3000>;
1290 };
1291 };
1292
1293 tdm_c_fs_z_pins: tdm-c-fs-z {
1294 mux {
1295 groups = "tdm_c_fs_z";
1296 function = "tdm_c";
1297 bias-disable;
1298 drive-strength-microamp = <3000>;
1299 };
1300 };
1301
1302 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1303 mux {
1304 groups = "tdm_c_sclk_a";
1305 function = "tdm_c";
1306 bias-disable;
1307 drive-strength-microamp = <3000>;
1308 };
1309 };
1310
1311 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1312 mux {
1313 groups = "tdm_c_sclk_z";
1314 function = "tdm_c";
1315 bias-disable;
1316 drive-strength-microamp = <3000>;
1317 };
1318 };
1319
1320 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1321 mux {
1322 groups = "tdm_c_slv_fs_a";
1323 function = "tdm_c";
1324 bias-disable;
1325 };
1326 };
1327
1328 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1329 mux {
1330 groups = "tdm_c_slv_fs_z";
1331 function = "tdm_c";
1332 bias-disable;
1333 };
1334 };
1335
1336 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1337 mux {
1338 groups = "tdm_c_slv_sclk_a";
1339 function = "tdm_c";
1340 bias-disable;
1341 };
1342 };
1343
1344 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1345 mux {
1346 groups = "tdm_c_slv_sclk_z";
1347 function = "tdm_c";
1348 bias-disable;
1349 };
1350 };
1351
205 uart_a_pins: uart-a { 1352 uart_a_pins: uart-a {
206 mux { 1353 mux {
207 groups = "uart_a_tx", 1354 groups = "uart_a_tx",
@@ -303,6 +1450,282 @@
303 }; 1450 };
304 }; 1451 };
305 1452
1453 pdm: audio-controller@40000 {
1454 compatible = "amlogic,g12a-pdm",
1455 "amlogic,axg-pdm";
1456 reg = <0x0 0x40000 0x0 0x34>;
1457 #sound-dai-cells = <0>;
1458 sound-name-prefix = "PDM";
1459 clocks = <&clkc_audio AUD_CLKID_PDM>,
1460 <&clkc_audio AUD_CLKID_PDM_DCLK>,
1461 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
1462 clock-names = "pclk", "dclk", "sysclk";
1463 status = "disabled";
1464 };
1465
1466 audio: bus@42000 {
1467 compatible = "simple-bus";
1468 reg = <0x0 0x42000 0x0 0x2000>;
1469 #address-cells = <2>;
1470 #size-cells = <2>;
1471 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
1472
1473 clkc_audio: clock-controller@0 {
1474 status = "disabled";
1475 compatible = "amlogic,g12a-audio-clkc";
1476 reg = <0x0 0x0 0x0 0xb4>;
1477 #clock-cells = <1>;
1478
1479 clocks = <&clkc CLKID_AUDIO>,
1480 <&clkc CLKID_MPLL0>,
1481 <&clkc CLKID_MPLL1>,
1482 <&clkc CLKID_MPLL2>,
1483 <&clkc CLKID_MPLL3>,
1484 <&clkc CLKID_HIFI_PLL>,
1485 <&clkc CLKID_FCLK_DIV3>,
1486 <&clkc CLKID_FCLK_DIV4>,
1487 <&clkc CLKID_GP0_PLL>;
1488 clock-names = "pclk",
1489 "mst_in0",
1490 "mst_in1",
1491 "mst_in2",
1492 "mst_in3",
1493 "mst_in4",
1494 "mst_in5",
1495 "mst_in6",
1496 "mst_in7";
1497
1498 resets = <&reset RESET_AUDIO>;
1499 };
1500
1501 toddr_a: audio-controller@100 {
1502 compatible = "amlogic,g12a-toddr",
1503 "amlogic,axg-toddr";
1504 reg = <0x0 0x100 0x0 0x1c>;
1505 #sound-dai-cells = <0>;
1506 sound-name-prefix = "TODDR_A";
1507 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
1508 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1509 resets = <&arb AXG_ARB_TODDR_A>;
1510 status = "disabled";
1511 };
1512
1513 toddr_b: audio-controller@140 {
1514 compatible = "amlogic,g12a-toddr",
1515 "amlogic,axg-toddr";
1516 reg = <0x0 0x140 0x0 0x1c>;
1517 #sound-dai-cells = <0>;
1518 sound-name-prefix = "TODDR_B";
1519 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
1520 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1521 resets = <&arb AXG_ARB_TODDR_B>;
1522 status = "disabled";
1523 };
1524
1525 toddr_c: audio-controller@180 {
1526 compatible = "amlogic,g12a-toddr",
1527 "amlogic,axg-toddr";
1528 reg = <0x0 0x180 0x0 0x1c>;
1529 #sound-dai-cells = <0>;
1530 sound-name-prefix = "TODDR_C";
1531 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
1532 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1533 resets = <&arb AXG_ARB_TODDR_C>;
1534 status = "disabled";
1535 };
1536
1537 frddr_a: audio-controller@1c0 {
1538 compatible = "amlogic,g12a-frddr",
1539 "amlogic,axg-frddr";
1540 reg = <0x0 0x1c0 0x0 0x1c>;
1541 #sound-dai-cells = <0>;
1542 sound-name-prefix = "FRDDR_A";
1543 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
1544 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1545 resets = <&arb AXG_ARB_FRDDR_A>;
1546 status = "disabled";
1547 };
1548
1549 frddr_b: audio-controller@200 {
1550 compatible = "amlogic,g12a-frddr",
1551 "amlogic,axg-frddr";
1552 reg = <0x0 0x200 0x0 0x1c>;
1553 #sound-dai-cells = <0>;
1554 sound-name-prefix = "FRDDR_B";
1555 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
1556 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1557 resets = <&arb AXG_ARB_FRDDR_B>;
1558 status = "disabled";
1559 };
1560
1561 frddr_c: audio-controller@240 {
1562 compatible = "amlogic,g12a-frddr",
1563 "amlogic,axg-frddr";
1564 reg = <0x0 0x240 0x0 0x1c>;
1565 #sound-dai-cells = <0>;
1566 sound-name-prefix = "FRDDR_C";
1567 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
1568 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1569 resets = <&arb AXG_ARB_FRDDR_C>;
1570 status = "disabled";
1571 };
1572
1573 arb: reset-controller@280 {
1574 status = "disabled";
1575 compatible = "amlogic,meson-axg-audio-arb";
1576 reg = <0x0 0x280 0x0 0x4>;
1577 #reset-cells = <1>;
1578 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1579 };
1580
1581 tdmin_a: audio-controller@300 {
1582 compatible = "amlogic,g12a-tdmin",
1583 "amlogic,axg-tdmin";
1584 reg = <0x0 0x300 0x0 0x40>;
1585 sound-name-prefix = "TDMIN_A";
1586 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1587 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1588 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1589 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1590 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1591 clock-names = "pclk", "sclk", "sclk_sel",
1592 "lrclk", "lrclk_sel";
1593 status = "disabled";
1594 };
1595
1596 tdmin_b: audio-controller@340 {
1597 compatible = "amlogic,g12a-tdmin",
1598 "amlogic,axg-tdmin";
1599 reg = <0x0 0x340 0x0 0x40>;
1600 sound-name-prefix = "TDMIN_B";
1601 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1602 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1603 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1604 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1605 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1606 clock-names = "pclk", "sclk", "sclk_sel",
1607 "lrclk", "lrclk_sel";
1608 status = "disabled";
1609 };
1610
1611 tdmin_c: audio-controller@380 {
1612 compatible = "amlogic,g12a-tdmin",
1613 "amlogic,axg-tdmin";
1614 reg = <0x0 0x380 0x0 0x40>;
1615 sound-name-prefix = "TDMIN_C";
1616 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1617 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1618 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1619 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1620 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1621 clock-names = "pclk", "sclk", "sclk_sel",
1622 "lrclk", "lrclk_sel";
1623 status = "disabled";
1624 };
1625
1626 tdmin_lb: audio-controller@3c0 {
1627 compatible = "amlogic,g12a-tdmin",
1628 "amlogic,axg-tdmin";
1629 reg = <0x0 0x3c0 0x0 0x40>;
1630 sound-name-prefix = "TDMIN_LB";
1631 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1632 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1633 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1634 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1635 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1636 clock-names = "pclk", "sclk", "sclk_sel",
1637 "lrclk", "lrclk_sel";
1638 status = "disabled";
1639 };
1640
1641 spdifin: audio-controller@400 {
1642 compatible = "amlogic,g12a-spdifin",
1643 "amlogic,axg-spdifin";
1644 reg = <0x0 0x400 0x0 0x30>;
1645 #sound-dai-cells = <0>;
1646 sound-name-prefix = "SPDIFIN";
1647 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1648 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1649 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1650 clock-names = "pclk", "refclk";
1651 status = "disabled";
1652 };
1653
1654 spdifout: audio-controller@480 {
1655 compatible = "amlogic,g12a-spdifout",
1656 "amlogic,axg-spdifout";
1657 reg = <0x0 0x480 0x0 0x50>;
1658 #sound-dai-cells = <0>;
1659 sound-name-prefix = "SPDIFOUT";
1660 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1661 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1662 clock-names = "pclk", "mclk";
1663 status = "disabled";
1664 };
1665
1666 tdmout_a: audio-controller@500 {
1667 compatible = "amlogic,g12a-tdmout";
1668 reg = <0x0 0x500 0x0 0x40>;
1669 sound-name-prefix = "TDMOUT_A";
1670 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1671 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1672 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1673 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1674 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1675 clock-names = "pclk", "sclk", "sclk_sel",
1676 "lrclk", "lrclk_sel";
1677 status = "disabled";
1678 };
1679
1680 tdmout_b: audio-controller@540 {
1681 compatible = "amlogic,g12a-tdmout";
1682 reg = <0x0 0x540 0x0 0x40>;
1683 sound-name-prefix = "TDMOUT_B";
1684 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1685 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1686 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1687 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1688 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1689 clock-names = "pclk", "sclk", "sclk_sel",
1690 "lrclk", "lrclk_sel";
1691 status = "disabled";
1692 };
1693
1694 tdmout_c: audio-controller@580 {
1695 compatible = "amlogic,g12a-tdmout";
1696 reg = <0x0 0x580 0x0 0x40>;
1697 sound-name-prefix = "TDMOUT_C";
1698 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1699 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1700 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1701 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1702 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1703 clock-names = "pclk", "sclk", "sclk_sel",
1704 "lrclk", "lrclk_sel";
1705 status = "disabled";
1706 };
1707
1708 spdifout_b: audio-controller@680 {
1709 compatible = "amlogic,g12a-spdifout",
1710 "amlogic,axg-spdifout";
1711 reg = <0x0 0x680 0x0 0x50>;
1712 #sound-dai-cells = <0>;
1713 sound-name-prefix = "SPDIFOUT_B";
1714 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
1715 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
1716 clock-names = "pclk", "mclk";
1717 status = "disabled";
1718 };
1719
1720 tohdmitx: audio-controller@744 {
1721 compatible = "amlogic,g12a-tohdmitx";
1722 reg = <0x0 0x744 0x0 0x4>;
1723 #sound-dai-cells = <1>;
1724 sound-name-prefix = "TOHDMITX";
1725 status = "disabled";
1726 };
1727 };
1728
306 usb3_pcie_phy: phy@46000 { 1729 usb3_pcie_phy: phy@46000 {
307 compatible = "amlogic,g12a-usb3-pcie-phy"; 1730 compatible = "amlogic,g12a-usb3-pcie-phy";
308 reg = <0x0 0x46000 0x0 0x2000>; 1731 reg = <0x0 0x46000 0x0 0x2000>;
@@ -314,6 +1737,38 @@
314 assigned-clock-rates = <100000000>; 1737 assigned-clock-rates = <100000000>;
315 #phy-cells = <1>; 1738 #phy-cells = <1>;
316 }; 1739 };
1740
1741 eth_phy: mdio-multiplexer@4c000 {
1742 compatible = "amlogic,g12a-mdio-mux";
1743 reg = <0x0 0x4c000 0x0 0xa4>;
1744 clocks = <&clkc CLKID_ETH_PHY>,
1745 <&xtal>,
1746 <&clkc CLKID_MPLL_50M>;
1747 clock-names = "pclk", "clkin0", "clkin1";
1748 mdio-parent-bus = <&mdio0>;
1749 #address-cells = <1>;
1750 #size-cells = <0>;
1751
1752 ext_mdio: mdio@0 {
1753 reg = <0>;
1754 #address-cells = <1>;
1755 #size-cells = <0>;
1756 };
1757
1758 int_mdio: mdio@1 {
1759 reg = <1>;
1760 #address-cells = <1>;
1761 #size-cells = <0>;
1762
1763 internal_ephy: ethernet_phy@8 {
1764 compatible = "ethernet-phy-id0180.3301",
1765 "ethernet-phy-ieee802.3-c22";
1766 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1767 reg = <8>;
1768 max-speed = <100>;
1769 };
1770 };
1771 };
317 }; 1772 };
318 1773
319 aobus: bus@ff800000 { 1774 aobus: bus@ff800000 {
@@ -401,6 +1856,145 @@
401 gpio-ranges = <&ao_pinctrl 0 0 15>; 1856 gpio-ranges = <&ao_pinctrl 0 0 15>;
402 }; 1857 };
403 1858
1859 i2c_ao_sck_pins: i2c_ao_sck_pins {
1860 mux {
1861 groups = "i2c_ao_sck";
1862 function = "i2c_ao";
1863 bias-disable;
1864 drive-strength-microamp = <3000>;
1865 };
1866 };
1867
1868 i2c_ao_sda_pins: i2c_ao_sda {
1869 mux {
1870 groups = "i2c_ao_sda";
1871 function = "i2c_ao";
1872 bias-disable;
1873 drive-strength-microamp = <3000>;
1874 };
1875 };
1876
1877 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1878 mux {
1879 groups = "i2c_ao_sck_e";
1880 function = "i2c_ao";
1881 bias-disable;
1882 drive-strength-microamp = <3000>;
1883 };
1884 };
1885
1886 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1887 mux {
1888 groups = "i2c_ao_sda_e";
1889 function = "i2c_ao";
1890 bias-disable;
1891 drive-strength-microamp = <3000>;
1892 };
1893 };
1894
1895 mclk0_ao_pins: mclk0-ao {
1896 mux {
1897 groups = "mclk0_ao";
1898 function = "mclk0_ao";
1899 bias-disable;
1900 drive-strength-microamp = <3000>;
1901 };
1902 };
1903
1904 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1905 mux {
1906 groups = "tdm_ao_b_din0";
1907 function = "tdm_ao_b";
1908 bias-disable;
1909 };
1910 };
1911
1912 spdif_ao_out_pins: spdif-ao-out {
1913 mux {
1914 groups = "spdif_ao_out";
1915 function = "spdif_ao_out";
1916 drive-strength-microamp = <500>;
1917 bias-disable;
1918 };
1919 };
1920
1921 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1922 mux {
1923 groups = "tdm_ao_b_din1";
1924 function = "tdm_ao_b";
1925 bias-disable;
1926 };
1927 };
1928
1929 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1930 mux {
1931 groups = "tdm_ao_b_din2";
1932 function = "tdm_ao_b";
1933 bias-disable;
1934 };
1935 };
1936
1937 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1938 mux {
1939 groups = "tdm_ao_b_dout0";
1940 function = "tdm_ao_b";
1941 bias-disable;
1942 drive-strength-microamp = <3000>;
1943 };
1944 };
1945
1946 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1947 mux {
1948 groups = "tdm_ao_b_dout1";
1949 function = "tdm_ao_b";
1950 bias-disable;
1951 drive-strength-microamp = <3000>;
1952 };
1953 };
1954
1955 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1956 mux {
1957 groups = "tdm_ao_b_dout2";
1958 function = "tdm_ao_b";
1959 bias-disable;
1960 drive-strength-microamp = <3000>;
1961 };
1962 };
1963
1964 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1965 mux {
1966 groups = "tdm_ao_b_fs";
1967 function = "tdm_ao_b";
1968 bias-disable;
1969 drive-strength-microamp = <3000>;
1970 };
1971 };
1972
1973 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1974 mux {
1975 groups = "tdm_ao_b_sclk";
1976 function = "tdm_ao_b";
1977 bias-disable;
1978 drive-strength-microamp = <3000>;
1979 };
1980 };
1981
1982 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1983 mux {
1984 groups = "tdm_ao_b_slv_fs";
1985 function = "tdm_ao_b";
1986 bias-disable;
1987 };
1988 };
1989
1990 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1991 mux {
1992 groups = "tdm_ao_b_slv_sclk";
1993 function = "tdm_ao_b";
1994 bias-disable;
1995 };
1996 };
1997
404 uart_ao_a_pins: uart-a-ao { 1998 uart_ao_a_pins: uart-a-ao {
405 mux { 1999 mux {
406 groups = "uart_ao_a_tx", 2000 groups = "uart_ao_a_tx",
@@ -418,6 +2012,69 @@
418 bias-disable; 2012 bias-disable;
419 }; 2013 };
420 }; 2014 };
2015
2016 pwm_ao_a_pins: pwm-ao-a {
2017 mux {
2018 groups = "pwm_ao_a";
2019 function = "pwm_ao_a";
2020 bias-disable;
2021 };
2022 };
2023
2024 pwm_ao_b_pins: pwm-ao-b {
2025 mux {
2026 groups = "pwm_ao_b";
2027 function = "pwm_ao_b";
2028 bias-disable;
2029 };
2030 };
2031
2032 pwm_ao_c_4_pins: pwm-ao-c-4 {
2033 mux {
2034 groups = "pwm_ao_c_4";
2035 function = "pwm_ao_c";
2036 bias-disable;
2037 };
2038 };
2039
2040 pwm_ao_c_6_pins: pwm-ao-c-6 {
2041 mux {
2042 groups = "pwm_ao_c_6";
2043 function = "pwm_ao_c";
2044 bias-disable;
2045 };
2046 };
2047
2048 pwm_ao_d_5_pins: pwm-ao-d-5 {
2049 mux {
2050 groups = "pwm_ao_d_5";
2051 function = "pwm_ao_d";
2052 bias-disable;
2053 };
2054 };
2055
2056 pwm_ao_d_10_pins: pwm-ao-d-10 {
2057 mux {
2058 groups = "pwm_ao_d_10";
2059 function = "pwm_ao_d";
2060 bias-disable;
2061 };
2062 };
2063
2064 pwm_ao_d_e_pins: pwm-ao-d-e {
2065 mux {
2066 groups = "pwm_ao_d_e";
2067 function = "pwm_ao_d";
2068 };
2069 };
2070
2071 remote_input_ao_pins: remote-input-ao {
2072 mux {
2073 groups = "remote_ao_input";
2074 function = "remote_ao_input";
2075 bias-disable;
2076 };
2077 };
421 }; 2078 };
422 }; 2079 };
423 2080
@@ -445,12 +2102,19 @@
445 status = "disabled"; 2102 status = "disabled";
446 }; 2103 };
447 2104
2105 pwm_AO_cd: pwm@2000 {
2106 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2107 reg = <0x0 0x2000 0x0 0x20>;
2108 #pwm-cells = <3>;
2109 status = "disabled";
2110 };
2111
448 uart_AO: serial@3000 { 2112 uart_AO: serial@3000 {
449 compatible = "amlogic,meson-gx-uart", 2113 compatible = "amlogic,meson-gx-uart",
450 "amlogic,meson-ao-uart"; 2114 "amlogic,meson-ao-uart";
451 reg = <0x0 0x3000 0x0 0x18>; 2115 reg = <0x0 0x3000 0x0 0x18>;
452 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 2116 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
453 clocks = <&xtal>, <&xtal>, <&xtal>; 2117 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
454 clock-names = "xtal", "pclk", "baud"; 2118 clock-names = "xtal", "pclk", "baud";
455 status = "disabled"; 2119 status = "disabled";
456 }; 2120 };
@@ -460,11 +2124,35 @@
460 "amlogic,meson-ao-uart"; 2124 "amlogic,meson-ao-uart";
461 reg = <0x0 0x4000 0x0 0x18>; 2125 reg = <0x0 0x4000 0x0 0x18>;
462 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 2126 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
463 clocks = <&xtal>, <&xtal>, <&xtal>; 2127 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
464 clock-names = "xtal", "pclk", "baud"; 2128 clock-names = "xtal", "pclk", "baud";
465 status = "disabled"; 2129 status = "disabled";
466 }; 2130 };
467 2131
2132 i2c_AO: i2c@5000 {
2133 compatible = "amlogic,meson-axg-i2c";
2134 status = "disabled";
2135 reg = <0x0 0x05000 0x0 0x20>;
2136 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2137 #address-cells = <1>;
2138 #size-cells = <0>;
2139 clocks = <&clkc CLKID_I2C>;
2140 };
2141
2142 pwm_AO_ab: pwm@7000 {
2143 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2144 reg = <0x0 0x7000 0x0 0x20>;
2145 #pwm-cells = <3>;
2146 status = "disabled";
2147 };
2148
2149 ir: ir@8000 {
2150 compatible = "amlogic,meson-gxbb-ir";
2151 reg = <0x0 0x8000 0x0 0x20>;
2152 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2153 status = "disabled";
2154 };
2155
468 saradc: adc@9000 { 2156 saradc: adc@9000 {
469 compatible = "amlogic,meson-g12a-saradc", 2157 compatible = "amlogic,meson-g12a-saradc",
470 "amlogic,meson-saradc"; 2158 "amlogic,meson-saradc";
@@ -533,6 +2221,76 @@
533 #reset-cells = <1>; 2221 #reset-cells = <1>;
534 }; 2222 };
535 2223
2224 gpio_intc: interrupt-controller@f080 {
2225 compatible = "amlogic,meson-g12a-gpio-intc",
2226 "amlogic,meson-gpio-intc";
2227 reg = <0x0 0xf080 0x0 0x10>;
2228 interrupt-controller;
2229 #interrupt-cells = <2>;
2230 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2231 };
2232
2233 pwm_ef: pwm@19000 {
2234 compatible = "amlogic,meson-g12a-ee-pwm";
2235 reg = <0x0 0x19000 0x0 0x20>;
2236 #pwm-cells = <3>;
2237 status = "disabled";
2238 };
2239
2240 pwm_cd: pwm@1a000 {
2241 compatible = "amlogic,meson-g12a-ee-pwm";
2242 reg = <0x0 0x1a000 0x0 0x20>;
2243 #pwm-cells = <3>;
2244 status = "disabled";
2245 };
2246
2247 pwm_ab: pwm@1b000 {
2248 compatible = "amlogic,meson-g12a-ee-pwm";
2249 reg = <0x0 0x1b000 0x0 0x20>;
2250 #pwm-cells = <3>;
2251 status = "disabled";
2252 };
2253
2254 i2c3: i2c@1c000 {
2255 compatible = "amlogic,meson-axg-i2c";
2256 status = "disabled";
2257 reg = <0x0 0x1c000 0x0 0x20>;
2258 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2259 #address-cells = <1>;
2260 #size-cells = <0>;
2261 clocks = <&clkc CLKID_I2C>;
2262 };
2263
2264 i2c2: i2c@1d000 {
2265 compatible = "amlogic,meson-axg-i2c";
2266 status = "disabled";
2267 reg = <0x0 0x1d000 0x0 0x20>;
2268 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2269 #address-cells = <1>;
2270 #size-cells = <0>;
2271 clocks = <&clkc CLKID_I2C>;
2272 };
2273
2274 i2c1: i2c@1e000 {
2275 compatible = "amlogic,meson-axg-i2c";
2276 status = "disabled";
2277 reg = <0x0 0x1e000 0x0 0x20>;
2278 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2279 #address-cells = <1>;
2280 #size-cells = <0>;
2281 clocks = <&clkc CLKID_I2C>;
2282 };
2283
2284 i2c0: i2c@1f000 {
2285 compatible = "amlogic,meson-axg-i2c";
2286 status = "disabled";
2287 reg = <0x0 0x1f000 0x0 0x20>;
2288 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2289 #address-cells = <1>;
2290 #size-cells = <0>;
2291 clocks = <&clkc CLKID_I2C>;
2292 };
2293
536 clk_msr: clock-measure@18000 { 2294 clk_msr: clock-measure@18000 {
537 compatible = "amlogic,meson-g12a-clk-measure"; 2295 compatible = "amlogic,meson-g12a-clk-measure";
538 reg = <0x0 0x18000 0x0 0x10>; 2296 reg = <0x0 0x18000 0x0 0x10>;
@@ -566,6 +2324,43 @@
566 }; 2324 };
567 }; 2325 };
568 2326
2327 sd_emmc_a: sd@ffe03000 {
2328 compatible = "amlogic,meson-axg-mmc";
2329 reg = <0x0 0xffe03000 0x0 0x800>;
2330 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2331 status = "disabled";
2332 clocks = <&clkc CLKID_SD_EMMC_A>,
2333 <&clkc CLKID_SD_EMMC_A_CLK0>,
2334 <&clkc CLKID_FCLK_DIV2>;
2335 clock-names = "core", "clkin0", "clkin1";
2336 resets = <&reset RESET_SD_EMMC_A>;
2337 amlogic,dram-access-quirk;
2338 };
2339
2340 sd_emmc_b: sd@ffe05000 {
2341 compatible = "amlogic,meson-axg-mmc";
2342 reg = <0x0 0xffe05000 0x0 0x800>;
2343 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2344 status = "disabled";
2345 clocks = <&clkc CLKID_SD_EMMC_B>,
2346 <&clkc CLKID_SD_EMMC_B_CLK0>,
2347 <&clkc CLKID_FCLK_DIV2>;
2348 clock-names = "core", "clkin0", "clkin1";
2349 resets = <&reset RESET_SD_EMMC_B>;
2350 };
2351
2352 sd_emmc_c: mmc@ffe07000 {
2353 compatible = "amlogic,meson-axg-mmc";
2354 reg = <0x0 0xffe07000 0x0 0x800>;
2355 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2356 status = "disabled";
2357 clocks = <&clkc CLKID_SD_EMMC_C>,
2358 <&clkc CLKID_SD_EMMC_C_CLK0>,
2359 <&clkc CLKID_FCLK_DIV2>;
2360 clock-names = "core", "clkin0", "clkin1";
2361 resets = <&reset RESET_SD_EMMC_C>;
2362 };
2363
569 usb: usb@ffe09000 { 2364 usb: usb@ffe09000 {
570 status = "disabled"; 2365 status = "disabled";
571 compatible = "amlogic,meson-g12a-usb-ctrl"; 2366 compatible = "amlogic,meson-g12a-usb-ctrl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
new file mode 100644
index 000000000000..81780ffcc7f0
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -0,0 +1,386 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7/dts-v1/;
8
9#include "meson-g12b.dtsi"
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/gpio/meson-g12a-gpio.h>
12#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13
14/ {
15 compatible = "hardkernel,odroid-n2", "amlogic,g12b";
16 model = "Hardkernel ODROID-N2";
17
18 aliases {
19 serial0 = &uart_AO;
20 ethernet0 = &ethmac;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@0 {
28 device_type = "memory";
29 reg = <0x0 0x0 0x0 0x40000000>;
30 };
31
32 emmc_pwrseq: emmc-pwrseq {
33 compatible = "mmc-pwrseq-emmc";
34 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
35 };
36
37 leds {
38 compatible = "gpio-leds";
39
40 blue {
41 label = "n2:blue";
42 gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "heartbeat";
44 };
45 };
46
47 tflash_vdd: regulator-tflash_vdd {
48 compatible = "regulator-fixed";
49
50 regulator-name = "TFLASH_VDD";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
57
58 tf_io: gpio-regulator-tf_io {
59 compatible = "regulator-gpio";
60
61 regulator-name = "TF_IO";
62 regulator-min-microvolt = <1800000>;
63 regulator-max-microvolt = <3300000>;
64
65 gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
66 gpios-states = <0>;
67
68 states = <3300000 0
69 1800000 1>;
70 };
71
72 flash_1v8: regulator-flash_1v8 {
73 compatible = "regulator-fixed";
74 regulator-name = "FLASH_1V8";
75 regulator-min-microvolt = <1800000>;
76 regulator-max-microvolt = <1800000>;
77 vin-supply = <&vcc_3v3>;
78 regulator-always-on;
79 };
80
81 main_12v: regulator-main_12v {
82 compatible = "regulator-fixed";
83 regulator-name = "12V";
84 regulator-min-microvolt = <12000000>;
85 regulator-max-microvolt = <12000000>;
86 regulator-always-on;
87 };
88
89 vcc_5v: regulator-vcc_5v {
90 compatible = "regulator-fixed";
91 regulator-name = "5V";
92 regulator-min-microvolt = <5000000>;
93 regulator-max-microvolt = <5000000>;
94 regulator-always-on;
95 vin-supply = <&main_12v>;
96 };
97
98 vcc_1v8: regulator-vcc_1v8 {
99 compatible = "regulator-fixed";
100 regulator-name = "VCC_1V8";
101 regulator-min-microvolt = <1800000>;
102 regulator-max-microvolt = <1800000>;
103 vin-supply = <&vcc_3v3>;
104 regulator-always-on;
105 };
106
107 vcc_3v3: regulator-vcc_3v3 {
108 compatible = "regulator-fixed";
109 regulator-name = "VCC_3V3";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
112 vin-supply = <&vddao_3v3>;
113 regulator-always-on;
114 /* FIXME: actually controlled by VDDCPU_B_EN */
115 };
116
117 hub_5v: regulator-hub_5v {
118 compatible = "regulator-fixed";
119 regulator-name = "HUB_5V";
120 regulator-min-microvolt = <5000000>;
121 regulator-max-microvolt = <5000000>;
122 vin-supply = <&vcc_5v>;
123
124 /* Connected to the Hub CHIPENABLE, LOW sets low power state */
125 gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
126 enable-active-high;
127 };
128
129 usb_pwr_en: regulator-usb_pwr_en {
130 compatible = "regulator-fixed";
131 regulator-name = "USB_PWR_EN";
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 vin-supply = <&vcc_5v>;
135
136 /* Connected to the microUSB port power enable */
137 gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
138 enable-active-high;
139 };
140
141 vddao_1v8: regulator-vddao_1v8 {
142 compatible = "regulator-fixed";
143 regulator-name = "VDDAO_1V8";
144 regulator-min-microvolt = <1800000>;
145 regulator-max-microvolt = <1800000>;
146 vin-supply = <&vddao_3v3>;
147 regulator-always-on;
148 };
149
150 vddao_3v3: regulator-vddao_3v3 {
151 compatible = "regulator-fixed";
152 regulator-name = "VDDAO_3V3";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155 vin-supply = <&main_12v>;
156 regulator-always-on;
157 };
158
159 hdmi-connector {
160 compatible = "hdmi-connector";
161 type = "a";
162
163 port {
164 hdmi_connector_in: endpoint {
165 remote-endpoint = <&hdmi_tx_tmds_out>;
166 };
167 };
168 };
169
170 sound {
171 compatible = "amlogic,axg-sound-card";
172 model = "G12A-ODROIDN2";
173 audio-aux-devs = <&tdmout_b>;
174 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
175 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
176 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
177 "TDM_B Playback", "TDMOUT_B OUT";
178
179 assigned-clocks = <&clkc CLKID_MPLL2>,
180 <&clkc CLKID_MPLL0>,
181 <&clkc CLKID_MPLL1>;
182 assigned-clock-parents = <0>, <0>, <0>;
183 assigned-clock-rates = <294912000>,
184 <270950400>,
185 <393216000>;
186 status = "okay";
187
188 dai-link-0 {
189 sound-dai = <&frddr_a>;
190 };
191
192 dai-link-1 {
193 sound-dai = <&frddr_b>;
194 };
195
196 dai-link-2 {
197 sound-dai = <&frddr_c>;
198 };
199
200 /* 8ch hdmi interface */
201 dai-link-3 {
202 sound-dai = <&tdmif_b>;
203 dai-format = "i2s";
204 dai-tdm-slot-tx-mask-0 = <1 1>;
205 dai-tdm-slot-tx-mask-1 = <1 1>;
206 dai-tdm-slot-tx-mask-2 = <1 1>;
207 dai-tdm-slot-tx-mask-3 = <1 1>;
208 mclk-fs = <256>;
209
210 codec {
211 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
212 };
213 };
214
215 /* hdmi glue */
216 dai-link-4 {
217 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
218
219 codec {
220 sound-dai = <&hdmi_tx>;
221 };
222 };
223 };
224};
225
226&arb {
227 status = "okay";
228};
229
230&cec_AO {
231 pinctrl-0 = <&cec_ao_a_h_pins>;
232 pinctrl-names = "default";
233 status = "disabled";
234 hdmi-phandle = <&hdmi_tx>;
235};
236
237&cecb_AO {
238 pinctrl-0 = <&cec_ao_b_h_pins>;
239 pinctrl-names = "default";
240 status = "okay";
241 hdmi-phandle = <&hdmi_tx>;
242};
243
244&clkc_audio {
245 status = "okay";
246};
247
248&ext_mdio {
249 external_phy: ethernet-phy@0 {
250 /* Realtek RTL8211F (0x001cc916) */
251 reg = <0>;
252 max-speed = <1000>;
253
254 reset-assert-us = <10000>;
255 reset-deassert-us = <30000>;
256 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
257
258 interrupt-parent = <&gpio_intc>;
259 /* MAC_INTR on GPIOZ_14 */
260 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
261 };
262};
263
264&ethmac {
265 pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
266 pinctrl-names = "default";
267 status = "okay";
268 phy-mode = "rgmii";
269 phy-handle = <&external_phy>;
270 amlogic,tx-delay-ns = <2>;
271};
272
273&frddr_a {
274 status = "okay";
275};
276
277&frddr_b {
278 status = "okay";
279};
280
281&frddr_c {
282 status = "okay";
283};
284
285&gpio {
286 /*
287 * WARNING: The USB Hub on the Odroid-N2 needs a reset signal
288 * to be turned high in order to be detected by the USB Controller
289 * This signal should be handled by a USB specific power sequence
290 * in order to reset the Hub when USB bus is powered down.
291 */
292 usb-hub {
293 gpio-hog;
294 gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
295 output-high;
296 line-name = "usb-hub-reset";
297 };
298};
299
300&hdmi_tx {
301 status = "okay";
302 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
303 pinctrl-names = "default";
304 hdmi-supply = <&vcc_5v>;
305};
306
307&hdmi_tx_tmds_port {
308 hdmi_tx_tmds_out: endpoint {
309 remote-endpoint = <&hdmi_connector_in>;
310 };
311};
312
313&ir {
314 status = "okay";
315 pinctrl-0 = <&remote_input_ao_pins>;
316 pinctrl-names = "default";
317};
318
319/* SD card */
320&sd_emmc_b {
321 status = "okay";
322 pinctrl-0 = <&sdcard_c_pins>;
323 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
324 pinctrl-names = "default", "clk-gate";
325
326 bus-width = <4>;
327 cap-sd-highspeed;
328 max-frequency = <50000000>;
329 disable-wp;
330
331 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
332 vmmc-supply = <&tflash_vdd>;
333 vqmmc-supply = <&tf_io>;
334
335};
336
337/* eMMC */
338&sd_emmc_c {
339 status = "okay";
340 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
341 pinctrl-1 = <&emmc_clk_gate_pins>;
342 pinctrl-names = "default", "clk-gate";
343
344 bus-width = <8>;
345 cap-mmc-highspeed;
346 mmc-ddr-1_8v;
347 mmc-hs200-1_8v;
348 max-frequency = <200000000>;
349 disable-wp;
350
351 mmc-pwrseq = <&emmc_pwrseq>;
352 vmmc-supply = <&vcc_3v3>;
353 vqmmc-supply = <&flash_1v8>;
354};
355
356&tdmif_b {
357 status = "okay";
358};
359
360&tdmout_b {
361 status = "okay";
362};
363
364&tohdmitx {
365 status = "okay";
366};
367
368&uart_AO {
369 status = "okay";
370 pinctrl-0 = <&uart_ao_a_pins>;
371 pinctrl-names = "default";
372};
373
374&usb {
375 status = "okay";
376 vbus-supply = <&usb_pwr_en>;
377};
378
379&usb2_phy0 {
380 phy-supply = <&vcc_5v>;
381};
382
383&usb2_phy1 {
384 /* Enable the hub which is connected to this port */
385 phy-supply = <&hub_5v>;
386};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
new file mode 100644
index 000000000000..9e88e513b22d
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -0,0 +1,82 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12a.dtsi"
8
9/ {
10 compatible = "amlogic,g12b";
11
12 cpus {
13 cpu-map {
14 cluster0 {
15 core0 {
16 cpu = <&cpu0>;
17 };
18
19 core1 {
20 cpu = <&cpu1>;
21 };
22 };
23
24 cluster1 {
25 core0 {
26 cpu = <&cpu100>;
27 };
28
29 core1 {
30 cpu = <&cpu101>;
31 };
32
33 core2 {
34 cpu = <&cpu102>;
35 };
36
37 core3 {
38 cpu = <&cpu103>;
39 };
40 };
41 };
42
43 /delete-node/ cpu@2;
44 /delete-node/ cpu@3;
45
46 cpu100: cpu@100 {
47 device_type = "cpu";
48 compatible = "arm,cortex-a73";
49 reg = <0x0 0x100>;
50 enable-method = "psci";
51 next-level-cache = <&l2>;
52 };
53
54 cpu101: cpu@101 {
55 device_type = "cpu";
56 compatible = "arm,cortex-a73";
57 reg = <0x0 0x101>;
58 enable-method = "psci";
59 next-level-cache = <&l2>;
60 };
61
62 cpu102: cpu@102 {
63 device_type = "cpu";
64 compatible = "arm,cortex-a73";
65 reg = <0x0 0x102>;
66 enable-method = "psci";
67 next-level-cache = <&l2>;
68 };
69
70 cpu103: cpu@103 {
71 device_type = "cpu";
72 compatible = "arm,cortex-a73";
73 reg = <0x0 0x103>;
74 enable-method = "psci";
75 next-level-cache = <&l2>;
76 };
77 };
78};
79
80&clkc {
81 compatible = "amlogic,g12b-clkc";
82};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 016641a41694..a9b778571cf5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -164,7 +164,7 @@
164 164
165 bus-width = <4>; 165 bus-width = <4>;
166 cap-sd-highspeed; 166 cap-sd-highspeed;
167 max-frequency = <100000000>; 167 max-frequency = <50000000>;
168 168
169 non-removable; 169 non-removable;
170 disable-wp; 170 disable-wp;
@@ -184,7 +184,7 @@
184 184
185 bus-width = <4>; 185 bus-width = <4>;
186 cap-sd-highspeed; 186 cap-sd-highspeed;
187 max-frequency = <100000000>; 187 max-frequency = <50000000>;
188 disable-wp; 188 disable-wp;
189 189
190 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 190 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 6772709b9e19..74d03fc706be 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -486,7 +486,9 @@
486 }; 486 };
487 487
488 ethmac: ethernet@c9410000 { 488 ethmac: ethernet@c9410000 {
489 compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; 489 compatible = "amlogic,meson-gxbb-dwmac",
490 "snps,dwmac-3.70a",
491 "snps,dwmac";
490 reg = <0x0 0xc9410000 0x0 0x10000 492 reg = <0x0 0xc9410000 0x0 0x10000
491 0x0 0xc8834540 0x0 0x4>; 493 0x0 0xc8834540 0x0 0x4>;
492 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 494 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index ade2ee09ae96..c34c1c90ccb6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -154,10 +154,6 @@
154 154
155 amlogic,tx-delay-ns = <2>; 155 amlogic,tx-delay-ns = <2>;
156 156
157 snps,reset-gpio = <&gpio GPIOZ_14 0>;
158 snps,reset-delays-us = <0 10000 1000000>;
159 snps,reset-active-low;
160
161 mdio { 157 mdio {
162 compatible = "snps,dwmac-mdio"; 158 compatible = "snps,dwmac-mdio";
163 #address-cells = <1>; 159 #address-cells = <1>;
@@ -166,6 +162,11 @@
166 eth_phy0: ethernet-phy@0 { 162 eth_phy0: ethernet-phy@0 {
167 /* Realtek RTL8211F (0x001cc916) */ 163 /* Realtek RTL8211F (0x001cc916) */
168 reg = <0>; 164 reg = <0>;
165
166 reset-assert-us = <10000>;
167 reset-deassert-us = <30000>;
168 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
169
169 interrupt-parent = <&gpio_intc>; 170 interrupt-parent = <&gpio_intc>;
170 /* MAC_INTR on GPIOZ_15 */ 171 /* MAC_INTR on GPIOZ_15 */
171 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 172 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
@@ -273,7 +274,7 @@
273 274
274 bus-width = <4>; 275 bus-width = <4>;
275 cap-sd-highspeed; 276 cap-sd-highspeed;
276 max-frequency = <200000000>; 277 max-frequency = <50000000>;
277 278
278 non-removable; 279 non-removable;
279 disable-wp; 280 disable-wp;
@@ -301,8 +302,8 @@
301 sd-uhs-sdr12; 302 sd-uhs-sdr12;
302 sd-uhs-sdr25; 303 sd-uhs-sdr25;
303 sd-uhs-sdr50; 304 sd-uhs-sdr50;
304 sd-uhs-sdr104; 305 sd-uhs-ddr50;
305 max-frequency = <200000000>; 306 max-frequency = <100000000>;
306 disable-wp; 307 disable-wp;
307 308
308 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 309 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index 25105ac96d55..b636912a2715 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
@@ -162,10 +162,6 @@
162 phy-handle = <&eth_phy0>; 162 phy-handle = <&eth_phy0>;
163 phy-mode = "rmii"; 163 phy-mode = "rmii";
164 164
165 snps,reset-gpio = <&gpio GPIOZ_14 0>;
166 snps,reset-delays-us = <0 10000 1000000>;
167 snps,reset-active-low;
168
169 mdio { 165 mdio {
170 compatible = "snps,dwmac-mdio"; 166 compatible = "snps,dwmac-mdio";
171 #address-cells = <1>; 167 #address-cells = <1>;
@@ -174,6 +170,10 @@
174 eth_phy0: ethernet-phy@0 { 170 eth_phy0: ethernet-phy@0 {
175 /* IC Plus IP101GR (0x02430c54) */ 171 /* IC Plus IP101GR (0x02430c54) */
176 reg = <0>; 172 reg = <0>;
173
174 reset-assert-us = <10000>;
175 reset-deassert-us = <10000>;
176 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
177 }; 177 };
178 }; 178 };
179}; 179};
@@ -235,7 +235,7 @@
235 235
236 bus-width = <4>; 236 bus-width = <4>;
237 cap-sd-highspeed; 237 cap-sd-highspeed;
238 max-frequency = <100000000>; 238 max-frequency = <50000000>;
239 disable-wp; 239 disable-wp;
240 240
241 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 241 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 1cc9dc68ef00..9972b1515da6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -126,10 +126,6 @@
126 phy-handle = <&eth_phy0>; 126 phy-handle = <&eth_phy0>;
127 phy-mode = "rgmii"; 127 phy-mode = "rgmii";
128 128
129 snps,reset-gpio = <&gpio GPIOZ_14 0>;
130 snps,reset-delays-us = <0 10000 1000000>;
131 snps,reset-active-low;
132
133 amlogic,tx-delay-ns = <2>; 129 amlogic,tx-delay-ns = <2>;
134 130
135 mdio { 131 mdio {
@@ -140,6 +136,11 @@
140 eth_phy0: ethernet-phy@0 { 136 eth_phy0: ethernet-phy@0 {
141 /* Realtek RTL8211F (0x001cc916) */ 137 /* Realtek RTL8211F (0x001cc916) */
142 reg = <0>; 138 reg = <0>;
139
140 reset-assert-us = <10000>;
141 reset-deassert-us = <30000>;
142 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
143
143 interrupt-parent = <&gpio_intc>; 144 interrupt-parent = <&gpio_intc>;
144 /* MAC_INTR on GPIOZ_15 */ 145 /* MAC_INTR on GPIOZ_15 */
145 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 146 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
@@ -255,6 +256,10 @@
255 256
256 bus-width = <4>; 257 bus-width = <4>;
257 cap-sd-highspeed; 258 cap-sd-highspeed;
259 sd-uhs-sdr12;
260 sd-uhs-sdr25;
261 sd-uhs-sdr50;
262 sd-uhs-ddr50;
258 max-frequency = <100000000>; 263 max-frequency = <100000000>;
259 disable-wp; 264 disable-wp;
260 265
@@ -272,7 +277,7 @@
272 pinctrl-names = "default", "clk-gate"; 277 pinctrl-names = "default", "clk-gate";
273 278
274 bus-width = <8>; 279 bus-width = <8>;
275 max-frequency = <100000000>; 280 max-frequency = <200000000>;
276 non-removable; 281 non-removable;
277 disable-wp; 282 disable-wp;
278 cap-mmc-highspeed; 283 cap-mmc-highspeed;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 9d2406a7c4fa..3c93d1898b40 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -68,10 +68,6 @@
68 68
69 amlogic,tx-delay-ns = <2>; 69 amlogic,tx-delay-ns = <2>;
70 70
71 snps,reset-gpio = <&gpio GPIOZ_14 0>;
72 snps,reset-delays-us = <0 10000 1000000>;
73 snps,reset-active-low;
74
75 mdio { 71 mdio {
76 compatible = "snps,dwmac-mdio"; 72 compatible = "snps,dwmac-mdio";
77 #address-cells = <1>; 73 #address-cells = <1>;
@@ -80,6 +76,11 @@
80 eth_phy0: ethernet-phy@3 { 76 eth_phy0: ethernet-phy@3 {
81 /* Micrel KSZ9031 (0x00221620) */ 77 /* Micrel KSZ9031 (0x00221620) */
82 reg = <3>; 78 reg = <3>;
79
80 reset-assert-us = <10000>;
81 reset-deassert-us = <30000>;
82 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
83
83 interrupt-parent = <&gpio_intc>; 84 interrupt-parent = <&gpio_intc>;
84 /* MAC_INTR on GPIOZ_15 */ 85 /* MAC_INTR on GPIOZ_15 */
85 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 86 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
index 0be0f2a5d2fe..e8f925871edf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
@@ -165,7 +165,7 @@
165 165
166 bus-width = <4>; 166 bus-width = <4>;
167 cap-sd-highspeed; 167 cap-sd-highspeed;
168 max-frequency = <100000000>; 168 max-frequency = <50000000>;
169 169
170 non-removable; 170 non-removable;
171 disable-wp; 171 disable-wp;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index ad4d50bd9d77..43b11e3dfe11 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -28,10 +28,10 @@
28 }; 28 };
29 }; 29 };
30 30
31 usb_vbus: regulator-usb0-vbus { 31 usb_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed"; 32 compatible = "regulator-fixed";
33 33
34 regulator-name = "USB0_VBUS"; 34 regulator-name = "USB_PWR";
35 35
36 regulator-min-microvolt = <5000000>; 36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>;
@@ -40,20 +40,34 @@
40 enable-active-high; 40 enable-active-high;
41 }; 41 };
42 42
43 vcc_3v3: regulator-vcc_3v3 { 43 vddio_boot: regulator-vddio_boot {
44 compatible = "regulator-fixed"; 44 compatible = "regulator-fixed";
45 regulator-name = "VCC_3V3"; 45 regulator-name = "VDDIO_BOOT";
46 regulator-min-microvolt = <1800000>;
47 regulator-max-microvolt = <1800000>;
48 };
49
50 vddao_3v3: regulator-vddao_3v3 {
51 compatible = "regulator-fixed";
52 regulator-name = "VDDAO_3V3";
46 regulator-min-microvolt = <3300000>; 53 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>;
48 }; 55 };
49 56
50 vcc_1v8: regulator-vcc_1v8 { 57 vddio_ao18: regulator-vddio_ao18 {
51 compatible = "regulator-fixed"; 58 compatible = "regulator-fixed";
52 regulator-name = "VCC_1V8"; 59 regulator-name = "VDDIO_AO18";
53 regulator-min-microvolt = <1800000>; 60 regulator-min-microvolt = <1800000>;
54 regulator-max-microvolt = <1800000>; 61 regulator-max-microvolt = <1800000>;
55 }; 62 };
56 63
64 vcc_3v3: regulator-vcc_3v3 {
65 compatible = "regulator-fixed";
66 regulator-name = "VCC_3V3";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
69 };
70
57 emmc_pwrseq: emmc-pwrseq { 71 emmc_pwrseq: emmc-pwrseq {
58 compatible = "mmc-pwrseq-emmc"; 72 compatible = "mmc-pwrseq-emmc";
59 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 73 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@@ -66,15 +80,32 @@
66 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 80 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
67 }; 81 };
68 82
83 hdmi-connector {
84 compatible = "hdmi-connector";
85 type = "a";
86
87 port {
88 hdmi_connector_in: endpoint {
89 remote-endpoint = <&hdmi_tx_tmds_out>;
90 };
91 };
92 };
93
69 sdio_pwrseq: sdio-pwrseq { 94 sdio_pwrseq: sdio-pwrseq {
70 compatible = "mmc-pwrseq-simple"; 95 compatible = "mmc-pwrseq-simple";
71 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>, 96 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
72 <&gpio GPIOX_20 GPIO_ACTIVE_LOW>;
73 clocks = <&wifi32k>; 97 clocks = <&wifi32k>;
74 clock-names = "ext_clock"; 98 clock-names = "ext_clock";
75 }; 99 };
76}; 100};
77 101
102&cec_AO {
103 status = "okay";
104 pinctrl-0 = <&ao_cec_pins>;
105 pinctrl-names = "default";
106 hdmi-phandle = <&hdmi_tx>;
107};
108
78&ethmac { 109&ethmac {
79 status = "okay"; 110 status = "okay";
80 pinctrl-0 = <&eth_rgmii_pins>; 111 pinctrl-0 = <&eth_rgmii_pins>;
@@ -85,10 +116,6 @@
85 116
86 amlogic,tx-delay-ns = <2>; 117 amlogic,tx-delay-ns = <2>;
87 118
88 snps,reset-gpio = <&gpio GPIOZ_14 0>;
89 snps,reset-delays-us = <0 10000 1000000>;
90 snps,reset-active-low;
91
92 mdio { 119 mdio {
93 compatible = "snps,dwmac-mdio"; 120 compatible = "snps,dwmac-mdio";
94 #address-cells = <1>; 121 #address-cells = <1>;
@@ -97,10 +124,30 @@
97 eth_phy0: ethernet-phy@0 { 124 eth_phy0: ethernet-phy@0 {
98 /* Realtek RTL8211F (0x001cc916) */ 125 /* Realtek RTL8211F (0x001cc916) */
99 reg = <0>; 126 reg = <0>;
127
128 reset-assert-us = <10000>;
129 reset-deassert-us = <30000>;
130 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
131
132 interrupt-parent = <&gpio_intc>;
133 /* MAC_INTR on GPIOZ_15 */
134 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
100 }; 135 };
101 }; 136 };
102}; 137};
103 138
139&hdmi_tx {
140 status = "okay";
141 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
142 pinctrl-names = "default";
143};
144
145&hdmi_tx_tmds_port {
146 hdmi_tx_tmds_out: endpoint {
147 remote-endpoint = <&hdmi_connector_in>;
148 };
149};
150
104&ir { 151&ir {
105 status = "okay"; 152 status = "okay";
106 pinctrl-0 = <&remote_input_ao_pins>; 153 pinctrl-0 = <&remote_input_ao_pins>;
@@ -115,10 +162,15 @@
115 clock-names = "clkin0"; 162 clock-names = "clkin0";
116}; 163};
117 164
165&saradc {
166 status = "okay";
167 vref-supply = <&vddio_ao18>;
168};
169
118/* Wireless SDIO Module */ 170/* Wireless SDIO Module */
119&sd_emmc_a { 171&sd_emmc_a {
120 status = "okay"; 172 status = "okay";
121 pinctrl-0 = <&sdio_pins &sdio_irq_pins>; 173 pinctrl-0 = <&sdio_pins>;
122 pinctrl-1 = <&sdio_clk_gate_pins>; 174 pinctrl-1 = <&sdio_clk_gate_pins>;
123 pinctrl-names = "default", "clk-gate"; 175 pinctrl-names = "default", "clk-gate";
124 #address-cells = <1>; 176 #address-cells = <1>;
@@ -126,15 +178,15 @@
126 178
127 bus-width = <4>; 179 bus-width = <4>;
128 cap-sd-highspeed; 180 cap-sd-highspeed;
129 max-frequency = <100000000>; 181 max-frequency = <50000000>;
130 182
131 non-removable; 183 non-removable;
132 disable-wp; 184 disable-wp;
133 185
134 mmc-pwrseq = <&sdio_pwrseq>; 186 mmc-pwrseq = <&sdio_pwrseq>;
135 187
136 vmmc-supply = <&vcc_3v3>; 188 vmmc-supply = <&vddao_3v3>;
137 vqmmc-supply = <&vcc_1v8>; 189 vqmmc-supply = <&vddio_boot>;
138 190
139 brcmf: wifi@1 { 191 brcmf: wifi@1 {
140 reg = <1>; 192 reg = <1>;
@@ -151,12 +203,13 @@
151 203
152 bus-width = <4>; 204 bus-width = <4>;
153 cap-sd-highspeed; 205 cap-sd-highspeed;
154 max-frequency = <100000000>; 206 max-frequency = <50000000>;
155 disable-wp; 207 disable-wp;
156 208
157 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 209 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
158 210
159 vmmc-supply = <&vcc_3v3>; 211 vmmc-supply = <&vddao_3v3>;
212 vqmmc-supply = <&vcc_3v3>;
160}; 213};
161 214
162/* eMMC */ 215/* eMMC */
@@ -176,9 +229,22 @@
176 229
177 mmc-pwrseq = <&emmc_pwrseq>; 230 mmc-pwrseq = <&emmc_pwrseq>;
178 vmmc-supply = <&vcc_3v3>; 231 vmmc-supply = <&vcc_3v3>;
179 vmmcq-sumpply = <&vcc_1v8>; 232 vqmmc-supply = <&vddio_boot>;
233};
234
235/* This is connected to the Bluetooth module: */
236&uart_A {
237 status = "okay";
238 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
239 pinctrl-names = "default";
240
241 bluetooth {
242 compatible = "brcm,bcm43438-bt";
243 shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
244 };
180}; 245};
181 246
247/* This UART is brought out to the DB9 connector */
182&uart_AO { 248&uart_AO {
183 status = "okay"; 249 status = "okay";
184 pinctrl-0 = <&uart_ao_a_pins>; 250 pinctrl-0 = <&uart_ao_a_pins>;
@@ -187,7 +253,7 @@
187 253
188&usb0_phy { 254&usb0_phy {
189 status = "okay"; 255 status = "okay";
190 phy-supply = <&usb_vbus>; 256 phy-supply = <&usb_pwr>;
191}; 257};
192 258
193&usb1_phy { 259&usb1_phy {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
index 2d2db783c44c..4c539881fbb7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
@@ -59,6 +59,13 @@
59 regulator-max-microvolt = <3300000>; 59 regulator-max-microvolt = <3300000>;
60 }; 60 };
61 61
62 vddio_ao18: regulator-vddio_ao18 {
63 compatible = "regulator-fixed";
64 regulator-name = "VDDIO_AO18";
65 regulator-min-microvolt = <1800000>;
66 regulator-max-microvolt = <1800000>;
67 };
68
62 vcc_3v3: regulator-vcc_3v3 { 69 vcc_3v3: regulator-vcc_3v3 {
63 compatible = "regulator-fixed"; 70 compatible = "regulator-fixed";
64 regulator-name = "VCC_3V3"; 71 regulator-name = "VCC_3V3";
@@ -130,10 +137,6 @@
130 137
131 amlogic,tx-delay-ns = <2>; 138 amlogic,tx-delay-ns = <2>;
132 139
133 snps,reset-gpio = <&gpio GPIOZ_14 0>;
134 snps,reset-delays-us = <0 10000 1000000>;
135 snps,reset-active-low;
136
137 mdio { 140 mdio {
138 compatible = "snps,dwmac-mdio"; 141 compatible = "snps,dwmac-mdio";
139 #address-cells = <1>; 142 #address-cells = <1>;
@@ -142,6 +145,10 @@
142 eth_phy0: ethernet-phy@0 { 145 eth_phy0: ethernet-phy@0 {
143 /* Realtek RTL8211F (0x001cc916) */ 146 /* Realtek RTL8211F (0x001cc916) */
144 reg = <0>; 147 reg = <0>;
148
149 reset-assert-us = <10000>;
150 reset-deassert-us = <30000>;
151 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
145 }; 152 };
146 }; 153 };
147}; 154};
@@ -172,6 +179,11 @@
172 clock-names = "clkin0"; 179 clock-names = "clkin0";
173}; 180};
174 181
182&saradc {
183 status = "okay";
184 vref-supply = <&vddio_ao18>;
185};
186
175/* Wireless SDIO Module */ 187/* Wireless SDIO Module */
176&sd_emmc_a { 188&sd_emmc_a {
177 status = "okay"; 189 status = "okay";
@@ -183,7 +195,7 @@
183 195
184 bus-width = <4>; 196 bus-width = <4>;
185 cap-sd-highspeed; 197 cap-sd-highspeed;
186 max-frequency = <100000000>; 198 max-frequency = <50000000>;
187 199
188 non-removable; 200 non-removable;
189 disable-wp; 201 disable-wp;
@@ -208,7 +220,7 @@
208 220
209 bus-width = <4>; 221 bus-width = <4>;
210 cap-sd-highspeed; 222 cap-sd-highspeed;
211 max-frequency = <100000000>; 223 max-frequency = <50000000>;
212 disable-wp; 224 disable-wp;
213 225
214 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 226 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
@@ -237,6 +249,19 @@
237 vqmmc-supply = <&vddio_boot>; 249 vqmmc-supply = <&vddio_boot>;
238}; 250};
239 251
252/* This is connected to the Bluetooth module: */
253&uart_A {
254 status = "okay";
255 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
256 pinctrl-names = "default";
257 uart-has-rtscts;
258
259 bluetooth {
260 compatible = "brcm,bcm43438-bt";
261 shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
262 };
263};
264
240/* This UART is brought out to the DB9 connector */ 265/* This UART is brought out to the DB9 connector */
241&uart_AO { 266&uart_AO {
242 status = "okay"; 267 status = "okay";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index a60d3652beee..f734faaf7b78 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -381,10 +381,15 @@
381 }; 381 };
382 382
383 emmc_pins: emmc { 383 emmc_pins: emmc {
384 mux { 384 mux-0 {
385 groups = "emmc_nand_d07", 385 groups = "emmc_nand_d07",
386 "emmc_cmd", 386 "emmc_cmd";
387 "emmc_clk"; 387 function = "emmc";
388 bias-pull-up;
389 };
390
391 mux-1 {
392 groups = "emmc_clk";
388 function = "emmc"; 393 function = "emmc";
389 bias-disable; 394 bias-disable;
390 }; 395 };
@@ -394,7 +399,7 @@
394 mux { 399 mux {
395 groups = "emmc_ds"; 400 groups = "emmc_ds";
396 function = "emmc"; 401 function = "emmc";
397 bias-disable; 402 bias-pull-down;
398 }; 403 };
399 }; 404 };
400 405
@@ -436,13 +441,18 @@
436 }; 441 };
437 442
438 sdcard_pins: sdcard { 443 sdcard_pins: sdcard {
439 mux { 444 mux-0 {
440 groups = "sdcard_d0", 445 groups = "sdcard_d0",
441 "sdcard_d1", 446 "sdcard_d1",
442 "sdcard_d2", 447 "sdcard_d2",
443 "sdcard_d3", 448 "sdcard_d3",
444 "sdcard_cmd", 449 "sdcard_cmd";
445 "sdcard_clk"; 450 function = "sdcard";
451 bias-pull-up;
452 };
453
454 mux-1 {
455 groups = "sdcard_clk";
446 function = "sdcard"; 456 function = "sdcard";
447 bias-disable; 457 bias-disable;
448 }; 458 };
@@ -457,13 +467,18 @@
457 }; 467 };
458 468
459 sdio_pins: sdio { 469 sdio_pins: sdio {
460 mux { 470 mux-0 {
461 groups = "sdio_d0", 471 groups = "sdio_d0",
462 "sdio_d1", 472 "sdio_d1",
463 "sdio_d2", 473 "sdio_d2",
464 "sdio_d3", 474 "sdio_d3",
465 "sdio_cmd", 475 "sdio_cmd";
466 "sdio_clk"; 476 function = "sdio";
477 bias-pull-up;
478 };
479
480 mux-1 {
481 groups = "sdio_clk";
467 function = "sdio"; 482 function = "sdio";
468 bias-disable; 483 bias-disable;
469 }; 484 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
index 70433e023fda..3a1484e5b8e1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
@@ -160,7 +160,7 @@
160 160
161 bus-width = <4>; 161 bus-width = <4>;
162 cap-sd-highspeed; 162 cap-sd-highspeed;
163 max-frequency = <100000000>; 163 max-frequency = <50000000>;
164 164
165 non-removable; 165 non-removable;
166 disable-wp; 166 disable-wp;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
index 0c8e8305b1f3..b08c4537f260 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
@@ -70,20 +70,21 @@
70 70
71 amlogic,tx-delay-ns = <2>; 71 amlogic,tx-delay-ns = <2>;
72 72
73 /* External PHY reset is shared with internal PHY Led signals */
74 snps,reset-gpio = <&gpio GPIOZ_14 0>;
75 snps,reset-delays-us = <0 10000 1000000>;
76 snps,reset-active-low;
77
78 /* External PHY is in RGMII */ 73 /* External PHY is in RGMII */
79 phy-mode = "rgmii"; 74 phy-mode = "rgmii";
80}; 75};
81 76
82&external_mdio { 77&external_mdio {
83 external_phy: ethernet-phy@0 { 78 external_phy: ethernet-phy@0 {
84 compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; 79 /* Realtek RTL8211F (0x001cc916) */
85 reg = <0>; 80 reg = <0>;
86 max-speed = <1000>; 81 max-speed = <1000>;
82
83 /* External PHY reset is shared with internal PHY Led signal */
84 reset-assert-us = <10000>;
85 reset-deassert-us = <30000>;
86 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
87
87 interrupt-parent = <&gpio_intc>; 88 interrupt-parent = <&gpio_intc>;
88 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 89 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
89 eee-broken-1000t; 90 eee-broken-1000t;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
index 255cede7b447..4b8ce738e213 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
@@ -115,11 +115,13 @@
115 regulator-max-microvolt = <1800000>; 115 regulator-max-microvolt = <1800000>;
116 }; 116 };
117 117
118 /* This is provided by LDOs on the eMMC daugther card */
118 vddio_boot: regulator-vddio_boot { 119 vddio_boot: regulator-vddio_boot {
119 compatible = "regulator-fixed"; 120 compatible = "regulator-fixed";
120 regulator-name = "VDDIO_BOOT"; 121 regulator-name = "VDDIO_BOOT";
121 regulator-min-microvolt = <3300000>; 122 regulator-min-microvolt = <1800000>;
122 regulator-max-microvolt = <3300000>; 123 regulator-max-microvolt = <1800000>;
124 vin-supply = <&vcc_3v3>;
123 }; 125 };
124}; 126};
125 127
@@ -235,7 +237,7 @@
235 237
236 bus-width = <4>; 238 bus-width = <4>;
237 cap-sd-highspeed; 239 cap-sd-highspeed;
238 max-frequency = <100000000>; 240 max-frequency = <50000000>;
239 disable-wp; 241 disable-wp;
240 242
241 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 243 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
@@ -253,9 +255,9 @@
253 255
254 bus-width = <8>; 256 bus-width = <8>;
255 cap-mmc-highspeed; 257 cap-mmc-highspeed;
256 mmc-ddr-3_3v; 258 mmc-ddr-1_8v;
257 max-frequency = <50000000>; 259 mmc-hs200-1_8v;
258 non-removable; 260 max-frequency = <200000000>;
259 disable-wp; 261 disable-wp;
260 262
261 mmc-pwrseq = <&emmc_pwrseq>; 263 mmc-pwrseq = <&emmc_pwrseq>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
index 9cbdb85fb591..26907ac82930 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
@@ -180,7 +180,7 @@
180 180
181 bus-width = <4>; 181 bus-width = <4>;
182 cap-sd-highspeed; 182 cap-sd-highspeed;
183 max-frequency = <100000000>; 183 max-frequency = <50000000>;
184 disable-wp; 184 disable-wp;
185 185
186 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 186 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index bc811a2faf42..e3c16f50814b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -114,7 +114,7 @@
114 114
115 bus-width = <4>; 115 bus-width = <4>;
116 cap-sd-highspeed; 116 cap-sd-highspeed;
117 max-frequency = <100000000>; 117 max-frequency = <50000000>;
118 118
119 non-removable; 119 non-removable;
120 disable-wp; 120 disable-wp;
@@ -134,7 +134,7 @@
134 134
135 bus-width = <4>; 135 bus-width = <4>;
136 cap-sd-highspeed; 136 cap-sd-highspeed;
137 max-frequency = <100000000>; 137 max-frequency = <50000000>;
138 disable-wp; 138 disable-wp;
139 139
140 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 140 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 3093ae421b17..c959456bacc6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -326,10 +326,15 @@
326 }; 326 };
327 327
328 emmc_pins: emmc { 328 emmc_pins: emmc {
329 mux { 329 mux-0 {
330 groups = "emmc_nand_d07", 330 groups = "emmc_nand_d07",
331 "emmc_cmd", 331 "emmc_cmd";
332 "emmc_clk"; 332 function = "emmc";
333 bias-pull-up;
334 };
335
336 mux-1 {
337 groups = "emmc_clk";
333 function = "emmc"; 338 function = "emmc";
334 bias-disable; 339 bias-disable;
335 }; 340 };
@@ -339,7 +344,7 @@
339 mux { 344 mux {
340 groups = "emmc_ds"; 345 groups = "emmc_ds";
341 function = "emmc"; 346 function = "emmc";
342 bias-disable; 347 bias-pull-down;
343 }; 348 };
344 }; 349 };
345 350
@@ -381,13 +386,18 @@
381 }; 386 };
382 387
383 sdcard_pins: sdcard { 388 sdcard_pins: sdcard {
384 mux { 389 mux-0 {
385 groups = "sdcard_d0", 390 groups = "sdcard_d0",
386 "sdcard_d1", 391 "sdcard_d1",
387 "sdcard_d2", 392 "sdcard_d2",
388 "sdcard_d3", 393 "sdcard_d3",
389 "sdcard_cmd", 394 "sdcard_cmd";
390 "sdcard_clk"; 395 function = "sdcard";
396 bias-pull-up;
397 };
398
399 mux-1 {
400 groups = "sdcard_clk";
391 function = "sdcard"; 401 function = "sdcard";
392 bias-disable; 402 bias-disable;
393 }; 403 };
@@ -402,13 +412,18 @@
402 }; 412 };
403 413
404 sdio_pins: sdio { 414 sdio_pins: sdio {
405 mux { 415 mux-0 {
406 groups = "sdio_d0", 416 groups = "sdio_d0",
407 "sdio_d1", 417 "sdio_d1",
408 "sdio_d2", 418 "sdio_d2",
409 "sdio_d3", 419 "sdio_d3",
410 "sdio_cmd", 420 "sdio_cmd";
411 "sdio_clk"; 421 function = "sdio";
422 bias-pull-up;
423 };
424
425 mux-1 {
426 groups = "sdio_clk";
412 function = "sdio"; 427 function = "sdio";
413 bias-disable; 428 bias-disable;
414 }; 429 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 3f086ed7de05..989d33ac6eae 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -18,7 +18,6 @@
18 18
19 aliases { 19 aliases {
20 serial0 = &uart_AO; 20 serial0 = &uart_AO;
21 serial1 = &uart_A;
22 serial2 = &uart_AO_B; 21 serial2 = &uart_AO_B;
23 }; 22 };
24 23
@@ -63,11 +62,9 @@
63 62
64 gpio-keys-polled { 63 gpio-keys-polled {
65 compatible = "gpio-keys-polled"; 64 compatible = "gpio-keys-polled";
66 #address-cells = <1>;
67 #size-cells = <0>;
68 poll-interval = <100>; 65 poll-interval = <100>;
69 66
70 button@0 { 67 power-button {
71 label = "power"; 68 label = "power";
72 linux,code = <KEY_POWER>; 69 linux,code = <KEY_POWER>;
73 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; 70 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
@@ -242,11 +239,6 @@
242 239
243 amlogic,tx-delay-ns = <2>; 240 amlogic,tx-delay-ns = <2>;
244 241
245 /* External PHY reset is shared with internal PHY Led signals */
246 snps,reset-gpio = <&gpio GPIOZ_14 0>;
247 snps,reset-delays-us = <0 10000 1000000>;
248 snps,reset-active-low;
249
250 /* External PHY is in RGMII */ 242 /* External PHY is in RGMII */
251 phy-mode = "rgmii"; 243 phy-mode = "rgmii";
252 244
@@ -257,6 +249,11 @@
257 external_phy: ethernet-phy@0 { 249 external_phy: ethernet-phy@0 {
258 /* Realtek RTL8211F (0x001cc916) */ 250 /* Realtek RTL8211F (0x001cc916) */
259 reg = <0>; 251 reg = <0>;
252
253 reset-assert-us = <10000>;
254 reset-deassert-us = <30000>;
255 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
256
260 interrupt-parent = <&gpio_intc>; 257 interrupt-parent = <&gpio_intc>;
261 /* MAC_INTR on GPIOZ_15 */ 258 /* MAC_INTR on GPIOZ_15 */
262 interrupts = <25 IRQ_TYPE_LEVEL_LOW>; 259 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
@@ -324,12 +321,13 @@
324&sd_emmc_a { 321&sd_emmc_a {
325 status = "okay"; 322 status = "okay";
326 pinctrl-0 = <&sdio_pins>; 323 pinctrl-0 = <&sdio_pins>;
327 pinctrl-names = "default"; 324 pinctrl-1 = <&sdio_clk_gate_pins>;
325 pinctrl-names = "default", "clk-gate";
328 #address-cells = <1>; 326 #address-cells = <1>;
329 #size-cells = <0>; 327 #size-cells = <0>;
330 328
331 bus-width = <4>; 329 bus-width = <4>;
332 max-frequency = <100000000>; 330 max-frequency = <50000000>;
333 331
334 non-removable; 332 non-removable;
335 disable-wp; 333 disable-wp;
@@ -349,11 +347,12 @@
349&sd_emmc_b { 347&sd_emmc_b {
350 status = "okay"; 348 status = "okay";
351 pinctrl-0 = <&sdcard_pins>; 349 pinctrl-0 = <&sdcard_pins>;
352 pinctrl-names = "default"; 350 pinctrl-1 = <&sdcard_clk_gate_pins>;
351 pinctrl-names = "default", "clk-gate";
353 352
354 bus-width = <4>; 353 bus-width = <4>;
355 cap-sd-highspeed; 354 cap-sd-highspeed;
356 max-frequency = <100000000>; 355 max-frequency = <50000000>;
357 disable-wp; 356 disable-wp;
358 357
359 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 358 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
@@ -366,17 +365,16 @@
366&sd_emmc_c { 365&sd_emmc_c {
367 status = "okay"; 366 status = "okay";
368 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; 367 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
369 pinctrl-names = "default"; 368 pinctrl-1 = <&emmc_clk_gate_pins>;
369 pinctrl-names = "default", "clk-gate";
370 370
371 bus-width = <8>; 371 bus-width = <8>;
372 cap-sd-highspeed;
373 cap-mmc-highspeed; 372 cap-mmc-highspeed;
374 max-frequency = <200000000>; 373 max-frequency = <200000000>;
375 non-removable; 374 non-removable;
376 disable-wp; 375 disable-wp;
377 mmc-ddr-1_8v; 376 mmc-ddr-1_8v;
378 mmc-hs200-1_8v; 377 mmc-hs200-1_8v;
379 mmc-hs400-1_8v;
380 378
381 mmc-pwrseq = <&emmc_pwrseq>; 379 mmc-pwrseq = <&emmc_pwrseq>;
382 vmmc-supply = <&vcc_3v3>; 380 vmmc-supply = <&vcc_3v3>;
@@ -404,8 +402,14 @@
404/* This one is connected to the Bluetooth module */ 402/* This one is connected to the Bluetooth module */
405&uart_A { 403&uart_A {
406 status = "okay"; 404 status = "okay";
407 pinctrl-0 = <&uart_a_pins>; 405 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
408 pinctrl-names = "default"; 406 pinctrl-names = "default";
407 uart-has-rtscts;
408
409 bluetooth {
410 compatible = "brcm,bcm43438-bt";
411 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
412 };
409}; 413};
410 414
411/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ 415/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
index 25f3b6b14043..c2bd4dbbf38c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
@@ -101,19 +101,19 @@
101 101
102 amlogic,tx-delay-ns = <2>; 102 amlogic,tx-delay-ns = <2>;
103 103
104 snps,reset-gpio = <&gpio GPIOZ_14 0>;
105 snps,reset-delays-us = <0 10000 1000000>;
106 snps,reset-active-low;
107
108 /* External PHY is in RGMII */ 104 /* External PHY is in RGMII */
109 phy-mode = "rgmii"; 105 phy-mode = "rgmii";
110}; 106};
111 107
112&external_mdio { 108&external_mdio {
113 external_phy: ethernet-phy@0 { 109 external_phy: ethernet-phy@0 {
114 compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; 110 /* Realtek RTL8211F (0x001cc916) */
115 reg = <0>; 111 reg = <0>;
116 max-speed = <1000>; 112 max-speed = <1000>;
113
114 reset-assert-us = <10000>;
115 reset-deassert-us = <30000>;
116 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
117 }; 117 };
118}; 118};
119 119
@@ -144,7 +144,7 @@
144 144
145 bus-width = <4>; 145 bus-width = <4>;
146 cap-sd-highspeed; 146 cap-sd-highspeed;
147 max-frequency = <100000000>; 147 max-frequency = <50000000>;
148 disable-wp; 148 disable-wp;
149 149
150 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 150 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
index 73d656e4aade..ea45ae0c71b7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
@@ -52,20 +52,21 @@
52 52
53 amlogic,tx-delay-ns = <2>; 53 amlogic,tx-delay-ns = <2>;
54 54
55 /* External PHY reset is shared with internal PHY Led signals */
56 snps,reset-gpio = <&gpio GPIOZ_14 0>;
57 snps,reset-delays-us = <0 10000 1000000>;
58 snps,reset-active-low;
59
60 /* External PHY is in RGMII */ 55 /* External PHY is in RGMII */
61 phy-mode = "rgmii"; 56 phy-mode = "rgmii";
62}; 57};
63 58
64&external_mdio { 59&external_mdio {
65 external_phy: ethernet-phy@0 { 60 external_phy: ethernet-phy@0 {
66 compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; 61 /* Realtek RTL8211F (0x001cc916) */
67 reg = <0>; 62 reg = <0>;
68 max-speed = <1000>; 63 max-speed = <1000>;
64
65 /* External PHY reset is shared with internal PHY Led signal */
66 reset-assert-us = <10000>;
67 reset-deassert-us = <30000>;
68 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
69
69 interrupt-parent = <&gpio_intc>; 70 interrupt-parent = <&gpio_intc>;
70 /* MAC_INTR on GPIOZ_15 */ 71 /* MAC_INTR on GPIOZ_15 */
71 interrupts = <25 IRQ_TYPE_LEVEL_LOW>; 72 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
index 7fa20a8ede17..5cd4d35006d0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
@@ -101,10 +101,6 @@
101 /* Select external PHY by default */ 101 /* Select external PHY by default */
102 phy-handle = <&external_phy>; 102 phy-handle = <&external_phy>;
103 103
104 snps,reset-gpio = <&gpio GPIOZ_14 0>;
105 snps,reset-delays-us = <0 10000 1000000>;
106 snps,reset-active-low;
107
108 amlogic,tx-delay-ns = <2>; 104 amlogic,tx-delay-ns = <2>;
109 105
110 /* External PHY is in RGMII */ 106 /* External PHY is in RGMII */
@@ -113,9 +109,13 @@
113 109
114&external_mdio { 110&external_mdio {
115 external_phy: ethernet-phy@0 { 111 external_phy: ethernet-phy@0 {
116 compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; 112 /* Realtek RTL8211F (0x001cc916) */
117 reg = <0>; 113 reg = <0>;
118 max-speed = <1000>; 114 max-speed = <1000>;
115
116 reset-assert-us = <10000>;
117 reset-deassert-us = <30000>;
118 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
119 }; 119 };
120}; 120};
121 121
@@ -143,7 +143,7 @@
143 143
144 bus-width = <4>; 144 bus-width = <4>;
145 cap-sd-highspeed; 145 cap-sd-highspeed;
146 max-frequency = <100000000>; 146 max-frequency = <50000000>;
147 147
148 non-removable; 148 non-removable;
149 disable-wp; 149 disable-wp;
@@ -167,7 +167,7 @@
167 167
168 bus-width = <4>; 168 bus-width = <4>;
169 cap-sd-highspeed; 169 cap-sd-highspeed;
170 max-frequency = <100000000>; 170 max-frequency = <50000000>;
171 disable-wp; 171 disable-wp;
172 172
173 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 173 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 739f64fdf1e3..206fafd299ea 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -2734,8 +2734,8 @@ static struct clk_hw_onecell_data g12a_hw_onecell_data = {
2734 [CLKID_MALI_1_DIV] = &g12a_mali_1_div.hw, 2734 [CLKID_MALI_1_DIV] = &g12a_mali_1_div.hw,
2735 [CLKID_MALI_1] = &g12a_mali_1.hw, 2735 [CLKID_MALI_1] = &g12a_mali_1.hw,
2736 [CLKID_MALI] = &g12a_mali.hw, 2736 [CLKID_MALI] = &g12a_mali.hw,
2737 [CLKID_MPLL_5OM_DIV] = &g12a_mpll_50m_div.hw, 2737 [CLKID_MPLL_50M_DIV] = &g12a_mpll_50m_div.hw,
2738 [CLKID_MPLL_5OM] = &g12a_mpll_50m.hw, 2738 [CLKID_MPLL_50M] = &g12a_mpll_50m.hw,
2739 [CLKID_SYS_PLL_DIV16_EN] = &g12a_sys_pll_div16_en.hw, 2739 [CLKID_SYS_PLL_DIV16_EN] = &g12a_sys_pll_div16_en.hw,
2740 [CLKID_SYS_PLL_DIV16] = &g12a_sys_pll_div16.hw, 2740 [CLKID_SYS_PLL_DIV16] = &g12a_sys_pll_div16.hw,
2741 [CLKID_CPU_CLK_DYN0_SEL] = &g12a_cpu_clk_premux0.hw, 2741 [CLKID_CPU_CLK_DYN0_SEL] = &g12a_cpu_clk_premux0.hw,
diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h
index 39c41af70804..bcc05cd9882f 100644
--- a/drivers/clk/meson/g12a.h
+++ b/drivers/clk/meson/g12a.h
@@ -166,7 +166,7 @@
166#define CLKID_HDMI_DIV 167 166#define CLKID_HDMI_DIV 167
167#define CLKID_MALI_0_DIV 170 167#define CLKID_MALI_0_DIV 170
168#define CLKID_MALI_1_DIV 173 168#define CLKID_MALI_1_DIV 173
169#define CLKID_MPLL_5OM_DIV 176 169#define CLKID_MPLL_50M_DIV 176
170#define CLKID_SYS_PLL_DIV16_EN 178 170#define CLKID_SYS_PLL_DIV16_EN 178
171#define CLKID_SYS_PLL_DIV16 179 171#define CLKID_SYS_PLL_DIV16 179
172#define CLKID_CPU_CLK_DYN0_SEL 180 172#define CLKID_CPU_CLK_DYN0_SEL 180
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 37cf0f01bb5d..62cd3a7f1f65 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -1761,7 +1761,7 @@ static struct clk_regmap meson8m2_gp_pll = {
1761 }, 1761 },
1762}; 1762};
1763 1763
1764static const char * const mmeson8b_vpu_0_1_parent_names[] = { 1764static const char * const meson8b_vpu_0_1_parent_names[] = {
1765 "fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7" 1765 "fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7"
1766}; 1766};
1767 1767
@@ -1778,8 +1778,8 @@ static struct clk_regmap meson8b_vpu_0_sel = {
1778 .hw.init = &(struct clk_init_data){ 1778 .hw.init = &(struct clk_init_data){
1779 .name = "vpu_0_sel", 1779 .name = "vpu_0_sel",
1780 .ops = &clk_regmap_mux_ops, 1780 .ops = &clk_regmap_mux_ops,
1781 .parent_names = mmeson8b_vpu_0_1_parent_names, 1781 .parent_names = meson8b_vpu_0_1_parent_names,
1782 .num_parents = ARRAY_SIZE(mmeson8b_vpu_0_1_parent_names), 1782 .num_parents = ARRAY_SIZE(meson8b_vpu_0_1_parent_names),
1783 .flags = CLK_SET_RATE_PARENT, 1783 .flags = CLK_SET_RATE_PARENT,
1784 }, 1784 },
1785}; 1785};
@@ -1837,8 +1837,8 @@ static struct clk_regmap meson8b_vpu_1_sel = {
1837 .hw.init = &(struct clk_init_data){ 1837 .hw.init = &(struct clk_init_data){
1838 .name = "vpu_1_sel", 1838 .name = "vpu_1_sel",
1839 .ops = &clk_regmap_mux_ops, 1839 .ops = &clk_regmap_mux_ops,
1840 .parent_names = mmeson8b_vpu_0_1_parent_names, 1840 .parent_names = meson8b_vpu_0_1_parent_names,
1841 .num_parents = ARRAY_SIZE(mmeson8b_vpu_0_1_parent_names), 1841 .num_parents = ARRAY_SIZE(meson8b_vpu_0_1_parent_names),
1842 .flags = CLK_SET_RATE_PARENT, 1842 .flags = CLK_SET_RATE_PARENT,
1843 }, 1843 },
1844}; 1844};
diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
index 82c9e0c020b2..e10470ed7c4f 100644
--- a/include/dt-bindings/clock/g12a-clkc.h
+++ b/include/dt-bindings/clock/g12a-clkc.h
@@ -130,7 +130,7 @@
130#define CLKID_MALI_1_SEL 172 130#define CLKID_MALI_1_SEL 172
131#define CLKID_MALI_1 174 131#define CLKID_MALI_1 174
132#define CLKID_MALI 175 132#define CLKID_MALI 175
133#define CLKID_MPLL_5OM 177 133#define CLKID_MPLL_50M 177
134#define CLKID_CPU_CLK 187 134#define CLKID_CPU_CLK 187
135#define CLKID_PCIE_PLL 201 135#define CLKID_PCIE_PLL 201
136#define CLKID_VDEC_1 204 136#define CLKID_VDEC_1 204
diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
new file mode 100644
index 000000000000..c5e1f48d30d0
--- /dev/null
+++ b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
@@ -0,0 +1,13 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __DT_MESON_G12A_TOHDMITX_H
3#define __DT_MESON_G12A_TOHDMITX_H
4
5#define TOHDMITX_I2S_IN_A 0
6#define TOHDMITX_I2S_IN_B 1
7#define TOHDMITX_I2S_IN_C 2
8#define TOHDMITX_I2S_OUT 3
9#define TOHDMITX_SPDIF_IN_A 4
10#define TOHDMITX_SPDIF_IN_B 5
11#define TOHDMITX_SPDIF_OUT 6
12
13#endif /* __DT_MESON_G12A_TOHDMITX_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-16 22:29:15 -0400