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authorNick Xie <nick@khadas.com>2019-06-10 03:57:53 -0400
committerHeiko Stuebner <heiko@sntech.de>2019-06-14 09:59:35 -0400
commitc2aacceedc86af87428d998e23a1aca24fd8aa2e (patch)
treed3074eb5d3b3e886b372dd3097c9343dc2ee92e0
parent549dcdafe793000fbe38914a1f231d3c6034a6ec (diff)
arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards
Add devicetree support for Khadas Edge/Edge-V/Captain boards. Khadas Edge is an expandable Rockchip RK3399 board with goldfinger. Khadas Captain is the carrier board for Khadas Edge. Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board. Signed-off-by: Nick Xie <nick@khadas.com> [edge-captain and edge-v contain different components that are supposed to get added in future patches, so should stay separate while looking somewhat similar right now] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.yaml8
-rw-r--r--arch/arm64/boot/dts/rockchip/Makefile3
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts27
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts27
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts13
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi804
6 files changed, 882 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 5c6bbf10abc9..eef822ce2ad4 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -316,6 +316,14 @@ properties:
316 - const: haoyu,marsboard-rk3066 316 - const: haoyu,marsboard-rk3066
317 - const: rockchip,rk3066a 317 - const: rockchip,rk3066a
318 318
319 - description: Khadas Edge series boards
320 items:
321 - enum:
322 - khadas,edge
323 - khadas,edge-captain
324 - khadas,edge-v
325 - const: rockchip,rk3399
326
319 - description: mqmaker MiQi 327 - description: mqmaker MiQi
320 items: 328 items:
321 - const: mqmaker,miqi 329 - const: mqmaker,miqi
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 5f2687acbf94..b50889af49c3 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -16,6 +16,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb
16dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb 16dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
17dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb 17dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb
18dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb 18dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb
19dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
20dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
21dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
19dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb 22dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
20dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb 23dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
21dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb 24dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts
new file mode 100644
index 000000000000..8302e51def52
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts
@@ -0,0 +1,27 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge-Captain";
12 compatible = "khadas,edge-captain", "rockchip,rk3399";
13};
14
15&gmac {
16 status = "okay";
17};
18
19&pcie_phy {
20 status = "okay";
21};
22
23&pcie0 {
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
26 status = "okay";
27};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts
new file mode 100644
index 000000000000..f5dcb99dc349
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts
@@ -0,0 +1,27 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge-V";
12 compatible = "khadas,edge-v", "rockchip,rk3399";
13};
14
15&gmac {
16 status = "okay";
17};
18
19&pcie_phy {
20 status = "okay";
21};
22
23&pcie0 {
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
26 status = "okay";
27};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts
new file mode 100644
index 000000000000..31616e7ad89d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts
@@ -0,0 +1,13 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge";
12 compatible = "khadas,edge", "rockchip,rk3399";
13};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
new file mode 100644
index 000000000000..4944d78a0a1c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -0,0 +1,804 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/linux-event-codes.h>
9#include <dt-bindings/pwm/pwm.h>
10#include "rk3399.dtsi"
11#include "rk3399-opp.dtsi"
12
13/ {
14 chosen {
15 stdout-path = "serial2:1500000n8";
16 };
17
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
22 #clock-cells = <0>;
23 };
24
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
27 clocks = <&rk808 1>;
28 clock-names = "ext_clock";
29 pinctrl-names = "default";
30 pinctrl-0 = <&wifi_enable_h>;
31
32 /*
33 * On the module itself this is one of these (depending
34 * on the actual card populated):
35 * - SDIO_RESET_L_WL_REG_ON
36 * - PDN (power down when low)
37 */
38 reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>;
39 };
40
41 /* switched by pmic_sleep */
42 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
43 compatible = "regulator-fixed";
44 regulator-name = "vcc1v8_s3";
45 regulator-always-on;
46 regulator-boot-on;
47 regulator-min-microvolt = <1800000>;
48 regulator-max-microvolt = <1800000>;
49 vin-supply = <&vcc_1v8>;
50 };
51
52 vcc3v3_pcie: vcc3v3-pcie-regulator {
53 compatible = "regulator-fixed";
54 regulator-name = "vcc3v3_pcie";
55 regulator-always-on;
56 regulator-boot-on;
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 vin-supply = <&vsys_3v3>;
60 };
61
62 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
63 vcc5v0_host: vcc5v0-host-regulator {
64 compatible = "regulator-fixed";
65 enable-active-high;
66 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&vcc5v0_host_en>;
69 regulator-name = "vcc5v0_host";
70 regulator-always-on;
71 vin-supply = <&vsys_5v0>;
72 };
73
74 vdd_log: vdd-log {
75 compatible = "pwm-regulator";
76 pwms = <&pwm2 0 25000 1>;
77 regulator-name = "vdd_log";
78 regulator-always-on;
79 regulator-boot-on;
80 regulator-min-microvolt = <800000>;
81 regulator-max-microvolt = <1400000>;
82 vin-supply = <&vsys_3v3>;
83 };
84
85 vsys: vsys {
86 compatible = "regulator-fixed";
87 regulator-name = "vsys";
88 regulator-always-on;
89 regulator-boot-on;
90 };
91
92 vsys_3v3: vsys-3v3 {
93 compatible = "regulator-fixed";
94 regulator-name = "vsys_3v3";
95 regulator-always-on;
96 regulator-boot-on;
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vsys>;
100 };
101
102 vsys_5v0: vsys-5v0 {
103 compatible = "regulator-fixed";
104 regulator-name = "vsys_5v0";
105 regulator-always-on;
106 regulator-boot-on;
107 regulator-min-microvolt = <5000000>;
108 regulator-max-microvolt = <5000000>;
109 vin-supply = <&vsys>;
110 };
111
112 adc-keys {
113 compatible = "adc-keys";
114 io-channels = <&saradc 1>;
115 io-channel-names = "buttons";
116 keyup-threshold-microvolt = <1800000>;
117 poll-interval = <100>;
118
119 recovery {
120 label = "Recovery";
121 linux,code = <KEY_VENDOR>;
122 press-threshold-microvolt = <18000>;
123 };
124 };
125
126 gpio-keys {
127 compatible = "gpio-keys";
128 autorepeat;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pwrbtn>;
131
132 power {
133 debounce-interval = <100>;
134 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
135 label = "GPIO Key Power";
136 linux,code = <KEY_POWER>;
137 wakeup-source;
138 };
139 };
140
141 leds {
142 compatible = "gpio-leds";
143 pinctrl-names = "default";
144 pinctrl-0 = <&sys_led_gpio>, <&user_led_gpio>;
145
146 sys-led {
147 label = "sys_led";
148 linux,default-trigger = "heartbeat";
149 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
150 };
151
152 user-led {
153 label = "user_led";
154 default-state = "off";
155 gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
156 };
157 };
158
159 fan: pwm-fan {
160 compatible = "pwm-fan";
161 cooling-levels = <0 150 200 255>;
162 #cooling-cells = <2>;
163 fan-supply = <&vsys_5v0>;
164 pwms = <&pwm0 0 40000 0>;
165 };
166};
167
168&cpu_l0 {
169 cpu-supply = <&vdd_cpu_l>;
170};
171
172&cpu_l1 {
173 cpu-supply = <&vdd_cpu_l>;
174};
175
176&cpu_l2 {
177 cpu-supply = <&vdd_cpu_l>;
178};
179
180&cpu_l3 {
181 cpu-supply = <&vdd_cpu_l>;
182};
183
184&cpu_b0 {
185 cpu-supply = <&vdd_cpu_b>;
186};
187
188&cpu_b1 {
189 cpu-supply = <&vdd_cpu_b>;
190};
191
192&cpu_thermal {
193 trips {
194 cpu_warm: cpu_warm {
195 temperature = <55000>;
196 hysteresis = <2000>;
197 type = "active";
198 };
199
200 cpu_hot: cpu_hot {
201 temperature = <65000>;
202 hysteresis = <2000>;
203 type = "active";
204 };
205 };
206
207 cooling-maps {
208 map2 {
209 trip = <&cpu_warm>;
210 cooling-device = <&fan THERMAL_NO_LIMIT 1>;
211 };
212
213 map3 {
214 trip = <&cpu_hot>;
215 cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
216 };
217 };
218};
219
220&emmc_phy {
221 status = "okay";
222};
223
224&gmac {
225 assigned-clocks = <&cru SCLK_RMII_SRC>;
226 assigned-clock-parents = <&clkin_gmac>;
227 clock_in_out = "input";
228 phy-supply = <&vcc_lan>;
229 phy-mode = "rgmii";
230 pinctrl-names = "default";
231 pinctrl-0 = <&rgmii_pins>;
232 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
233 snps,reset-active-low;
234 snps,reset-delays-us = <0 10000 50000>;
235 tx_delay = <0x28>;
236 rx_delay = <0x11>;
237};
238
239&gpu {
240 mali-supply = <&vdd_gpu>;
241 status = "okay";
242};
243
244&gpu_thermal {
245 trips {
246 gpu_warm: gpu_warm {
247 temperature = <55000>;
248 hysteresis = <2000>;
249 type = "active";
250 };
251
252 gpu_hot: gpu_hot {
253 temperature = <65000>;
254 hysteresis = <2000>;
255 type = "active";
256 };
257 };
258
259 cooling-maps {
260 map1 {
261 trip = <&gpu_warm>;
262 cooling-device = <&fan THERMAL_NO_LIMIT 1>;
263 };
264
265 map2 {
266 trip = <&gpu_hot>;
267 cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
268 };
269 };
270};
271
272&hdmi {
273 ddc-i2c-bus = <&i2c3>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&hdmi_cec>;
276 status = "okay";
277};
278
279&hdmi_sound {
280 status = "okay";
281};
282
283&i2c3 {
284 i2c-scl-rising-time-ns = <450>;
285 i2c-scl-falling-time-ns = <15>;
286 status = "okay";
287};
288
289&i2c4 {
290 clock-frequency = <400000>;
291 i2c-scl-rising-time-ns = <168>;
292 i2c-scl-falling-time-ns = <4>;
293 status = "okay";
294
295 rk808: pmic@1b {
296 compatible = "rockchip,rk808";
297 reg = <0x1b>;
298 interrupt-parent = <&gpio1>;
299 interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
300 #clock-cells = <1>;
301 clock-output-names = "xin32k", "rk808-clkout2";
302 pinctrl-names = "default";
303 pinctrl-0 = <&pmic_int_l>;
304 rockchip,system-power-controller;
305 wakeup-source;
306
307 vcc1-supply = <&vsys_3v3>;
308 vcc2-supply = <&vsys_3v3>;
309 vcc3-supply = <&vsys_3v3>;
310 vcc4-supply = <&vsys_3v3>;
311 vcc6-supply = <&vsys_3v3>;
312 vcc7-supply = <&vsys_3v3>;
313 vcc8-supply = <&vsys_3v3>;
314 vcc9-supply = <&vsys_3v3>;
315 vcc10-supply = <&vsys_3v3>;
316 vcc11-supply = <&vsys_3v3>;
317 vcc12-supply = <&vsys_3v3>;
318 vddio-supply = <&vcc_1v8>;
319
320 regulators {
321 vdd_center: DCDC_REG1 {
322 regulator-name = "vdd_center";
323 regulator-always-on;
324 regulator-boot-on;
325 regulator-min-microvolt = <750000>;
326 regulator-max-microvolt = <1350000>;
327 regulator-ramp-delay = <6001>;
328
329 regulator-state-mem {
330 regulator-off-in-suspend;
331 };
332 };
333
334 vdd_cpu_l: DCDC_REG2 {
335 regulator-name = "vdd_cpu_l";
336 regulator-always-on;
337 regulator-boot-on;
338 regulator-min-microvolt = <750000>;
339 regulator-max-microvolt = <1350000>;
340 regulator-ramp-delay = <6001>;
341
342 regulator-state-mem {
343 regulator-off-in-suspend;
344 };
345 };
346
347 vcc_ddr: DCDC_REG3 {
348 regulator-name = "vcc_ddr";
349 regulator-always-on;
350 regulator-boot-on;
351
352 regulator-state-mem {
353 regulator-on-in-suspend;
354 };
355 };
356
357 vcc_1v8: DCDC_REG4 {
358 regulator-name = "vcc_1v8";
359 regulator-always-on;
360 regulator-boot-on;
361 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>;
363
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <1800000>;
367 };
368 };
369
370 vcc1v8_apio2: LDO_REG1 {
371 regulator-name = "vcc1v8_apio2";
372 regulator-always-on;
373 regulator-boot-on;
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376
377 regulator-state-mem {
378 regulator-off-in-suspend;
379 };
380 };
381
382 vcc_vldo2: LDO_REG2 {
383 regulator-name = "vcc_vldo2";
384 regulator-always-on;
385 regulator-boot-on;
386 regulator-min-microvolt = <3000000>;
387 regulator-max-microvolt = <3000000>;
388
389 regulator-state-mem {
390 regulator-off-in-suspend;
391 };
392 };
393
394 vcc1v8_pmupll: LDO_REG3 {
395 regulator-name = "vcc1v8_pmupll";
396 regulator-always-on;
397 regulator-boot-on;
398 regulator-min-microvolt = <1800000>;
399 regulator-max-microvolt = <1800000>;
400
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <1800000>;
404 };
405 };
406
407 vccio_sd: LDO_REG4 {
408 regulator-name = "vccio_sd";
409 regulator-always-on;
410 regulator-boot-on;
411 regulator-min-microvolt = <1800000>;
412 regulator-max-microvolt = <3000000>;
413
414 regulator-state-mem {
415 regulator-on-in-suspend;
416 regulator-suspend-microvolt = <3000000>;
417 };
418 };
419
420 vcc_vldo5: LDO_REG5 {
421 regulator-name = "vcc_vldo5";
422 regulator-always-on;
423 regulator-boot-on;
424 regulator-min-microvolt = <3000000>;
425 regulator-max-microvolt = <3000000>;
426
427 regulator-state-mem {
428 regulator-off-in-suspend;
429 };
430 };
431
432 vcc_1v5: LDO_REG6 {
433 regulator-name = "vcc_1v5";
434 regulator-always-on;
435 regulator-boot-on;
436 regulator-min-microvolt = <1500000>;
437 regulator-max-microvolt = <1500000>;
438
439 regulator-state-mem {
440 regulator-on-in-suspend;
441 regulator-suspend-microvolt = <1500000>;
442 };
443 };
444
445 vcc1v8_codec: LDO_REG7 {
446 regulator-name = "vcc1v8_codec";
447 regulator-always-on;
448 regulator-boot-on;
449 regulator-min-microvolt = <1800000>;
450 regulator-max-microvolt = <1800000>;
451
452 regulator-state-mem {
453 regulator-off-in-suspend;
454 };
455 };
456
457 vcc_3v0: LDO_REG8 {
458 regulator-name = "vcc_3v0";
459 regulator-always-on;
460 regulator-boot-on;
461 regulator-min-microvolt = <3000000>;
462 regulator-max-microvolt = <3000000>;
463
464 regulator-state-mem {
465 regulator-on-in-suspend;
466 regulator-suspend-microvolt = <3000000>;
467 };
468 };
469
470 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
471 regulator-name = "vcc3v3_s3";
472 regulator-always-on;
473 regulator-boot-on;
474
475 regulator-state-mem {
476 regulator-off-in-suspend;
477 };
478 };
479
480 vcc3v3_s0: SWITCH_REG2 {
481 regulator-name = "vcc3v3_s0";
482 regulator-always-on;
483 regulator-boot-on;
484
485 regulator-state-mem {
486 regulator-off-in-suspend;
487 };
488 };
489 };
490 };
491
492 vdd_cpu_b: regulator@40 {
493 compatible = "silergy,syr827";
494 reg = <0x40>;
495 fcs,suspend-voltage-selector = <1>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&cpu_b_sleep>;
498 regulator-name = "vdd_cpu_b";
499 regulator-min-microvolt = <712500>;
500 regulator-max-microvolt = <1500000>;
501 regulator-ramp-delay = <1000>;
502 regulator-always-on;
503 regulator-boot-on;
504 vin-supply = <&vsys_3v3>;
505
506 regulator-state-mem {
507 regulator-off-in-suspend;
508 };
509 };
510
511 vdd_gpu: regulator@41 {
512 compatible = "silergy,syr828";
513 reg = <0x41>;
514 fcs,suspend-voltage-selector = <1>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&gpu_sleep>;
517 regulator-name = "vdd_gpu";
518 regulator-min-microvolt = <712500>;
519 regulator-max-microvolt = <1500000>;
520 regulator-ramp-delay = <1000>;
521 regulator-always-on;
522 regulator-boot-on;
523 vin-supply = <&vsys_3v3>;
524
525 regulator-state-mem {
526 regulator-off-in-suspend;
527 };
528 };
529};
530
531&i2c8 {
532 clock-frequency = <400000>;
533 i2c-scl-rising-time-ns = <160>;
534 i2c-scl-falling-time-ns = <30>;
535 status = "okay";
536};
537
538&i2s0 {
539 rockchip,playback-channels = <8>;
540 rockchip,capture-channels = <8>;
541 status = "okay";
542};
543
544&i2s1 {
545 rockchip,playback-channels = <2>;
546 rockchip,capture-channels = <2>;
547 status = "okay";
548};
549
550&i2s2 {
551 status = "okay";
552};
553
554&io_domains {
555 bt656-supply = <&vcc1v8_apio2>;
556 audio-supply = <&vcc1v8_codec>;
557 sdmmc-supply = <&vccio_sd>;
558 gpio1830-supply = <&vcc_3v0>;
559 status = "okay";
560};
561
562&pmu_io_domains {
563 pmu1830-supply = <&vcc_1v8>;
564 status = "okay";
565};
566
567&pinctrl {
568 bt {
569 bt_host_wake_l: bt-host-wake-l {
570 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
571 };
572
573 bt_reg_on_h: bt-reg-on-h {
574 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
575 };
576
577 bt_wake_l: bt-wake-l {
578 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
579 };
580 };
581
582 buttons {
583 pwrbtn: pwrbtn {
584 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
585 };
586 };
587
588 leds {
589 sys_led_gpio: sys_led-gpio {
590 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
591 };
592
593 user_led_gpio: user_led-gpio {
594 rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
595 };
596 };
597
598 pmic {
599 pmic_int_l: pmic-int-l {
600 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
601 };
602
603 cpu_b_sleep: cpu-b-sleep {
604 rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
605 };
606
607 gpu_sleep: gpu-sleep {
608 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
609 };
610 };
611
612 sdio-pwrseq {
613 wifi_enable_h: wifi-enable-h {
614 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
615 };
616 };
617
618 usb2 {
619 vcc5v0_host_en: vcc5v0-host-en {
620 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
621 };
622 };
623
624 wifi {
625 wifi_host_wake_l: wifi-host-wake-l {
626 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
627 };
628 };
629};
630
631&pwm0 {
632 status = "okay";
633};
634
635&pwm2 {
636 status = "okay";
637};
638
639&saradc {
640 vref-supply = <&vcca1v8_s3>;
641 status = "okay";
642};
643
644&sdio0 {
645 /* WiFi & BT combo module Ampak AP6356S */
646 bus-width = <4>;
647 cap-sdio-irq;
648 cap-sd-highspeed;
649 keep-power-in-suspend;
650 mmc-pwrseq = <&sdio_pwrseq>;
651 non-removable;
652 pinctrl-names = "default";
653 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
654 sd-uhs-sdr104;
655 vqmmc-supply = <&vcc1v8_s3>;
656 vmmc-supply = <&vccio_sd>;
657 status = "okay";
658
659 brcmf: wifi@1 {
660 compatible = "brcm,bcm4329-fmac";
661 interrupt-parent = <&gpio0>;
662 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
663 interrupt-names = "host-wake";
664 brcm,drive-strength = <5>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&wifi_host_wake_l>;
667 };
668};
669
670&sdmmc {
671 bus-width = <4>;
672 cap-mmc-highspeed;
673 cap-sd-highspeed;
674 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
675 disable-wp;
676 max-frequency = <150000000>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
679 status = "okay";
680};
681
682&sdhci {
683 bus-width = <8>;
684 mmc-hs400-1_8v;
685 mmc-hs400-enhanced-strobe;
686 non-removable;
687 status = "okay";
688};
689
690&tcphy0 {
691 status = "okay";
692};
693
694&tcphy1 {
695 status = "okay";
696};
697
698&tsadc {
699 /* tshut mode 0:CRU 1:GPIO */
700 rockchip,hw-tshut-mode = <1>;
701 /* tshut polarity 0:LOW 1:HIGH */
702 rockchip,hw-tshut-polarity = <1>;
703 status = "okay";
704};
705
706&u2phy0 {
707 status = "okay";
708
709 u2phy0_otg: otg-port {
710 status = "okay";
711 };
712
713 u2phy0_host: host-port {
714 phy-supply = <&vcc5v0_host>;
715 status = "okay";
716 };
717};
718
719&u2phy1 {
720 status = "okay";
721
722 u2phy1_otg: otg-port {
723 status = "okay";
724 };
725
726 u2phy1_host: host-port {
727 phy-supply = <&vcc5v0_host>;
728 status = "okay";
729 };
730};
731
732&uart0 {
733 pinctrl-names = "default";
734 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
735 status = "okay";
736
737 bluetooth {
738 compatible = "brcm,bcm43438-bt";
739 clocks = <&rk808 1>;
740 clock-names = "lpo";
741 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
742 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
743 shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
744 max-speed = <4000000>;
745 pinctrl-names = "default";
746 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
747 vbat-supply = <&vsys_3v3>;
748 vddio-supply = <&vcc_1v8>;
749 };
750};
751
752&uart2 {
753 status = "okay";
754};
755
756&usb_host0_ehci {
757 status = "okay";
758};
759
760&usb_host0_ohci {
761 status = "okay";
762};
763
764&usb_host1_ehci {
765 status = "okay";
766};
767
768&usb_host1_ohci {
769 status = "okay";
770};
771
772&usbdrd3_0 {
773 status = "okay";
774};
775
776&usbdrd_dwc3_0 {
777 status = "okay";
778 dr_mode = "otg";
779};
780
781&usbdrd3_1 {
782 status = "okay";
783};
784
785&usbdrd_dwc3_1 {
786 status = "okay";
787 dr_mode = "host";
788};
789
790&vopb {
791 status = "okay";
792};
793
794&vopb_mmu {
795 status = "okay";
796};
797
798&vopl {
799 status = "okay";
800};
801
802&vopl_mmu {
803 status = "okay";
804};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 20:07:30 -0500