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authorMaxim Mikityanskiy <maximmi@mellanox.com>2019-03-29 18:37:52 -0400
committerSaeed Mahameed <saeedm@mellanox.com>2019-04-02 15:49:37 -0400
commitbbf29f618e8c5bfd6efdad5fdc050a84bab795ab (patch)
tree0f64a9d17640e1e9b083df0e547ac6c69e5deb34
parent38702cce547a74493687fd8bb925fbb5c3898ce3 (diff)
net/mlx5: Remove spinlock support from mlx5_write64
As there is no user of mlx5_write64 that passes a spinlock to mlx5_write64, remove this functionality and simplify the function. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
-rw-r--r--drivers/infiniband/hw/mlx5/qp.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en.h2
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c2
-rw-r--r--include/linux/mlx5/cq.h2
-rw-r--r--include/linux/mlx5/doorbell.h31
5 files changed, 13 insertions, 26 deletions
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index dd2ae640bc84..816c34ee91cf 100644
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -5015,7 +5015,7 @@ out:
5015 wmb(); 5015 wmb();
5016 5016
5017 /* currently we support only regular doorbells */ 5017 /* currently we support only regular doorbells */
5018 mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 5018 mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset);
5019 /* Make sure doorbells don't leak out of SQ spinlock 5019 /* Make sure doorbells don't leak out of SQ spinlock
5020 * and reach the HCA out of order. 5020 * and reach the HCA out of order.
5021 */ 5021 */
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index 8fa8fdd30b85..2623d3fb6b96 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -916,7 +916,7 @@ void mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc,
916 */ 916 */
917 wmb(); 917 wmb();
918 918
919 mlx5_write64((__be32 *)ctrl, uar_map, NULL); 919 mlx5_write64((__be32 *)ctrl, uar_map);
920} 920}
921 921
922static inline void mlx5e_cq_arm(struct mlx5e_cq *cq) 922static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
index 873541ef4c1b..ca2296a2f9ee 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
@@ -135,7 +135,7 @@ static void mlx5_fpga_conn_notify_hw(struct mlx5_fpga_conn *conn, void *wqe)
135 *conn->qp.wq.sq.db = cpu_to_be32(conn->qp.sq.pc); 135 *conn->qp.wq.sq.db = cpu_to_be32(conn->qp.sq.pc);
136 /* Make sure that doorbell record is visible before ringing */ 136 /* Make sure that doorbell record is visible before ringing */
137 wmb(); 137 wmb();
138 mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET, NULL); 138 mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET);
139} 139}
140 140
141static void mlx5_fpga_conn_post_send(struct mlx5_fpga_conn *conn, 141static void mlx5_fpga_conn_post_send(struct mlx5_fpga_conn *conn,
diff --git a/include/linux/mlx5/cq.h b/include/linux/mlx5/cq.h
index 612c8c2f2466..769326ea1d9b 100644
--- a/include/linux/mlx5/cq.h
+++ b/include/linux/mlx5/cq.h
@@ -170,7 +170,7 @@ static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
170 doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci); 170 doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
171 doorbell[1] = cpu_to_be32(cq->cqn); 171 doorbell[1] = cpu_to_be32(cq->cqn);
172 172
173 mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, NULL); 173 mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL);
174} 174}
175 175
176static inline void mlx5_cq_hold(struct mlx5_core_cq *cq) 176static inline void mlx5_cq_hold(struct mlx5_core_cq *cq)
diff --git a/include/linux/mlx5/doorbell.h b/include/linux/mlx5/doorbell.h
index 9ef3f9d00154..5c267707e1df 100644
--- a/include/linux/mlx5/doorbell.h
+++ b/include/linux/mlx5/doorbell.h
@@ -36,38 +36,25 @@
36#define MLX5_BF_OFFSET 0x800 36#define MLX5_BF_OFFSET 0x800
37#define MLX5_CQ_DOORBELL 0x20 37#define MLX5_CQ_DOORBELL 0x20
38 38
39#if BITS_PER_LONG == 64
40/* Assume that we can just write a 64-bit doorbell atomically. s390 39/* Assume that we can just write a 64-bit doorbell atomically. s390
41 * actually doesn't have writeq() but S/390 systems don't even have 40 * actually doesn't have writeq() but S/390 systems don't even have
42 * PCI so we won't worry about it. 41 * PCI so we won't worry about it.
42 *
43 * Note that the write is not atomic on 32-bit systems! In contrast to 64-bit
44 * ones, it requires proper locking. mlx5_write64 doesn't do any locking, so use
45 * it at your own discretion, protected by some kind of lock on 32 bits.
46 *
47 * TODO: use write{q,l}_relaxed()
43 */ 48 */
44 49
45static inline void mlx5_write64(__be32 val[2], void __iomem *dest, 50static inline void mlx5_write64(__be32 val[2], void __iomem *dest)
46 spinlock_t *doorbell_lock)
47{ 51{
52#if BITS_PER_LONG == 64
48 __raw_writeq(*(u64 *)val, dest); 53 __raw_writeq(*(u64 *)val, dest);
49}
50
51#else 54#else
52
53/* Just fall back to a spinlock to protect the doorbell if
54 * BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit
55 * MMIO writes.
56 */
57
58static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
59 spinlock_t *doorbell_lock)
60{
61 unsigned long flags;
62
63 if (doorbell_lock)
64 spin_lock_irqsave(doorbell_lock, flags);
65 __raw_writel((__force u32) val[0], dest); 55 __raw_writel((__force u32) val[0], dest);
66 __raw_writel((__force u32) val[1], dest + 4); 56 __raw_writel((__force u32) val[1], dest + 4);
67 if (doorbell_lock)
68 spin_unlock_irqrestore(doorbell_lock, flags);
69}
70
71#endif 57#endif
58}
72 59
73#endif /* MLX5_DOORBELL_H */ 60#endif /* MLX5_DOORBELL_H */