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authorArnd Bergmann <arnd@arndb.de>2016-01-29 06:39:10 -0500
committerDavid S. Miller <davem@davemloft.net>2016-01-29 23:33:38 -0500
commit84092996673211f16ef3b942a191d7952e9dfea9 (patch)
tree58d60a45fc6721159e17b3a1a9b72472f04d7509
parent84922d8cd49c505dc0912f57f4ab1f8f33c7e118 (diff)
net: davinci_cpdma: use dma_addr_t for DMA address
The davinci_cpdma mixes up physical addresses as seen from the CPU and DMA addresses as seen from a DMA master, since it can operate on both normal memory or an on-chip buffer. If dma_addr_t is different from phys_addr_t, this means we get a compile-time warning about the type mismatch: ethernet/ti/davinci_cpdma.c: In function 'cpdma_desc_pool_create': ethernet/ti/davinci_cpdma.c:182:48: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types] pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys, In file included from ethernet/ti/davinci_cpdma.c:21:0: dma-mapping.h:398:21: note: expected 'dma_addr_t * {aka long long unsigned int *}' but argument is of type 'phys_addr_t * {aka unsigned int *}' static inline void *dma_alloc_coherent(struct device *dev, size_t size, This slightly restructures the code so the address we use for mapping RAM into a DMA address is always a dma_addr_t, avoiding the warning. The code is correct even if both types are 32-bit because the DMA master in this device only supports 32-bit addressing anyway, independent of the types that are used. We still assign this value to pool->phys, and that is wrong if the driver is ever used with an IOMMU, but that value appears to be never used, so there is no problem really. I've added a couple of comments about where we do things that are slightly violating the API. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/ti/davinci_cpdma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c
index 657b65bf5cac..18bf3a8fdc50 100644
--- a/drivers/net/ethernet/ti/davinci_cpdma.c
+++ b/drivers/net/ethernet/ti/davinci_cpdma.c
@@ -82,7 +82,7 @@ struct cpdma_desc {
82 82
83struct cpdma_desc_pool { 83struct cpdma_desc_pool {
84 phys_addr_t phys; 84 phys_addr_t phys;
85 u32 hw_addr; 85 dma_addr_t hw_addr;
86 void __iomem *iomap; /* ioremap map */ 86 void __iomem *iomap; /* ioremap map */
87 void *cpumap; /* dma_alloc map */ 87 void *cpumap; /* dma_alloc map */
88 int desc_size, mem_size; 88 int desc_size, mem_size;
@@ -152,7 +152,7 @@ struct cpdma_chan {
152 * abstract out these details 152 * abstract out these details
153 */ 153 */
154static struct cpdma_desc_pool * 154static struct cpdma_desc_pool *
155cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr, 155cpdma_desc_pool_create(struct device *dev, u32 phys, dma_addr_t hw_addr,
156 int size, int align) 156 int size, int align)
157{ 157{
158 int bitmap_size; 158 int bitmap_size;
@@ -176,13 +176,13 @@ cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr,
176 176
177 if (phys) { 177 if (phys) {
178 pool->phys = phys; 178 pool->phys = phys;
179 pool->iomap = ioremap(phys, size); 179 pool->iomap = ioremap(phys, size); /* should be memremap? */
180 pool->hw_addr = hw_addr; 180 pool->hw_addr = hw_addr;
181 } else { 181 } else {
182 pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys, 182 pool->cpumap = dma_alloc_coherent(dev, size, &pool->hw_addr,
183 GFP_KERNEL); 183 GFP_KERNEL);
184 pool->iomap = pool->cpumap; 184 pool->iomap = (void __iomem __force *)pool->cpumap;
185 pool->hw_addr = pool->phys; 185 pool->phys = pool->hw_addr; /* assumes no IOMMU, don't use this value */
186 } 186 }
187 187
188 if (pool->iomap) 188 if (pool->iomap)