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authorOlof Johansson <olof@lixom.net>2019-07-01 18:15:55 -0400
committerOlof Johansson <olof@lixom.net>2019-07-01 18:15:55 -0400
commit5ded680cf12ffc90c52c9da152cdc589e938080f (patch)
treef1db3b0acd296e4eac90bb2dc64423d8360ae390
parentadfbb80d38327b04a9cfb1635177dfca90de4a58 (diff)
parente1d9149e8389f1690cdd4e4056766dd26488a0fe (diff)
Merge tag 'v5.3-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards the Khadas Edge family of sbcs and the Hugsun X99 TV box, both based on rk3399. Small improvements for RockPi, Sapphire and rk3328-roc-cc boards. Improvements for the thermal handling on rk3399 as well as the rock960 board. rk3399 dwc3 clock updates and a small start of the dtsi for the new rk3399pro (the one with the connected npu). * tag 'v5.3-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphire arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs arm64: dts: rockchip: enable rk3328 watchdog clock arm64: dts: rockchip: Add support for Hugsun X99 TV Box arm64: dts: rockchip: Define values for the IPA governor for rock960 arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsi arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance. arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards arm64: dts: rockchip: Enable HDMI audio on Rock Pi Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.yaml13
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.yaml2
-rw-r--r--arch/arm64/boot/dts/rockchip/Makefile4
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts4
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi1
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts733
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts27
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts27
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts13
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi804
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts4
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-rock960.dts39
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi5
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi15
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399pro.dtsi22
15 files changed, 1700 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 5c6bbf10abc9..34865042f4e4 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -316,6 +316,19 @@ properties:
316 - const: haoyu,marsboard-rk3066 316 - const: haoyu,marsboard-rk3066
317 - const: rockchip,rk3066a 317 - const: rockchip,rk3066a
318 318
319 - description: Hugsun X99 TV Box
320 items:
321 - const: hugsun,x99
322 - const: rockchip,rk3399
323
324 - description: Khadas Edge series boards
325 items:
326 - enum:
327 - khadas,edge
328 - khadas,edge-captain
329 - khadas,edge-v
330 - const: rockchip,rk3399
331
319 - description: mqmaker MiQi 332 - description: mqmaker MiQi
320 items: 333 items:
321 - const: mqmaker,miqi 334 - const: mqmaker,miqi
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index da83fe7c0d7c..d866253b0314 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -377,6 +377,8 @@ patternProperties:
377 description: Hewlett Packard 377 description: Hewlett Packard
378 "^holtek,.*": 378 "^holtek,.*":
379 description: Holtek Semiconductor, Inc. 379 description: Holtek Semiconductor, Inc.
380 "^hugsun,.*":
381 description: Shenzhen Hugsun Technology Co. Ltd.
380 "^hwacom,.*": 382 "^hwacom,.*":
381 description: HwaCom Systems Inc. 383 description: HwaCom Systems Inc.
382 "^i2se,.*": 384 "^i2se,.*":
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 5f2687acbf94..daa2c78e22c3 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -16,6 +16,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb
16dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb 16dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
17dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb 17dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb
18dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb 18dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb
19dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-hugsun-x99.dtb
20dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
21dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
22dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
19dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb 23dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
20dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb 24dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
21dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb 25dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
index 5d499c9086fb..bb40c163b05d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -141,10 +141,12 @@
141 phy-mode = "rgmii"; 141 phy-mode = "rgmii";
142 pinctrl-names = "default"; 142 pinctrl-names = "default";
143 pinctrl-0 = <&rgmiim1_pins>; 143 pinctrl-0 = <&rgmiim1_pins>;
144 snps,force_thresh_dma_mode; 144 snps,aal;
145 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 145 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
146 snps,reset-active-low; 146 snps,reset-active-low;
147 snps,reset-delays-us = <0 10000 50000>; 147 snps,reset-delays-us = <0 10000 50000>;
148 snps,rxpbl = <0x4>;
149 snps,txpbl = <0x4>;
148 tx_delay = <0x24>; 150 tx_delay = <0x24>;
149 rx_delay = <0x18>; 151 rx_delay = <0x18>;
150 status = "okay"; 152 status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 994468671b19..e9fefd8a7e02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -407,6 +407,7 @@
407 compatible = "snps,dw-wdt"; 407 compatible = "snps,dw-wdt";
408 reg = <0x0 0xff1a0000 0x0 0x100>; 408 reg = <0x0 0xff1a0000 0x0 0x100>;
409 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 409 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
410 clocks = <&cru PCLK_WDT>;
410 }; 411 };
411 412
412 pwm0: pwm@ff1b0000 { 413 pwm0: pwm@ff1b0000 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
new file mode 100644
index 000000000000..0d1f5f9a0de9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -0,0 +1,733 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/dts-v1/;
3#include <dt-bindings/pwm/pwm.h>
4#include <dt-bindings/input/input.h>
5#include "rk3399.dtsi"
6#include "rk3399-opp.dtsi"
7
8/ {
9 model = "Hugsun X99 TV BOX";
10 compatible = "hugsun,x99", "rockchip,rk3399";
11
12 chosen {
13 stdout-path = "serial2:1500000n8";
14 };
15
16 clkin_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 clock-frequency = <125000000>;
19 clock-output-names = "clkin_gmac";
20 #clock-cells = <0>;
21 };
22
23 dc_5v: dc-5v {
24 compatible = "regulator-fixed";
25 regulator-name = "dc_5v";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-min-microvolt = <5000000>;
29 regulator-max-microvolt = <5000000>;
30 };
31
32 vcc_sys: vcc-sys {
33 compatible = "regulator-fixed";
34 regulator-name = "vcc_sys";
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
37 regulator-always-on;
38 vin-supply = <&dc_5v>;
39 };
40
41 vcc_phy: vcc-phy-regulator {
42 compatible = "regulator-fixed";
43 regulator-name = "vcc_phy";
44 regulator-always-on;
45 regulator-boot-on;
46 };
47
48 vcc1v8_s0: vcc1v8-s0 {
49 compatible = "regulator-fixed";
50 regulator-name = "vcc1v8_s0";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <1800000>;
53 regulator-always-on;
54 };
55
56 vcc3v3_sys: vcc3v3-sys {
57 compatible = "regulator-fixed";
58 regulator-name = "vcc3v3_sys";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 regulator-always-on;
62 vin-supply = <&vcc_sys>;
63 };
64
65 vcc5v0_host: vcc5v0-host-regulator {
66 compatible = "regulator-fixed";
67 enable-active-high;
68 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&host_vbus_drv>;
71 regulator-name = "vcc5v0_host";
72 regulator-always-on;
73 };
74
75 vcc5v0_typec: vcc5v0-typec-regulator {
76 compatible = "regulator-fixed";
77 enable-active-high;
78 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
79 pinctrl-names = "default";
80 pinctrl-0 = <&vcc5v0_typec_en>;
81 regulator-name = "vcc5v0_typec";
82 regulator-always-on;
83 vin-supply = <&vcc5v0_usb>;
84 };
85
86 vcc5v0_usb: vcc5v0-usb {
87 compatible = "regulator-fixed";
88 regulator-name = "vcc5v0_usb";
89 regulator-always-on;
90 regulator-boot-on;
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 vin-supply = <&dc_5v>;
94 };
95
96 vdd_log: vdd-log {
97 compatible = "pwm-regulator";
98 pwms = <&pwm2 0 25000 1>;
99 pwm-supply = <&vcc_sys>;
100 regulator-name = "vdd_log";
101 regulator-min-microvolt = <800000>;
102 regulator-max-microvolt = <1400000>;
103 regulator-always-on;
104 regulator-boot-on;
105 };
106
107 sdio_pwrseq: sdio-pwrseq {
108 compatible = "mmc-pwrseq-simple";
109 clocks = <&rk808 1>;
110 clock-names = "ext_clock";
111 pinctrl-names = "default";
112 pinctrl-0 = <&wifi_reg_on_h>;
113 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
114 };
115
116};
117
118&cpu_l0 {
119 cpu-supply = <&vdd_cpu_l>;
120};
121
122&cpu_l1 {
123 cpu-supply = <&vdd_cpu_l>;
124};
125
126&cpu_l2 {
127 cpu-supply = <&vdd_cpu_l>;
128};
129
130&cpu_l3 {
131 cpu-supply = <&vdd_cpu_l>;
132};
133
134&cpu_b0 {
135 cpu-supply = <&vdd_cpu_b>;
136};
137
138&cpu_b1 {
139 cpu-supply = <&vdd_cpu_b>;
140};
141
142&emmc_phy {
143 status = "okay";
144};
145
146&gmac {
147 assigned-clocks = <&cru SCLK_RMII_SRC>;
148 assigned-clock-parents = <&clkin_gmac>;
149 clock_in_out = "input";
150 phy-supply = <&vcc_phy>;
151 phy-mode = "rgmii";
152 pinctrl-names = "default";
153 pinctrl-0 = <&rgmii_pins>;
154 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
155 snps,reset-active-low;
156 snps,reset-delays-us = <0 10000 50000>;
157 tx_delay = <0x28>;
158 rx_delay = <0x11>;
159 status = "okay";
160};
161
162&gpu {
163 status = "okay";
164 mali-supply = <&vdd_gpu>;
165};
166
167&hdmi {
168 ddc-i2c-bus = <&i2c3>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&hdmi_cec>;
171 status = "okay";
172};
173
174&hdmi_sound {
175 status = "okay";
176};
177
178&i2c0 {
179 status = "okay";
180 i2c-scl-rising-time-ns = <180>;
181 i2c-scl-falling-time-ns = <30>;
182 clock-frequency = <400000>;
183
184 vdd_cpu_b: syr827@40 {
185 compatible = "silergy,syr827";
186 reg = <0x40>;
187 regulator-compatible = "fan53555-reg";
188 pinctrl-0 = <&vsel1_gpio>;
189 regulator-name = "vdd_cpu_b";
190 regulator-min-microvolt = <712500>;
191 regulator-max-microvolt = <1500000>;
192 regulator-ramp-delay = <1000>;
193 fcs,suspend-voltage-selector = <1>;
194 regulator-always-on;
195 regulator-boot-on;
196 vin-supply = <&vcc_sys>;
197 regulator-state-mem {
198 regulator-off-in-suspend;
199 };
200 };
201
202 vdd_gpu: syr828@41 {
203 compatible = "silergy,syr828";
204 reg = <0x41>;
205 regulator-compatible = "fan53555-reg";
206 pinctrl-0 = <&vsel2_gpio>;
207 regulator-name = "vdd_gpu";
208 regulator-min-microvolt = <712500>;
209 regulator-max-microvolt = <1500000>;
210 regulator-ramp-delay = <1000>;
211 fcs,suspend-voltage-selector = <1>;
212 regulator-always-on;
213 regulator-boot-on;
214 vin-supply = <&vcc_sys>;
215 regulator-initial-mode = <1>;
216 regulator-state-mem {
217 regulator-off-in-suspend;
218 };
219 };
220
221 rk808: pmic@1b {
222 compatible = "rockchip,rk808";
223 reg = <0x1b>;
224 interrupt-parent = <&gpio1>;
225 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pmic_int_l>;
228 rockchip,system-power-controller;
229 wakeup-source;
230 #clock-cells = <1>;
231 clock-output-names = "xin32k", "rtc_clko_wifi";
232
233 vcc1-supply = <&vcc_sys>;
234 vcc2-supply = <&vcc_sys>;
235 vcc3-supply = <&vcc_sys>;
236 vcc4-supply = <&vcc_sys>;
237 vcc6-supply = <&vcc_sys>;
238 vcc7-supply = <&vcc_sys>;
239 vcc8-supply = <&vcc3v3_sys>;
240 vcc9-supply = <&vcc_sys>;
241 vcc10-supply = <&vcc_sys>;
242 vcc11-supply = <&vcc_sys>;
243 vcc12-supply = <&vcc3v3_sys>;
244 vddio-supply = <&vcc_1v8>;
245
246 regulators {
247 vdd_center: DCDC_REG1 {
248 regulator-name = "vdd_center";
249 regulator-min-microvolt = <900000>;
250 regulator-max-microvolt = <900000>;
251 regulator-ramp-delay = <6001>;
252 regulator-always-on;
253 regulator-boot-on;
254 regulator-state-mem {
255 regulator-off-in-suspend;
256 };
257 };
258
259 vdd_cpu_l: DCDC_REG2 {
260 regulator-name = "vdd_cpu_l";
261 regulator-min-microvolt = <750000>;
262 regulator-max-microvolt = <1350000>;
263 regulator-ramp-delay = <6001>;
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-state-mem {
267 regulator-off-in-suspend;
268 };
269 };
270
271 vcc_ddr: DCDC_REG3 {
272 regulator-name = "vcc_ddr";
273 regulator-always-on;
274 regulator-boot-on;
275 regulator-state-mem {
276 regulator-on-in-suspend;
277 };
278 };
279
280 vcc_1v8: DCDC_REG4 {
281 regulator-name = "vcc_1v8";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 regulator-always-on;
285 regulator-boot-on;
286 regulator-state-mem {
287 regulator-on-in-suspend;
288 regulator-suspend-microvolt = <1800000>;
289 };
290 };
291
292 vcc1v8_dvp: LDO_REG1 {
293 regulator-name = "vcc1v8_dvp";
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <1800000>;
296 regulator-always-on;
297 regulator-boot-on;
298 regulator-state-mem {
299 regulator-on-in-suspend;
300 regulator-suspend-microvolt = <1800000>;
301 };
302 };
303
304 vcca1v8_hdmi: LDO_REG2 {
305 regulator-name = "vcca1v8_hdmi";
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <1800000>;
308 regulator-always-on;
309 regulator-boot-on;
310 regulator-state-mem {
311 regulator-on-in-suspend;
312 regulator-suspend-microvolt = <1800000>;
313 };
314 };
315
316 vcca_1v8: LDO_REG3 {
317 regulator-name = "vcca_1v8";
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <1800000>;
320 regulator-always-on;
321 regulator-boot-on;
322 regulator-state-mem {
323 regulator-on-in-suspend;
324 regulator-suspend-microvolt = <1800000>;
325 };
326 };
327
328 vcc_sd: LDO_REG4 {
329 regulator-name = "vcc_sd";
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <3300000>;
332 regulator-always-on;
333 regulator-boot-on;
334 regulator-state-mem {
335 regulator-on-in-suspend;
336 regulator-suspend-microvolt = <3300000>;
337 };
338 };
339
340 vcc3v0_sd: LDO_REG5 {
341 regulator-name = "vcc3v0_sd";
342 regulator-min-microvolt = <3000000>;
343 regulator-max-microvolt = <3000000>;
344 regulator-always-on;
345 regulator-boot-on;
346 regulator-state-mem {
347 regulator-on-in-suspend;
348 regulator-suspend-microvolt = <3000000>;
349 };
350 };
351
352 vcc_1v5: LDO_REG6 {
353 regulator-name = "vcc_1v5";
354 regulator-min-microvolt = <1500000>;
355 regulator-max-microvolt = <1500000>;
356 regulator-always-on;
357 regulator-boot-on;
358 regulator-state-mem {
359 regulator-on-in-suspend;
360 regulator-suspend-microvolt = <1500000>;
361 };
362 };
363
364 vcca0v9_hdmi: LDO_REG7 {
365 regulator-name = "vcca0v9_hdmi";
366 regulator-min-microvolt = <900000>;
367 regulator-max-microvolt = <900000>;
368 regulator-always-on;
369 regulator-boot-on;
370 regulator-state-mem {
371 regulator-on-in-suspend;
372 regulator-suspend-microvolt = <900000>;
373 };
374 };
375
376 vcc_3v0: LDO_REG8 {
377 regulator-name = "vcc_3v0";
378 regulator-min-microvolt = <3000000>;
379 regulator-max-microvolt = <3000000>;
380 regulator-always-on;
381 regulator-boot-on;
382 regulator-state-mem {
383 regulator-on-in-suspend;
384 regulator-suspend-microvolt = <3000000>;
385 };
386 };
387
388 vcc3v3_s3: SWITCH_REG1 {
389 regulator-name = "vcc3v3_s3";
390 regulator-always-on;
391 regulator-boot-on;
392 regulator-state-mem {
393 regulator-on-in-suspend;
394 };
395 };
396
397 vcc3v3_s0: SWITCH_REG2 {
398 regulator-name = "vcc3v3_s0";
399 regulator-always-on;
400 regulator-boot-on;
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 };
404 };
405 };
406 };
407};
408
409&i2c1 {
410 i2c-scl-rising-time-ns = <300>;
411 i2c-scl-falling-time-ns = <15>;
412 status = "okay";
413};
414
415&i2c3 {
416 i2c-scl-rising-time-ns = <450>;
417 i2c-scl-falling-time-ns = <15>;
418 status = "okay";
419};
420
421&i2c4 {
422 i2c-scl-rising-time-ns = <600>;
423 i2c-scl-falling-time-ns = <40>;
424 status = "okay";
425
426 fusb0: typec-portc@22 {
427 compatible = "fcs,fusb302";
428 reg = <0x22>;
429 interrupt-parent = <&gpio1>;
430 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&fusb0_int>;
433 vbus-supply = <&vcc5v0_typec>;
434 status = "okay";
435 };
436};
437
438&i2c7 {
439 status = "okay";
440};
441
442&i2s0 {
443 rockchip,playback-channels = <8>;
444 rockchip,capture-channels = <8>;
445 status = "okay";
446};
447
448&i2s1 {
449 rockchip,playback-channels = <2>;
450 rockchip,capture-channels = <2>;
451 status = "okay";
452};
453
454&i2s2 {
455 status = "okay";
456};
457
458&io_domains {
459 status = "okay";
460 audio-supply = <&vcc1v8_s0>;
461 bt656-supply = <&vcc1v8_s0>;
462 gpio1830-supply = <&vcc_3v0>;
463 sdmmc-supply = <&vcc_sd>;
464};
465
466&pmu_io_domains {
467 status = "okay";
468 pmu1830-supply = <&vcc_1v8>;
469};
470
471&pinctrl {
472 fusb30x {
473 fusb0_int: fusb0-int {
474 rockchip,pins =
475 <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
476 };
477 };
478
479 gmac {
480 rgmii_sleep_pins: rgmii-sleep-pins {
481 rockchip,pins =
482 <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
483 };
484 };
485
486 pmic {
487 pmic_int_l: pmic-int-l {
488 rockchip,pins =
489 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
490 };
491
492 vsel1_gpio: vsel1-gpio {
493 rockchip,pins =
494 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
495 };
496
497 vsel2_gpio: vsel2-gpio {
498 rockchip,pins =
499 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
500 };
501 };
502
503 sdio {
504 bt_host_wake_l: bt-host-wake-l {
505 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
506 };
507
508 bt_reg_on_h: bt-reg-on-h {
509 /* external pullup to VCC1V8_PMUPLL */
510 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
511 };
512
513 bt_wake_l: bt-wake-l {
514 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
515 };
516
517 wifi_reg_on_h: wifi-reg_on-h {
518 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
519 };
520 };
521
522 wifi {
523 wifi_host_wake_l: wifi-host-wake-l {
524 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
525 };
526 };
527
528 usb-typec {
529 vcc5v0_typec_en: vcc5v0_typec_en {
530 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
531 };
532 };
533
534 usb2 {
535 host_vbus_drv: host-vbus-drv {
536 rockchip,pins =
537 <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
538 };
539 };
540};
541
542&pwm0 {
543 status = "okay";
544};
545
546&pwm2 {
547 status = "okay";
548 pinctrl-0 = <&pwm2_pin_pull_down>;
549};
550
551&saradc {
552 vref-supply = <&vcc1v8_s0>;
553 status = "okay";
554};
555
556&sdmmc {
557 clock-frequency = <150000000>;
558 clock-freq-min-max = <200000 150000000>;
559 supports-sd;
560 bus-width = <4>;
561 cap-mmc-highspeed;
562 cap-sd-highspeed;
563 disable-wp;
564 vqmmc-supply = <&vcc_sd>;
565 pinctrl-names = "default";
566 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
567 card-detect-delay = <800>;
568 status = "okay";
569};
570
571&sdhci {
572 bus-width = <8>;
573 mmc-hs400-1_8v;
574 mmc-hs400-enhanced-strobe;
575 supports-emmc;
576 non-removable;
577 keep-power-in-suspend;
578 status = "okay";
579};
580
581&sdio0 {
582 bus-width = <4>;
583 clock-frequency = <50000000>;
584 cap-sdio-irq;
585 cap-sd-highspeed;
586 keep-power-in-suspend;
587 mmc-pwrseq = <&sdio_pwrseq>;
588 non-removable;
589 pinctrl-names = "default";
590 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
591 sd-uhs-sdr104;
592 #address-cells = <1>;
593 #size-cells = <0>;
594 status = "okay";
595
596 brcmf: wifi@1 {
597 compatible = "brcm,bcm4329-fmac";
598 reg = <1>;
599 interrupt-parent = <&gpio0>;
600 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
601 interrupt-names = "host-wake";
602 pinctrl-names = "default";
603 pinctrl-0 = <&wifi_host_wake_l>;
604 };
605};
606
607&spdif {
608 status = "okay";
609 pinctrl-0 = <&spdif_bus_1>;
610 #sound-dai-cells = <0>;
611};
612
613&spi1 {
614 status = "okay";
615 max-freq = <10000000>;
616
617 flash@0 {
618 compatible = "jedec,spi-nor";
619 #address-cells = <1>;
620 #size-cells = <1>;
621 reg = <0>;
622 spi-max-frequency = <10000000>;
623 };
624};
625
626&tcphy0 {
627 status = "okay";
628};
629
630&tcphy1 {
631 status = "okay";
632};
633
634&tsadc {
635 /* tshut mode 0:CRU 1:GPIO */
636 rockchip,hw-tshut-mode = <1>;
637 /* tshut polarity 0:LOW 1:HIGH */
638 rockchip,hw-tshut-polarity = <1>;
639 rockchip,hw-tshut-temp = <110000>;
640 status = "okay";
641};
642
643&u2phy0 {
644 status = "okay";
645
646 u2phy0_host: host-port {
647 phy-supply = <&vcc5v0_host>;
648 status = "okay";
649 };
650
651 u2phy0_otg: otg-port {
652 status = "okay";
653 };
654};
655
656&u2phy1 {
657 status = "okay";
658
659 u2phy1_host: host-port {
660 phy-supply = <&vcc5v0_host>;
661 status = "okay";
662 };
663
664 u2phy1_otg: otg-port {
665 status = "okay";
666 };
667};
668
669&uart0 {
670 pinctrl-names = "default";
671 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
672 status = "okay";
673
674 bluetooth {
675 compatible = "brcm,bcm43438-bt";
676 clocks = <&rk808 1>;
677 clock-names = "ext_clock";
678 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
679 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
680 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
681 max-speed = <4000000>;
682 pinctrl-names = "default";
683 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
684 vbat-supply = <&vcc3v3_sys>;
685 vddio-supply = <&vcc_1v8>;
686 };
687};
688
689&uart2 {
690 status = "okay";
691};
692
693&usb_host0_ehci {
694 status = "okay";
695};
696
697&usb_host0_ohci {
698 status = "okay";
699};
700
701&usb_host1_ehci {
702 status = "okay";
703};
704
705&usb_host1_ohci {
706 status = "okay";
707};
708
709&usbdrd3_0 {
710 status = "okay";
711};
712
713&usbdrd_dwc3_0 {
714 status = "okay";
715 dr_mode = "otg";
716};
717
718&usbdrd3_1 {
719 status = "okay";
720};
721
722&usbdrd_dwc3_1 {
723 status = "okay";
724 dr_mode = "host";
725};
726
727&vopb {
728 status = "okay";
729};
730
731&vopb_mmu {
732 status = "okay";
733};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts
new file mode 100644
index 000000000000..8302e51def52
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts
@@ -0,0 +1,27 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge-Captain";
12 compatible = "khadas,edge-captain", "rockchip,rk3399";
13};
14
15&gmac {
16 status = "okay";
17};
18
19&pcie_phy {
20 status = "okay";
21};
22
23&pcie0 {
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
26 status = "okay";
27};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts
new file mode 100644
index 000000000000..f5dcb99dc349
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts
@@ -0,0 +1,27 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge-V";
12 compatible = "khadas,edge-v", "rockchip,rk3399";
13};
14
15&gmac {
16 status = "okay";
17};
18
19&pcie_phy {
20 status = "okay";
21};
22
23&pcie0 {
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
26 status = "okay";
27};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts
new file mode 100644
index 000000000000..31616e7ad89d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts
@@ -0,0 +1,13 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include "rk3399-khadas-edge.dtsi"
9
10/ {
11 model = "Khadas Edge";
12 compatible = "khadas,edge", "rockchip,rk3399";
13};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
new file mode 100644
index 000000000000..4944d78a0a1c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -0,0 +1,804 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
4 * (https://www.khadas.com)
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/linux-event-codes.h>
9#include <dt-bindings/pwm/pwm.h>
10#include "rk3399.dtsi"
11#include "rk3399-opp.dtsi"
12
13/ {
14 chosen {
15 stdout-path = "serial2:1500000n8";
16 };
17
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
22 #clock-cells = <0>;
23 };
24
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
27 clocks = <&rk808 1>;
28 clock-names = "ext_clock";
29 pinctrl-names = "default";
30 pinctrl-0 = <&wifi_enable_h>;
31
32 /*
33 * On the module itself this is one of these (depending
34 * on the actual card populated):
35 * - SDIO_RESET_L_WL_REG_ON
36 * - PDN (power down when low)
37 */
38 reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>;
39 };
40
41 /* switched by pmic_sleep */
42 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
43 compatible = "regulator-fixed";
44 regulator-name = "vcc1v8_s3";
45 regulator-always-on;
46 regulator-boot-on;
47 regulator-min-microvolt = <1800000>;
48 regulator-max-microvolt = <1800000>;
49 vin-supply = <&vcc_1v8>;
50 };
51
52 vcc3v3_pcie: vcc3v3-pcie-regulator {
53 compatible = "regulator-fixed";
54 regulator-name = "vcc3v3_pcie";
55 regulator-always-on;
56 regulator-boot-on;
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 vin-supply = <&vsys_3v3>;
60 };
61
62 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
63 vcc5v0_host: vcc5v0-host-regulator {
64 compatible = "regulator-fixed";
65 enable-active-high;
66 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&vcc5v0_host_en>;
69 regulator-name = "vcc5v0_host";
70 regulator-always-on;
71 vin-supply = <&vsys_5v0>;
72 };
73
74 vdd_log: vdd-log {
75 compatible = "pwm-regulator";
76 pwms = <&pwm2 0 25000 1>;
77 regulator-name = "vdd_log";
78 regulator-always-on;
79 regulator-boot-on;
80 regulator-min-microvolt = <800000>;
81 regulator-max-microvolt = <1400000>;
82 vin-supply = <&vsys_3v3>;
83 };
84
85 vsys: vsys {
86 compatible = "regulator-fixed";
87 regulator-name = "vsys";
88 regulator-always-on;
89 regulator-boot-on;
90 };
91
92 vsys_3v3: vsys-3v3 {
93 compatible = "regulator-fixed";
94 regulator-name = "vsys_3v3";
95 regulator-always-on;
96 regulator-boot-on;
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vsys>;
100 };
101
102 vsys_5v0: vsys-5v0 {
103 compatible = "regulator-fixed";
104 regulator-name = "vsys_5v0";
105 regulator-always-on;
106 regulator-boot-on;
107 regulator-min-microvolt = <5000000>;
108 regulator-max-microvolt = <5000000>;
109 vin-supply = <&vsys>;
110 };
111
112 adc-keys {
113 compatible = "adc-keys";
114 io-channels = <&saradc 1>;
115 io-channel-names = "buttons";
116 keyup-threshold-microvolt = <1800000>;
117 poll-interval = <100>;
118
119 recovery {
120 label = "Recovery";
121 linux,code = <KEY_VENDOR>;
122 press-threshold-microvolt = <18000>;
123 };
124 };
125
126 gpio-keys {
127 compatible = "gpio-keys";
128 autorepeat;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pwrbtn>;
131
132 power {
133 debounce-interval = <100>;
134 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
135 label = "GPIO Key Power";
136 linux,code = <KEY_POWER>;
137 wakeup-source;
138 };
139 };
140
141 leds {
142 compatible = "gpio-leds";
143 pinctrl-names = "default";
144 pinctrl-0 = <&sys_led_gpio>, <&user_led_gpio>;
145
146 sys-led {
147 label = "sys_led";
148 linux,default-trigger = "heartbeat";
149 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
150 };
151
152 user-led {
153 label = "user_led";
154 default-state = "off";
155 gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
156 };
157 };
158
159 fan: pwm-fan {
160 compatible = "pwm-fan";
161 cooling-levels = <0 150 200 255>;
162 #cooling-cells = <2>;
163 fan-supply = <&vsys_5v0>;
164 pwms = <&pwm0 0 40000 0>;
165 };
166};
167
168&cpu_l0 {
169 cpu-supply = <&vdd_cpu_l>;
170};
171
172&cpu_l1 {
173 cpu-supply = <&vdd_cpu_l>;
174};
175
176&cpu_l2 {
177 cpu-supply = <&vdd_cpu_l>;
178};
179
180&cpu_l3 {
181 cpu-supply = <&vdd_cpu_l>;
182};
183
184&cpu_b0 {
185 cpu-supply = <&vdd_cpu_b>;
186};
187
188&cpu_b1 {
189 cpu-supply = <&vdd_cpu_b>;
190};
191
192&cpu_thermal {
193 trips {
194 cpu_warm: cpu_warm {
195 temperature = <55000>;
196 hysteresis = <2000>;
197 type = "active";
198 };
199
200 cpu_hot: cpu_hot {
201 temperature = <65000>;
202 hysteresis = <2000>;
203 type = "active";
204 };
205 };
206
207 cooling-maps {
208 map2 {
209 trip = <&cpu_warm>;
210 cooling-device = <&fan THERMAL_NO_LIMIT 1>;
211 };
212
213 map3 {
214 trip = <&cpu_hot>;
215 cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
216 };
217 };
218};
219
220&emmc_phy {
221 status = "okay";
222};
223
224&gmac {
225 assigned-clocks = <&cru SCLK_RMII_SRC>;
226 assigned-clock-parents = <&clkin_gmac>;
227 clock_in_out = "input";
228 phy-supply = <&vcc_lan>;
229 phy-mode = "rgmii";
230 pinctrl-names = "default";
231 pinctrl-0 = <&rgmii_pins>;
232 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
233 snps,reset-active-low;
234 snps,reset-delays-us = <0 10000 50000>;
235 tx_delay = <0x28>;
236 rx_delay = <0x11>;
237};
238
239&gpu {
240 mali-supply = <&vdd_gpu>;
241 status = "okay";
242};
243
244&gpu_thermal {
245 trips {
246 gpu_warm: gpu_warm {
247 temperature = <55000>;
248 hysteresis = <2000>;
249 type = "active";
250 };
251
252 gpu_hot: gpu_hot {
253 temperature = <65000>;
254 hysteresis = <2000>;
255 type = "active";
256 };
257 };
258
259 cooling-maps {
260 map1 {
261 trip = <&gpu_warm>;
262 cooling-device = <&fan THERMAL_NO_LIMIT 1>;
263 };
264
265 map2 {
266 trip = <&gpu_hot>;
267 cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
268 };
269 };
270};
271
272&hdmi {
273 ddc-i2c-bus = <&i2c3>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&hdmi_cec>;
276 status = "okay";
277};
278
279&hdmi_sound {
280 status = "okay";
281};
282
283&i2c3 {
284 i2c-scl-rising-time-ns = <450>;
285 i2c-scl-falling-time-ns = <15>;
286 status = "okay";
287};
288
289&i2c4 {
290 clock-frequency = <400000>;
291 i2c-scl-rising-time-ns = <168>;
292 i2c-scl-falling-time-ns = <4>;
293 status = "okay";
294
295 rk808: pmic@1b {
296 compatible = "rockchip,rk808";
297 reg = <0x1b>;
298 interrupt-parent = <&gpio1>;
299 interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
300 #clock-cells = <1>;
301 clock-output-names = "xin32k", "rk808-clkout2";
302 pinctrl-names = "default";
303 pinctrl-0 = <&pmic_int_l>;
304 rockchip,system-power-controller;
305 wakeup-source;
306
307 vcc1-supply = <&vsys_3v3>;
308 vcc2-supply = <&vsys_3v3>;
309 vcc3-supply = <&vsys_3v3>;
310 vcc4-supply = <&vsys_3v3>;
311 vcc6-supply = <&vsys_3v3>;
312 vcc7-supply = <&vsys_3v3>;
313 vcc8-supply = <&vsys_3v3>;
314 vcc9-supply = <&vsys_3v3>;
315 vcc10-supply = <&vsys_3v3>;
316 vcc11-supply = <&vsys_3v3>;
317 vcc12-supply = <&vsys_3v3>;
318 vddio-supply = <&vcc_1v8>;
319
320 regulators {
321 vdd_center: DCDC_REG1 {
322 regulator-name = "vdd_center";
323 regulator-always-on;
324 regulator-boot-on;
325 regulator-min-microvolt = <750000>;
326 regulator-max-microvolt = <1350000>;
327 regulator-ramp-delay = <6001>;
328
329 regulator-state-mem {
330 regulator-off-in-suspend;
331 };
332 };
333
334 vdd_cpu_l: DCDC_REG2 {
335 regulator-name = "vdd_cpu_l";
336 regulator-always-on;
337 regulator-boot-on;
338 regulator-min-microvolt = <750000>;
339 regulator-max-microvolt = <1350000>;
340 regulator-ramp-delay = <6001>;
341
342 regulator-state-mem {
343 regulator-off-in-suspend;
344 };
345 };
346
347 vcc_ddr: DCDC_REG3 {
348 regulator-name = "vcc_ddr";
349 regulator-always-on;
350 regulator-boot-on;
351
352 regulator-state-mem {
353 regulator-on-in-suspend;
354 };
355 };
356
357 vcc_1v8: DCDC_REG4 {
358 regulator-name = "vcc_1v8";
359 regulator-always-on;
360 regulator-boot-on;
361 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>;
363
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <1800000>;
367 };
368 };
369
370 vcc1v8_apio2: LDO_REG1 {
371 regulator-name = "vcc1v8_apio2";
372 regulator-always-on;
373 regulator-boot-on;
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376
377 regulator-state-mem {
378 regulator-off-in-suspend;
379 };
380 };
381
382 vcc_vldo2: LDO_REG2 {
383 regulator-name = "vcc_vldo2";
384 regulator-always-on;
385 regulator-boot-on;
386 regulator-min-microvolt = <3000000>;
387 regulator-max-microvolt = <3000000>;
388
389 regulator-state-mem {
390 regulator-off-in-suspend;
391 };
392 };
393
394 vcc1v8_pmupll: LDO_REG3 {
395 regulator-name = "vcc1v8_pmupll";
396 regulator-always-on;
397 regulator-boot-on;
398 regulator-min-microvolt = <1800000>;
399 regulator-max-microvolt = <1800000>;
400
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <1800000>;
404 };
405 };
406
407 vccio_sd: LDO_REG4 {
408 regulator-name = "vccio_sd";
409 regulator-always-on;
410 regulator-boot-on;
411 regulator-min-microvolt = <1800000>;
412 regulator-max-microvolt = <3000000>;
413
414 regulator-state-mem {
415 regulator-on-in-suspend;
416 regulator-suspend-microvolt = <3000000>;
417 };
418 };
419
420 vcc_vldo5: LDO_REG5 {
421 regulator-name = "vcc_vldo5";
422 regulator-always-on;
423 regulator-boot-on;
424 regulator-min-microvolt = <3000000>;
425 regulator-max-microvolt = <3000000>;
426
427 regulator-state-mem {
428 regulator-off-in-suspend;
429 };
430 };
431
432 vcc_1v5: LDO_REG6 {
433 regulator-name = "vcc_1v5";
434 regulator-always-on;
435 regulator-boot-on;
436 regulator-min-microvolt = <1500000>;
437 regulator-max-microvolt = <1500000>;
438
439 regulator-state-mem {
440 regulator-on-in-suspend;
441 regulator-suspend-microvolt = <1500000>;
442 };
443 };
444
445 vcc1v8_codec: LDO_REG7 {
446 regulator-name = "vcc1v8_codec";
447 regulator-always-on;
448 regulator-boot-on;
449 regulator-min-microvolt = <1800000>;
450 regulator-max-microvolt = <1800000>;
451
452 regulator-state-mem {
453 regulator-off-in-suspend;
454 };
455 };
456
457 vcc_3v0: LDO_REG8 {
458 regulator-name = "vcc_3v0";
459 regulator-always-on;
460 regulator-boot-on;
461 regulator-min-microvolt = <3000000>;
462 regulator-max-microvolt = <3000000>;
463
464 regulator-state-mem {
465 regulator-on-in-suspend;
466 regulator-suspend-microvolt = <3000000>;
467 };
468 };
469
470 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
471 regulator-name = "vcc3v3_s3";
472 regulator-always-on;
473 regulator-boot-on;
474
475 regulator-state-mem {
476 regulator-off-in-suspend;
477 };
478 };
479
480 vcc3v3_s0: SWITCH_REG2 {
481 regulator-name = "vcc3v3_s0";
482 regulator-always-on;
483 regulator-boot-on;
484
485 regulator-state-mem {
486 regulator-off-in-suspend;
487 };
488 };
489 };
490 };
491
492 vdd_cpu_b: regulator@40 {
493 compatible = "silergy,syr827";
494 reg = <0x40>;
495 fcs,suspend-voltage-selector = <1>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&cpu_b_sleep>;
498 regulator-name = "vdd_cpu_b";
499 regulator-min-microvolt = <712500>;
500 regulator-max-microvolt = <1500000>;
501 regulator-ramp-delay = <1000>;
502 regulator-always-on;
503 regulator-boot-on;
504 vin-supply = <&vsys_3v3>;
505
506 regulator-state-mem {
507 regulator-off-in-suspend;
508 };
509 };
510
511 vdd_gpu: regulator@41 {
512 compatible = "silergy,syr828";
513 reg = <0x41>;
514 fcs,suspend-voltage-selector = <1>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&gpu_sleep>;
517 regulator-name = "vdd_gpu";
518 regulator-min-microvolt = <712500>;
519 regulator-max-microvolt = <1500000>;
520 regulator-ramp-delay = <1000>;
521 regulator-always-on;
522 regulator-boot-on;
523 vin-supply = <&vsys_3v3>;
524
525 regulator-state-mem {
526 regulator-off-in-suspend;
527 };
528 };
529};
530
531&i2c8 {
532 clock-frequency = <400000>;
533 i2c-scl-rising-time-ns = <160>;
534 i2c-scl-falling-time-ns = <30>;
535 status = "okay";
536};
537
538&i2s0 {
539 rockchip,playback-channels = <8>;
540 rockchip,capture-channels = <8>;
541 status = "okay";
542};
543
544&i2s1 {
545 rockchip,playback-channels = <2>;
546 rockchip,capture-channels = <2>;
547 status = "okay";
548};
549
550&i2s2 {
551 status = "okay";
552};
553
554&io_domains {
555 bt656-supply = <&vcc1v8_apio2>;
556 audio-supply = <&vcc1v8_codec>;
557 sdmmc-supply = <&vccio_sd>;
558 gpio1830-supply = <&vcc_3v0>;
559 status = "okay";
560};
561
562&pmu_io_domains {
563 pmu1830-supply = <&vcc_1v8>;
564 status = "okay";
565};
566
567&pinctrl {
568 bt {
569 bt_host_wake_l: bt-host-wake-l {
570 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
571 };
572
573 bt_reg_on_h: bt-reg-on-h {
574 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
575 };
576
577 bt_wake_l: bt-wake-l {
578 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
579 };
580 };
581
582 buttons {
583 pwrbtn: pwrbtn {
584 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
585 };
586 };
587
588 leds {
589 sys_led_gpio: sys_led-gpio {
590 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
591 };
592
593 user_led_gpio: user_led-gpio {
594 rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
595 };
596 };
597
598 pmic {
599 pmic_int_l: pmic-int-l {
600 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
601 };
602
603 cpu_b_sleep: cpu-b-sleep {
604 rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
605 };
606
607 gpu_sleep: gpu-sleep {
608 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
609 };
610 };
611
612 sdio-pwrseq {
613 wifi_enable_h: wifi-enable-h {
614 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
615 };
616 };
617
618 usb2 {
619 vcc5v0_host_en: vcc5v0-host-en {
620 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
621 };
622 };
623
624 wifi {
625 wifi_host_wake_l: wifi-host-wake-l {
626 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
627 };
628 };
629};
630
631&pwm0 {
632 status = "okay";
633};
634
635&pwm2 {
636 status = "okay";
637};
638
639&saradc {
640 vref-supply = <&vcca1v8_s3>;
641 status = "okay";
642};
643
644&sdio0 {
645 /* WiFi & BT combo module Ampak AP6356S */
646 bus-width = <4>;
647 cap-sdio-irq;
648 cap-sd-highspeed;
649 keep-power-in-suspend;
650 mmc-pwrseq = <&sdio_pwrseq>;
651 non-removable;
652 pinctrl-names = "default";
653 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
654 sd-uhs-sdr104;
655 vqmmc-supply = <&vcc1v8_s3>;
656 vmmc-supply = <&vccio_sd>;
657 status = "okay";
658
659 brcmf: wifi@1 {
660 compatible = "brcm,bcm4329-fmac";
661 interrupt-parent = <&gpio0>;
662 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
663 interrupt-names = "host-wake";
664 brcm,drive-strength = <5>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&wifi_host_wake_l>;
667 };
668};
669
670&sdmmc {
671 bus-width = <4>;
672 cap-mmc-highspeed;
673 cap-sd-highspeed;
674 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
675 disable-wp;
676 max-frequency = <150000000>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
679 status = "okay";
680};
681
682&sdhci {
683 bus-width = <8>;
684 mmc-hs400-1_8v;
685 mmc-hs400-enhanced-strobe;
686 non-removable;
687 status = "okay";
688};
689
690&tcphy0 {
691 status = "okay";
692};
693
694&tcphy1 {
695 status = "okay";
696};
697
698&tsadc {
699 /* tshut mode 0:CRU 1:GPIO */
700 rockchip,hw-tshut-mode = <1>;
701 /* tshut polarity 0:LOW 1:HIGH */
702 rockchip,hw-tshut-polarity = <1>;
703 status = "okay";
704};
705
706&u2phy0 {
707 status = "okay";
708
709 u2phy0_otg: otg-port {
710 status = "okay";
711 };
712
713 u2phy0_host: host-port {
714 phy-supply = <&vcc5v0_host>;
715 status = "okay";
716 };
717};
718
719&u2phy1 {
720 status = "okay";
721
722 u2phy1_otg: otg-port {
723 status = "okay";
724 };
725
726 u2phy1_host: host-port {
727 phy-supply = <&vcc5v0_host>;
728 status = "okay";
729 };
730};
731
732&uart0 {
733 pinctrl-names = "default";
734 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
735 status = "okay";
736
737 bluetooth {
738 compatible = "brcm,bcm43438-bt";
739 clocks = <&rk808 1>;
740 clock-names = "lpo";
741 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
742 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
743 shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
744 max-speed = <4000000>;
745 pinctrl-names = "default";
746 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
747 vbat-supply = <&vsys_3v3>;
748 vddio-supply = <&vcc_1v8>;
749 };
750};
751
752&uart2 {
753 status = "okay";
754};
755
756&usb_host0_ehci {
757 status = "okay";
758};
759
760&usb_host0_ohci {
761 status = "okay";
762};
763
764&usb_host1_ehci {
765 status = "okay";
766};
767
768&usb_host1_ohci {
769 status = "okay";
770};
771
772&usbdrd3_0 {
773 status = "okay";
774};
775
776&usbdrd_dwc3_0 {
777 status = "okay";
778 dr_mode = "otg";
779};
780
781&usbdrd3_1 {
782 status = "okay";
783};
784
785&usbdrd_dwc3_1 {
786 status = "okay";
787 dr_mode = "host";
788};
789
790&vopb {
791 status = "okay";
792};
793
794&vopb_mmu {
795 status = "okay";
796};
797
798&vopl {
799 status = "okay";
800};
801
802&vopl_mmu {
803 status = "okay";
804};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
index 55e74f4d5cd0..1ae1ebd4efdd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
@@ -178,6 +178,10 @@
178 status = "okay"; 178 status = "okay";
179}; 179};
180 180
181&hdmi_sound {
182 status = "okay";
183};
184
181&i2c0 { 185&i2c0 {
182 clock-frequency = <400000>; 186 clock-frequency = <400000>;
183 i2c-scl-rising-time-ns = <168>; 187 i2c-scl-rising-time-ns = <168>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
index c624b4e73129..437a75f31ad4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
@@ -124,6 +124,45 @@
124 status = "okay"; 124 status = "okay";
125}; 125};
126 126
127&thermal_zones {
128 cpu_thermal: cpu {
129 polling-delay-passive = <100>;
130 polling-delay = <1000>;
131 thermal-sensors = <&tsadc 0>;
132 sustainable-power = <1550>;
133
134 trips {
135 cpu_alert0: cpu_alert0 {
136 temperature = <65000>;
137 hysteresis = <2000>;
138 type = "passive";
139 };
140
141 cpu_alert1: cpu_alert1 {
142 temperature = <75000>;
143 hysteresis = <2000>;
144 type = "passive";
145 };
146
147 cpu_crit: cpu_crit {
148 temperature = <95000>;
149 hysteresis = <2000>;
150 type = "critical";
151 };
152 };
153
154 cooling-maps {
155 map0 {
156
157 trip = <&cpu_alert1>;
158 cooling-device =
159 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
160 <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
161 };
162 };
163 };
164};
165
127&usbdrd_dwc3_0 { 166&usbdrd_dwc3_0 {
128 dr_mode = "otg"; 167 dr_mode = "otg";
129}; 168};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 04623e52ac5d..1bc1579674e5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -565,12 +565,11 @@
565 status = "okay"; 565 status = "okay";
566 566
567 u2phy0_otg: otg-port { 567 u2phy0_otg: otg-port {
568 phy-supply = <&vcc5v0_typec0>;
569 status = "okay"; 568 status = "okay";
570 }; 569 };
571 570
572 u2phy0_host: host-port { 571 u2phy0_host: host-port {
573 phy-supply = <&vcc5v0_host>; 572 phy-supply = <&vcc5v0_typec0>;
574 status = "okay"; 573 status = "okay";
575 }; 574 };
576}; 575};
@@ -620,7 +619,7 @@
620 619
621&usbdrd_dwc3_0 { 620&usbdrd_dwc3_0 {
622 status = "okay"; 621 status = "okay";
623 dr_mode = "otg"; 622 dr_mode = "host";
624}; 623};
625 624
626&usbdrd3_1 { 625&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 89594a7276f4..cede1ad81be2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -414,6 +414,9 @@
414 compatible = "snps,dwc3"; 414 compatible = "snps,dwc3";
415 reg = <0x0 0xfe800000 0x0 0x100000>; 415 reg = <0x0 0xfe800000 0x0 0x100000>;
416 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>; 416 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
417 clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
418 <&cru SCLK_USB3OTG0_SUSPEND>;
419 clock-names = "ref", "bus_early", "suspend";
417 dr_mode = "otg"; 420 dr_mode = "otg";
418 phys = <&u2phy0_otg>, <&tcphy0_usb3>; 421 phys = <&u2phy0_otg>, <&tcphy0_usb3>;
419 phy-names = "usb2-phy", "usb3-phy"; 422 phy-names = "usb2-phy", "usb3-phy";
@@ -447,6 +450,9 @@
447 compatible = "snps,dwc3"; 450 compatible = "snps,dwc3";
448 reg = <0x0 0xfe900000 0x0 0x100000>; 451 reg = <0x0 0xfe900000 0x0 0x100000>;
449 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; 452 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
453 clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
454 <&cru SCLK_USB3OTG1_SUSPEND>;
455 clock-names = "ref", "bus_early", "suspend";
450 dr_mode = "otg"; 456 dr_mode = "otg";
451 phys = <&u2phy1_otg>, <&tcphy1_usb3>; 457 phys = <&u2phy1_otg>, <&tcphy1_usb3>;
452 phy-names = "usb2-phy", "usb3-phy"; 458 phy-names = "usb2-phy", "usb3-phy";
@@ -821,15 +827,6 @@
821 type = "critical"; 827 type = "critical";
822 }; 828 };
823 }; 829 };
824
825 cooling-maps {
826 map0 {
827 trip = <&gpu_alert0>;
828 cooling-device =
829 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
830 <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
831 };
832 };
833 }; 830 };
834 }; 831 };
835 832
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi
new file mode 100644
index 000000000000..bb5ebf6608b9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi
@@ -0,0 +1,22 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
3
4#include "rk3399.dtsi"
5
6/ {
7 compatible = "rockchip,rk3399pro";
8};
9
10/* Default to enabled since AP talk to NPU part over pcie */
11&pcie_phy {
12 status = "okay";
13};
14
15/* Default to enabled since AP talk to NPU part over pcie */
16&pcie0 {
17 ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
18 num-lanes = <4>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pcie_clkreqn_cpm>;
21 status = "okay";
22};
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-14 05:23:59 -0500